mtd: nand: Move Hynix specific init/detection logic in nand_hynix.c
Move Hynix specific initialization and detection logic into nand_hynix.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Richard Weinberger <richard@nod.at>
This commit is contained in:
@@ -61,4 +61,5 @@ obj-$(CONFIG_MTD_NAND_QCOM) += qcom_nandc.o
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obj-$(CONFIG_MTD_NAND_MTK) += mtk_nand.o mtk_ecc.o
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obj-$(CONFIG_MTD_NAND_MTK) += mtk_nand.o mtk_ecc.o
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nand-objs := nand_base.o nand_bbt.o nand_timings.o nand_ids.o
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nand-objs := nand_base.o nand_bbt.o nand_timings.o nand_ids.o
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nand-objs += nand_hynix.o
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nand-objs += nand_samsung.o
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nand-objs += nand_samsung.o
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@@ -3829,85 +3829,32 @@ void nand_decode_ext_id(struct nand_chip *chip)
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/* The 4th id byte is the important one */
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/* The 4th id byte is the important one */
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extid = id_data[3];
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extid = id_data[3];
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/* Calc pagesize */
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mtd->writesize = 1024 << (extid & 0x03);
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extid >>= 2;
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/* Calc oobsize */
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mtd->oobsize = (8 << (extid & 0x01)) * (mtd->writesize >> 9);
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extid >>= 2;
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/* Calc blocksize. Blocksize is multiples of 64KiB */
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mtd->erasesize = (64 * 1024) << (extid & 0x03);
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extid >>= 2;
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/* Get buswidth information */
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if (extid & 0x1)
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chip->options |= NAND_BUSWIDTH_16;
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/*
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/*
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* Field definitions are in the following datasheets:
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* Toshiba 24nm raw SLC (i.e., not BENAND) have 32B OOB per
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* Old style (4,5 byte ID): Samsung K9GAG08U0M (p.32)
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* 512B page. For Toshiba SLC, we decode the 5th/6th byte as
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* Hynix MLC (6 byte ID): Hynix H27UBG8T2B (p.22)
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* follows:
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*
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* - ID byte 6, bits[2:0]: 100b -> 43nm, 101b -> 32nm,
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* Check for ID length, non-zero 6th byte, cell type, and Hynix/Samsung
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* 110b -> 24nm
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* ID to decide what to do.
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* - ID byte 5, bit[7]: 1 -> BENAND, 0 -> raw SLC
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*/
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*/
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if (id_len == 6 && id_data[0] == NAND_MFR_HYNIX &&
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if (id_len >= 6 && id_data[0] == NAND_MFR_TOSHIBA &&
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!nand_is_slc(chip)) {
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nand_is_slc(chip) &&
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unsigned int tmp;
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(id_data[5] & 0x7) == 0x6 /* 24nm */ &&
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!(id_data[4] & 0x80) /* !BENAND */)
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/* Calc pagesize */
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mtd->oobsize = 32 * mtd->writesize >> 9;
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mtd->writesize = 2048 << (extid & 0x03);
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extid >>= 2;
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/* Calc oobsize */
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switch (((extid >> 2) & 0x04) | (extid & 0x03)) {
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case 0:
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mtd->oobsize = 128;
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break;
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case 1:
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mtd->oobsize = 224;
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break;
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case 2:
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mtd->oobsize = 448;
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break;
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case 3:
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mtd->oobsize = 64;
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break;
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case 4:
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mtd->oobsize = 32;
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break;
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case 5:
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mtd->oobsize = 16;
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break;
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default:
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mtd->oobsize = 640;
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break;
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}
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extid >>= 2;
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/* Calc blocksize */
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tmp = ((extid >> 1) & 0x04) | (extid & 0x03);
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if (tmp < 0x03)
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mtd->erasesize = (128 * 1024) << tmp;
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else if (tmp == 0x03)
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mtd->erasesize = 768 * 1024;
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else
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mtd->erasesize = (64 * 1024) << tmp;
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} else {
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/* Calc pagesize */
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mtd->writesize = 1024 << (extid & 0x03);
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extid >>= 2;
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/* Calc oobsize */
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mtd->oobsize = (8 << (extid & 0x01)) *
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(mtd->writesize >> 9);
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extid >>= 2;
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/* Calc blocksize. Blocksize is multiples of 64KiB */
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mtd->erasesize = (64 * 1024) << (extid & 0x03);
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extid >>= 2;
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/* Get buswidth information */
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if (extid & 0x1)
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chip->options |= NAND_BUSWIDTH_16;
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/*
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* Toshiba 24nm raw SLC (i.e., not BENAND) have 32B OOB per
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* 512B page. For Toshiba SLC, we decode the 5th/6th byte as
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* follows:
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* - ID byte 6, bits[2:0]: 100b -> 43nm, 101b -> 32nm,
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* 110b -> 24nm
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* - ID byte 5, bit[7]: 1 -> BENAND, 0 -> raw SLC
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*/
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if (id_len >= 6 && id_data[0] == NAND_MFR_TOSHIBA &&
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nand_is_slc(chip) &&
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(id_data[5] & 0x7) == 0x6 /* 24nm */ &&
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!(id_data[4] & 0x80) /* !BENAND */) {
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mtd->oobsize = 32 * mtd->writesize >> 9;
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}
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}
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}
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}
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EXPORT_SYMBOL_GPL(nand_decode_ext_id);
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EXPORT_SYMBOL_GPL(nand_decode_ext_id);
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@@ -3966,15 +3913,10 @@ static void nand_decode_bbm_options(struct nand_chip *chip)
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* Micron devices with 2KiB pages and on SLC Samsung, Hynix, Toshiba,
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* Micron devices with 2KiB pages and on SLC Samsung, Hynix, Toshiba,
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* AMD/Spansion, and Macronix. All others scan only the first page.
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* AMD/Spansion, and Macronix. All others scan only the first page.
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*/
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*/
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if (!nand_is_slc(chip) && maf_id == NAND_MFR_HYNIX)
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if ((nand_is_slc(chip) &&
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chip->bbt_options |= NAND_BBT_SCANLASTPAGE;
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(maf_id == NAND_MFR_TOSHIBA || maf_id == NAND_MFR_AMD ||
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else if ((nand_is_slc(chip) &&
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maf_id == NAND_MFR_MACRONIX)) ||
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(maf_id == NAND_MFR_HYNIX ||
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(mtd->writesize == 2048 && maf_id == NAND_MFR_MICRON))
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maf_id == NAND_MFR_TOSHIBA ||
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maf_id == NAND_MFR_AMD ||
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maf_id == NAND_MFR_MACRONIX)) ||
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(mtd->writesize == 2048 &&
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maf_id == NAND_MFR_MICRON))
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chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
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chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
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}
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}
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84
drivers/mtd/nand/nand_hynix.c
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84
drivers/mtd/nand/nand_hynix.c
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@@ -0,0 +1,84 @@
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/*
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* Copyright (C) 2017 Free Electrons
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* Copyright (C) 2017 NextThing Co
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*
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* Author: Boris Brezillon <boris.brezillon@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/mtd/nand.h>
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static void hynix_nand_decode_id(struct nand_chip *chip)
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{
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struct mtd_info *mtd = nand_to_mtd(chip);
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/* Hynix MLC (6 byte ID): Hynix H27UBG8T2B (p.22) */
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if (chip->id.len == 6 && !nand_is_slc(chip)) {
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u8 tmp, extid = chip->id.data[3];
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/* Extract pagesize */
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mtd->writesize = 2048 << (extid & 0x03);
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extid >>= 2;
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/* Extract oobsize */
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switch (((extid >> 2) & 0x4) | (extid & 0x3)) {
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case 0:
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mtd->oobsize = 128;
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break;
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case 1:
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mtd->oobsize = 224;
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break;
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case 2:
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mtd->oobsize = 448;
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break;
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case 3:
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mtd->oobsize = 64;
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break;
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case 4:
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mtd->oobsize = 32;
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break;
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case 5:
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mtd->oobsize = 16;
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break;
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default:
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mtd->oobsize = 640;
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break;
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}
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/* Extract blocksize */
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extid >>= 2;
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tmp = ((extid >> 1) & 0x04) | (extid & 0x03);
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if (tmp < 0x03)
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mtd->erasesize = (128 * 1024) << tmp;
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else if (tmp == 0x03)
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mtd->erasesize = 768 * 1024;
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else
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mtd->erasesize = (64 * 1024) << tmp;
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} else {
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nand_decode_ext_id(chip);
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}
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}
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static int hynix_nand_init(struct nand_chip *chip)
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{
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if (!nand_is_slc(chip))
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chip->bbt_options |= NAND_BBT_SCANLASTPAGE;
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else
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chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
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return 0;
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}
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const struct nand_manufacturer_ops hynix_nand_manuf_ops = {
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.detect = hynix_nand_decode_id,
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.init = hynix_nand_init,
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};
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@@ -177,7 +177,7 @@ static const struct nand_manufacturer nand_manufacturers[] = {
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{NAND_MFR_NATIONAL, "National"},
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{NAND_MFR_NATIONAL, "National"},
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{NAND_MFR_RENESAS, "Renesas"},
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{NAND_MFR_RENESAS, "Renesas"},
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{NAND_MFR_STMICRO, "ST Micro"},
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{NAND_MFR_STMICRO, "ST Micro"},
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{NAND_MFR_HYNIX, "Hynix"},
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{NAND_MFR_HYNIX, "Hynix", &hynix_nand_manuf_ops},
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{NAND_MFR_MICRON, "Micron"},
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{NAND_MFR_MICRON, "Micron"},
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{NAND_MFR_AMD, "AMD/Spansion"},
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{NAND_MFR_AMD, "AMD/Spansion"},
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{NAND_MFR_MACRONIX, "Macronix"},
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{NAND_MFR_MACRONIX, "Macronix"},
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@@ -1115,6 +1115,7 @@ nand_manufacturer_name(const struct nand_manufacturer *manufacturer)
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extern struct nand_flash_dev nand_flash_ids[];
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extern struct nand_flash_dev nand_flash_ids[];
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extern const struct nand_manufacturer_ops samsung_nand_manuf_ops;
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extern const struct nand_manufacturer_ops samsung_nand_manuf_ops;
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extern const struct nand_manufacturer_ops hynix_nand_manuf_ops;
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int nand_default_bbt(struct mtd_info *mtd);
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int nand_default_bbt(struct mtd_info *mtd);
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int nand_markbad_bbt(struct mtd_info *mtd, loff_t offs);
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int nand_markbad_bbt(struct mtd_info *mtd, loff_t offs);
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