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perf vendor events intel: Update IvyTown events to v20

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Signed-off-by: Andi Kleen <ak@linux.intel.com>
Cc: Kan Liang <kan.liang@intel.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Link: https://lkml.kernel.org/r/20190315165219.GA21223@tassilo.jf.intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
This commit is contained in:
Andi Kleen
2019-03-14 08:40:32 -07:00
committed by Arnaldo Carvalho de Melo
parent e313477f7e
commit 009edd9ae0
1 changed files with 0 additions and 4 deletions
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4
tools/perf/pmu-events/arch/x86/ivytown/pipeline.json
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@@ -1,6 +1,5 @@
[ [
{ {
"EventCode": "0x00",
"Counter": "Fixed counter 0", "Counter": "Fixed counter 0",
"UMask": "0x1", "UMask": "0x1",
"EventName": "INST_RETIRED.ANY", "EventName": "INST_RETIRED.ANY",
@@ -9,7 +8,6 @@
"CounterHTOff": "Fixed counter 0" "CounterHTOff": "Fixed counter 0"
}, },
{ {
"EventCode": "0x00",
"Counter": "Fixed counter 1", "Counter": "Fixed counter 1",
"UMask": "0x2", "UMask": "0x2",
"EventName": "CPU_CLK_UNHALTED.THREAD", "EventName": "CPU_CLK_UNHALTED.THREAD",
@@ -19,7 +17,6 @@
}, },
{ {
"PublicDescription": "Core cycles when at least one thread on the physical core is not in halt state.", "PublicDescription": "Core cycles when at least one thread on the physical core is not in halt state.",
"EventCode": "0x00",
"Counter": "Fixed counter 1", "Counter": "Fixed counter 1",
"UMask": "0x2", "UMask": "0x2",
"AnyThread": "1", "AnyThread": "1",
@@ -29,7 +26,6 @@
"CounterHTOff": "Fixed counter 1" "CounterHTOff": "Fixed counter 1"
}, },
{ {
"EventCode": "0x00",
"Counter": "Fixed counter 2", "Counter": "Fixed counter 2",
"UMask": "0x3", "UMask": "0x3",
"EventName": "CPU_CLK_UNHALTED.REF_TSC", "EventName": "CPU_CLK_UNHALTED.REF_TSC",