bcm7038_wdt.c 5.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2015 Broadcom Corporation
  4. *
  5. */
  6. #include <linux/clk.h>
  7. #include <linux/init.h>
  8. #include <linux/io.h>
  9. #include <linux/module.h>
  10. #include <linux/of.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/platform_data/bcm7038_wdt.h>
  13. #include <linux/pm.h>
  14. #include <linux/watchdog.h>
  15. #define WDT_START_1 0xff00
  16. #define WDT_START_2 0x00ff
  17. #define WDT_STOP_1 0xee00
  18. #define WDT_STOP_2 0x00ee
  19. #define WDT_TIMEOUT_REG 0x0
  20. #define WDT_CMD_REG 0x4
  21. #define WDT_MIN_TIMEOUT 1 /* seconds */
  22. #define WDT_DEFAULT_TIMEOUT 30 /* seconds */
  23. #define WDT_DEFAULT_RATE 27000000
  24. struct bcm7038_watchdog {
  25. void __iomem *base;
  26. struct watchdog_device wdd;
  27. u32 rate;
  28. struct clk *clk;
  29. };
  30. static bool nowayout = WATCHDOG_NOWAYOUT;
  31. static inline void bcm7038_wdt_write(u32 value, void __iomem *addr)
  32. {
  33. /* MIPS chips strapped for BE will automagically configure the
  34. * peripheral registers for CPU-native byte order.
  35. */
  36. if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
  37. __raw_writel(value, addr);
  38. else
  39. writel_relaxed(value, addr);
  40. }
  41. static inline u32 bcm7038_wdt_read(void __iomem *addr)
  42. {
  43. if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
  44. return __raw_readl(addr);
  45. else
  46. return readl_relaxed(addr);
  47. }
  48. static void bcm7038_wdt_set_timeout_reg(struct watchdog_device *wdog)
  49. {
  50. struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdog);
  51. u32 timeout;
  52. timeout = wdt->rate * wdog->timeout;
  53. bcm7038_wdt_write(timeout, wdt->base + WDT_TIMEOUT_REG);
  54. }
  55. static int bcm7038_wdt_ping(struct watchdog_device *wdog)
  56. {
  57. struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdog);
  58. bcm7038_wdt_write(WDT_START_1, wdt->base + WDT_CMD_REG);
  59. bcm7038_wdt_write(WDT_START_2, wdt->base + WDT_CMD_REG);
  60. return 0;
  61. }
  62. static int bcm7038_wdt_start(struct watchdog_device *wdog)
  63. {
  64. bcm7038_wdt_set_timeout_reg(wdog);
  65. bcm7038_wdt_ping(wdog);
  66. return 0;
  67. }
  68. static int bcm7038_wdt_stop(struct watchdog_device *wdog)
  69. {
  70. struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdog);
  71. bcm7038_wdt_write(WDT_STOP_1, wdt->base + WDT_CMD_REG);
  72. bcm7038_wdt_write(WDT_STOP_2, wdt->base + WDT_CMD_REG);
  73. return 0;
  74. }
  75. static int bcm7038_wdt_set_timeout(struct watchdog_device *wdog,
  76. unsigned int t)
  77. {
  78. /* Can't modify timeout value if watchdog timer is running */
  79. bcm7038_wdt_stop(wdog);
  80. wdog->timeout = t;
  81. bcm7038_wdt_start(wdog);
  82. return 0;
  83. }
  84. static unsigned int bcm7038_wdt_get_timeleft(struct watchdog_device *wdog)
  85. {
  86. struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdog);
  87. u32 time_left;
  88. time_left = bcm7038_wdt_read(wdt->base + WDT_CMD_REG);
  89. return time_left / wdt->rate;
  90. }
  91. static const struct watchdog_info bcm7038_wdt_info = {
  92. .identity = "Broadcom BCM7038 Watchdog Timer",
  93. .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
  94. WDIOF_MAGICCLOSE
  95. };
  96. static const struct watchdog_ops bcm7038_wdt_ops = {
  97. .owner = THIS_MODULE,
  98. .start = bcm7038_wdt_start,
  99. .stop = bcm7038_wdt_stop,
  100. .set_timeout = bcm7038_wdt_set_timeout,
  101. .get_timeleft = bcm7038_wdt_get_timeleft,
  102. };
  103. static void bcm7038_clk_disable_unprepare(void *data)
  104. {
  105. clk_disable_unprepare(data);
  106. }
  107. static int bcm7038_wdt_probe(struct platform_device *pdev)
  108. {
  109. struct bcm7038_wdt_platform_data *pdata = pdev->dev.platform_data;
  110. struct device *dev = &pdev->dev;
  111. struct bcm7038_watchdog *wdt;
  112. const char *clk_name = NULL;
  113. int err;
  114. wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
  115. if (!wdt)
  116. return -ENOMEM;
  117. platform_set_drvdata(pdev, wdt);
  118. wdt->base = devm_platform_ioremap_resource(pdev, 0);
  119. if (IS_ERR(wdt->base))
  120. return PTR_ERR(wdt->base);
  121. if (pdata && pdata->clk_name)
  122. clk_name = pdata->clk_name;
  123. wdt->clk = devm_clk_get(dev, clk_name);
  124. /* If unable to get clock, use default frequency */
  125. if (!IS_ERR(wdt->clk)) {
  126. err = clk_prepare_enable(wdt->clk);
  127. if (err)
  128. return err;
  129. err = devm_add_action_or_reset(dev,
  130. bcm7038_clk_disable_unprepare,
  131. wdt->clk);
  132. if (err)
  133. return err;
  134. wdt->rate = clk_get_rate(wdt->clk);
  135. /* Prevent divide-by-zero exception */
  136. if (!wdt->rate)
  137. wdt->rate = WDT_DEFAULT_RATE;
  138. } else {
  139. wdt->rate = WDT_DEFAULT_RATE;
  140. wdt->clk = NULL;
  141. }
  142. wdt->wdd.info = &bcm7038_wdt_info;
  143. wdt->wdd.ops = &bcm7038_wdt_ops;
  144. wdt->wdd.min_timeout = WDT_MIN_TIMEOUT;
  145. wdt->wdd.timeout = WDT_DEFAULT_TIMEOUT;
  146. wdt->wdd.max_timeout = 0xffffffff / wdt->rate;
  147. wdt->wdd.parent = dev;
  148. watchdog_set_drvdata(&wdt->wdd, wdt);
  149. watchdog_stop_on_reboot(&wdt->wdd);
  150. watchdog_stop_on_unregister(&wdt->wdd);
  151. err = devm_watchdog_register_device(dev, &wdt->wdd);
  152. if (err)
  153. return err;
  154. dev_info(dev, "Registered BCM7038 Watchdog\n");
  155. return 0;
  156. }
  157. static int bcm7038_wdt_suspend(struct device *dev)
  158. {
  159. struct bcm7038_watchdog *wdt = dev_get_drvdata(dev);
  160. if (watchdog_active(&wdt->wdd))
  161. return bcm7038_wdt_stop(&wdt->wdd);
  162. return 0;
  163. }
  164. static int bcm7038_wdt_resume(struct device *dev)
  165. {
  166. struct bcm7038_watchdog *wdt = dev_get_drvdata(dev);
  167. if (watchdog_active(&wdt->wdd))
  168. return bcm7038_wdt_start(&wdt->wdd);
  169. return 0;
  170. }
  171. static DEFINE_SIMPLE_DEV_PM_OPS(bcm7038_wdt_pm_ops,
  172. bcm7038_wdt_suspend, bcm7038_wdt_resume);
  173. static const struct of_device_id bcm7038_wdt_match[] = {
  174. { .compatible = "brcm,bcm6345-wdt" },
  175. { .compatible = "brcm,bcm7038-wdt" },
  176. {},
  177. };
  178. MODULE_DEVICE_TABLE(of, bcm7038_wdt_match);
  179. static const struct platform_device_id bcm7038_wdt_devtype[] = {
  180. { .name = "bcm63xx-wdt" },
  181. { /* sentinel */ },
  182. };
  183. MODULE_DEVICE_TABLE(platform, bcm7038_wdt_devtype);
  184. static struct platform_driver bcm7038_wdt_driver = {
  185. .probe = bcm7038_wdt_probe,
  186. .id_table = bcm7038_wdt_devtype,
  187. .driver = {
  188. .name = "bcm7038-wdt",
  189. .of_match_table = bcm7038_wdt_match,
  190. .pm = pm_sleep_ptr(&bcm7038_wdt_pm_ops),
  191. }
  192. };
  193. module_platform_driver(bcm7038_wdt_driver);
  194. module_param(nowayout, bool, 0);
  195. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  196. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  197. MODULE_LICENSE("GPL");
  198. MODULE_DESCRIPTION("Driver for Broadcom 7038 SoCs Watchdog");
  199. MODULE_AUTHOR("Justin Chen");