xhci-mtk-sch.c 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2015 MediaTek Inc.
  4. * Author:
  5. * Zhigang.Wei <[email protected]>
  6. * Chunfeng.Yun <[email protected]>
  7. */
  8. #include <linux/kernel.h>
  9. #include <linux/module.h>
  10. #include <linux/slab.h>
  11. #include "xhci.h"
  12. #include "xhci-mtk.h"
  13. #define SSP_BW_BOUNDARY 130000
  14. #define SS_BW_BOUNDARY 51000
  15. /* table 5-5. High-speed Isoc Transaction Limits in usb_20 spec */
  16. #define HS_BW_BOUNDARY 6144
  17. /* usb2 spec section11.18.1: at most 188 FS bytes per microframe */
  18. #define FS_PAYLOAD_MAX 188
  19. #define DBG_BUF_EN 64
  20. /* schedule error type */
  21. #define ESCH_SS_Y6 1001
  22. #define ESCH_SS_OVERLAP 1002
  23. #define ESCH_CS_OVERFLOW 1003
  24. #define ESCH_BW_OVERFLOW 1004
  25. #define ESCH_FIXME 1005
  26. /* mtk scheduler bitmasks */
  27. #define EP_BPKTS(p) ((p) & 0x7f)
  28. #define EP_BCSCOUNT(p) (((p) & 0x7) << 8)
  29. #define EP_BBM(p) ((p) << 11)
  30. #define EP_BOFFSET(p) ((p) & 0x3fff)
  31. #define EP_BREPEAT(p) (((p) & 0x7fff) << 16)
  32. static char *sch_error_string(int err_num)
  33. {
  34. switch (err_num) {
  35. case ESCH_SS_Y6:
  36. return "Can't schedule Start-Split in Y6";
  37. case ESCH_SS_OVERLAP:
  38. return "Can't find a suitable Start-Split location";
  39. case ESCH_CS_OVERFLOW:
  40. return "The last Complete-Split is greater than 7";
  41. case ESCH_BW_OVERFLOW:
  42. return "Bandwidth exceeds the maximum limit";
  43. case ESCH_FIXME:
  44. return "FIXME, to be resolved";
  45. default:
  46. return "Unknown";
  47. }
  48. }
  49. static int is_fs_or_ls(enum usb_device_speed speed)
  50. {
  51. return speed == USB_SPEED_FULL || speed == USB_SPEED_LOW;
  52. }
  53. static const char *
  54. decode_ep(struct usb_host_endpoint *ep, enum usb_device_speed speed)
  55. {
  56. static char buf[DBG_BUF_EN];
  57. struct usb_endpoint_descriptor *epd = &ep->desc;
  58. unsigned int interval;
  59. const char *unit;
  60. interval = usb_decode_interval(epd, speed);
  61. if (interval % 1000) {
  62. unit = "us";
  63. } else {
  64. unit = "ms";
  65. interval /= 1000;
  66. }
  67. snprintf(buf, DBG_BUF_EN, "%s ep%d%s %s, mpkt:%d, interval:%d/%d%s",
  68. usb_speed_string(speed), usb_endpoint_num(epd),
  69. usb_endpoint_dir_in(epd) ? "in" : "out",
  70. usb_ep_type_string(usb_endpoint_type(epd)),
  71. usb_endpoint_maxp(epd), epd->bInterval, interval, unit);
  72. return buf;
  73. }
  74. static u32 get_bw_boundary(enum usb_device_speed speed)
  75. {
  76. u32 boundary;
  77. switch (speed) {
  78. case USB_SPEED_SUPER_PLUS:
  79. boundary = SSP_BW_BOUNDARY;
  80. break;
  81. case USB_SPEED_SUPER:
  82. boundary = SS_BW_BOUNDARY;
  83. break;
  84. default:
  85. boundary = HS_BW_BOUNDARY;
  86. break;
  87. }
  88. return boundary;
  89. }
  90. /*
  91. * get the bandwidth domain which @ep belongs to.
  92. *
  93. * the bandwidth domain array is saved to @sch_array of struct xhci_hcd_mtk,
  94. * each HS root port is treated as a single bandwidth domain,
  95. * but each SS root port is treated as two bandwidth domains, one for IN eps,
  96. * one for OUT eps.
  97. * @real_port value is defined as follow according to xHCI spec:
  98. * 1 for SSport0, ..., N+1 for SSportN, N+2 for HSport0, N+3 for HSport1, etc
  99. * so the bandwidth domain array is organized as follow for simplification:
  100. * SSport0-OUT, SSport0-IN, ..., SSportX-OUT, SSportX-IN, HSport0, ..., HSportY
  101. */
  102. static struct mu3h_sch_bw_info *
  103. get_bw_info(struct xhci_hcd_mtk *mtk, struct usb_device *udev,
  104. struct usb_host_endpoint *ep)
  105. {
  106. struct xhci_hcd *xhci = hcd_to_xhci(mtk->hcd);
  107. struct xhci_virt_device *virt_dev;
  108. int bw_index;
  109. virt_dev = xhci->devs[udev->slot_id];
  110. if (!virt_dev->real_port) {
  111. WARN_ONCE(1, "%s invalid real_port\n", dev_name(&udev->dev));
  112. return NULL;
  113. }
  114. if (udev->speed >= USB_SPEED_SUPER) {
  115. if (usb_endpoint_dir_out(&ep->desc))
  116. bw_index = (virt_dev->real_port - 1) * 2;
  117. else
  118. bw_index = (virt_dev->real_port - 1) * 2 + 1;
  119. } else {
  120. /* add one more for each SS port */
  121. bw_index = virt_dev->real_port + xhci->usb3_rhub.num_ports - 1;
  122. }
  123. return &mtk->sch_array[bw_index];
  124. }
  125. static u32 get_esit(struct xhci_ep_ctx *ep_ctx)
  126. {
  127. u32 esit;
  128. esit = 1 << CTX_TO_EP_INTERVAL(le32_to_cpu(ep_ctx->ep_info));
  129. if (esit > XHCI_MTK_MAX_ESIT)
  130. esit = XHCI_MTK_MAX_ESIT;
  131. return esit;
  132. }
  133. static struct mu3h_sch_tt *find_tt(struct usb_device *udev)
  134. {
  135. struct usb_tt *utt = udev->tt;
  136. struct mu3h_sch_tt *tt, **tt_index, **ptt;
  137. bool allocated_index = false;
  138. if (!utt)
  139. return NULL; /* Not below a TT */
  140. /*
  141. * Find/create our data structure.
  142. * For hubs with a single TT, we get it directly.
  143. * For hubs with multiple TTs, there's an extra level of pointers.
  144. */
  145. tt_index = NULL;
  146. if (utt->multi) {
  147. tt_index = utt->hcpriv;
  148. if (!tt_index) { /* Create the index array */
  149. tt_index = kcalloc(utt->hub->maxchild,
  150. sizeof(*tt_index), GFP_KERNEL);
  151. if (!tt_index)
  152. return ERR_PTR(-ENOMEM);
  153. utt->hcpriv = tt_index;
  154. allocated_index = true;
  155. }
  156. ptt = &tt_index[udev->ttport - 1];
  157. } else {
  158. ptt = (struct mu3h_sch_tt **) &utt->hcpriv;
  159. }
  160. tt = *ptt;
  161. if (!tt) { /* Create the mu3h_sch_tt */
  162. tt = kzalloc(sizeof(*tt), GFP_KERNEL);
  163. if (!tt) {
  164. if (allocated_index) {
  165. utt->hcpriv = NULL;
  166. kfree(tt_index);
  167. }
  168. return ERR_PTR(-ENOMEM);
  169. }
  170. INIT_LIST_HEAD(&tt->ep_list);
  171. *ptt = tt;
  172. }
  173. return tt;
  174. }
  175. /* Release the TT above udev, if it's not in use */
  176. static void drop_tt(struct usb_device *udev)
  177. {
  178. struct usb_tt *utt = udev->tt;
  179. struct mu3h_sch_tt *tt, **tt_index, **ptt;
  180. int i, cnt;
  181. if (!utt || !utt->hcpriv)
  182. return; /* Not below a TT, or never allocated */
  183. cnt = 0;
  184. if (utt->multi) {
  185. tt_index = utt->hcpriv;
  186. ptt = &tt_index[udev->ttport - 1];
  187. /* How many entries are left in tt_index? */
  188. for (i = 0; i < utt->hub->maxchild; ++i)
  189. cnt += !!tt_index[i];
  190. } else {
  191. tt_index = NULL;
  192. ptt = (struct mu3h_sch_tt **)&utt->hcpriv;
  193. }
  194. tt = *ptt;
  195. if (!tt || !list_empty(&tt->ep_list))
  196. return; /* never allocated , or still in use*/
  197. *ptt = NULL;
  198. kfree(tt);
  199. if (cnt == 1) {
  200. utt->hcpriv = NULL;
  201. kfree(tt_index);
  202. }
  203. }
  204. static struct mu3h_sch_ep_info *
  205. create_sch_ep(struct xhci_hcd_mtk *mtk, struct usb_device *udev,
  206. struct usb_host_endpoint *ep)
  207. {
  208. struct mu3h_sch_ep_info *sch_ep;
  209. struct mu3h_sch_bw_info *bw_info;
  210. struct mu3h_sch_tt *tt = NULL;
  211. bw_info = get_bw_info(mtk, udev, ep);
  212. if (!bw_info)
  213. return ERR_PTR(-ENODEV);
  214. sch_ep = kzalloc(sizeof(*sch_ep), GFP_KERNEL);
  215. if (!sch_ep)
  216. return ERR_PTR(-ENOMEM);
  217. if (is_fs_or_ls(udev->speed)) {
  218. tt = find_tt(udev);
  219. if (IS_ERR(tt)) {
  220. kfree(sch_ep);
  221. return ERR_PTR(-ENOMEM);
  222. }
  223. }
  224. sch_ep->bw_info = bw_info;
  225. sch_ep->sch_tt = tt;
  226. sch_ep->ep = ep;
  227. sch_ep->speed = udev->speed;
  228. INIT_LIST_HEAD(&sch_ep->endpoint);
  229. INIT_LIST_HEAD(&sch_ep->tt_endpoint);
  230. INIT_HLIST_NODE(&sch_ep->hentry);
  231. return sch_ep;
  232. }
  233. static void setup_sch_info(struct xhci_ep_ctx *ep_ctx,
  234. struct mu3h_sch_ep_info *sch_ep)
  235. {
  236. u32 ep_type;
  237. u32 maxpkt;
  238. u32 max_burst;
  239. u32 mult;
  240. u32 esit_pkts;
  241. u32 max_esit_payload;
  242. ep_type = CTX_TO_EP_TYPE(le32_to_cpu(ep_ctx->ep_info2));
  243. maxpkt = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
  244. max_burst = CTX_TO_MAX_BURST(le32_to_cpu(ep_ctx->ep_info2));
  245. mult = CTX_TO_EP_MULT(le32_to_cpu(ep_ctx->ep_info));
  246. max_esit_payload =
  247. (CTX_TO_MAX_ESIT_PAYLOAD_HI(
  248. le32_to_cpu(ep_ctx->ep_info)) << 16) |
  249. CTX_TO_MAX_ESIT_PAYLOAD(le32_to_cpu(ep_ctx->tx_info));
  250. sch_ep->esit = get_esit(ep_ctx);
  251. sch_ep->num_esit = XHCI_MTK_MAX_ESIT / sch_ep->esit;
  252. sch_ep->ep_type = ep_type;
  253. sch_ep->maxpkt = maxpkt;
  254. sch_ep->offset = 0;
  255. sch_ep->burst_mode = 0;
  256. sch_ep->repeat = 0;
  257. if (sch_ep->speed == USB_SPEED_HIGH) {
  258. sch_ep->cs_count = 0;
  259. /*
  260. * usb_20 spec section5.9
  261. * a single microframe is enough for HS synchromous endpoints
  262. * in a interval
  263. */
  264. sch_ep->num_budget_microframes = 1;
  265. /*
  266. * xHCI spec section6.2.3.4
  267. * @max_burst is the number of additional transactions
  268. * opportunities per microframe
  269. */
  270. sch_ep->pkts = max_burst + 1;
  271. sch_ep->bw_cost_per_microframe = maxpkt * sch_ep->pkts;
  272. } else if (sch_ep->speed >= USB_SPEED_SUPER) {
  273. /* usb3_r1 spec section4.4.7 & 4.4.8 */
  274. sch_ep->cs_count = 0;
  275. sch_ep->burst_mode = 1;
  276. /*
  277. * some device's (d)wBytesPerInterval is set as 0,
  278. * then max_esit_payload is 0, so evaluate esit_pkts from
  279. * mult and burst
  280. */
  281. esit_pkts = DIV_ROUND_UP(max_esit_payload, maxpkt);
  282. if (esit_pkts == 0)
  283. esit_pkts = (mult + 1) * (max_burst + 1);
  284. if (ep_type == INT_IN_EP || ep_type == INT_OUT_EP) {
  285. sch_ep->pkts = esit_pkts;
  286. sch_ep->num_budget_microframes = 1;
  287. }
  288. if (ep_type == ISOC_IN_EP || ep_type == ISOC_OUT_EP) {
  289. if (sch_ep->esit == 1)
  290. sch_ep->pkts = esit_pkts;
  291. else if (esit_pkts <= sch_ep->esit)
  292. sch_ep->pkts = 1;
  293. else
  294. sch_ep->pkts = roundup_pow_of_two(esit_pkts)
  295. / sch_ep->esit;
  296. sch_ep->num_budget_microframes =
  297. DIV_ROUND_UP(esit_pkts, sch_ep->pkts);
  298. sch_ep->repeat = !!(sch_ep->num_budget_microframes > 1);
  299. }
  300. sch_ep->bw_cost_per_microframe = maxpkt * sch_ep->pkts;
  301. } else if (is_fs_or_ls(sch_ep->speed)) {
  302. sch_ep->pkts = 1; /* at most one packet for each microframe */
  303. /*
  304. * num_budget_microframes and cs_count will be updated when
  305. * check TT for INT_OUT_EP, ISOC/INT_IN_EP type
  306. */
  307. sch_ep->cs_count = DIV_ROUND_UP(maxpkt, FS_PAYLOAD_MAX);
  308. sch_ep->num_budget_microframes = sch_ep->cs_count;
  309. sch_ep->bw_cost_per_microframe = min_t(u32, maxpkt, FS_PAYLOAD_MAX);
  310. }
  311. }
  312. /* Get maximum bandwidth when we schedule at offset slot. */
  313. static u32 get_max_bw(struct mu3h_sch_bw_info *sch_bw,
  314. struct mu3h_sch_ep_info *sch_ep, u32 offset)
  315. {
  316. u32 max_bw = 0;
  317. u32 bw;
  318. int i, j, k;
  319. for (i = 0; i < sch_ep->num_esit; i++) {
  320. u32 base = offset + i * sch_ep->esit;
  321. for (j = 0; j < sch_ep->num_budget_microframes; j++) {
  322. k = XHCI_MTK_BW_INDEX(base + j);
  323. bw = sch_bw->bus_bw[k] + sch_ep->bw_cost_per_microframe;
  324. if (bw > max_bw)
  325. max_bw = bw;
  326. }
  327. }
  328. return max_bw;
  329. }
  330. static void update_bus_bw(struct mu3h_sch_bw_info *sch_bw,
  331. struct mu3h_sch_ep_info *sch_ep, bool used)
  332. {
  333. int bw_updated;
  334. u32 base;
  335. int i, j;
  336. bw_updated = sch_ep->bw_cost_per_microframe * (used ? 1 : -1);
  337. for (i = 0; i < sch_ep->num_esit; i++) {
  338. base = sch_ep->offset + i * sch_ep->esit;
  339. for (j = 0; j < sch_ep->num_budget_microframes; j++)
  340. sch_bw->bus_bw[XHCI_MTK_BW_INDEX(base + j)] += bw_updated;
  341. }
  342. }
  343. static int check_fs_bus_bw(struct mu3h_sch_ep_info *sch_ep, int offset)
  344. {
  345. struct mu3h_sch_tt *tt = sch_ep->sch_tt;
  346. u32 tmp;
  347. int base;
  348. int i, j, k;
  349. for (i = 0; i < sch_ep->num_esit; i++) {
  350. base = offset + i * sch_ep->esit;
  351. /*
  352. * Compared with hs bus, no matter what ep type,
  353. * the hub will always delay one uframe to send data
  354. */
  355. for (j = 0; j < sch_ep->num_budget_microframes; j++) {
  356. k = XHCI_MTK_BW_INDEX(base + j);
  357. tmp = tt->fs_bus_bw[k] + sch_ep->bw_cost_per_microframe;
  358. if (tmp > FS_PAYLOAD_MAX)
  359. return -ESCH_BW_OVERFLOW;
  360. }
  361. }
  362. return 0;
  363. }
  364. static int check_sch_tt(struct mu3h_sch_ep_info *sch_ep, u32 offset)
  365. {
  366. u32 start_ss, last_ss;
  367. u32 start_cs, last_cs;
  368. if (!sch_ep->sch_tt)
  369. return 0;
  370. start_ss = offset % 8;
  371. if (sch_ep->ep_type == ISOC_OUT_EP) {
  372. last_ss = start_ss + sch_ep->cs_count - 1;
  373. /*
  374. * usb_20 spec section11.18:
  375. * must never schedule Start-Split in Y6
  376. */
  377. if (!(start_ss == 7 || last_ss < 6))
  378. return -ESCH_SS_Y6;
  379. } else {
  380. u32 cs_count = DIV_ROUND_UP(sch_ep->maxpkt, FS_PAYLOAD_MAX);
  381. /*
  382. * usb_20 spec section11.18:
  383. * must never schedule Start-Split in Y6
  384. */
  385. if (start_ss == 6)
  386. return -ESCH_SS_Y6;
  387. /* one uframe for ss + one uframe for idle */
  388. start_cs = (start_ss + 2) % 8;
  389. last_cs = start_cs + cs_count - 1;
  390. if (last_cs > 7)
  391. return -ESCH_CS_OVERFLOW;
  392. if (cs_count > 7)
  393. cs_count = 7; /* HW limit */
  394. sch_ep->cs_count = cs_count;
  395. /* ss, idle are ignored */
  396. sch_ep->num_budget_microframes = cs_count;
  397. /*
  398. * if interval=1, maxp >752, num_budge_micoframe is larger
  399. * than sch_ep->esit, will overstep boundary
  400. */
  401. if (sch_ep->num_budget_microframes > sch_ep->esit)
  402. sch_ep->num_budget_microframes = sch_ep->esit;
  403. }
  404. return check_fs_bus_bw(sch_ep, offset);
  405. }
  406. static void update_sch_tt(struct mu3h_sch_ep_info *sch_ep, bool used)
  407. {
  408. struct mu3h_sch_tt *tt = sch_ep->sch_tt;
  409. int bw_updated;
  410. u32 base;
  411. int i, j;
  412. bw_updated = sch_ep->bw_cost_per_microframe * (used ? 1 : -1);
  413. for (i = 0; i < sch_ep->num_esit; i++) {
  414. base = sch_ep->offset + i * sch_ep->esit;
  415. for (j = 0; j < sch_ep->num_budget_microframes; j++)
  416. tt->fs_bus_bw[XHCI_MTK_BW_INDEX(base + j)] += bw_updated;
  417. }
  418. if (used)
  419. list_add_tail(&sch_ep->tt_endpoint, &tt->ep_list);
  420. else
  421. list_del(&sch_ep->tt_endpoint);
  422. }
  423. static int load_ep_bw(struct mu3h_sch_bw_info *sch_bw,
  424. struct mu3h_sch_ep_info *sch_ep, bool loaded)
  425. {
  426. if (sch_ep->sch_tt)
  427. update_sch_tt(sch_ep, loaded);
  428. /* update bus bandwidth info */
  429. update_bus_bw(sch_bw, sch_ep, loaded);
  430. sch_ep->allocated = loaded;
  431. return 0;
  432. }
  433. static int check_sch_bw(struct mu3h_sch_ep_info *sch_ep)
  434. {
  435. struct mu3h_sch_bw_info *sch_bw = sch_ep->bw_info;
  436. const u32 bw_boundary = get_bw_boundary(sch_ep->speed);
  437. u32 offset;
  438. u32 worst_bw;
  439. u32 min_bw = ~0;
  440. int min_index = -1;
  441. int ret = 0;
  442. /*
  443. * Search through all possible schedule microframes.
  444. * and find a microframe where its worst bandwidth is minimum.
  445. */
  446. for (offset = 0; offset < sch_ep->esit; offset++) {
  447. ret = check_sch_tt(sch_ep, offset);
  448. if (ret)
  449. continue;
  450. worst_bw = get_max_bw(sch_bw, sch_ep, offset);
  451. if (worst_bw > bw_boundary)
  452. continue;
  453. if (min_bw > worst_bw) {
  454. min_bw = worst_bw;
  455. min_index = offset;
  456. }
  457. /* use first-fit for LS/FS */
  458. if (sch_ep->sch_tt && min_index >= 0)
  459. break;
  460. if (min_bw == 0)
  461. break;
  462. }
  463. if (min_index < 0)
  464. return ret ? ret : -ESCH_BW_OVERFLOW;
  465. sch_ep->offset = min_index;
  466. return load_ep_bw(sch_bw, sch_ep, true);
  467. }
  468. static void destroy_sch_ep(struct xhci_hcd_mtk *mtk, struct usb_device *udev,
  469. struct mu3h_sch_ep_info *sch_ep)
  470. {
  471. /* only release ep bw check passed by check_sch_bw() */
  472. if (sch_ep->allocated)
  473. load_ep_bw(sch_ep->bw_info, sch_ep, false);
  474. if (sch_ep->sch_tt)
  475. drop_tt(udev);
  476. list_del(&sch_ep->endpoint);
  477. hlist_del(&sch_ep->hentry);
  478. kfree(sch_ep);
  479. }
  480. static bool need_bw_sch(struct usb_device *udev,
  481. struct usb_host_endpoint *ep)
  482. {
  483. bool has_tt = udev->tt && udev->tt->hub->parent;
  484. /* only for periodic endpoints */
  485. if (usb_endpoint_xfer_control(&ep->desc)
  486. || usb_endpoint_xfer_bulk(&ep->desc))
  487. return false;
  488. /*
  489. * for LS & FS periodic endpoints which its device is not behind
  490. * a TT are also ignored, root-hub will schedule them directly,
  491. * but need set @bpkts field of endpoint context to 1.
  492. */
  493. if (is_fs_or_ls(udev->speed) && !has_tt)
  494. return false;
  495. /* skip endpoint with zero maxpkt */
  496. if (usb_endpoint_maxp(&ep->desc) == 0)
  497. return false;
  498. return true;
  499. }
  500. int xhci_mtk_sch_init(struct xhci_hcd_mtk *mtk)
  501. {
  502. struct xhci_hcd *xhci = hcd_to_xhci(mtk->hcd);
  503. struct mu3h_sch_bw_info *sch_array;
  504. int num_usb_bus;
  505. /* ss IN and OUT are separated */
  506. num_usb_bus = xhci->usb3_rhub.num_ports * 2 + xhci->usb2_rhub.num_ports;
  507. sch_array = kcalloc(num_usb_bus, sizeof(*sch_array), GFP_KERNEL);
  508. if (sch_array == NULL)
  509. return -ENOMEM;
  510. mtk->sch_array = sch_array;
  511. INIT_LIST_HEAD(&mtk->bw_ep_chk_list);
  512. hash_init(mtk->sch_ep_hash);
  513. return 0;
  514. }
  515. void xhci_mtk_sch_exit(struct xhci_hcd_mtk *mtk)
  516. {
  517. kfree(mtk->sch_array);
  518. }
  519. static int add_ep_quirk(struct usb_hcd *hcd, struct usb_device *udev,
  520. struct usb_host_endpoint *ep)
  521. {
  522. struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd);
  523. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  524. struct xhci_ep_ctx *ep_ctx;
  525. struct xhci_virt_device *virt_dev;
  526. struct mu3h_sch_ep_info *sch_ep;
  527. unsigned int ep_index;
  528. virt_dev = xhci->devs[udev->slot_id];
  529. ep_index = xhci_get_endpoint_index(&ep->desc);
  530. ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
  531. if (!need_bw_sch(udev, ep)) {
  532. /*
  533. * set @bpkts to 1 if it is LS or FS periodic endpoint, and its
  534. * device does not connected through an external HS hub
  535. */
  536. if (usb_endpoint_xfer_int(&ep->desc)
  537. || usb_endpoint_xfer_isoc(&ep->desc))
  538. ep_ctx->reserved[0] = cpu_to_le32(EP_BPKTS(1));
  539. return 0;
  540. }
  541. xhci_dbg(xhci, "%s %s\n", __func__, decode_ep(ep, udev->speed));
  542. sch_ep = create_sch_ep(mtk, udev, ep);
  543. if (IS_ERR_OR_NULL(sch_ep))
  544. return -ENOMEM;
  545. setup_sch_info(ep_ctx, sch_ep);
  546. list_add_tail(&sch_ep->endpoint, &mtk->bw_ep_chk_list);
  547. hash_add(mtk->sch_ep_hash, &sch_ep->hentry, (unsigned long)ep);
  548. return 0;
  549. }
  550. static void drop_ep_quirk(struct usb_hcd *hcd, struct usb_device *udev,
  551. struct usb_host_endpoint *ep)
  552. {
  553. struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd);
  554. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  555. struct mu3h_sch_ep_info *sch_ep;
  556. struct hlist_node *hn;
  557. if (!need_bw_sch(udev, ep))
  558. return;
  559. xhci_dbg(xhci, "%s %s\n", __func__, decode_ep(ep, udev->speed));
  560. hash_for_each_possible_safe(mtk->sch_ep_hash, sch_ep,
  561. hn, hentry, (unsigned long)ep) {
  562. if (sch_ep->ep == ep) {
  563. destroy_sch_ep(mtk, udev, sch_ep);
  564. break;
  565. }
  566. }
  567. }
  568. int xhci_mtk_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
  569. {
  570. struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd);
  571. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  572. struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
  573. struct mu3h_sch_ep_info *sch_ep;
  574. int ret;
  575. xhci_dbg(xhci, "%s() udev %s\n", __func__, dev_name(&udev->dev));
  576. list_for_each_entry(sch_ep, &mtk->bw_ep_chk_list, endpoint) {
  577. struct xhci_ep_ctx *ep_ctx;
  578. struct usb_host_endpoint *ep = sch_ep->ep;
  579. unsigned int ep_index = xhci_get_endpoint_index(&ep->desc);
  580. ret = check_sch_bw(sch_ep);
  581. if (ret) {
  582. xhci_err(xhci, "Not enough bandwidth! (%s)\n",
  583. sch_error_string(-ret));
  584. return -ENOSPC;
  585. }
  586. ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
  587. ep_ctx->reserved[0] = cpu_to_le32(EP_BPKTS(sch_ep->pkts)
  588. | EP_BCSCOUNT(sch_ep->cs_count)
  589. | EP_BBM(sch_ep->burst_mode));
  590. ep_ctx->reserved[1] = cpu_to_le32(EP_BOFFSET(sch_ep->offset)
  591. | EP_BREPEAT(sch_ep->repeat));
  592. xhci_dbg(xhci, " PKTS:%x, CSCOUNT:%x, BM:%x, OFFSET:%x, REPEAT:%x\n",
  593. sch_ep->pkts, sch_ep->cs_count, sch_ep->burst_mode,
  594. sch_ep->offset, sch_ep->repeat);
  595. }
  596. ret = xhci_check_bandwidth(hcd, udev);
  597. if (!ret)
  598. list_del_init(&mtk->bw_ep_chk_list);
  599. return ret;
  600. }
  601. void xhci_mtk_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
  602. {
  603. struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd);
  604. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  605. struct mu3h_sch_ep_info *sch_ep, *tmp;
  606. xhci_dbg(xhci, "%s() udev %s\n", __func__, dev_name(&udev->dev));
  607. list_for_each_entry_safe(sch_ep, tmp, &mtk->bw_ep_chk_list, endpoint)
  608. destroy_sch_ep(mtk, udev, sch_ep);
  609. xhci_reset_bandwidth(hcd, udev);
  610. }
  611. int xhci_mtk_add_ep(struct usb_hcd *hcd, struct usb_device *udev,
  612. struct usb_host_endpoint *ep)
  613. {
  614. int ret;
  615. ret = xhci_add_endpoint(hcd, udev, ep);
  616. if (ret)
  617. return ret;
  618. if (ep->hcpriv)
  619. ret = add_ep_quirk(hcd, udev, ep);
  620. return ret;
  621. }
  622. int xhci_mtk_drop_ep(struct usb_hcd *hcd, struct usb_device *udev,
  623. struct usb_host_endpoint *ep)
  624. {
  625. int ret;
  626. ret = xhci_drop_endpoint(hcd, udev, ep);
  627. if (ret)
  628. return ret;
  629. /* needn't check @ep->hcpriv, xhci_endpoint_disable set it NULL */
  630. drop_ep_quirk(hcd, udev, ep);
  631. return 0;
  632. }