max3421-hcd.c 50 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * MAX3421 Host Controller driver for USB.
  4. *
  5. * Author: David Mosberger-Tang <[email protected]>
  6. *
  7. * (C) Copyright 2014 David Mosberger-Tang <[email protected]>
  8. *
  9. * MAX3421 is a chip implementing a USB 2.0 Full-/Low-Speed host
  10. * controller on a SPI bus.
  11. *
  12. * Based on:
  13. * o MAX3421E datasheet
  14. * https://datasheets.maximintegrated.com/en/ds/MAX3421E.pdf
  15. * o MAX3421E Programming Guide
  16. * https://www.hdl.co.jp/ftpdata/utl-001/AN3785.pdf
  17. * o gadget/dummy_hcd.c
  18. * For USB HCD implementation.
  19. * o Arduino MAX3421 driver
  20. * https://github.com/felis/USB_Host_Shield_2.0/blob/master/Usb.cpp
  21. *
  22. * This file is licenced under the GPL v2.
  23. *
  24. * Important note on worst-case (full-speed) packet size constraints
  25. * (See USB 2.0 Section 5.6.3 and following):
  26. *
  27. * - control: 64 bytes
  28. * - isochronous: 1023 bytes
  29. * - interrupt: 64 bytes
  30. * - bulk: 64 bytes
  31. *
  32. * Since the MAX3421 FIFO size is 64 bytes, we do not have to work about
  33. * multi-FIFO writes/reads for a single USB packet *except* for isochronous
  34. * transfers. We don't support isochronous transfers at this time, so we
  35. * just assume that a USB packet always fits into a single FIFO buffer.
  36. *
  37. * NOTE: The June 2006 version of "MAX3421E Programming Guide"
  38. * (AN3785) has conflicting info for the RCVDAVIRQ bit:
  39. *
  40. * The description of RCVDAVIRQ says "The CPU *must* clear
  41. * this IRQ bit (by writing a 1 to it) before reading the
  42. * RCVFIFO data.
  43. *
  44. * However, the earlier section on "Programming BULK-IN
  45. * Transfers" says * that:
  46. *
  47. * After the CPU retrieves the data, it clears the
  48. * RCVDAVIRQ bit.
  49. *
  50. * The December 2006 version has been corrected and it consistently
  51. * states the second behavior is the correct one.
  52. *
  53. * Synchronous SPI transactions sleep so we can't perform any such
  54. * transactions while holding a spin-lock (and/or while interrupts are
  55. * masked). To achieve this, all SPI transactions are issued from a
  56. * single thread (max3421_spi_thread).
  57. */
  58. #include <linux/jiffies.h>
  59. #include <linux/module.h>
  60. #include <linux/spi/spi.h>
  61. #include <linux/usb.h>
  62. #include <linux/usb/hcd.h>
  63. #include <linux/of.h>
  64. #include <linux/platform_data/max3421-hcd.h>
  65. #define DRIVER_DESC "MAX3421 USB Host-Controller Driver"
  66. #define DRIVER_VERSION "1.0"
  67. /* 11-bit counter that wraps around (USB 2.0 Section 8.3.3): */
  68. #define USB_MAX_FRAME_NUMBER 0x7ff
  69. #define USB_MAX_RETRIES 3 /* # of retries before error is reported */
  70. /*
  71. * Max. # of times we're willing to retransmit a request immediately in
  72. * resposne to a NAK. Afterwards, we fall back on trying once a frame.
  73. */
  74. #define NAK_MAX_FAST_RETRANSMITS 2
  75. #define POWER_BUDGET 500 /* in mA; use 8 for low-power port testing */
  76. /* Port-change mask: */
  77. #define PORT_C_MASK ((USB_PORT_STAT_C_CONNECTION | \
  78. USB_PORT_STAT_C_ENABLE | \
  79. USB_PORT_STAT_C_SUSPEND | \
  80. USB_PORT_STAT_C_OVERCURRENT | \
  81. USB_PORT_STAT_C_RESET) << 16)
  82. #define MAX3421_GPOUT_COUNT 8
  83. enum max3421_rh_state {
  84. MAX3421_RH_RESET,
  85. MAX3421_RH_SUSPENDED,
  86. MAX3421_RH_RUNNING
  87. };
  88. enum pkt_state {
  89. PKT_STATE_SETUP, /* waiting to send setup packet to ctrl pipe */
  90. PKT_STATE_TRANSFER, /* waiting to xfer transfer_buffer */
  91. PKT_STATE_TERMINATE /* waiting to terminate control transfer */
  92. };
  93. enum scheduling_pass {
  94. SCHED_PASS_PERIODIC,
  95. SCHED_PASS_NON_PERIODIC,
  96. SCHED_PASS_DONE
  97. };
  98. /* Bit numbers for max3421_hcd->todo: */
  99. enum {
  100. ENABLE_IRQ = 0,
  101. RESET_HCD,
  102. RESET_PORT,
  103. CHECK_UNLINK,
  104. IOPIN_UPDATE
  105. };
  106. struct max3421_dma_buf {
  107. u8 data[2];
  108. };
  109. struct max3421_hcd {
  110. spinlock_t lock;
  111. struct task_struct *spi_thread;
  112. enum max3421_rh_state rh_state;
  113. /* lower 16 bits contain port status, upper 16 bits the change mask: */
  114. u32 port_status;
  115. unsigned active:1;
  116. struct list_head ep_list; /* list of EP's with work */
  117. /*
  118. * The following are owned by spi_thread (may be accessed by
  119. * SPI-thread without acquiring the HCD lock:
  120. */
  121. u8 rev; /* chip revision */
  122. u16 frame_number;
  123. /*
  124. * kmalloc'd buffers guaranteed to be in separate (DMA)
  125. * cache-lines:
  126. */
  127. struct max3421_dma_buf *tx;
  128. struct max3421_dma_buf *rx;
  129. /*
  130. * URB we're currently processing. Must not be reset to NULL
  131. * unless MAX3421E chip is idle:
  132. */
  133. struct urb *curr_urb;
  134. enum scheduling_pass sched_pass;
  135. int urb_done; /* > 0 -> no errors, < 0: errno */
  136. size_t curr_len;
  137. u8 hien;
  138. u8 mode;
  139. u8 iopins[2];
  140. unsigned long todo;
  141. #ifdef DEBUG
  142. unsigned long err_stat[16];
  143. #endif
  144. };
  145. struct max3421_ep {
  146. struct usb_host_endpoint *ep;
  147. struct list_head ep_list;
  148. u32 naks;
  149. u16 last_active; /* frame # this ep was last active */
  150. enum pkt_state pkt_state;
  151. u8 retries;
  152. u8 retransmit; /* packet needs retransmission */
  153. };
  154. #define MAX3421_FIFO_SIZE 64
  155. #define MAX3421_SPI_DIR_RD 0 /* read register from MAX3421 */
  156. #define MAX3421_SPI_DIR_WR 1 /* write register to MAX3421 */
  157. /* SPI commands: */
  158. #define MAX3421_SPI_DIR_SHIFT 1
  159. #define MAX3421_SPI_REG_SHIFT 3
  160. #define MAX3421_REG_RCVFIFO 1
  161. #define MAX3421_REG_SNDFIFO 2
  162. #define MAX3421_REG_SUDFIFO 4
  163. #define MAX3421_REG_RCVBC 6
  164. #define MAX3421_REG_SNDBC 7
  165. #define MAX3421_REG_USBIRQ 13
  166. #define MAX3421_REG_USBIEN 14
  167. #define MAX3421_REG_USBCTL 15
  168. #define MAX3421_REG_CPUCTL 16
  169. #define MAX3421_REG_PINCTL 17
  170. #define MAX3421_REG_REVISION 18
  171. #define MAX3421_REG_IOPINS1 20
  172. #define MAX3421_REG_IOPINS2 21
  173. #define MAX3421_REG_GPINIRQ 22
  174. #define MAX3421_REG_GPINIEN 23
  175. #define MAX3421_REG_GPINPOL 24
  176. #define MAX3421_REG_HIRQ 25
  177. #define MAX3421_REG_HIEN 26
  178. #define MAX3421_REG_MODE 27
  179. #define MAX3421_REG_PERADDR 28
  180. #define MAX3421_REG_HCTL 29
  181. #define MAX3421_REG_HXFR 30
  182. #define MAX3421_REG_HRSL 31
  183. enum {
  184. MAX3421_USBIRQ_OSCOKIRQ_BIT = 0,
  185. MAX3421_USBIRQ_NOVBUSIRQ_BIT = 5,
  186. MAX3421_USBIRQ_VBUSIRQ_BIT
  187. };
  188. enum {
  189. MAX3421_CPUCTL_IE_BIT = 0,
  190. MAX3421_CPUCTL_PULSEWID0_BIT = 6,
  191. MAX3421_CPUCTL_PULSEWID1_BIT
  192. };
  193. enum {
  194. MAX3421_USBCTL_PWRDOWN_BIT = 4,
  195. MAX3421_USBCTL_CHIPRES_BIT
  196. };
  197. enum {
  198. MAX3421_PINCTL_GPXA_BIT = 0,
  199. MAX3421_PINCTL_GPXB_BIT,
  200. MAX3421_PINCTL_POSINT_BIT,
  201. MAX3421_PINCTL_INTLEVEL_BIT,
  202. MAX3421_PINCTL_FDUPSPI_BIT,
  203. MAX3421_PINCTL_EP0INAK_BIT,
  204. MAX3421_PINCTL_EP2INAK_BIT,
  205. MAX3421_PINCTL_EP3INAK_BIT,
  206. };
  207. enum {
  208. MAX3421_HI_BUSEVENT_BIT = 0, /* bus-reset/-resume */
  209. MAX3421_HI_RWU_BIT, /* remote wakeup */
  210. MAX3421_HI_RCVDAV_BIT, /* receive FIFO data available */
  211. MAX3421_HI_SNDBAV_BIT, /* send buffer available */
  212. MAX3421_HI_SUSDN_BIT, /* suspend operation done */
  213. MAX3421_HI_CONDET_BIT, /* peripheral connect/disconnect */
  214. MAX3421_HI_FRAME_BIT, /* frame generator */
  215. MAX3421_HI_HXFRDN_BIT, /* host transfer done */
  216. };
  217. enum {
  218. MAX3421_HCTL_BUSRST_BIT = 0,
  219. MAX3421_HCTL_FRMRST_BIT,
  220. MAX3421_HCTL_SAMPLEBUS_BIT,
  221. MAX3421_HCTL_SIGRSM_BIT,
  222. MAX3421_HCTL_RCVTOG0_BIT,
  223. MAX3421_HCTL_RCVTOG1_BIT,
  224. MAX3421_HCTL_SNDTOG0_BIT,
  225. MAX3421_HCTL_SNDTOG1_BIT
  226. };
  227. enum {
  228. MAX3421_MODE_HOST_BIT = 0,
  229. MAX3421_MODE_LOWSPEED_BIT,
  230. MAX3421_MODE_HUBPRE_BIT,
  231. MAX3421_MODE_SOFKAENAB_BIT,
  232. MAX3421_MODE_SEPIRQ_BIT,
  233. MAX3421_MODE_DELAYISO_BIT,
  234. MAX3421_MODE_DMPULLDN_BIT,
  235. MAX3421_MODE_DPPULLDN_BIT
  236. };
  237. enum {
  238. MAX3421_HRSL_OK = 0,
  239. MAX3421_HRSL_BUSY,
  240. MAX3421_HRSL_BADREQ,
  241. MAX3421_HRSL_UNDEF,
  242. MAX3421_HRSL_NAK,
  243. MAX3421_HRSL_STALL,
  244. MAX3421_HRSL_TOGERR,
  245. MAX3421_HRSL_WRONGPID,
  246. MAX3421_HRSL_BADBC,
  247. MAX3421_HRSL_PIDERR,
  248. MAX3421_HRSL_PKTERR,
  249. MAX3421_HRSL_CRCERR,
  250. MAX3421_HRSL_KERR,
  251. MAX3421_HRSL_JERR,
  252. MAX3421_HRSL_TIMEOUT,
  253. MAX3421_HRSL_BABBLE,
  254. MAX3421_HRSL_RESULT_MASK = 0xf,
  255. MAX3421_HRSL_RCVTOGRD_BIT = 4,
  256. MAX3421_HRSL_SNDTOGRD_BIT,
  257. MAX3421_HRSL_KSTATUS_BIT,
  258. MAX3421_HRSL_JSTATUS_BIT
  259. };
  260. /* Return same error-codes as ohci.h:cc_to_error: */
  261. static const int hrsl_to_error[] = {
  262. [MAX3421_HRSL_OK] = 0,
  263. [MAX3421_HRSL_BUSY] = -EINVAL,
  264. [MAX3421_HRSL_BADREQ] = -EINVAL,
  265. [MAX3421_HRSL_UNDEF] = -EINVAL,
  266. [MAX3421_HRSL_NAK] = -EAGAIN,
  267. [MAX3421_HRSL_STALL] = -EPIPE,
  268. [MAX3421_HRSL_TOGERR] = -EILSEQ,
  269. [MAX3421_HRSL_WRONGPID] = -EPROTO,
  270. [MAX3421_HRSL_BADBC] = -EREMOTEIO,
  271. [MAX3421_HRSL_PIDERR] = -EPROTO,
  272. [MAX3421_HRSL_PKTERR] = -EPROTO,
  273. [MAX3421_HRSL_CRCERR] = -EILSEQ,
  274. [MAX3421_HRSL_KERR] = -EIO,
  275. [MAX3421_HRSL_JERR] = -EIO,
  276. [MAX3421_HRSL_TIMEOUT] = -ETIME,
  277. [MAX3421_HRSL_BABBLE] = -EOVERFLOW
  278. };
  279. /*
  280. * See https://www.beyondlogic.org/usbnutshell/usb4.shtml#Control for a
  281. * reasonable overview of how control transfers use the IN/OUT
  282. * tokens.
  283. */
  284. #define MAX3421_HXFR_BULK_IN(ep) (0x00 | (ep)) /* bulk or interrupt */
  285. #define MAX3421_HXFR_SETUP 0x10
  286. #define MAX3421_HXFR_BULK_OUT(ep) (0x20 | (ep)) /* bulk or interrupt */
  287. #define MAX3421_HXFR_ISO_IN(ep) (0x40 | (ep))
  288. #define MAX3421_HXFR_ISO_OUT(ep) (0x60 | (ep))
  289. #define MAX3421_HXFR_HS_IN 0x80 /* handshake in */
  290. #define MAX3421_HXFR_HS_OUT 0xa0 /* handshake out */
  291. #define field(val, bit) ((val) << (bit))
  292. static inline s16
  293. frame_diff(u16 left, u16 right)
  294. {
  295. return ((unsigned) (left - right)) % (USB_MAX_FRAME_NUMBER + 1);
  296. }
  297. static inline struct max3421_hcd *
  298. hcd_to_max3421(struct usb_hcd *hcd)
  299. {
  300. return (struct max3421_hcd *) hcd->hcd_priv;
  301. }
  302. static inline struct usb_hcd *
  303. max3421_to_hcd(struct max3421_hcd *max3421_hcd)
  304. {
  305. return container_of((void *) max3421_hcd, struct usb_hcd, hcd_priv);
  306. }
  307. static u8
  308. spi_rd8(struct usb_hcd *hcd, unsigned int reg)
  309. {
  310. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  311. struct spi_device *spi = to_spi_device(hcd->self.controller);
  312. struct spi_transfer transfer;
  313. struct spi_message msg;
  314. memset(&transfer, 0, sizeof(transfer));
  315. spi_message_init(&msg);
  316. max3421_hcd->tx->data[0] =
  317. (field(reg, MAX3421_SPI_REG_SHIFT) |
  318. field(MAX3421_SPI_DIR_RD, MAX3421_SPI_DIR_SHIFT));
  319. transfer.tx_buf = max3421_hcd->tx->data;
  320. transfer.rx_buf = max3421_hcd->rx->data;
  321. transfer.len = 2;
  322. spi_message_add_tail(&transfer, &msg);
  323. spi_sync(spi, &msg);
  324. return max3421_hcd->rx->data[1];
  325. }
  326. static void
  327. spi_wr8(struct usb_hcd *hcd, unsigned int reg, u8 val)
  328. {
  329. struct spi_device *spi = to_spi_device(hcd->self.controller);
  330. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  331. struct spi_transfer transfer;
  332. struct spi_message msg;
  333. memset(&transfer, 0, sizeof(transfer));
  334. spi_message_init(&msg);
  335. max3421_hcd->tx->data[0] =
  336. (field(reg, MAX3421_SPI_REG_SHIFT) |
  337. field(MAX3421_SPI_DIR_WR, MAX3421_SPI_DIR_SHIFT));
  338. max3421_hcd->tx->data[1] = val;
  339. transfer.tx_buf = max3421_hcd->tx->data;
  340. transfer.len = 2;
  341. spi_message_add_tail(&transfer, &msg);
  342. spi_sync(spi, &msg);
  343. }
  344. static void
  345. spi_rd_buf(struct usb_hcd *hcd, unsigned int reg, void *buf, size_t len)
  346. {
  347. struct spi_device *spi = to_spi_device(hcd->self.controller);
  348. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  349. struct spi_transfer transfer[2];
  350. struct spi_message msg;
  351. memset(transfer, 0, sizeof(transfer));
  352. spi_message_init(&msg);
  353. max3421_hcd->tx->data[0] =
  354. (field(reg, MAX3421_SPI_REG_SHIFT) |
  355. field(MAX3421_SPI_DIR_RD, MAX3421_SPI_DIR_SHIFT));
  356. transfer[0].tx_buf = max3421_hcd->tx->data;
  357. transfer[0].len = 1;
  358. transfer[1].rx_buf = buf;
  359. transfer[1].len = len;
  360. spi_message_add_tail(&transfer[0], &msg);
  361. spi_message_add_tail(&transfer[1], &msg);
  362. spi_sync(spi, &msg);
  363. }
  364. static void
  365. spi_wr_buf(struct usb_hcd *hcd, unsigned int reg, void *buf, size_t len)
  366. {
  367. struct spi_device *spi = to_spi_device(hcd->self.controller);
  368. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  369. struct spi_transfer transfer[2];
  370. struct spi_message msg;
  371. memset(transfer, 0, sizeof(transfer));
  372. spi_message_init(&msg);
  373. max3421_hcd->tx->data[0] =
  374. (field(reg, MAX3421_SPI_REG_SHIFT) |
  375. field(MAX3421_SPI_DIR_WR, MAX3421_SPI_DIR_SHIFT));
  376. transfer[0].tx_buf = max3421_hcd->tx->data;
  377. transfer[0].len = 1;
  378. transfer[1].tx_buf = buf;
  379. transfer[1].len = len;
  380. spi_message_add_tail(&transfer[0], &msg);
  381. spi_message_add_tail(&transfer[1], &msg);
  382. spi_sync(spi, &msg);
  383. }
  384. /*
  385. * Figure out the correct setting for the LOWSPEED and HUBPRE mode
  386. * bits. The HUBPRE bit needs to be set when MAX3421E operates at
  387. * full speed, but it's talking to a low-speed device (i.e., through a
  388. * hub). Setting that bit ensures that every low-speed packet is
  389. * preceded by a full-speed PRE PID. Possible configurations:
  390. *
  391. * Hub speed: Device speed: => LOWSPEED bit: HUBPRE bit:
  392. * FULL FULL => 0 0
  393. * FULL LOW => 1 1
  394. * LOW LOW => 1 0
  395. * LOW FULL => 1 0
  396. */
  397. static void
  398. max3421_set_speed(struct usb_hcd *hcd, struct usb_device *dev)
  399. {
  400. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  401. u8 mode_lowspeed, mode_hubpre, mode = max3421_hcd->mode;
  402. mode_lowspeed = BIT(MAX3421_MODE_LOWSPEED_BIT);
  403. mode_hubpre = BIT(MAX3421_MODE_HUBPRE_BIT);
  404. if (max3421_hcd->port_status & USB_PORT_STAT_LOW_SPEED) {
  405. mode |= mode_lowspeed;
  406. mode &= ~mode_hubpre;
  407. } else if (dev->speed == USB_SPEED_LOW) {
  408. mode |= mode_lowspeed | mode_hubpre;
  409. } else {
  410. mode &= ~(mode_lowspeed | mode_hubpre);
  411. }
  412. if (mode != max3421_hcd->mode) {
  413. max3421_hcd->mode = mode;
  414. spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
  415. }
  416. }
  417. /*
  418. * Caller must NOT hold HCD spinlock.
  419. */
  420. static void
  421. max3421_set_address(struct usb_hcd *hcd, struct usb_device *dev, int epnum)
  422. {
  423. int rcvtog, sndtog;
  424. u8 hctl;
  425. /* setup new endpoint's toggle bits: */
  426. rcvtog = usb_gettoggle(dev, epnum, 0);
  427. sndtog = usb_gettoggle(dev, epnum, 1);
  428. hctl = (BIT(rcvtog + MAX3421_HCTL_RCVTOG0_BIT) |
  429. BIT(sndtog + MAX3421_HCTL_SNDTOG0_BIT));
  430. spi_wr8(hcd, MAX3421_REG_HCTL, hctl);
  431. /*
  432. * Note: devnum for one and the same device can change during
  433. * address-assignment so it's best to just always load the
  434. * address whenever the end-point changed/was forced.
  435. */
  436. spi_wr8(hcd, MAX3421_REG_PERADDR, dev->devnum);
  437. }
  438. static int
  439. max3421_ctrl_setup(struct usb_hcd *hcd, struct urb *urb)
  440. {
  441. spi_wr_buf(hcd, MAX3421_REG_SUDFIFO, urb->setup_packet, 8);
  442. return MAX3421_HXFR_SETUP;
  443. }
  444. static int
  445. max3421_transfer_in(struct usb_hcd *hcd, struct urb *urb)
  446. {
  447. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  448. int epnum = usb_pipeendpoint(urb->pipe);
  449. max3421_hcd->curr_len = 0;
  450. max3421_hcd->hien |= BIT(MAX3421_HI_RCVDAV_BIT);
  451. return MAX3421_HXFR_BULK_IN(epnum);
  452. }
  453. static int
  454. max3421_transfer_out(struct usb_hcd *hcd, struct urb *urb, int fast_retransmit)
  455. {
  456. struct spi_device *spi = to_spi_device(hcd->self.controller);
  457. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  458. int epnum = usb_pipeendpoint(urb->pipe);
  459. u32 max_packet;
  460. void *src;
  461. src = urb->transfer_buffer + urb->actual_length;
  462. if (fast_retransmit) {
  463. if (max3421_hcd->rev == 0x12) {
  464. /* work around rev 0x12 bug: */
  465. spi_wr8(hcd, MAX3421_REG_SNDBC, 0);
  466. spi_wr8(hcd, MAX3421_REG_SNDFIFO, ((u8 *) src)[0]);
  467. spi_wr8(hcd, MAX3421_REG_SNDBC, max3421_hcd->curr_len);
  468. }
  469. return MAX3421_HXFR_BULK_OUT(epnum);
  470. }
  471. max_packet = usb_maxpacket(urb->dev, urb->pipe);
  472. if (max_packet > MAX3421_FIFO_SIZE) {
  473. /*
  474. * We do not support isochronous transfers at this
  475. * time.
  476. */
  477. dev_err(&spi->dev,
  478. "%s: packet-size of %u too big (limit is %u bytes)",
  479. __func__, max_packet, MAX3421_FIFO_SIZE);
  480. max3421_hcd->urb_done = -EMSGSIZE;
  481. return -EMSGSIZE;
  482. }
  483. max3421_hcd->curr_len = min((urb->transfer_buffer_length -
  484. urb->actual_length), max_packet);
  485. spi_wr_buf(hcd, MAX3421_REG_SNDFIFO, src, max3421_hcd->curr_len);
  486. spi_wr8(hcd, MAX3421_REG_SNDBC, max3421_hcd->curr_len);
  487. return MAX3421_HXFR_BULK_OUT(epnum);
  488. }
  489. /*
  490. * Issue the next host-transfer command.
  491. * Caller must NOT hold HCD spinlock.
  492. */
  493. static void
  494. max3421_next_transfer(struct usb_hcd *hcd, int fast_retransmit)
  495. {
  496. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  497. struct urb *urb = max3421_hcd->curr_urb;
  498. struct max3421_ep *max3421_ep;
  499. int cmd = -EINVAL;
  500. if (!urb)
  501. return; /* nothing to do */
  502. max3421_ep = urb->ep->hcpriv;
  503. switch (max3421_ep->pkt_state) {
  504. case PKT_STATE_SETUP:
  505. cmd = max3421_ctrl_setup(hcd, urb);
  506. break;
  507. case PKT_STATE_TRANSFER:
  508. if (usb_urb_dir_in(urb))
  509. cmd = max3421_transfer_in(hcd, urb);
  510. else
  511. cmd = max3421_transfer_out(hcd, urb, fast_retransmit);
  512. break;
  513. case PKT_STATE_TERMINATE:
  514. /*
  515. * IN transfers are terminated with HS_OUT token,
  516. * OUT transfers with HS_IN:
  517. */
  518. if (usb_urb_dir_in(urb))
  519. cmd = MAX3421_HXFR_HS_OUT;
  520. else
  521. cmd = MAX3421_HXFR_HS_IN;
  522. break;
  523. }
  524. if (cmd < 0)
  525. return;
  526. /* issue the command and wait for host-xfer-done interrupt: */
  527. spi_wr8(hcd, MAX3421_REG_HXFR, cmd);
  528. max3421_hcd->hien |= BIT(MAX3421_HI_HXFRDN_BIT);
  529. }
  530. /*
  531. * Find the next URB to process and start its execution.
  532. *
  533. * At this time, we do not anticipate ever connecting a USB hub to the
  534. * MAX3421 chip, so at most USB device can be connected and we can use
  535. * a simplistic scheduler: at the start of a frame, schedule all
  536. * periodic transfers. Once that is done, use the remainder of the
  537. * frame to process non-periodic (bulk & control) transfers.
  538. *
  539. * Preconditions:
  540. * o Caller must NOT hold HCD spinlock.
  541. * o max3421_hcd->curr_urb MUST BE NULL.
  542. * o MAX3421E chip must be idle.
  543. */
  544. static int
  545. max3421_select_and_start_urb(struct usb_hcd *hcd)
  546. {
  547. struct spi_device *spi = to_spi_device(hcd->self.controller);
  548. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  549. struct urb *urb, *curr_urb = NULL;
  550. struct max3421_ep *max3421_ep;
  551. int epnum;
  552. struct usb_host_endpoint *ep;
  553. struct list_head *pos;
  554. unsigned long flags;
  555. spin_lock_irqsave(&max3421_hcd->lock, flags);
  556. for (;
  557. max3421_hcd->sched_pass < SCHED_PASS_DONE;
  558. ++max3421_hcd->sched_pass)
  559. list_for_each(pos, &max3421_hcd->ep_list) {
  560. urb = NULL;
  561. max3421_ep = container_of(pos, struct max3421_ep,
  562. ep_list);
  563. ep = max3421_ep->ep;
  564. switch (usb_endpoint_type(&ep->desc)) {
  565. case USB_ENDPOINT_XFER_ISOC:
  566. case USB_ENDPOINT_XFER_INT:
  567. if (max3421_hcd->sched_pass !=
  568. SCHED_PASS_PERIODIC)
  569. continue;
  570. break;
  571. case USB_ENDPOINT_XFER_CONTROL:
  572. case USB_ENDPOINT_XFER_BULK:
  573. if (max3421_hcd->sched_pass !=
  574. SCHED_PASS_NON_PERIODIC)
  575. continue;
  576. break;
  577. }
  578. if (list_empty(&ep->urb_list))
  579. continue; /* nothing to do */
  580. urb = list_first_entry(&ep->urb_list, struct urb,
  581. urb_list);
  582. if (urb->unlinked) {
  583. dev_dbg(&spi->dev, "%s: URB %p unlinked=%d",
  584. __func__, urb, urb->unlinked);
  585. max3421_hcd->curr_urb = urb;
  586. max3421_hcd->urb_done = 1;
  587. spin_unlock_irqrestore(&max3421_hcd->lock,
  588. flags);
  589. return 1;
  590. }
  591. switch (usb_endpoint_type(&ep->desc)) {
  592. case USB_ENDPOINT_XFER_CONTROL:
  593. /*
  594. * Allow one control transaction per
  595. * frame per endpoint:
  596. */
  597. if (frame_diff(max3421_ep->last_active,
  598. max3421_hcd->frame_number) == 0)
  599. continue;
  600. break;
  601. case USB_ENDPOINT_XFER_BULK:
  602. if (max3421_ep->retransmit
  603. && (frame_diff(max3421_ep->last_active,
  604. max3421_hcd->frame_number)
  605. == 0))
  606. /*
  607. * We already tried this EP
  608. * during this frame and got a
  609. * NAK or error; wait for next frame
  610. */
  611. continue;
  612. break;
  613. case USB_ENDPOINT_XFER_ISOC:
  614. case USB_ENDPOINT_XFER_INT:
  615. if (frame_diff(max3421_hcd->frame_number,
  616. max3421_ep->last_active)
  617. < urb->interval)
  618. /*
  619. * We already processed this
  620. * end-point in the current
  621. * frame
  622. */
  623. continue;
  624. break;
  625. }
  626. /* move current ep to tail: */
  627. list_move_tail(pos, &max3421_hcd->ep_list);
  628. curr_urb = urb;
  629. goto done;
  630. }
  631. done:
  632. if (!curr_urb) {
  633. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  634. return 0;
  635. }
  636. urb = max3421_hcd->curr_urb = curr_urb;
  637. epnum = usb_endpoint_num(&urb->ep->desc);
  638. if (max3421_ep->retransmit)
  639. /* restart (part of) a USB transaction: */
  640. max3421_ep->retransmit = 0;
  641. else {
  642. /* start USB transaction: */
  643. if (usb_endpoint_xfer_control(&ep->desc)) {
  644. /*
  645. * See USB 2.0 spec section 8.6.1
  646. * Initialization via SETUP Token:
  647. */
  648. usb_settoggle(urb->dev, epnum, 0, 1);
  649. usb_settoggle(urb->dev, epnum, 1, 1);
  650. max3421_ep->pkt_state = PKT_STATE_SETUP;
  651. } else
  652. max3421_ep->pkt_state = PKT_STATE_TRANSFER;
  653. }
  654. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  655. max3421_ep->last_active = max3421_hcd->frame_number;
  656. max3421_set_address(hcd, urb->dev, epnum);
  657. max3421_set_speed(hcd, urb->dev);
  658. max3421_next_transfer(hcd, 0);
  659. return 1;
  660. }
  661. /*
  662. * Check all endpoints for URBs that got unlinked.
  663. *
  664. * Caller must NOT hold HCD spinlock.
  665. */
  666. static int
  667. max3421_check_unlink(struct usb_hcd *hcd)
  668. {
  669. struct spi_device *spi = to_spi_device(hcd->self.controller);
  670. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  671. struct max3421_ep *max3421_ep;
  672. struct usb_host_endpoint *ep;
  673. struct urb *urb, *next;
  674. unsigned long flags;
  675. int retval = 0;
  676. spin_lock_irqsave(&max3421_hcd->lock, flags);
  677. list_for_each_entry(max3421_ep, &max3421_hcd->ep_list, ep_list) {
  678. ep = max3421_ep->ep;
  679. list_for_each_entry_safe(urb, next, &ep->urb_list, urb_list) {
  680. if (urb->unlinked) {
  681. retval = 1;
  682. dev_dbg(&spi->dev, "%s: URB %p unlinked=%d",
  683. __func__, urb, urb->unlinked);
  684. usb_hcd_unlink_urb_from_ep(hcd, urb);
  685. spin_unlock_irqrestore(&max3421_hcd->lock,
  686. flags);
  687. usb_hcd_giveback_urb(hcd, urb, 0);
  688. spin_lock_irqsave(&max3421_hcd->lock, flags);
  689. }
  690. }
  691. }
  692. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  693. return retval;
  694. }
  695. /*
  696. * Caller must NOT hold HCD spinlock.
  697. */
  698. static void
  699. max3421_slow_retransmit(struct usb_hcd *hcd)
  700. {
  701. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  702. struct urb *urb = max3421_hcd->curr_urb;
  703. struct max3421_ep *max3421_ep;
  704. max3421_ep = urb->ep->hcpriv;
  705. max3421_ep->retransmit = 1;
  706. max3421_hcd->curr_urb = NULL;
  707. }
  708. /*
  709. * Caller must NOT hold HCD spinlock.
  710. */
  711. static void
  712. max3421_recv_data_available(struct usb_hcd *hcd)
  713. {
  714. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  715. struct urb *urb = max3421_hcd->curr_urb;
  716. size_t remaining, transfer_size;
  717. u8 rcvbc;
  718. rcvbc = spi_rd8(hcd, MAX3421_REG_RCVBC);
  719. if (rcvbc > MAX3421_FIFO_SIZE)
  720. rcvbc = MAX3421_FIFO_SIZE;
  721. if (urb->actual_length >= urb->transfer_buffer_length)
  722. remaining = 0;
  723. else
  724. remaining = urb->transfer_buffer_length - urb->actual_length;
  725. transfer_size = rcvbc;
  726. if (transfer_size > remaining)
  727. transfer_size = remaining;
  728. if (transfer_size > 0) {
  729. void *dst = urb->transfer_buffer + urb->actual_length;
  730. spi_rd_buf(hcd, MAX3421_REG_RCVFIFO, dst, transfer_size);
  731. urb->actual_length += transfer_size;
  732. max3421_hcd->curr_len = transfer_size;
  733. }
  734. /* ack the RCVDAV irq now that the FIFO has been read: */
  735. spi_wr8(hcd, MAX3421_REG_HIRQ, BIT(MAX3421_HI_RCVDAV_BIT));
  736. }
  737. static void
  738. max3421_handle_error(struct usb_hcd *hcd, u8 hrsl)
  739. {
  740. struct spi_device *spi = to_spi_device(hcd->self.controller);
  741. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  742. u8 result_code = hrsl & MAX3421_HRSL_RESULT_MASK;
  743. struct urb *urb = max3421_hcd->curr_urb;
  744. struct max3421_ep *max3421_ep = urb->ep->hcpriv;
  745. int switch_sndfifo;
  746. /*
  747. * If an OUT command results in any response other than OK
  748. * (i.e., error or NAK), we have to perform a dummy-write to
  749. * SNDBC so the FIFO gets switched back to us. Otherwise, we
  750. * get out of sync with the SNDFIFO double buffer.
  751. */
  752. switch_sndfifo = (max3421_ep->pkt_state == PKT_STATE_TRANSFER &&
  753. usb_urb_dir_out(urb));
  754. switch (result_code) {
  755. case MAX3421_HRSL_OK:
  756. return; /* this shouldn't happen */
  757. case MAX3421_HRSL_WRONGPID: /* received wrong PID */
  758. case MAX3421_HRSL_BUSY: /* SIE busy */
  759. case MAX3421_HRSL_BADREQ: /* bad val in HXFR */
  760. case MAX3421_HRSL_UNDEF: /* reserved */
  761. case MAX3421_HRSL_KERR: /* K-state instead of response */
  762. case MAX3421_HRSL_JERR: /* J-state instead of response */
  763. /*
  764. * packet experienced an error that we cannot recover
  765. * from; report error
  766. */
  767. max3421_hcd->urb_done = hrsl_to_error[result_code];
  768. dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
  769. __func__, hrsl);
  770. break;
  771. case MAX3421_HRSL_TOGERR:
  772. if (usb_urb_dir_in(urb))
  773. ; /* don't do anything (device will switch toggle) */
  774. else {
  775. /* flip the send toggle bit: */
  776. int sndtog = (hrsl >> MAX3421_HRSL_SNDTOGRD_BIT) & 1;
  777. sndtog ^= 1;
  778. spi_wr8(hcd, MAX3421_REG_HCTL,
  779. BIT(sndtog + MAX3421_HCTL_SNDTOG0_BIT));
  780. }
  781. fallthrough;
  782. case MAX3421_HRSL_BADBC: /* bad byte count */
  783. case MAX3421_HRSL_PIDERR: /* received PID is corrupted */
  784. case MAX3421_HRSL_PKTERR: /* packet error (stuff, EOP) */
  785. case MAX3421_HRSL_CRCERR: /* CRC error */
  786. case MAX3421_HRSL_BABBLE: /* device talked too long */
  787. case MAX3421_HRSL_TIMEOUT:
  788. if (max3421_ep->retries++ < USB_MAX_RETRIES)
  789. /* retry the packet again in the next frame */
  790. max3421_slow_retransmit(hcd);
  791. else {
  792. /* Based on ohci.h cc_to_err[]: */
  793. max3421_hcd->urb_done = hrsl_to_error[result_code];
  794. dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
  795. __func__, hrsl);
  796. }
  797. break;
  798. case MAX3421_HRSL_STALL:
  799. dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
  800. __func__, hrsl);
  801. max3421_hcd->urb_done = hrsl_to_error[result_code];
  802. break;
  803. case MAX3421_HRSL_NAK:
  804. /*
  805. * Device wasn't ready for data or has no data
  806. * available: retry the packet again.
  807. */
  808. if (max3421_ep->naks++ < NAK_MAX_FAST_RETRANSMITS) {
  809. max3421_next_transfer(hcd, 1);
  810. switch_sndfifo = 0;
  811. } else
  812. max3421_slow_retransmit(hcd);
  813. break;
  814. }
  815. if (switch_sndfifo)
  816. spi_wr8(hcd, MAX3421_REG_SNDBC, 0);
  817. }
  818. /*
  819. * Caller must NOT hold HCD spinlock.
  820. */
  821. static int
  822. max3421_transfer_in_done(struct usb_hcd *hcd, struct urb *urb)
  823. {
  824. struct spi_device *spi = to_spi_device(hcd->self.controller);
  825. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  826. u32 max_packet;
  827. if (urb->actual_length >= urb->transfer_buffer_length)
  828. return 1; /* read is complete, so we're done */
  829. /*
  830. * USB 2.0 Section 5.3.2 Pipes: packets must be full size
  831. * except for last one.
  832. */
  833. max_packet = usb_maxpacket(urb->dev, urb->pipe);
  834. if (max_packet > MAX3421_FIFO_SIZE) {
  835. /*
  836. * We do not support isochronous transfers at this
  837. * time...
  838. */
  839. dev_err(&spi->dev,
  840. "%s: packet-size of %u too big (limit is %u bytes)",
  841. __func__, max_packet, MAX3421_FIFO_SIZE);
  842. return -EINVAL;
  843. }
  844. if (max3421_hcd->curr_len < max_packet) {
  845. if (urb->transfer_flags & URB_SHORT_NOT_OK) {
  846. /*
  847. * remaining > 0 and received an
  848. * unexpected partial packet ->
  849. * error
  850. */
  851. return -EREMOTEIO;
  852. } else
  853. /* short read, but it's OK */
  854. return 1;
  855. }
  856. return 0; /* not done */
  857. }
  858. /*
  859. * Caller must NOT hold HCD spinlock.
  860. */
  861. static int
  862. max3421_transfer_out_done(struct usb_hcd *hcd, struct urb *urb)
  863. {
  864. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  865. urb->actual_length += max3421_hcd->curr_len;
  866. if (urb->actual_length < urb->transfer_buffer_length)
  867. return 0;
  868. if (urb->transfer_flags & URB_ZERO_PACKET) {
  869. /*
  870. * Some hardware needs a zero-size packet at the end
  871. * of a bulk-out transfer if the last transfer was a
  872. * full-sized packet (i.e., such hardware use <
  873. * max_packet as an indicator that the end of the
  874. * packet has been reached).
  875. */
  876. u32 max_packet = usb_maxpacket(urb->dev, urb->pipe);
  877. if (max3421_hcd->curr_len == max_packet)
  878. return 0;
  879. }
  880. return 1;
  881. }
  882. /*
  883. * Caller must NOT hold HCD spinlock.
  884. */
  885. static void
  886. max3421_host_transfer_done(struct usb_hcd *hcd)
  887. {
  888. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  889. struct urb *urb = max3421_hcd->curr_urb;
  890. struct max3421_ep *max3421_ep;
  891. u8 result_code, hrsl;
  892. int urb_done = 0;
  893. max3421_hcd->hien &= ~(BIT(MAX3421_HI_HXFRDN_BIT) |
  894. BIT(MAX3421_HI_RCVDAV_BIT));
  895. hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
  896. result_code = hrsl & MAX3421_HRSL_RESULT_MASK;
  897. #ifdef DEBUG
  898. ++max3421_hcd->err_stat[result_code];
  899. #endif
  900. max3421_ep = urb->ep->hcpriv;
  901. if (unlikely(result_code != MAX3421_HRSL_OK)) {
  902. max3421_handle_error(hcd, hrsl);
  903. return;
  904. }
  905. max3421_ep->naks = 0;
  906. max3421_ep->retries = 0;
  907. switch (max3421_ep->pkt_state) {
  908. case PKT_STATE_SETUP:
  909. if (urb->transfer_buffer_length > 0)
  910. max3421_ep->pkt_state = PKT_STATE_TRANSFER;
  911. else
  912. max3421_ep->pkt_state = PKT_STATE_TERMINATE;
  913. break;
  914. case PKT_STATE_TRANSFER:
  915. if (usb_urb_dir_in(urb))
  916. urb_done = max3421_transfer_in_done(hcd, urb);
  917. else
  918. urb_done = max3421_transfer_out_done(hcd, urb);
  919. if (urb_done > 0 && usb_pipetype(urb->pipe) == PIPE_CONTROL) {
  920. /*
  921. * We aren't really done - we still need to
  922. * terminate the control transfer:
  923. */
  924. max3421_hcd->urb_done = urb_done = 0;
  925. max3421_ep->pkt_state = PKT_STATE_TERMINATE;
  926. }
  927. break;
  928. case PKT_STATE_TERMINATE:
  929. urb_done = 1;
  930. break;
  931. }
  932. if (urb_done)
  933. max3421_hcd->urb_done = urb_done;
  934. else
  935. max3421_next_transfer(hcd, 0);
  936. }
  937. /*
  938. * Caller must NOT hold HCD spinlock.
  939. */
  940. static void
  941. max3421_detect_conn(struct usb_hcd *hcd)
  942. {
  943. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  944. unsigned int jk, have_conn = 0;
  945. u32 old_port_status, chg;
  946. unsigned long flags;
  947. u8 hrsl, mode;
  948. hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
  949. jk = ((((hrsl >> MAX3421_HRSL_JSTATUS_BIT) & 1) << 0) |
  950. (((hrsl >> MAX3421_HRSL_KSTATUS_BIT) & 1) << 1));
  951. mode = max3421_hcd->mode;
  952. switch (jk) {
  953. case 0x0: /* SE0: disconnect */
  954. /*
  955. * Turn off SOFKAENAB bit to avoid getting interrupt
  956. * every milli-second:
  957. */
  958. mode &= ~BIT(MAX3421_MODE_SOFKAENAB_BIT);
  959. break;
  960. case 0x1: /* J=0,K=1: low-speed (in full-speed or vice versa) */
  961. case 0x2: /* J=1,K=0: full-speed (in full-speed or vice versa) */
  962. if (jk == 0x2)
  963. /* need to switch to the other speed: */
  964. mode ^= BIT(MAX3421_MODE_LOWSPEED_BIT);
  965. /* turn on SOFKAENAB bit: */
  966. mode |= BIT(MAX3421_MODE_SOFKAENAB_BIT);
  967. have_conn = 1;
  968. break;
  969. case 0x3: /* illegal */
  970. break;
  971. }
  972. max3421_hcd->mode = mode;
  973. spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
  974. spin_lock_irqsave(&max3421_hcd->lock, flags);
  975. old_port_status = max3421_hcd->port_status;
  976. if (have_conn)
  977. max3421_hcd->port_status |= USB_PORT_STAT_CONNECTION;
  978. else
  979. max3421_hcd->port_status &= ~USB_PORT_STAT_CONNECTION;
  980. if (mode & BIT(MAX3421_MODE_LOWSPEED_BIT))
  981. max3421_hcd->port_status |= USB_PORT_STAT_LOW_SPEED;
  982. else
  983. max3421_hcd->port_status &= ~USB_PORT_STAT_LOW_SPEED;
  984. chg = (old_port_status ^ max3421_hcd->port_status);
  985. max3421_hcd->port_status |= chg << 16;
  986. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  987. }
  988. static irqreturn_t
  989. max3421_irq_handler(int irq, void *dev_id)
  990. {
  991. struct usb_hcd *hcd = dev_id;
  992. struct spi_device *spi = to_spi_device(hcd->self.controller);
  993. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  994. if (max3421_hcd->spi_thread)
  995. wake_up_process(max3421_hcd->spi_thread);
  996. if (!test_and_set_bit(ENABLE_IRQ, &max3421_hcd->todo))
  997. disable_irq_nosync(spi->irq);
  998. return IRQ_HANDLED;
  999. }
  1000. #ifdef DEBUG
  1001. static void
  1002. dump_eps(struct usb_hcd *hcd)
  1003. {
  1004. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1005. struct max3421_ep *max3421_ep;
  1006. struct usb_host_endpoint *ep;
  1007. char ubuf[512], *dp, *end;
  1008. unsigned long flags;
  1009. struct urb *urb;
  1010. int epnum, ret;
  1011. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1012. list_for_each_entry(max3421_ep, &max3421_hcd->ep_list, ep_list) {
  1013. ep = max3421_ep->ep;
  1014. dp = ubuf;
  1015. end = dp + sizeof(ubuf);
  1016. *dp = '\0';
  1017. list_for_each_entry(urb, &ep->urb_list, urb_list) {
  1018. ret = snprintf(dp, end - dp, " %p(%d.%s %d/%d)", urb,
  1019. usb_pipetype(urb->pipe),
  1020. usb_urb_dir_in(urb) ? "IN" : "OUT",
  1021. urb->actual_length,
  1022. urb->transfer_buffer_length);
  1023. if (ret < 0 || ret >= end - dp)
  1024. break; /* error or buffer full */
  1025. dp += ret;
  1026. }
  1027. epnum = usb_endpoint_num(&ep->desc);
  1028. pr_info("EP%0u %u lst %04u rtr %u nak %6u rxmt %u: %s\n",
  1029. epnum, max3421_ep->pkt_state, max3421_ep->last_active,
  1030. max3421_ep->retries, max3421_ep->naks,
  1031. max3421_ep->retransmit, ubuf);
  1032. }
  1033. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1034. }
  1035. #endif /* DEBUG */
  1036. /* Return zero if no work was performed, 1 otherwise. */
  1037. static int
  1038. max3421_handle_irqs(struct usb_hcd *hcd)
  1039. {
  1040. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1041. u32 chg, old_port_status;
  1042. unsigned long flags;
  1043. u8 hirq;
  1044. /*
  1045. * Read and ack pending interrupts (CPU must never
  1046. * clear SNDBAV directly and RCVDAV must be cleared by
  1047. * max3421_recv_data_available()!):
  1048. */
  1049. hirq = spi_rd8(hcd, MAX3421_REG_HIRQ);
  1050. hirq &= max3421_hcd->hien;
  1051. if (!hirq)
  1052. return 0;
  1053. spi_wr8(hcd, MAX3421_REG_HIRQ,
  1054. hirq & ~(BIT(MAX3421_HI_SNDBAV_BIT) |
  1055. BIT(MAX3421_HI_RCVDAV_BIT)));
  1056. if (hirq & BIT(MAX3421_HI_FRAME_BIT)) {
  1057. max3421_hcd->frame_number = ((max3421_hcd->frame_number + 1)
  1058. & USB_MAX_FRAME_NUMBER);
  1059. max3421_hcd->sched_pass = SCHED_PASS_PERIODIC;
  1060. }
  1061. if (hirq & BIT(MAX3421_HI_RCVDAV_BIT))
  1062. max3421_recv_data_available(hcd);
  1063. if (hirq & BIT(MAX3421_HI_HXFRDN_BIT))
  1064. max3421_host_transfer_done(hcd);
  1065. if (hirq & BIT(MAX3421_HI_CONDET_BIT))
  1066. max3421_detect_conn(hcd);
  1067. /*
  1068. * Now process interrupts that may affect HCD state
  1069. * other than the end-points:
  1070. */
  1071. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1072. old_port_status = max3421_hcd->port_status;
  1073. if (hirq & BIT(MAX3421_HI_BUSEVENT_BIT)) {
  1074. if (max3421_hcd->port_status & USB_PORT_STAT_RESET) {
  1075. /* BUSEVENT due to completion of Bus Reset */
  1076. max3421_hcd->port_status &= ~USB_PORT_STAT_RESET;
  1077. max3421_hcd->port_status |= USB_PORT_STAT_ENABLE;
  1078. } else {
  1079. /* BUSEVENT due to completion of Bus Resume */
  1080. pr_info("%s: BUSEVENT Bus Resume Done\n", __func__);
  1081. }
  1082. }
  1083. if (hirq & BIT(MAX3421_HI_RWU_BIT))
  1084. pr_info("%s: RWU\n", __func__);
  1085. if (hirq & BIT(MAX3421_HI_SUSDN_BIT))
  1086. pr_info("%s: SUSDN\n", __func__);
  1087. chg = (old_port_status ^ max3421_hcd->port_status);
  1088. max3421_hcd->port_status |= chg << 16;
  1089. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1090. #ifdef DEBUG
  1091. {
  1092. static unsigned long last_time;
  1093. char sbuf[16 * 16], *dp, *end;
  1094. int i;
  1095. if (time_after(jiffies, last_time + 5*HZ)) {
  1096. dp = sbuf;
  1097. end = sbuf + sizeof(sbuf);
  1098. *dp = '\0';
  1099. for (i = 0; i < 16; ++i) {
  1100. int ret = snprintf(dp, end - dp, " %lu",
  1101. max3421_hcd->err_stat[i]);
  1102. if (ret < 0 || ret >= end - dp)
  1103. break; /* error or buffer full */
  1104. dp += ret;
  1105. }
  1106. pr_info("%s: hrsl_stats %s\n", __func__, sbuf);
  1107. memset(max3421_hcd->err_stat, 0,
  1108. sizeof(max3421_hcd->err_stat));
  1109. last_time = jiffies;
  1110. dump_eps(hcd);
  1111. }
  1112. }
  1113. #endif
  1114. return 1;
  1115. }
  1116. static int
  1117. max3421_reset_hcd(struct usb_hcd *hcd)
  1118. {
  1119. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1120. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1121. int timeout;
  1122. /* perform a chip reset and wait for OSCIRQ signal to appear: */
  1123. spi_wr8(hcd, MAX3421_REG_USBCTL, BIT(MAX3421_USBCTL_CHIPRES_BIT));
  1124. /* clear reset: */
  1125. spi_wr8(hcd, MAX3421_REG_USBCTL, 0);
  1126. timeout = 1000;
  1127. while (1) {
  1128. if (spi_rd8(hcd, MAX3421_REG_USBIRQ)
  1129. & BIT(MAX3421_USBIRQ_OSCOKIRQ_BIT))
  1130. break;
  1131. if (--timeout < 0) {
  1132. dev_err(&spi->dev,
  1133. "timed out waiting for oscillator OK signal");
  1134. return 1;
  1135. }
  1136. cond_resched();
  1137. }
  1138. /*
  1139. * Turn on host mode, automatic generation of SOF packets, and
  1140. * enable pull-down registers on DM/DP:
  1141. */
  1142. max3421_hcd->mode = (BIT(MAX3421_MODE_HOST_BIT) |
  1143. BIT(MAX3421_MODE_SOFKAENAB_BIT) |
  1144. BIT(MAX3421_MODE_DMPULLDN_BIT) |
  1145. BIT(MAX3421_MODE_DPPULLDN_BIT));
  1146. spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
  1147. /* reset frame-number: */
  1148. max3421_hcd->frame_number = USB_MAX_FRAME_NUMBER;
  1149. spi_wr8(hcd, MAX3421_REG_HCTL, BIT(MAX3421_HCTL_FRMRST_BIT));
  1150. /* sample the state of the D+ and D- lines */
  1151. spi_wr8(hcd, MAX3421_REG_HCTL, BIT(MAX3421_HCTL_SAMPLEBUS_BIT));
  1152. max3421_detect_conn(hcd);
  1153. /* enable frame, connection-detected, and bus-event interrupts: */
  1154. max3421_hcd->hien = (BIT(MAX3421_HI_FRAME_BIT) |
  1155. BIT(MAX3421_HI_CONDET_BIT) |
  1156. BIT(MAX3421_HI_BUSEVENT_BIT));
  1157. spi_wr8(hcd, MAX3421_REG_HIEN, max3421_hcd->hien);
  1158. /* enable interrupts: */
  1159. spi_wr8(hcd, MAX3421_REG_CPUCTL, BIT(MAX3421_CPUCTL_IE_BIT));
  1160. return 1;
  1161. }
  1162. static int
  1163. max3421_urb_done(struct usb_hcd *hcd)
  1164. {
  1165. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1166. unsigned long flags;
  1167. struct urb *urb;
  1168. int status;
  1169. status = max3421_hcd->urb_done;
  1170. max3421_hcd->urb_done = 0;
  1171. if (status > 0)
  1172. status = 0;
  1173. urb = max3421_hcd->curr_urb;
  1174. if (urb) {
  1175. /* save the old end-points toggles: */
  1176. u8 hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
  1177. int rcvtog = (hrsl >> MAX3421_HRSL_RCVTOGRD_BIT) & 1;
  1178. int sndtog = (hrsl >> MAX3421_HRSL_SNDTOGRD_BIT) & 1;
  1179. int epnum = usb_endpoint_num(&urb->ep->desc);
  1180. /* no locking: HCD (i.e., we) own toggles, don't we? */
  1181. usb_settoggle(urb->dev, epnum, 0, rcvtog);
  1182. usb_settoggle(urb->dev, epnum, 1, sndtog);
  1183. max3421_hcd->curr_urb = NULL;
  1184. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1185. usb_hcd_unlink_urb_from_ep(hcd, urb);
  1186. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1187. /* must be called without the HCD spinlock: */
  1188. usb_hcd_giveback_urb(hcd, urb, status);
  1189. }
  1190. return 1;
  1191. }
  1192. static int
  1193. max3421_spi_thread(void *dev_id)
  1194. {
  1195. struct usb_hcd *hcd = dev_id;
  1196. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1197. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1198. int i, i_worked = 1;
  1199. /* set full-duplex SPI mode, low-active interrupt pin: */
  1200. spi_wr8(hcd, MAX3421_REG_PINCTL,
  1201. (BIT(MAX3421_PINCTL_FDUPSPI_BIT) | /* full-duplex */
  1202. BIT(MAX3421_PINCTL_INTLEVEL_BIT))); /* low-active irq */
  1203. while (!kthread_should_stop()) {
  1204. max3421_hcd->rev = spi_rd8(hcd, MAX3421_REG_REVISION);
  1205. if (max3421_hcd->rev == 0x12 || max3421_hcd->rev == 0x13)
  1206. break;
  1207. dev_err(&spi->dev, "bad rev 0x%02x", max3421_hcd->rev);
  1208. msleep(10000);
  1209. }
  1210. dev_info(&spi->dev, "rev 0x%x, SPI clk %dHz, bpw %u, irq %d\n",
  1211. max3421_hcd->rev, spi->max_speed_hz, spi->bits_per_word,
  1212. spi->irq);
  1213. while (!kthread_should_stop()) {
  1214. if (!i_worked) {
  1215. /*
  1216. * We'll be waiting for wakeups from the hard
  1217. * interrupt handler, so now is a good time to
  1218. * sync our hien with the chip:
  1219. */
  1220. spi_wr8(hcd, MAX3421_REG_HIEN, max3421_hcd->hien);
  1221. set_current_state(TASK_INTERRUPTIBLE);
  1222. if (test_and_clear_bit(ENABLE_IRQ, &max3421_hcd->todo))
  1223. enable_irq(spi->irq);
  1224. schedule();
  1225. __set_current_state(TASK_RUNNING);
  1226. }
  1227. i_worked = 0;
  1228. if (max3421_hcd->urb_done)
  1229. i_worked |= max3421_urb_done(hcd);
  1230. else if (max3421_handle_irqs(hcd))
  1231. i_worked = 1;
  1232. else if (!max3421_hcd->curr_urb)
  1233. i_worked |= max3421_select_and_start_urb(hcd);
  1234. if (test_and_clear_bit(RESET_HCD, &max3421_hcd->todo))
  1235. /* reset the HCD: */
  1236. i_worked |= max3421_reset_hcd(hcd);
  1237. if (test_and_clear_bit(RESET_PORT, &max3421_hcd->todo)) {
  1238. /* perform a USB bus reset: */
  1239. spi_wr8(hcd, MAX3421_REG_HCTL,
  1240. BIT(MAX3421_HCTL_BUSRST_BIT));
  1241. i_worked = 1;
  1242. }
  1243. if (test_and_clear_bit(CHECK_UNLINK, &max3421_hcd->todo))
  1244. i_worked |= max3421_check_unlink(hcd);
  1245. if (test_and_clear_bit(IOPIN_UPDATE, &max3421_hcd->todo)) {
  1246. /*
  1247. * IOPINS1/IOPINS2 do not auto-increment, so we can't
  1248. * use spi_wr_buf().
  1249. */
  1250. for (i = 0; i < ARRAY_SIZE(max3421_hcd->iopins); ++i) {
  1251. u8 val = spi_rd8(hcd, MAX3421_REG_IOPINS1 + i);
  1252. val = ((val & 0xf0) |
  1253. (max3421_hcd->iopins[i] & 0x0f));
  1254. spi_wr8(hcd, MAX3421_REG_IOPINS1 + i, val);
  1255. max3421_hcd->iopins[i] = val;
  1256. }
  1257. i_worked = 1;
  1258. }
  1259. }
  1260. set_current_state(TASK_RUNNING);
  1261. dev_info(&spi->dev, "SPI thread exiting");
  1262. return 0;
  1263. }
  1264. static int
  1265. max3421_reset_port(struct usb_hcd *hcd)
  1266. {
  1267. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1268. max3421_hcd->port_status &= ~(USB_PORT_STAT_ENABLE |
  1269. USB_PORT_STAT_LOW_SPEED);
  1270. max3421_hcd->port_status |= USB_PORT_STAT_RESET;
  1271. set_bit(RESET_PORT, &max3421_hcd->todo);
  1272. wake_up_process(max3421_hcd->spi_thread);
  1273. return 0;
  1274. }
  1275. static int
  1276. max3421_reset(struct usb_hcd *hcd)
  1277. {
  1278. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1279. hcd->self.sg_tablesize = 0;
  1280. hcd->speed = HCD_USB2;
  1281. hcd->self.root_hub->speed = USB_SPEED_FULL;
  1282. set_bit(RESET_HCD, &max3421_hcd->todo);
  1283. wake_up_process(max3421_hcd->spi_thread);
  1284. return 0;
  1285. }
  1286. static int
  1287. max3421_start(struct usb_hcd *hcd)
  1288. {
  1289. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1290. spin_lock_init(&max3421_hcd->lock);
  1291. max3421_hcd->rh_state = MAX3421_RH_RUNNING;
  1292. INIT_LIST_HEAD(&max3421_hcd->ep_list);
  1293. hcd->power_budget = POWER_BUDGET;
  1294. hcd->state = HC_STATE_RUNNING;
  1295. hcd->uses_new_polling = 1;
  1296. return 0;
  1297. }
  1298. static void
  1299. max3421_stop(struct usb_hcd *hcd)
  1300. {
  1301. }
  1302. static int
  1303. max3421_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
  1304. {
  1305. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1306. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1307. struct max3421_ep *max3421_ep;
  1308. unsigned long flags;
  1309. int retval;
  1310. switch (usb_pipetype(urb->pipe)) {
  1311. case PIPE_INTERRUPT:
  1312. case PIPE_ISOCHRONOUS:
  1313. if (urb->interval < 0) {
  1314. dev_err(&spi->dev,
  1315. "%s: interval=%d for intr-/iso-pipe; expected > 0\n",
  1316. __func__, urb->interval);
  1317. return -EINVAL;
  1318. }
  1319. break;
  1320. default:
  1321. break;
  1322. }
  1323. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1324. max3421_ep = urb->ep->hcpriv;
  1325. if (!max3421_ep) {
  1326. /* gets freed in max3421_endpoint_disable: */
  1327. max3421_ep = kzalloc(sizeof(struct max3421_ep), GFP_ATOMIC);
  1328. if (!max3421_ep) {
  1329. retval = -ENOMEM;
  1330. goto out;
  1331. }
  1332. max3421_ep->ep = urb->ep;
  1333. max3421_ep->last_active = max3421_hcd->frame_number;
  1334. urb->ep->hcpriv = max3421_ep;
  1335. list_add_tail(&max3421_ep->ep_list, &max3421_hcd->ep_list);
  1336. }
  1337. retval = usb_hcd_link_urb_to_ep(hcd, urb);
  1338. if (retval == 0) {
  1339. /* Since we added to the queue, restart scheduling: */
  1340. max3421_hcd->sched_pass = SCHED_PASS_PERIODIC;
  1341. wake_up_process(max3421_hcd->spi_thread);
  1342. }
  1343. out:
  1344. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1345. return retval;
  1346. }
  1347. static int
  1348. max3421_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
  1349. {
  1350. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1351. unsigned long flags;
  1352. int retval;
  1353. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1354. /*
  1355. * This will set urb->unlinked which in turn causes the entry
  1356. * to be dropped at the next opportunity.
  1357. */
  1358. retval = usb_hcd_check_unlink_urb(hcd, urb, status);
  1359. if (retval == 0) {
  1360. set_bit(CHECK_UNLINK, &max3421_hcd->todo);
  1361. wake_up_process(max3421_hcd->spi_thread);
  1362. }
  1363. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1364. return retval;
  1365. }
  1366. static void
  1367. max3421_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
  1368. {
  1369. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1370. unsigned long flags;
  1371. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1372. if (ep->hcpriv) {
  1373. struct max3421_ep *max3421_ep = ep->hcpriv;
  1374. /* remove myself from the ep_list: */
  1375. if (!list_empty(&max3421_ep->ep_list))
  1376. list_del(&max3421_ep->ep_list);
  1377. kfree(max3421_ep);
  1378. ep->hcpriv = NULL;
  1379. }
  1380. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1381. }
  1382. static int
  1383. max3421_get_frame_number(struct usb_hcd *hcd)
  1384. {
  1385. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1386. return max3421_hcd->frame_number;
  1387. }
  1388. /*
  1389. * Should return a non-zero value when any port is undergoing a resume
  1390. * transition while the root hub is suspended.
  1391. */
  1392. static int
  1393. max3421_hub_status_data(struct usb_hcd *hcd, char *buf)
  1394. {
  1395. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1396. unsigned long flags;
  1397. int retval = 0;
  1398. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1399. if (!HCD_HW_ACCESSIBLE(hcd))
  1400. goto done;
  1401. *buf = 0;
  1402. if ((max3421_hcd->port_status & PORT_C_MASK) != 0) {
  1403. *buf = (1 << 1); /* a hub over-current condition exists */
  1404. dev_dbg(hcd->self.controller,
  1405. "port status 0x%08x has changes\n",
  1406. max3421_hcd->port_status);
  1407. retval = 1;
  1408. if (max3421_hcd->rh_state == MAX3421_RH_SUSPENDED)
  1409. usb_hcd_resume_root_hub(hcd);
  1410. }
  1411. done:
  1412. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1413. return retval;
  1414. }
  1415. static inline void
  1416. hub_descriptor(struct usb_hub_descriptor *desc)
  1417. {
  1418. memset(desc, 0, sizeof(*desc));
  1419. /*
  1420. * See Table 11-13: Hub Descriptor in USB 2.0 spec.
  1421. */
  1422. desc->bDescriptorType = USB_DT_HUB; /* hub descriptor */
  1423. desc->bDescLength = 9;
  1424. desc->wHubCharacteristics = cpu_to_le16(HUB_CHAR_INDV_PORT_LPSM |
  1425. HUB_CHAR_COMMON_OCPM);
  1426. desc->bNbrPorts = 1;
  1427. }
  1428. /*
  1429. * Set the MAX3421E general-purpose output with number PIN_NUMBER to
  1430. * VALUE (0 or 1). PIN_NUMBER may be in the range from 1-8. For
  1431. * any other value, this function acts as a no-op.
  1432. */
  1433. static void
  1434. max3421_gpout_set_value(struct usb_hcd *hcd, u8 pin_number, u8 value)
  1435. {
  1436. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1437. u8 mask, idx;
  1438. --pin_number;
  1439. if (pin_number >= MAX3421_GPOUT_COUNT)
  1440. return;
  1441. mask = 1u << (pin_number % 4);
  1442. idx = pin_number / 4;
  1443. if (value)
  1444. max3421_hcd->iopins[idx] |= mask;
  1445. else
  1446. max3421_hcd->iopins[idx] &= ~mask;
  1447. set_bit(IOPIN_UPDATE, &max3421_hcd->todo);
  1448. wake_up_process(max3421_hcd->spi_thread);
  1449. }
  1450. static int
  1451. max3421_hub_control(struct usb_hcd *hcd, u16 type_req, u16 value, u16 index,
  1452. char *buf, u16 length)
  1453. {
  1454. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1455. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1456. struct max3421_hcd_platform_data *pdata;
  1457. unsigned long flags;
  1458. int retval = 0;
  1459. pdata = spi->dev.platform_data;
  1460. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1461. switch (type_req) {
  1462. case ClearHubFeature:
  1463. break;
  1464. case ClearPortFeature:
  1465. switch (value) {
  1466. case USB_PORT_FEAT_SUSPEND:
  1467. break;
  1468. case USB_PORT_FEAT_POWER:
  1469. dev_dbg(hcd->self.controller, "power-off\n");
  1470. max3421_gpout_set_value(hcd, pdata->vbus_gpout,
  1471. !pdata->vbus_active_level);
  1472. fallthrough;
  1473. default:
  1474. max3421_hcd->port_status &= ~(1 << value);
  1475. }
  1476. break;
  1477. case GetHubDescriptor:
  1478. hub_descriptor((struct usb_hub_descriptor *) buf);
  1479. break;
  1480. case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
  1481. case GetPortErrorCount:
  1482. case SetHubDepth:
  1483. /* USB3 only */
  1484. goto error;
  1485. case GetHubStatus:
  1486. *(__le32 *) buf = cpu_to_le32(0);
  1487. break;
  1488. case GetPortStatus:
  1489. if (index != 1) {
  1490. retval = -EPIPE;
  1491. goto error;
  1492. }
  1493. ((__le16 *) buf)[0] = cpu_to_le16(max3421_hcd->port_status);
  1494. ((__le16 *) buf)[1] =
  1495. cpu_to_le16(max3421_hcd->port_status >> 16);
  1496. break;
  1497. case SetHubFeature:
  1498. retval = -EPIPE;
  1499. break;
  1500. case SetPortFeature:
  1501. switch (value) {
  1502. case USB_PORT_FEAT_LINK_STATE:
  1503. case USB_PORT_FEAT_U1_TIMEOUT:
  1504. case USB_PORT_FEAT_U2_TIMEOUT:
  1505. case USB_PORT_FEAT_BH_PORT_RESET:
  1506. goto error;
  1507. case USB_PORT_FEAT_SUSPEND:
  1508. if (max3421_hcd->active)
  1509. max3421_hcd->port_status |=
  1510. USB_PORT_STAT_SUSPEND;
  1511. break;
  1512. case USB_PORT_FEAT_POWER:
  1513. dev_dbg(hcd->self.controller, "power-on\n");
  1514. max3421_hcd->port_status |= USB_PORT_STAT_POWER;
  1515. max3421_gpout_set_value(hcd, pdata->vbus_gpout,
  1516. pdata->vbus_active_level);
  1517. break;
  1518. case USB_PORT_FEAT_RESET:
  1519. max3421_reset_port(hcd);
  1520. fallthrough;
  1521. default:
  1522. if ((max3421_hcd->port_status & USB_PORT_STAT_POWER)
  1523. != 0)
  1524. max3421_hcd->port_status |= (1 << value);
  1525. }
  1526. break;
  1527. default:
  1528. dev_dbg(hcd->self.controller,
  1529. "hub control req%04x v%04x i%04x l%d\n",
  1530. type_req, value, index, length);
  1531. error: /* "protocol stall" on error */
  1532. retval = -EPIPE;
  1533. }
  1534. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1535. return retval;
  1536. }
  1537. static int
  1538. max3421_bus_suspend(struct usb_hcd *hcd)
  1539. {
  1540. return -1;
  1541. }
  1542. static int
  1543. max3421_bus_resume(struct usb_hcd *hcd)
  1544. {
  1545. return -1;
  1546. }
  1547. static const struct hc_driver max3421_hcd_desc = {
  1548. .description = "max3421",
  1549. .product_desc = DRIVER_DESC,
  1550. .hcd_priv_size = sizeof(struct max3421_hcd),
  1551. .flags = HCD_USB11,
  1552. .reset = max3421_reset,
  1553. .start = max3421_start,
  1554. .stop = max3421_stop,
  1555. .get_frame_number = max3421_get_frame_number,
  1556. .urb_enqueue = max3421_urb_enqueue,
  1557. .urb_dequeue = max3421_urb_dequeue,
  1558. .endpoint_disable = max3421_endpoint_disable,
  1559. .hub_status_data = max3421_hub_status_data,
  1560. .hub_control = max3421_hub_control,
  1561. .bus_suspend = max3421_bus_suspend,
  1562. .bus_resume = max3421_bus_resume,
  1563. };
  1564. static int
  1565. max3421_of_vbus_en_pin(struct device *dev, struct max3421_hcd_platform_data *pdata)
  1566. {
  1567. int retval;
  1568. uint32_t value[2];
  1569. if (!pdata)
  1570. return -EINVAL;
  1571. retval = of_property_read_u32_array(dev->of_node, "maxim,vbus-en-pin", value, 2);
  1572. if (retval) {
  1573. dev_err(dev, "device tree node property 'maxim,vbus-en-pin' is missing\n");
  1574. return retval;
  1575. }
  1576. dev_info(dev, "property 'maxim,vbus-en-pin' value is <%d %d>\n", value[0], value[1]);
  1577. pdata->vbus_gpout = value[0];
  1578. pdata->vbus_active_level = value[1];
  1579. return 0;
  1580. }
  1581. static int
  1582. max3421_probe(struct spi_device *spi)
  1583. {
  1584. struct device *dev = &spi->dev;
  1585. struct max3421_hcd *max3421_hcd;
  1586. struct usb_hcd *hcd = NULL;
  1587. struct max3421_hcd_platform_data *pdata = NULL;
  1588. int retval;
  1589. if (spi_setup(spi) < 0) {
  1590. dev_err(&spi->dev, "Unable to setup SPI bus");
  1591. return -EFAULT;
  1592. }
  1593. if (!spi->irq) {
  1594. dev_err(dev, "Failed to get SPI IRQ");
  1595. return -EFAULT;
  1596. }
  1597. if (IS_ENABLED(CONFIG_OF) && dev->of_node) {
  1598. pdata = devm_kzalloc(&spi->dev, sizeof(*pdata), GFP_KERNEL);
  1599. if (!pdata) {
  1600. retval = -ENOMEM;
  1601. goto error;
  1602. }
  1603. retval = max3421_of_vbus_en_pin(dev, pdata);
  1604. if (retval)
  1605. goto error;
  1606. spi->dev.platform_data = pdata;
  1607. }
  1608. pdata = spi->dev.platform_data;
  1609. if (!pdata) {
  1610. dev_err(&spi->dev, "driver configuration data is not provided\n");
  1611. retval = -EFAULT;
  1612. goto error;
  1613. }
  1614. if (pdata->vbus_active_level > 1) {
  1615. dev_err(&spi->dev, "vbus active level value %d is out of range (0/1)\n", pdata->vbus_active_level);
  1616. retval = -EINVAL;
  1617. goto error;
  1618. }
  1619. if (pdata->vbus_gpout < 1 || pdata->vbus_gpout > MAX3421_GPOUT_COUNT) {
  1620. dev_err(&spi->dev, "vbus gpout value %d is out of range (1..8)\n", pdata->vbus_gpout);
  1621. retval = -EINVAL;
  1622. goto error;
  1623. }
  1624. retval = -ENOMEM;
  1625. hcd = usb_create_hcd(&max3421_hcd_desc, &spi->dev,
  1626. dev_name(&spi->dev));
  1627. if (!hcd) {
  1628. dev_err(&spi->dev, "failed to create HCD structure\n");
  1629. goto error;
  1630. }
  1631. set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
  1632. max3421_hcd = hcd_to_max3421(hcd);
  1633. INIT_LIST_HEAD(&max3421_hcd->ep_list);
  1634. spi_set_drvdata(spi, max3421_hcd);
  1635. max3421_hcd->tx = kmalloc(sizeof(*max3421_hcd->tx), GFP_KERNEL);
  1636. if (!max3421_hcd->tx)
  1637. goto error;
  1638. max3421_hcd->rx = kmalloc(sizeof(*max3421_hcd->rx), GFP_KERNEL);
  1639. if (!max3421_hcd->rx)
  1640. goto error;
  1641. max3421_hcd->spi_thread = kthread_run(max3421_spi_thread, hcd,
  1642. "max3421_spi_thread");
  1643. if (max3421_hcd->spi_thread == ERR_PTR(-ENOMEM)) {
  1644. dev_err(&spi->dev,
  1645. "failed to create SPI thread (out of memory)\n");
  1646. goto error;
  1647. }
  1648. retval = usb_add_hcd(hcd, 0, 0);
  1649. if (retval) {
  1650. dev_err(&spi->dev, "failed to add HCD\n");
  1651. goto error;
  1652. }
  1653. retval = request_irq(spi->irq, max3421_irq_handler,
  1654. IRQF_TRIGGER_LOW, "max3421", hcd);
  1655. if (retval < 0) {
  1656. dev_err(&spi->dev, "failed to request irq %d\n", spi->irq);
  1657. goto error;
  1658. }
  1659. return 0;
  1660. error:
  1661. if (IS_ENABLED(CONFIG_OF) && dev->of_node && pdata) {
  1662. devm_kfree(&spi->dev, pdata);
  1663. spi->dev.platform_data = NULL;
  1664. }
  1665. if (hcd) {
  1666. kfree(max3421_hcd->tx);
  1667. kfree(max3421_hcd->rx);
  1668. if (max3421_hcd->spi_thread)
  1669. kthread_stop(max3421_hcd->spi_thread);
  1670. usb_put_hcd(hcd);
  1671. }
  1672. return retval;
  1673. }
  1674. static void
  1675. max3421_remove(struct spi_device *spi)
  1676. {
  1677. struct max3421_hcd *max3421_hcd;
  1678. struct usb_hcd *hcd;
  1679. unsigned long flags;
  1680. max3421_hcd = spi_get_drvdata(spi);
  1681. hcd = max3421_to_hcd(max3421_hcd);
  1682. usb_remove_hcd(hcd);
  1683. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1684. kthread_stop(max3421_hcd->spi_thread);
  1685. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1686. free_irq(spi->irq, hcd);
  1687. usb_put_hcd(hcd);
  1688. }
  1689. static const struct of_device_id max3421_of_match_table[] = {
  1690. { .compatible = "maxim,max3421", },
  1691. {},
  1692. };
  1693. MODULE_DEVICE_TABLE(of, max3421_of_match_table);
  1694. static struct spi_driver max3421_driver = {
  1695. .probe = max3421_probe,
  1696. .remove = max3421_remove,
  1697. .driver = {
  1698. .name = "max3421-hcd",
  1699. .of_match_table = of_match_ptr(max3421_of_match_table),
  1700. },
  1701. };
  1702. module_spi_driver(max3421_driver);
  1703. MODULE_DESCRIPTION(DRIVER_DESC);
  1704. MODULE_AUTHOR("David Mosberger <[email protected]>");
  1705. MODULE_LICENSE("GPL");