ehci-timer.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2012 by Alan Stern
  4. */
  5. /* This file is part of ehci-hcd.c */
  6. /*-------------------------------------------------------------------------*/
  7. /* Set a bit in the USBCMD register */
  8. static void ehci_set_command_bit(struct ehci_hcd *ehci, u32 bit)
  9. {
  10. ehci->command |= bit;
  11. ehci_writel(ehci, ehci->command, &ehci->regs->command);
  12. /* unblock posted write */
  13. ehci_readl(ehci, &ehci->regs->command);
  14. }
  15. /* Clear a bit in the USBCMD register */
  16. static void ehci_clear_command_bit(struct ehci_hcd *ehci, u32 bit)
  17. {
  18. ehci->command &= ~bit;
  19. ehci_writel(ehci, ehci->command, &ehci->regs->command);
  20. /* unblock posted write */
  21. ehci_readl(ehci, &ehci->regs->command);
  22. }
  23. /*-------------------------------------------------------------------------*/
  24. /*
  25. * EHCI timer support... Now using hrtimers.
  26. *
  27. * Lots of different events are triggered from ehci->hrtimer. Whenever
  28. * the timer routine runs, it checks each possible event; events that are
  29. * currently enabled and whose expiration time has passed get handled.
  30. * The set of enabled events is stored as a collection of bitflags in
  31. * ehci->enabled_hrtimer_events, and they are numbered in order of
  32. * increasing delay values (ranging between 1 ms and 100 ms).
  33. *
  34. * Rather than implementing a sorted list or tree of all pending events,
  35. * we keep track only of the lowest-numbered pending event, in
  36. * ehci->next_hrtimer_event. Whenever ehci->hrtimer gets restarted, its
  37. * expiration time is set to the timeout value for this event.
  38. *
  39. * As a result, events might not get handled right away; the actual delay
  40. * could be anywhere up to twice the requested delay. This doesn't
  41. * matter, because none of the events are especially time-critical. The
  42. * ones that matter most all have a delay of 1 ms, so they will be
  43. * handled after 2 ms at most, which is okay. In addition to this, we
  44. * allow for an expiration range of 1 ms.
  45. */
  46. /*
  47. * Delay lengths for the hrtimer event types.
  48. * Keep this list sorted by delay length, in the same order as
  49. * the event types indexed by enum ehci_hrtimer_event in ehci.h.
  50. */
  51. static unsigned event_delays_ns[] = {
  52. 1 * NSEC_PER_MSEC, /* EHCI_HRTIMER_POLL_ASS */
  53. 1 * NSEC_PER_MSEC, /* EHCI_HRTIMER_POLL_PSS */
  54. 1 * NSEC_PER_MSEC, /* EHCI_HRTIMER_POLL_DEAD */
  55. 1125 * NSEC_PER_USEC, /* EHCI_HRTIMER_UNLINK_INTR */
  56. 2 * NSEC_PER_MSEC, /* EHCI_HRTIMER_FREE_ITDS */
  57. 2 * NSEC_PER_MSEC, /* EHCI_HRTIMER_ACTIVE_UNLINK */
  58. 5 * NSEC_PER_MSEC, /* EHCI_HRTIMER_START_UNLINK_INTR */
  59. 6 * NSEC_PER_MSEC, /* EHCI_HRTIMER_ASYNC_UNLINKS */
  60. 10 * NSEC_PER_MSEC, /* EHCI_HRTIMER_IAA_WATCHDOG */
  61. 10 * NSEC_PER_MSEC, /* EHCI_HRTIMER_DISABLE_PERIODIC */
  62. 15 * NSEC_PER_MSEC, /* EHCI_HRTIMER_DISABLE_ASYNC */
  63. 100 * NSEC_PER_MSEC, /* EHCI_HRTIMER_IO_WATCHDOG */
  64. };
  65. /* Enable a pending hrtimer event */
  66. static void ehci_enable_event(struct ehci_hcd *ehci, unsigned event,
  67. bool resched)
  68. {
  69. ktime_t *timeout = &ehci->hr_timeouts[event];
  70. if (resched)
  71. *timeout = ktime_add(ktime_get(), event_delays_ns[event]);
  72. ehci->enabled_hrtimer_events |= (1 << event);
  73. /* Track only the lowest-numbered pending event */
  74. if (event < ehci->next_hrtimer_event) {
  75. ehci->next_hrtimer_event = event;
  76. hrtimer_start_range_ns(&ehci->hrtimer, *timeout,
  77. NSEC_PER_MSEC, HRTIMER_MODE_ABS);
  78. }
  79. }
  80. /* Poll the STS_ASS status bit; see when it agrees with CMD_ASE */
  81. static void ehci_poll_ASS(struct ehci_hcd *ehci)
  82. {
  83. unsigned actual, want;
  84. /* Don't enable anything if the controller isn't running (e.g., died) */
  85. if (ehci->rh_state != EHCI_RH_RUNNING)
  86. return;
  87. want = (ehci->command & CMD_ASE) ? STS_ASS : 0;
  88. actual = ehci_readl(ehci, &ehci->regs->status) & STS_ASS;
  89. if (want != actual) {
  90. /* Poll again later, but give up after about 2-4 ms */
  91. if (ehci->ASS_poll_count++ < 2) {
  92. ehci_enable_event(ehci, EHCI_HRTIMER_POLL_ASS, true);
  93. return;
  94. }
  95. ehci_dbg(ehci, "Waited too long for the async schedule status (%x/%x), giving up\n",
  96. want, actual);
  97. }
  98. ehci->ASS_poll_count = 0;
  99. /* The status is up-to-date; restart or stop the schedule as needed */
  100. if (want == 0) { /* Stopped */
  101. if (ehci->async_count > 0)
  102. ehci_set_command_bit(ehci, CMD_ASE);
  103. } else { /* Running */
  104. if (ehci->async_count == 0) {
  105. /* Turn off the schedule after a while */
  106. ehci_enable_event(ehci, EHCI_HRTIMER_DISABLE_ASYNC,
  107. true);
  108. }
  109. }
  110. }
  111. /* Turn off the async schedule after a brief delay */
  112. static void ehci_disable_ASE(struct ehci_hcd *ehci)
  113. {
  114. ehci_clear_command_bit(ehci, CMD_ASE);
  115. }
  116. /* Poll the STS_PSS status bit; see when it agrees with CMD_PSE */
  117. static void ehci_poll_PSS(struct ehci_hcd *ehci)
  118. {
  119. unsigned actual, want;
  120. /* Don't do anything if the controller isn't running (e.g., died) */
  121. if (ehci->rh_state != EHCI_RH_RUNNING)
  122. return;
  123. want = (ehci->command & CMD_PSE) ? STS_PSS : 0;
  124. actual = ehci_readl(ehci, &ehci->regs->status) & STS_PSS;
  125. if (want != actual) {
  126. /* Poll again later, but give up after about 2-4 ms */
  127. if (ehci->PSS_poll_count++ < 2) {
  128. ehci_enable_event(ehci, EHCI_HRTIMER_POLL_PSS, true);
  129. return;
  130. }
  131. ehci_dbg(ehci, "Waited too long for the periodic schedule status (%x/%x), giving up\n",
  132. want, actual);
  133. }
  134. ehci->PSS_poll_count = 0;
  135. /* The status is up-to-date; restart or stop the schedule as needed */
  136. if (want == 0) { /* Stopped */
  137. if (ehci->periodic_count > 0)
  138. ehci_set_command_bit(ehci, CMD_PSE);
  139. } else { /* Running */
  140. if (ehci->periodic_count == 0) {
  141. /* Turn off the schedule after a while */
  142. ehci_enable_event(ehci, EHCI_HRTIMER_DISABLE_PERIODIC,
  143. true);
  144. }
  145. }
  146. }
  147. /* Turn off the periodic schedule after a brief delay */
  148. static void ehci_disable_PSE(struct ehci_hcd *ehci)
  149. {
  150. ehci_clear_command_bit(ehci, CMD_PSE);
  151. }
  152. /* Poll the STS_HALT status bit; see when a dead controller stops */
  153. static void ehci_handle_controller_death(struct ehci_hcd *ehci)
  154. {
  155. if (!(ehci_readl(ehci, &ehci->regs->status) & STS_HALT)) {
  156. /* Give up after a few milliseconds */
  157. if (ehci->died_poll_count++ < 5) {
  158. /* Try again later */
  159. ehci_enable_event(ehci, EHCI_HRTIMER_POLL_DEAD, true);
  160. return;
  161. }
  162. ehci_warn(ehci, "Waited too long for the controller to stop, giving up\n");
  163. }
  164. /* Clean up the mess */
  165. ehci->rh_state = EHCI_RH_HALTED;
  166. ehci_writel(ehci, 0, &ehci->regs->configured_flag);
  167. ehci_writel(ehci, 0, &ehci->regs->intr_enable);
  168. ehci_work(ehci);
  169. end_unlink_async(ehci);
  170. /* Not in process context, so don't try to reset the controller */
  171. }
  172. /* start to unlink interrupt QHs */
  173. static void ehci_handle_start_intr_unlinks(struct ehci_hcd *ehci)
  174. {
  175. bool stopped = (ehci->rh_state < EHCI_RH_RUNNING);
  176. /*
  177. * Process all the QHs on the intr_unlink list that were added
  178. * before the current unlink cycle began. The list is in
  179. * temporal order, so stop when we reach the first entry in the
  180. * current cycle. But if the root hub isn't running then
  181. * process all the QHs on the list.
  182. */
  183. while (!list_empty(&ehci->intr_unlink_wait)) {
  184. struct ehci_qh *qh;
  185. qh = list_first_entry(&ehci->intr_unlink_wait,
  186. struct ehci_qh, unlink_node);
  187. if (!stopped && (qh->unlink_cycle ==
  188. ehci->intr_unlink_wait_cycle))
  189. break;
  190. list_del_init(&qh->unlink_node);
  191. qh->unlink_reason |= QH_UNLINK_QUEUE_EMPTY;
  192. start_unlink_intr(ehci, qh);
  193. }
  194. /* Handle remaining entries later */
  195. if (!list_empty(&ehci->intr_unlink_wait)) {
  196. ehci_enable_event(ehci, EHCI_HRTIMER_START_UNLINK_INTR, true);
  197. ++ehci->intr_unlink_wait_cycle;
  198. }
  199. }
  200. /* Handle unlinked interrupt QHs once they are gone from the hardware */
  201. static void ehci_handle_intr_unlinks(struct ehci_hcd *ehci)
  202. {
  203. bool stopped = (ehci->rh_state < EHCI_RH_RUNNING);
  204. /*
  205. * Process all the QHs on the intr_unlink list that were added
  206. * before the current unlink cycle began. The list is in
  207. * temporal order, so stop when we reach the first entry in the
  208. * current cycle. But if the root hub isn't running then
  209. * process all the QHs on the list.
  210. */
  211. ehci->intr_unlinking = true;
  212. while (!list_empty(&ehci->intr_unlink)) {
  213. struct ehci_qh *qh;
  214. qh = list_first_entry(&ehci->intr_unlink, struct ehci_qh,
  215. unlink_node);
  216. if (!stopped && qh->unlink_cycle == ehci->intr_unlink_cycle)
  217. break;
  218. list_del_init(&qh->unlink_node);
  219. end_unlink_intr(ehci, qh);
  220. }
  221. /* Handle remaining entries later */
  222. if (!list_empty(&ehci->intr_unlink)) {
  223. ehci_enable_event(ehci, EHCI_HRTIMER_UNLINK_INTR, true);
  224. ++ehci->intr_unlink_cycle;
  225. }
  226. ehci->intr_unlinking = false;
  227. }
  228. /* Start another free-iTDs/siTDs cycle */
  229. static void start_free_itds(struct ehci_hcd *ehci)
  230. {
  231. if (!(ehci->enabled_hrtimer_events & BIT(EHCI_HRTIMER_FREE_ITDS))) {
  232. ehci->last_itd_to_free = list_entry(
  233. ehci->cached_itd_list.prev,
  234. struct ehci_itd, itd_list);
  235. ehci->last_sitd_to_free = list_entry(
  236. ehci->cached_sitd_list.prev,
  237. struct ehci_sitd, sitd_list);
  238. ehci_enable_event(ehci, EHCI_HRTIMER_FREE_ITDS, true);
  239. }
  240. }
  241. /* Wait for controller to stop using old iTDs and siTDs */
  242. static void end_free_itds(struct ehci_hcd *ehci)
  243. {
  244. struct ehci_itd *itd, *n;
  245. struct ehci_sitd *sitd, *sn;
  246. if (ehci->rh_state < EHCI_RH_RUNNING) {
  247. ehci->last_itd_to_free = NULL;
  248. ehci->last_sitd_to_free = NULL;
  249. }
  250. list_for_each_entry_safe(itd, n, &ehci->cached_itd_list, itd_list) {
  251. list_del(&itd->itd_list);
  252. dma_pool_free(ehci->itd_pool, itd, itd->itd_dma);
  253. if (itd == ehci->last_itd_to_free)
  254. break;
  255. }
  256. list_for_each_entry_safe(sitd, sn, &ehci->cached_sitd_list, sitd_list) {
  257. list_del(&sitd->sitd_list);
  258. dma_pool_free(ehci->sitd_pool, sitd, sitd->sitd_dma);
  259. if (sitd == ehci->last_sitd_to_free)
  260. break;
  261. }
  262. if (!list_empty(&ehci->cached_itd_list) ||
  263. !list_empty(&ehci->cached_sitd_list))
  264. start_free_itds(ehci);
  265. }
  266. /* Handle lost (or very late) IAA interrupts */
  267. static void ehci_iaa_watchdog(struct ehci_hcd *ehci)
  268. {
  269. u32 cmd, status;
  270. /*
  271. * Lost IAA irqs wedge things badly; seen first with a vt8235.
  272. * So we need this watchdog, but must protect it against both
  273. * (a) SMP races against real IAA firing and retriggering, and
  274. * (b) clean HC shutdown, when IAA watchdog was pending.
  275. */
  276. if (!ehci->iaa_in_progress || ehci->rh_state != EHCI_RH_RUNNING)
  277. return;
  278. /* If we get here, IAA is *REALLY* late. It's barely
  279. * conceivable that the system is so busy that CMD_IAAD
  280. * is still legitimately set, so let's be sure it's
  281. * clear before we read STS_IAA. (The HC should clear
  282. * CMD_IAAD when it sets STS_IAA.)
  283. */
  284. cmd = ehci_readl(ehci, &ehci->regs->command);
  285. /*
  286. * If IAA is set here it either legitimately triggered
  287. * after the watchdog timer expired (_way_ late, so we'll
  288. * still count it as lost) ... or a silicon erratum:
  289. * - VIA seems to set IAA without triggering the IRQ;
  290. * - IAAD potentially cleared without setting IAA.
  291. */
  292. status = ehci_readl(ehci, &ehci->regs->status);
  293. if ((status & STS_IAA) || !(cmd & CMD_IAAD)) {
  294. INCR(ehci->stats.lost_iaa);
  295. ehci_writel(ehci, STS_IAA, &ehci->regs->status);
  296. }
  297. ehci_dbg(ehci, "IAA watchdog: status %x cmd %x\n", status, cmd);
  298. end_iaa_cycle(ehci);
  299. }
  300. /* Enable the I/O watchdog, if appropriate */
  301. static void turn_on_io_watchdog(struct ehci_hcd *ehci)
  302. {
  303. /* Not needed if the controller isn't running or it's already enabled */
  304. if (ehci->rh_state != EHCI_RH_RUNNING ||
  305. (ehci->enabled_hrtimer_events &
  306. BIT(EHCI_HRTIMER_IO_WATCHDOG)))
  307. return;
  308. /*
  309. * Isochronous transfers always need the watchdog.
  310. * For other sorts we use it only if the flag is set.
  311. */
  312. if (ehci->isoc_count > 0 || (ehci->need_io_watchdog &&
  313. ehci->async_count + ehci->intr_count > 0))
  314. ehci_enable_event(ehci, EHCI_HRTIMER_IO_WATCHDOG, true);
  315. }
  316. /*
  317. * Handler functions for the hrtimer event types.
  318. * Keep this array in the same order as the event types indexed by
  319. * enum ehci_hrtimer_event in ehci.h.
  320. */
  321. static void (*event_handlers[])(struct ehci_hcd *) = {
  322. ehci_poll_ASS, /* EHCI_HRTIMER_POLL_ASS */
  323. ehci_poll_PSS, /* EHCI_HRTIMER_POLL_PSS */
  324. ehci_handle_controller_death, /* EHCI_HRTIMER_POLL_DEAD */
  325. ehci_handle_intr_unlinks, /* EHCI_HRTIMER_UNLINK_INTR */
  326. end_free_itds, /* EHCI_HRTIMER_FREE_ITDS */
  327. end_unlink_async, /* EHCI_HRTIMER_ACTIVE_UNLINK */
  328. ehci_handle_start_intr_unlinks, /* EHCI_HRTIMER_START_UNLINK_INTR */
  329. unlink_empty_async, /* EHCI_HRTIMER_ASYNC_UNLINKS */
  330. ehci_iaa_watchdog, /* EHCI_HRTIMER_IAA_WATCHDOG */
  331. ehci_disable_PSE, /* EHCI_HRTIMER_DISABLE_PERIODIC */
  332. ehci_disable_ASE, /* EHCI_HRTIMER_DISABLE_ASYNC */
  333. ehci_work, /* EHCI_HRTIMER_IO_WATCHDOG */
  334. };
  335. static enum hrtimer_restart ehci_hrtimer_func(struct hrtimer *t)
  336. {
  337. struct ehci_hcd *ehci = container_of(t, struct ehci_hcd, hrtimer);
  338. ktime_t now;
  339. unsigned long events;
  340. unsigned long flags;
  341. unsigned e;
  342. spin_lock_irqsave(&ehci->lock, flags);
  343. events = ehci->enabled_hrtimer_events;
  344. ehci->enabled_hrtimer_events = 0;
  345. ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
  346. /*
  347. * Check each pending event. If its time has expired, handle
  348. * the event; otherwise re-enable it.
  349. */
  350. now = ktime_get();
  351. for_each_set_bit(e, &events, EHCI_HRTIMER_NUM_EVENTS) {
  352. if (ktime_compare(now, ehci->hr_timeouts[e]) >= 0)
  353. event_handlers[e](ehci);
  354. else
  355. ehci_enable_event(ehci, e, false);
  356. }
  357. spin_unlock_irqrestore(&ehci->lock, flags);
  358. return HRTIMER_NORESTART;
  359. }