otg_fsm.c 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * otg_fsm.c - ChipIdea USB IP core OTG FSM driver
  4. *
  5. * Copyright (C) 2014 Freescale Semiconductor, Inc.
  6. *
  7. * Author: Jun Li
  8. */
  9. /*
  10. * This file mainly handles OTG fsm, it includes OTG fsm operations
  11. * for HNP and SRP.
  12. *
  13. * TODO List
  14. * - ADP
  15. * - OTG test device
  16. */
  17. #include <linux/usb/otg.h>
  18. #include <linux/usb/gadget.h>
  19. #include <linux/usb/hcd.h>
  20. #include <linux/usb/chipidea.h>
  21. #include <linux/regulator/consumer.h>
  22. #include "ci.h"
  23. #include "bits.h"
  24. #include "otg.h"
  25. #include "otg_fsm.h"
  26. /* Add for otg: interact with user space app */
  27. static ssize_t
  28. a_bus_req_show(struct device *dev, struct device_attribute *attr, char *buf)
  29. {
  30. char *next;
  31. unsigned size, t;
  32. struct ci_hdrc *ci = dev_get_drvdata(dev);
  33. next = buf;
  34. size = PAGE_SIZE;
  35. t = scnprintf(next, size, "%d\n", ci->fsm.a_bus_req);
  36. size -= t;
  37. next += t;
  38. return PAGE_SIZE - size;
  39. }
  40. static ssize_t
  41. a_bus_req_store(struct device *dev, struct device_attribute *attr,
  42. const char *buf, size_t count)
  43. {
  44. struct ci_hdrc *ci = dev_get_drvdata(dev);
  45. if (count > 2)
  46. return -1;
  47. mutex_lock(&ci->fsm.lock);
  48. if (buf[0] == '0') {
  49. ci->fsm.a_bus_req = 0;
  50. } else if (buf[0] == '1') {
  51. /* If a_bus_drop is TRUE, a_bus_req can't be set */
  52. if (ci->fsm.a_bus_drop) {
  53. mutex_unlock(&ci->fsm.lock);
  54. return count;
  55. }
  56. ci->fsm.a_bus_req = 1;
  57. if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
  58. ci->gadget.host_request_flag = 1;
  59. mutex_unlock(&ci->fsm.lock);
  60. return count;
  61. }
  62. }
  63. ci_otg_queue_work(ci);
  64. mutex_unlock(&ci->fsm.lock);
  65. return count;
  66. }
  67. static DEVICE_ATTR_RW(a_bus_req);
  68. static ssize_t
  69. a_bus_drop_show(struct device *dev, struct device_attribute *attr, char *buf)
  70. {
  71. char *next;
  72. unsigned size, t;
  73. struct ci_hdrc *ci = dev_get_drvdata(dev);
  74. next = buf;
  75. size = PAGE_SIZE;
  76. t = scnprintf(next, size, "%d\n", ci->fsm.a_bus_drop);
  77. size -= t;
  78. next += t;
  79. return PAGE_SIZE - size;
  80. }
  81. static ssize_t
  82. a_bus_drop_store(struct device *dev, struct device_attribute *attr,
  83. const char *buf, size_t count)
  84. {
  85. struct ci_hdrc *ci = dev_get_drvdata(dev);
  86. if (count > 2)
  87. return -1;
  88. mutex_lock(&ci->fsm.lock);
  89. if (buf[0] == '0') {
  90. ci->fsm.a_bus_drop = 0;
  91. } else if (buf[0] == '1') {
  92. ci->fsm.a_bus_drop = 1;
  93. ci->fsm.a_bus_req = 0;
  94. }
  95. ci_otg_queue_work(ci);
  96. mutex_unlock(&ci->fsm.lock);
  97. return count;
  98. }
  99. static DEVICE_ATTR_RW(a_bus_drop);
  100. static ssize_t
  101. b_bus_req_show(struct device *dev, struct device_attribute *attr, char *buf)
  102. {
  103. char *next;
  104. unsigned size, t;
  105. struct ci_hdrc *ci = dev_get_drvdata(dev);
  106. next = buf;
  107. size = PAGE_SIZE;
  108. t = scnprintf(next, size, "%d\n", ci->fsm.b_bus_req);
  109. size -= t;
  110. next += t;
  111. return PAGE_SIZE - size;
  112. }
  113. static ssize_t
  114. b_bus_req_store(struct device *dev, struct device_attribute *attr,
  115. const char *buf, size_t count)
  116. {
  117. struct ci_hdrc *ci = dev_get_drvdata(dev);
  118. if (count > 2)
  119. return -1;
  120. mutex_lock(&ci->fsm.lock);
  121. if (buf[0] == '0')
  122. ci->fsm.b_bus_req = 0;
  123. else if (buf[0] == '1') {
  124. ci->fsm.b_bus_req = 1;
  125. if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
  126. ci->gadget.host_request_flag = 1;
  127. mutex_unlock(&ci->fsm.lock);
  128. return count;
  129. }
  130. }
  131. ci_otg_queue_work(ci);
  132. mutex_unlock(&ci->fsm.lock);
  133. return count;
  134. }
  135. static DEVICE_ATTR_RW(b_bus_req);
  136. static ssize_t
  137. a_clr_err_store(struct device *dev, struct device_attribute *attr,
  138. const char *buf, size_t count)
  139. {
  140. struct ci_hdrc *ci = dev_get_drvdata(dev);
  141. if (count > 2)
  142. return -1;
  143. mutex_lock(&ci->fsm.lock);
  144. if (buf[0] == '1')
  145. ci->fsm.a_clr_err = 1;
  146. ci_otg_queue_work(ci);
  147. mutex_unlock(&ci->fsm.lock);
  148. return count;
  149. }
  150. static DEVICE_ATTR_WO(a_clr_err);
  151. static struct attribute *inputs_attrs[] = {
  152. &dev_attr_a_bus_req.attr,
  153. &dev_attr_a_bus_drop.attr,
  154. &dev_attr_b_bus_req.attr,
  155. &dev_attr_a_clr_err.attr,
  156. NULL,
  157. };
  158. static const struct attribute_group inputs_attr_group = {
  159. .name = "inputs",
  160. .attrs = inputs_attrs,
  161. };
  162. /*
  163. * Keep this list in the same order as timers indexed
  164. * by enum otg_fsm_timer in include/linux/usb/otg-fsm.h
  165. */
  166. static unsigned otg_timer_ms[] = {
  167. TA_WAIT_VRISE,
  168. TA_WAIT_VFALL,
  169. TA_WAIT_BCON,
  170. TA_AIDL_BDIS,
  171. TB_ASE0_BRST,
  172. TA_BIDL_ADIS,
  173. TB_AIDL_BDIS,
  174. TB_SE0_SRP,
  175. TB_SRP_FAIL,
  176. 0,
  177. TB_DATA_PLS,
  178. TB_SSEND_SRP,
  179. };
  180. /*
  181. * Add timer to active timer list
  182. */
  183. static void ci_otg_add_timer(struct ci_hdrc *ci, enum otg_fsm_timer t)
  184. {
  185. unsigned long flags, timer_sec, timer_nsec;
  186. if (t >= NUM_OTG_FSM_TIMERS)
  187. return;
  188. spin_lock_irqsave(&ci->lock, flags);
  189. timer_sec = otg_timer_ms[t] / MSEC_PER_SEC;
  190. timer_nsec = (otg_timer_ms[t] % MSEC_PER_SEC) * NSEC_PER_MSEC;
  191. ci->hr_timeouts[t] = ktime_add(ktime_get(),
  192. ktime_set(timer_sec, timer_nsec));
  193. ci->enabled_otg_timer_bits |= (1 << t);
  194. if ((ci->next_otg_timer == NUM_OTG_FSM_TIMERS) ||
  195. ktime_after(ci->hr_timeouts[ci->next_otg_timer],
  196. ci->hr_timeouts[t])) {
  197. ci->next_otg_timer = t;
  198. hrtimer_start_range_ns(&ci->otg_fsm_hrtimer,
  199. ci->hr_timeouts[t], NSEC_PER_MSEC,
  200. HRTIMER_MODE_ABS);
  201. }
  202. spin_unlock_irqrestore(&ci->lock, flags);
  203. }
  204. /*
  205. * Remove timer from active timer list
  206. */
  207. static void ci_otg_del_timer(struct ci_hdrc *ci, enum otg_fsm_timer t)
  208. {
  209. unsigned long flags, enabled_timer_bits;
  210. enum otg_fsm_timer cur_timer, next_timer = NUM_OTG_FSM_TIMERS;
  211. if ((t >= NUM_OTG_FSM_TIMERS) ||
  212. !(ci->enabled_otg_timer_bits & (1 << t)))
  213. return;
  214. spin_lock_irqsave(&ci->lock, flags);
  215. ci->enabled_otg_timer_bits &= ~(1 << t);
  216. if (ci->next_otg_timer == t) {
  217. if (ci->enabled_otg_timer_bits == 0) {
  218. spin_unlock_irqrestore(&ci->lock, flags);
  219. /* No enabled timers after delete it */
  220. hrtimer_cancel(&ci->otg_fsm_hrtimer);
  221. spin_lock_irqsave(&ci->lock, flags);
  222. ci->next_otg_timer = NUM_OTG_FSM_TIMERS;
  223. } else {
  224. /* Find the next timer */
  225. enabled_timer_bits = ci->enabled_otg_timer_bits;
  226. for_each_set_bit(cur_timer, &enabled_timer_bits,
  227. NUM_OTG_FSM_TIMERS) {
  228. if ((next_timer == NUM_OTG_FSM_TIMERS) ||
  229. ktime_before(ci->hr_timeouts[next_timer],
  230. ci->hr_timeouts[cur_timer]))
  231. next_timer = cur_timer;
  232. }
  233. }
  234. }
  235. if (next_timer != NUM_OTG_FSM_TIMERS) {
  236. ci->next_otg_timer = next_timer;
  237. hrtimer_start_range_ns(&ci->otg_fsm_hrtimer,
  238. ci->hr_timeouts[next_timer], NSEC_PER_MSEC,
  239. HRTIMER_MODE_ABS);
  240. }
  241. spin_unlock_irqrestore(&ci->lock, flags);
  242. }
  243. /* OTG FSM timer handlers */
  244. static int a_wait_vrise_tmout(struct ci_hdrc *ci)
  245. {
  246. ci->fsm.a_wait_vrise_tmout = 1;
  247. return 0;
  248. }
  249. static int a_wait_vfall_tmout(struct ci_hdrc *ci)
  250. {
  251. ci->fsm.a_wait_vfall_tmout = 1;
  252. return 0;
  253. }
  254. static int a_wait_bcon_tmout(struct ci_hdrc *ci)
  255. {
  256. ci->fsm.a_wait_bcon_tmout = 1;
  257. return 0;
  258. }
  259. static int a_aidl_bdis_tmout(struct ci_hdrc *ci)
  260. {
  261. ci->fsm.a_aidl_bdis_tmout = 1;
  262. return 0;
  263. }
  264. static int b_ase0_brst_tmout(struct ci_hdrc *ci)
  265. {
  266. ci->fsm.b_ase0_brst_tmout = 1;
  267. return 0;
  268. }
  269. static int a_bidl_adis_tmout(struct ci_hdrc *ci)
  270. {
  271. ci->fsm.a_bidl_adis_tmout = 1;
  272. return 0;
  273. }
  274. static int b_aidl_bdis_tmout(struct ci_hdrc *ci)
  275. {
  276. ci->fsm.a_bus_suspend = 1;
  277. return 0;
  278. }
  279. static int b_se0_srp_tmout(struct ci_hdrc *ci)
  280. {
  281. ci->fsm.b_se0_srp = 1;
  282. return 0;
  283. }
  284. static int b_srp_fail_tmout(struct ci_hdrc *ci)
  285. {
  286. ci->fsm.b_srp_done = 1;
  287. return 1;
  288. }
  289. static int b_data_pls_tmout(struct ci_hdrc *ci)
  290. {
  291. ci->fsm.b_srp_done = 1;
  292. ci->fsm.b_bus_req = 0;
  293. if (ci->fsm.power_up)
  294. ci->fsm.power_up = 0;
  295. hw_write_otgsc(ci, OTGSC_HABA, 0);
  296. pm_runtime_put(ci->dev);
  297. return 0;
  298. }
  299. static int b_ssend_srp_tmout(struct ci_hdrc *ci)
  300. {
  301. ci->fsm.b_ssend_srp = 1;
  302. /* only vbus fall below B_sess_vld in b_idle state */
  303. if (ci->fsm.otg->state == OTG_STATE_B_IDLE)
  304. return 0;
  305. else
  306. return 1;
  307. }
  308. /*
  309. * Keep this list in the same order as timers indexed
  310. * by enum otg_fsm_timer in include/linux/usb/otg-fsm.h
  311. */
  312. static int (*otg_timer_handlers[])(struct ci_hdrc *) = {
  313. a_wait_vrise_tmout, /* A_WAIT_VRISE */
  314. a_wait_vfall_tmout, /* A_WAIT_VFALL */
  315. a_wait_bcon_tmout, /* A_WAIT_BCON */
  316. a_aidl_bdis_tmout, /* A_AIDL_BDIS */
  317. b_ase0_brst_tmout, /* B_ASE0_BRST */
  318. a_bidl_adis_tmout, /* A_BIDL_ADIS */
  319. b_aidl_bdis_tmout, /* B_AIDL_BDIS */
  320. b_se0_srp_tmout, /* B_SE0_SRP */
  321. b_srp_fail_tmout, /* B_SRP_FAIL */
  322. NULL, /* A_WAIT_ENUM */
  323. b_data_pls_tmout, /* B_DATA_PLS */
  324. b_ssend_srp_tmout, /* B_SSEND_SRP */
  325. };
  326. /*
  327. * Enable the next nearest enabled timer if have
  328. */
  329. static enum hrtimer_restart ci_otg_hrtimer_func(struct hrtimer *t)
  330. {
  331. struct ci_hdrc *ci = container_of(t, struct ci_hdrc, otg_fsm_hrtimer);
  332. ktime_t now, *timeout;
  333. unsigned long enabled_timer_bits;
  334. unsigned long flags;
  335. enum otg_fsm_timer cur_timer, next_timer = NUM_OTG_FSM_TIMERS;
  336. int ret = -EINVAL;
  337. spin_lock_irqsave(&ci->lock, flags);
  338. enabled_timer_bits = ci->enabled_otg_timer_bits;
  339. ci->next_otg_timer = NUM_OTG_FSM_TIMERS;
  340. now = ktime_get();
  341. for_each_set_bit(cur_timer, &enabled_timer_bits, NUM_OTG_FSM_TIMERS) {
  342. if (ktime_compare(now, ci->hr_timeouts[cur_timer]) >= 0) {
  343. ci->enabled_otg_timer_bits &= ~(1 << cur_timer);
  344. if (otg_timer_handlers[cur_timer])
  345. ret = otg_timer_handlers[cur_timer](ci);
  346. } else {
  347. if ((next_timer == NUM_OTG_FSM_TIMERS) ||
  348. ktime_before(ci->hr_timeouts[cur_timer],
  349. ci->hr_timeouts[next_timer]))
  350. next_timer = cur_timer;
  351. }
  352. }
  353. /* Enable the next nearest timer */
  354. if (next_timer < NUM_OTG_FSM_TIMERS) {
  355. timeout = &ci->hr_timeouts[next_timer];
  356. hrtimer_start_range_ns(&ci->otg_fsm_hrtimer, *timeout,
  357. NSEC_PER_MSEC, HRTIMER_MODE_ABS);
  358. ci->next_otg_timer = next_timer;
  359. }
  360. spin_unlock_irqrestore(&ci->lock, flags);
  361. if (!ret)
  362. ci_otg_queue_work(ci);
  363. return HRTIMER_NORESTART;
  364. }
  365. /* Initialize timers */
  366. static int ci_otg_init_timers(struct ci_hdrc *ci)
  367. {
  368. hrtimer_init(&ci->otg_fsm_hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
  369. ci->otg_fsm_hrtimer.function = ci_otg_hrtimer_func;
  370. return 0;
  371. }
  372. /* -------------------------------------------------------------*/
  373. /* Operations that will be called from OTG Finite State Machine */
  374. /* -------------------------------------------------------------*/
  375. static void ci_otg_fsm_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
  376. {
  377. struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
  378. if (t < NUM_OTG_FSM_TIMERS)
  379. ci_otg_add_timer(ci, t);
  380. return;
  381. }
  382. static void ci_otg_fsm_del_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
  383. {
  384. struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
  385. if (t < NUM_OTG_FSM_TIMERS)
  386. ci_otg_del_timer(ci, t);
  387. return;
  388. }
  389. /*
  390. * A-device drive vbus: turn on vbus regulator and enable port power
  391. * Data pulse irq should be disabled while vbus is on.
  392. */
  393. static void ci_otg_drv_vbus(struct otg_fsm *fsm, int on)
  394. {
  395. int ret;
  396. struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
  397. if (on) {
  398. /* Enable power */
  399. hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP,
  400. PORTSC_PP);
  401. if (ci->platdata->reg_vbus) {
  402. ret = regulator_enable(ci->platdata->reg_vbus);
  403. if (ret) {
  404. dev_err(ci->dev,
  405. "Failed to enable vbus regulator, ret=%d\n",
  406. ret);
  407. return;
  408. }
  409. }
  410. if (ci->platdata->flags & CI_HDRC_PHY_VBUS_CONTROL)
  411. usb_phy_vbus_on(ci->usb_phy);
  412. /* Disable data pulse irq */
  413. hw_write_otgsc(ci, OTGSC_DPIE, 0);
  414. fsm->a_srp_det = 0;
  415. fsm->power_up = 0;
  416. } else {
  417. if (ci->platdata->reg_vbus)
  418. regulator_disable(ci->platdata->reg_vbus);
  419. if (ci->platdata->flags & CI_HDRC_PHY_VBUS_CONTROL)
  420. usb_phy_vbus_off(ci->usb_phy);
  421. fsm->a_bus_drop = 1;
  422. fsm->a_bus_req = 0;
  423. }
  424. }
  425. /*
  426. * Control data line by Run Stop bit.
  427. */
  428. static void ci_otg_loc_conn(struct otg_fsm *fsm, int on)
  429. {
  430. struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
  431. if (on)
  432. hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
  433. else
  434. hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
  435. }
  436. /*
  437. * Generate SOF by host.
  438. * In host mode, controller will automatically send SOF.
  439. * Suspend will block the data on the port.
  440. *
  441. * This is controlled through usbcore by usb autosuspend,
  442. * so the usb device class driver need support autosuspend,
  443. * otherwise the bus suspend will not happen.
  444. */
  445. static void ci_otg_loc_sof(struct otg_fsm *fsm, int on)
  446. {
  447. struct usb_device *udev;
  448. if (!fsm->otg->host)
  449. return;
  450. udev = usb_hub_find_child(fsm->otg->host->root_hub, 1);
  451. if (!udev)
  452. return;
  453. if (on) {
  454. usb_disable_autosuspend(udev);
  455. } else {
  456. pm_runtime_set_autosuspend_delay(&udev->dev, 0);
  457. usb_enable_autosuspend(udev);
  458. }
  459. }
  460. /*
  461. * Start SRP pulsing by data-line pulsing,
  462. * no v-bus pulsing followed
  463. */
  464. static void ci_otg_start_pulse(struct otg_fsm *fsm)
  465. {
  466. struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
  467. /* Hardware Assistant Data pulse */
  468. hw_write_otgsc(ci, OTGSC_HADP, OTGSC_HADP);
  469. pm_runtime_get(ci->dev);
  470. ci_otg_add_timer(ci, B_DATA_PLS);
  471. }
  472. static int ci_otg_start_host(struct otg_fsm *fsm, int on)
  473. {
  474. struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
  475. if (on) {
  476. ci_role_stop(ci);
  477. ci_role_start(ci, CI_ROLE_HOST);
  478. } else {
  479. ci_role_stop(ci);
  480. ci_role_start(ci, CI_ROLE_GADGET);
  481. }
  482. return 0;
  483. }
  484. static int ci_otg_start_gadget(struct otg_fsm *fsm, int on)
  485. {
  486. struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
  487. if (on)
  488. usb_gadget_vbus_connect(&ci->gadget);
  489. else
  490. usb_gadget_vbus_disconnect(&ci->gadget);
  491. return 0;
  492. }
  493. static struct otg_fsm_ops ci_otg_ops = {
  494. .drv_vbus = ci_otg_drv_vbus,
  495. .loc_conn = ci_otg_loc_conn,
  496. .loc_sof = ci_otg_loc_sof,
  497. .start_pulse = ci_otg_start_pulse,
  498. .add_timer = ci_otg_fsm_add_timer,
  499. .del_timer = ci_otg_fsm_del_timer,
  500. .start_host = ci_otg_start_host,
  501. .start_gadget = ci_otg_start_gadget,
  502. };
  503. int ci_otg_fsm_work(struct ci_hdrc *ci)
  504. {
  505. /*
  506. * Don't do fsm transition for B device
  507. * when there is no gadget class driver
  508. */
  509. if (ci->fsm.id && !(ci->driver) &&
  510. ci->fsm.otg->state < OTG_STATE_A_IDLE)
  511. return 0;
  512. pm_runtime_get_sync(ci->dev);
  513. if (otg_statemachine(&ci->fsm)) {
  514. if (ci->fsm.otg->state == OTG_STATE_A_IDLE) {
  515. /*
  516. * Further state change for cases:
  517. * a_idle to b_idle; or
  518. * a_idle to a_wait_vrise due to ID change(1->0), so
  519. * B-dev becomes A-dev can try to start new session
  520. * consequently; or
  521. * a_idle to a_wait_vrise when power up
  522. */
  523. if ((ci->fsm.id) || (ci->id_event) ||
  524. (ci->fsm.power_up)) {
  525. ci_otg_queue_work(ci);
  526. } else {
  527. /* Enable data pulse irq */
  528. hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS |
  529. PORTSC_PP, 0);
  530. hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS);
  531. hw_write_otgsc(ci, OTGSC_DPIE, OTGSC_DPIE);
  532. }
  533. if (ci->id_event)
  534. ci->id_event = false;
  535. } else if (ci->fsm.otg->state == OTG_STATE_B_IDLE) {
  536. if (ci->fsm.b_sess_vld) {
  537. ci->fsm.power_up = 0;
  538. /*
  539. * Further transite to b_periphearl state
  540. * when register gadget driver with vbus on
  541. */
  542. ci_otg_queue_work(ci);
  543. }
  544. } else if (ci->fsm.otg->state == OTG_STATE_A_HOST) {
  545. pm_runtime_mark_last_busy(ci->dev);
  546. pm_runtime_put_autosuspend(ci->dev);
  547. return 0;
  548. }
  549. }
  550. pm_runtime_put_sync(ci->dev);
  551. return 0;
  552. }
  553. /*
  554. * Update fsm variables in each state if catching expected interrupts,
  555. * called by otg fsm isr.
  556. */
  557. static void ci_otg_fsm_event(struct ci_hdrc *ci)
  558. {
  559. u32 intr_sts, otg_bsess_vld, port_conn;
  560. struct otg_fsm *fsm = &ci->fsm;
  561. intr_sts = hw_read_intr_status(ci);
  562. otg_bsess_vld = hw_read_otgsc(ci, OTGSC_BSV);
  563. port_conn = hw_read(ci, OP_PORTSC, PORTSC_CCS);
  564. switch (ci->fsm.otg->state) {
  565. case OTG_STATE_A_WAIT_BCON:
  566. if (port_conn) {
  567. fsm->b_conn = 1;
  568. fsm->a_bus_req = 1;
  569. ci_otg_queue_work(ci);
  570. }
  571. break;
  572. case OTG_STATE_B_IDLE:
  573. if (otg_bsess_vld && (intr_sts & USBi_PCI) && port_conn) {
  574. fsm->b_sess_vld = 1;
  575. ci_otg_queue_work(ci);
  576. }
  577. break;
  578. case OTG_STATE_B_PERIPHERAL:
  579. if ((intr_sts & USBi_SLI) && port_conn && otg_bsess_vld) {
  580. ci_otg_add_timer(ci, B_AIDL_BDIS);
  581. } else if (intr_sts & USBi_PCI) {
  582. ci_otg_del_timer(ci, B_AIDL_BDIS);
  583. if (fsm->a_bus_suspend == 1)
  584. fsm->a_bus_suspend = 0;
  585. }
  586. break;
  587. case OTG_STATE_B_HOST:
  588. if ((intr_sts & USBi_PCI) && !port_conn) {
  589. fsm->a_conn = 0;
  590. fsm->b_bus_req = 0;
  591. ci_otg_queue_work(ci);
  592. }
  593. break;
  594. case OTG_STATE_A_PERIPHERAL:
  595. if (intr_sts & USBi_SLI) {
  596. fsm->b_bus_suspend = 1;
  597. /*
  598. * Init a timer to know how long this suspend
  599. * will continue, if time out, indicates B no longer
  600. * wants to be host role
  601. */
  602. ci_otg_add_timer(ci, A_BIDL_ADIS);
  603. }
  604. if (intr_sts & USBi_URI)
  605. ci_otg_del_timer(ci, A_BIDL_ADIS);
  606. if (intr_sts & USBi_PCI) {
  607. if (fsm->b_bus_suspend == 1) {
  608. ci_otg_del_timer(ci, A_BIDL_ADIS);
  609. fsm->b_bus_suspend = 0;
  610. }
  611. }
  612. break;
  613. case OTG_STATE_A_SUSPEND:
  614. if ((intr_sts & USBi_PCI) && !port_conn) {
  615. fsm->b_conn = 0;
  616. /* if gadget driver is binded */
  617. if (ci->driver) {
  618. /* A device to be peripheral mode */
  619. ci->gadget.is_a_peripheral = 1;
  620. }
  621. ci_otg_queue_work(ci);
  622. }
  623. break;
  624. case OTG_STATE_A_HOST:
  625. if ((intr_sts & USBi_PCI) && !port_conn) {
  626. fsm->b_conn = 0;
  627. ci_otg_queue_work(ci);
  628. }
  629. break;
  630. case OTG_STATE_B_WAIT_ACON:
  631. if ((intr_sts & USBi_PCI) && port_conn) {
  632. fsm->a_conn = 1;
  633. ci_otg_queue_work(ci);
  634. }
  635. break;
  636. default:
  637. break;
  638. }
  639. }
  640. /*
  641. * ci_otg_irq - otg fsm related irq handling
  642. * and also update otg fsm variable by monitoring usb host and udc
  643. * state change interrupts.
  644. * @ci: ci_hdrc
  645. */
  646. irqreturn_t ci_otg_fsm_irq(struct ci_hdrc *ci)
  647. {
  648. irqreturn_t retval = IRQ_NONE;
  649. u32 otgsc, otg_int_src = 0;
  650. struct otg_fsm *fsm = &ci->fsm;
  651. otgsc = hw_read_otgsc(ci, ~0);
  652. otg_int_src = otgsc & OTGSC_INT_STATUS_BITS & (otgsc >> 8);
  653. fsm->id = (otgsc & OTGSC_ID) ? 1 : 0;
  654. if (otg_int_src) {
  655. if (otg_int_src & OTGSC_DPIS) {
  656. hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS);
  657. fsm->a_srp_det = 1;
  658. fsm->a_bus_drop = 0;
  659. } else if (otg_int_src & OTGSC_IDIS) {
  660. hw_write_otgsc(ci, OTGSC_IDIS, OTGSC_IDIS);
  661. if (fsm->id == 0) {
  662. fsm->a_bus_drop = 0;
  663. fsm->a_bus_req = 1;
  664. ci->id_event = true;
  665. }
  666. } else if (otg_int_src & OTGSC_BSVIS) {
  667. hw_write_otgsc(ci, OTGSC_BSVIS, OTGSC_BSVIS);
  668. if (otgsc & OTGSC_BSV) {
  669. fsm->b_sess_vld = 1;
  670. ci_otg_del_timer(ci, B_SSEND_SRP);
  671. ci_otg_del_timer(ci, B_SRP_FAIL);
  672. fsm->b_ssend_srp = 0;
  673. } else {
  674. fsm->b_sess_vld = 0;
  675. if (fsm->id)
  676. ci_otg_add_timer(ci, B_SSEND_SRP);
  677. }
  678. } else if (otg_int_src & OTGSC_AVVIS) {
  679. hw_write_otgsc(ci, OTGSC_AVVIS, OTGSC_AVVIS);
  680. if (otgsc & OTGSC_AVV) {
  681. fsm->a_vbus_vld = 1;
  682. } else {
  683. fsm->a_vbus_vld = 0;
  684. fsm->b_conn = 0;
  685. }
  686. }
  687. ci_otg_queue_work(ci);
  688. return IRQ_HANDLED;
  689. }
  690. ci_otg_fsm_event(ci);
  691. return retval;
  692. }
  693. void ci_hdrc_otg_fsm_start(struct ci_hdrc *ci)
  694. {
  695. ci_otg_queue_work(ci);
  696. }
  697. int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci)
  698. {
  699. int retval = 0;
  700. if (ci->phy)
  701. ci->otg.phy = ci->phy;
  702. else
  703. ci->otg.usb_phy = ci->usb_phy;
  704. ci->otg.gadget = &ci->gadget;
  705. ci->fsm.otg = &ci->otg;
  706. ci->fsm.power_up = 1;
  707. ci->fsm.id = hw_read_otgsc(ci, OTGSC_ID) ? 1 : 0;
  708. ci->fsm.otg->state = OTG_STATE_UNDEFINED;
  709. ci->fsm.ops = &ci_otg_ops;
  710. ci->gadget.hnp_polling_support = 1;
  711. ci->fsm.host_req_flag = devm_kzalloc(ci->dev, 1, GFP_KERNEL);
  712. if (!ci->fsm.host_req_flag)
  713. return -ENOMEM;
  714. mutex_init(&ci->fsm.lock);
  715. retval = ci_otg_init_timers(ci);
  716. if (retval) {
  717. dev_err(ci->dev, "Couldn't init OTG timers\n");
  718. return retval;
  719. }
  720. ci->enabled_otg_timer_bits = 0;
  721. ci->next_otg_timer = NUM_OTG_FSM_TIMERS;
  722. retval = sysfs_create_group(&ci->dev->kobj, &inputs_attr_group);
  723. if (retval < 0) {
  724. dev_dbg(ci->dev,
  725. "Can't register sysfs attr group: %d\n", retval);
  726. return retval;
  727. }
  728. /* Enable A vbus valid irq */
  729. hw_write_otgsc(ci, OTGSC_AVVIE, OTGSC_AVVIE);
  730. if (ci->fsm.id) {
  731. ci->fsm.b_ssend_srp =
  732. hw_read_otgsc(ci, OTGSC_BSV) ? 0 : 1;
  733. ci->fsm.b_sess_vld =
  734. hw_read_otgsc(ci, OTGSC_BSV) ? 1 : 0;
  735. /* Enable BSV irq */
  736. hw_write_otgsc(ci, OTGSC_BSVIE, OTGSC_BSVIE);
  737. }
  738. return 0;
  739. }
  740. void ci_hdrc_otg_fsm_remove(struct ci_hdrc *ci)
  741. {
  742. sysfs_remove_group(&ci->dev->kobj, &inputs_attr_group);
  743. }