ufshci-dwc.h 730 B

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * UFS Host driver for Synopsys Designware Core
  4. *
  5. * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
  6. *
  7. * Authors: Joao Pinto <[email protected]>
  8. */
  9. #ifndef _UFSHCI_DWC_H
  10. #define _UFSHCI_DWC_H
  11. /* DWC HC UFSHCI specific Registers */
  12. enum dwc_specific_registers {
  13. DWC_UFS_REG_HCLKDIV = 0xFC,
  14. };
  15. /* Clock Divider Values: Hex equivalent of frequency in MHz */
  16. enum clk_div_values {
  17. DWC_UFS_REG_HCLKDIV_DIV_62_5 = 0x3e,
  18. DWC_UFS_REG_HCLKDIV_DIV_125 = 0x7d,
  19. DWC_UFS_REG_HCLKDIV_DIV_200 = 0xc8,
  20. };
  21. /* Selector Index */
  22. enum selector_index {
  23. SELIND_LN0_TX = 0x00,
  24. SELIND_LN1_TX = 0x01,
  25. SELIND_LN0_RX = 0x04,
  26. SELIND_LN1_RX = 0x05,
  27. };
  28. #endif /* End of Header */