rzg2l_thermal.c 6.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Renesas RZ/G2L TSU Thermal Sensor Driver
  4. *
  5. * Copyright (C) 2021 Renesas Electronics Corporation
  6. */
  7. #include <linux/delay.h>
  8. #include <linux/err.h>
  9. #include <linux/io.h>
  10. #include <linux/iopoll.h>
  11. #include <linux/math.h>
  12. #include <linux/module.h>
  13. #include <linux/of_device.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/pm_runtime.h>
  16. #include <linux/reset.h>
  17. #include <linux/thermal.h>
  18. #include <linux/units.h>
  19. #include "thermal_hwmon.h"
  20. #define CTEMP_MASK 0xFFF
  21. /* default calibration values, if FUSE values are missing */
  22. #define SW_CALIB0_VAL 3148
  23. #define SW_CALIB1_VAL 503
  24. /* Register offsets */
  25. #define TSU_SM 0x00
  26. #define TSU_ST 0x04
  27. #define TSU_SAD 0x0C
  28. #define TSU_SS 0x10
  29. #define OTPTSUTRIM_REG(n) (0x18 + ((n) * 0x4))
  30. #define OTPTSUTRIM_EN_MASK BIT(31)
  31. #define OTPTSUTRIM_MASK GENMASK(11, 0)
  32. /* Sensor Mode Register(TSU_SM) */
  33. #define TSU_SM_EN_TS BIT(0)
  34. #define TSU_SM_ADC_EN_TS BIT(1)
  35. #define TSU_SM_NORMAL_MODE (TSU_SM_EN_TS | TSU_SM_ADC_EN_TS)
  36. /* TSU_ST bits */
  37. #define TSU_ST_START BIT(0)
  38. #define TSU_SS_CONV_RUNNING BIT(0)
  39. #define TS_CODE_AVE_SCALE(x) ((x) * 1000000)
  40. #define MCELSIUS(temp) ((temp) * MILLIDEGREE_PER_DEGREE)
  41. #define TS_CODE_CAP_TIMES 8 /* Total number of ADC data samples */
  42. #define RZG2L_THERMAL_GRAN 500 /* milli Celsius */
  43. #define RZG2L_TSU_SS_TIMEOUT_US 1000
  44. #define CURVATURE_CORRECTION_CONST 13
  45. struct rzg2l_thermal_priv {
  46. struct device *dev;
  47. void __iomem *base;
  48. struct thermal_zone_device *zone;
  49. struct reset_control *rstc;
  50. u32 calib0, calib1;
  51. };
  52. static inline u32 rzg2l_thermal_read(struct rzg2l_thermal_priv *priv, u32 reg)
  53. {
  54. return ioread32(priv->base + reg);
  55. }
  56. static inline void rzg2l_thermal_write(struct rzg2l_thermal_priv *priv, u32 reg,
  57. u32 data)
  58. {
  59. iowrite32(data, priv->base + reg);
  60. }
  61. static int rzg2l_thermal_get_temp(struct thermal_zone_device *tz, int *temp)
  62. {
  63. struct rzg2l_thermal_priv *priv = tz->devdata;
  64. u32 result = 0, dsensor, ts_code_ave;
  65. int val, i;
  66. for (i = 0; i < TS_CODE_CAP_TIMES ; i++) {
  67. /*
  68. * TSU repeats measurement at 20 microseconds intervals and
  69. * automatically updates the results of measurement. As per
  70. * the HW manual for measuring temperature we need to read 8
  71. * values consecutively and then take the average.
  72. * ts_code_ave = (ts_code[0] + ⋯ + ts_code[7]) / 8
  73. */
  74. result += rzg2l_thermal_read(priv, TSU_SAD) & CTEMP_MASK;
  75. usleep_range(20, 30);
  76. }
  77. ts_code_ave = result / TS_CODE_CAP_TIMES;
  78. /*
  79. * Calculate actual sensor value by applying curvature correction formula
  80. * dsensor = ts_code_ave / (1 + ts_code_ave * 0.000013). Here we are doing
  81. * integer calculation by scaling all the values by 1000000.
  82. */
  83. dsensor = TS_CODE_AVE_SCALE(ts_code_ave) /
  84. (TS_CODE_AVE_SCALE(1) + (ts_code_ave * CURVATURE_CORRECTION_CONST));
  85. /*
  86. * The temperature Tj is calculated by the formula
  87. * Tj = (dsensor − calib1) * 165/ (calib0 − calib1) − 40
  88. * where calib0 and calib1 are the calibration values.
  89. */
  90. val = ((dsensor - priv->calib1) * (MCELSIUS(165) /
  91. (priv->calib0 - priv->calib1))) - MCELSIUS(40);
  92. *temp = roundup(val, RZG2L_THERMAL_GRAN);
  93. return 0;
  94. }
  95. static const struct thermal_zone_device_ops rzg2l_tz_of_ops = {
  96. .get_temp = rzg2l_thermal_get_temp,
  97. };
  98. static int rzg2l_thermal_init(struct rzg2l_thermal_priv *priv)
  99. {
  100. u32 reg_val;
  101. rzg2l_thermal_write(priv, TSU_SM, TSU_SM_NORMAL_MODE);
  102. rzg2l_thermal_write(priv, TSU_ST, 0);
  103. /*
  104. * Before setting the START bit, TSU should be in normal operating
  105. * mode. As per the HW manual, it will take 60 µs to place the TSU
  106. * into normal operating mode.
  107. */
  108. usleep_range(60, 80);
  109. reg_val = rzg2l_thermal_read(priv, TSU_ST);
  110. reg_val |= TSU_ST_START;
  111. rzg2l_thermal_write(priv, TSU_ST, reg_val);
  112. return readl_poll_timeout(priv->base + TSU_SS, reg_val,
  113. reg_val == TSU_SS_CONV_RUNNING, 50,
  114. RZG2L_TSU_SS_TIMEOUT_US);
  115. }
  116. static void rzg2l_thermal_reset_assert_pm_disable_put(struct platform_device *pdev)
  117. {
  118. struct rzg2l_thermal_priv *priv = dev_get_drvdata(&pdev->dev);
  119. pm_runtime_put(&pdev->dev);
  120. pm_runtime_disable(&pdev->dev);
  121. reset_control_assert(priv->rstc);
  122. }
  123. static int rzg2l_thermal_remove(struct platform_device *pdev)
  124. {
  125. struct rzg2l_thermal_priv *priv = dev_get_drvdata(&pdev->dev);
  126. thermal_remove_hwmon_sysfs(priv->zone);
  127. rzg2l_thermal_reset_assert_pm_disable_put(pdev);
  128. return 0;
  129. }
  130. static int rzg2l_thermal_probe(struct platform_device *pdev)
  131. {
  132. struct thermal_zone_device *zone;
  133. struct rzg2l_thermal_priv *priv;
  134. struct device *dev = &pdev->dev;
  135. int ret;
  136. priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  137. if (!priv)
  138. return -ENOMEM;
  139. priv->base = devm_platform_ioremap_resource(pdev, 0);
  140. if (IS_ERR(priv->base))
  141. return PTR_ERR(priv->base);
  142. priv->dev = dev;
  143. priv->rstc = devm_reset_control_get_exclusive(dev, NULL);
  144. if (IS_ERR(priv->rstc))
  145. return dev_err_probe(dev, PTR_ERR(priv->rstc),
  146. "failed to get cpg reset");
  147. ret = reset_control_deassert(priv->rstc);
  148. if (ret)
  149. return dev_err_probe(dev, ret, "failed to deassert");
  150. pm_runtime_enable(dev);
  151. pm_runtime_get_sync(dev);
  152. priv->calib0 = rzg2l_thermal_read(priv, OTPTSUTRIM_REG(0));
  153. if (priv->calib0 & OTPTSUTRIM_EN_MASK)
  154. priv->calib0 &= OTPTSUTRIM_MASK;
  155. else
  156. priv->calib0 = SW_CALIB0_VAL;
  157. priv->calib1 = rzg2l_thermal_read(priv, OTPTSUTRIM_REG(1));
  158. if (priv->calib1 & OTPTSUTRIM_EN_MASK)
  159. priv->calib1 &= OTPTSUTRIM_MASK;
  160. else
  161. priv->calib1 = SW_CALIB1_VAL;
  162. platform_set_drvdata(pdev, priv);
  163. ret = rzg2l_thermal_init(priv);
  164. if (ret) {
  165. dev_err(dev, "Failed to start TSU");
  166. goto err;
  167. }
  168. zone = devm_thermal_of_zone_register(dev, 0, priv,
  169. &rzg2l_tz_of_ops);
  170. if (IS_ERR(zone)) {
  171. dev_err(dev, "Can't register thermal zone");
  172. ret = PTR_ERR(zone);
  173. goto err;
  174. }
  175. priv->zone = zone;
  176. priv->zone->tzp->no_hwmon = false;
  177. ret = thermal_add_hwmon_sysfs(priv->zone);
  178. if (ret)
  179. goto err;
  180. dev_dbg(dev, "TSU probed with %s calibration values",
  181. rzg2l_thermal_read(priv, OTPTSUTRIM_REG(0)) ? "hw" : "sw");
  182. return 0;
  183. err:
  184. rzg2l_thermal_reset_assert_pm_disable_put(pdev);
  185. return ret;
  186. }
  187. static const struct of_device_id rzg2l_thermal_dt_ids[] = {
  188. { .compatible = "renesas,rzg2l-tsu", },
  189. { /* sentinel */ }
  190. };
  191. MODULE_DEVICE_TABLE(of, rzg2l_thermal_dt_ids);
  192. static struct platform_driver rzg2l_thermal_driver = {
  193. .driver = {
  194. .name = "rzg2l_thermal",
  195. .of_match_table = rzg2l_thermal_dt_ids,
  196. },
  197. .probe = rzg2l_thermal_probe,
  198. .remove = rzg2l_thermal_remove,
  199. };
  200. module_platform_driver(rzg2l_thermal_driver);
  201. MODULE_DESCRIPTION("Renesas RZ/G2L TSU Thermal Sensor Driver");
  202. MODULE_AUTHOR("Biju Das <[email protected]>");
  203. MODULE_LICENSE("GPL v2");