rcar_gen3_thermal.c 15 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * R-Car Gen3 THS thermal sensor driver
  4. * Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
  5. *
  6. * Copyright (C) 2016 Renesas Electronics Corporation.
  7. * Copyright (C) 2016 Sang Engineering
  8. */
  9. #include <linux/delay.h>
  10. #include <linux/err.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/io.h>
  13. #include <linux/module.h>
  14. #include <linux/of_device.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/pm_runtime.h>
  17. #include <linux/sys_soc.h>
  18. #include <linux/thermal.h>
  19. #include "thermal_core.h"
  20. #include "thermal_hwmon.h"
  21. /* Register offsets */
  22. #define REG_GEN3_IRQSTR 0x04
  23. #define REG_GEN3_IRQMSK 0x08
  24. #define REG_GEN3_IRQCTL 0x0C
  25. #define REG_GEN3_IRQEN 0x10
  26. #define REG_GEN3_IRQTEMP1 0x14
  27. #define REG_GEN3_IRQTEMP2 0x18
  28. #define REG_GEN3_IRQTEMP3 0x1C
  29. #define REG_GEN3_CTSR 0x20
  30. #define REG_GEN3_THCTR 0x20
  31. #define REG_GEN3_TEMP 0x28
  32. #define REG_GEN3_THCODE1 0x50
  33. #define REG_GEN3_THCODE2 0x54
  34. #define REG_GEN3_THCODE3 0x58
  35. #define REG_GEN3_PTAT1 0x5c
  36. #define REG_GEN3_PTAT2 0x60
  37. #define REG_GEN3_PTAT3 0x64
  38. #define REG_GEN3_THSCP 0x68
  39. /* IRQ{STR,MSK,EN} bits */
  40. #define IRQ_TEMP1 BIT(0)
  41. #define IRQ_TEMP2 BIT(1)
  42. #define IRQ_TEMP3 BIT(2)
  43. #define IRQ_TEMPD1 BIT(3)
  44. #define IRQ_TEMPD2 BIT(4)
  45. #define IRQ_TEMPD3 BIT(5)
  46. /* CTSR bits */
  47. #define CTSR_PONM BIT(8)
  48. #define CTSR_AOUT BIT(7)
  49. #define CTSR_THBGR BIT(5)
  50. #define CTSR_VMEN BIT(4)
  51. #define CTSR_VMST BIT(1)
  52. #define CTSR_THSST BIT(0)
  53. /* THCTR bits */
  54. #define THCTR_PONM BIT(6)
  55. #define THCTR_THSST BIT(0)
  56. /* THSCP bits */
  57. #define THSCP_COR_PARA_VLD (BIT(15) | BIT(14))
  58. #define CTEMP_MASK 0xFFF
  59. #define MCELSIUS(temp) ((temp) * 1000)
  60. #define GEN3_FUSE_MASK 0xFFF
  61. #define TSC_MAX_NUM 5
  62. /* Structure for thermal temperature calculation */
  63. struct equation_coefs {
  64. int a1;
  65. int b1;
  66. int a2;
  67. int b2;
  68. };
  69. struct rcar_gen3_thermal_tsc {
  70. void __iomem *base;
  71. struct thermal_zone_device *zone;
  72. struct equation_coefs coef;
  73. int tj_t;
  74. int thcode[3];
  75. };
  76. struct rcar_gen3_thermal_priv {
  77. struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
  78. unsigned int num_tscs;
  79. void (*thermal_init)(struct rcar_gen3_thermal_tsc *tsc);
  80. int ptat[3];
  81. };
  82. static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
  83. u32 reg)
  84. {
  85. return ioread32(tsc->base + reg);
  86. }
  87. static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
  88. u32 reg, u32 data)
  89. {
  90. iowrite32(data, tsc->base + reg);
  91. }
  92. /*
  93. * Linear approximation for temperature
  94. *
  95. * [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
  96. *
  97. * The constants a and b are calculated using two triplets of int values PTAT
  98. * and THCODE. PTAT and THCODE can either be read from hardware or use hard
  99. * coded values from driver. The formula to calculate a and b are taken from
  100. * BSP and sparsely documented and understood.
  101. *
  102. * Examining the linear formula and the formula used to calculate constants a
  103. * and b while knowing that the span for PTAT and THCODE values are between
  104. * 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
  105. * Integer also needs to be signed so that leaves 7 bits for binary
  106. * fixed point scaling.
  107. */
  108. #define FIXPT_SHIFT 7
  109. #define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
  110. #define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
  111. #define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
  112. #define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)
  113. #define RCAR3_THERMAL_GRAN 500 /* mili Celsius */
  114. /* no idea where these constants come from */
  115. #define TJ_3 -41
  116. static void rcar_gen3_thermal_calc_coefs(struct rcar_gen3_thermal_priv *priv,
  117. struct rcar_gen3_thermal_tsc *tsc,
  118. int ths_tj_1)
  119. {
  120. /* TODO: Find documentation and document constant calculation formula */
  121. /*
  122. * Division is not scaled in BSP and if scaled it might overflow
  123. * the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
  124. */
  125. tsc->tj_t = (FIXPT_INT((priv->ptat[1] - priv->ptat[2]) * (ths_tj_1 - TJ_3))
  126. / (priv->ptat[0] - priv->ptat[2])) + FIXPT_INT(TJ_3);
  127. tsc->coef.a1 = FIXPT_DIV(FIXPT_INT(tsc->thcode[1] - tsc->thcode[2]),
  128. tsc->tj_t - FIXPT_INT(TJ_3));
  129. tsc->coef.b1 = FIXPT_INT(tsc->thcode[2]) - tsc->coef.a1 * TJ_3;
  130. tsc->coef.a2 = FIXPT_DIV(FIXPT_INT(tsc->thcode[1] - tsc->thcode[0]),
  131. tsc->tj_t - FIXPT_INT(ths_tj_1));
  132. tsc->coef.b2 = FIXPT_INT(tsc->thcode[0]) - tsc->coef.a2 * ths_tj_1;
  133. }
  134. static int rcar_gen3_thermal_round(int temp)
  135. {
  136. int result, round_offs;
  137. round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
  138. -RCAR3_THERMAL_GRAN / 2;
  139. result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
  140. return result * RCAR3_THERMAL_GRAN;
  141. }
  142. static int rcar_gen3_thermal_get_temp(struct thermal_zone_device *tz, int *temp)
  143. {
  144. struct rcar_gen3_thermal_tsc *tsc = tz->devdata;
  145. int mcelsius, val;
  146. int reg;
  147. /* Read register and convert to mili Celsius */
  148. reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;
  149. if (reg <= tsc->thcode[1])
  150. val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1,
  151. tsc->coef.a1);
  152. else
  153. val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2,
  154. tsc->coef.a2);
  155. mcelsius = FIXPT_TO_MCELSIUS(val);
  156. /* Guaranteed operating range is -40C to 125C. */
  157. /* Round value to device granularity setting */
  158. *temp = rcar_gen3_thermal_round(mcelsius);
  159. return 0;
  160. }
  161. static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc,
  162. int mcelsius)
  163. {
  164. int celsius, val;
  165. celsius = DIV_ROUND_CLOSEST(mcelsius, 1000);
  166. if (celsius <= INT_FIXPT(tsc->tj_t))
  167. val = celsius * tsc->coef.a1 + tsc->coef.b1;
  168. else
  169. val = celsius * tsc->coef.a2 + tsc->coef.b2;
  170. return INT_FIXPT(val);
  171. }
  172. static int rcar_gen3_thermal_set_trips(struct thermal_zone_device *tz, int low, int high)
  173. {
  174. struct rcar_gen3_thermal_tsc *tsc = tz->devdata;
  175. u32 irqmsk = 0;
  176. if (low != -INT_MAX) {
  177. irqmsk |= IRQ_TEMPD1;
  178. rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1,
  179. rcar_gen3_thermal_mcelsius_to_temp(tsc, low));
  180. }
  181. if (high != INT_MAX) {
  182. irqmsk |= IRQ_TEMP2;
  183. rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2,
  184. rcar_gen3_thermal_mcelsius_to_temp(tsc, high));
  185. }
  186. rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, irqmsk);
  187. return 0;
  188. }
  189. static struct thermal_zone_device_ops rcar_gen3_tz_of_ops = {
  190. .get_temp = rcar_gen3_thermal_get_temp,
  191. .set_trips = rcar_gen3_thermal_set_trips,
  192. };
  193. static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
  194. {
  195. struct rcar_gen3_thermal_priv *priv = data;
  196. unsigned int i;
  197. u32 status;
  198. for (i = 0; i < priv->num_tscs; i++) {
  199. status = rcar_gen3_thermal_read(priv->tscs[i], REG_GEN3_IRQSTR);
  200. rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQSTR, 0);
  201. if (status)
  202. thermal_zone_device_update(priv->tscs[i]->zone,
  203. THERMAL_EVENT_UNSPECIFIED);
  204. }
  205. return IRQ_HANDLED;
  206. }
  207. static const struct soc_device_attribute r8a7795es1[] = {
  208. { .soc_id = "r8a7795", .revision = "ES1.*" },
  209. { /* sentinel */ }
  210. };
  211. static bool rcar_gen3_thermal_read_fuses(struct rcar_gen3_thermal_priv *priv)
  212. {
  213. unsigned int i;
  214. u32 thscp;
  215. /* If fuses are not set, fallback to pseudo values. */
  216. thscp = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_THSCP);
  217. if ((thscp & THSCP_COR_PARA_VLD) != THSCP_COR_PARA_VLD) {
  218. /* Default THCODE values in case FUSEs are not set. */
  219. static const int thcodes[TSC_MAX_NUM][3] = {
  220. { 3397, 2800, 2221 },
  221. { 3393, 2795, 2216 },
  222. { 3389, 2805, 2237 },
  223. { 3415, 2694, 2195 },
  224. { 3356, 2724, 2244 },
  225. };
  226. priv->ptat[0] = 2631;
  227. priv->ptat[1] = 1509;
  228. priv->ptat[2] = 435;
  229. for (i = 0; i < priv->num_tscs; i++) {
  230. struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
  231. tsc->thcode[0] = thcodes[i][0];
  232. tsc->thcode[1] = thcodes[i][1];
  233. tsc->thcode[2] = thcodes[i][2];
  234. }
  235. return false;
  236. }
  237. /*
  238. * Set the pseudo calibration points with fused values.
  239. * PTAT is shared between all TSCs but only fused for the first
  240. * TSC while THCODEs are fused for each TSC.
  241. */
  242. priv->ptat[0] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT1) &
  243. GEN3_FUSE_MASK;
  244. priv->ptat[1] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT2) &
  245. GEN3_FUSE_MASK;
  246. priv->ptat[2] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT3) &
  247. GEN3_FUSE_MASK;
  248. for (i = 0; i < priv->num_tscs; i++) {
  249. struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
  250. tsc->thcode[0] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE1) &
  251. GEN3_FUSE_MASK;
  252. tsc->thcode[1] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE2) &
  253. GEN3_FUSE_MASK;
  254. tsc->thcode[2] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE3) &
  255. GEN3_FUSE_MASK;
  256. }
  257. return true;
  258. }
  259. static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_tsc *tsc)
  260. {
  261. rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_THBGR);
  262. rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, 0x0);
  263. usleep_range(1000, 2000);
  264. rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM);
  265. rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
  266. rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
  267. if (tsc->zone->ops->set_trips)
  268. rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN,
  269. IRQ_TEMPD1 | IRQ_TEMP2);
  270. rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
  271. CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN);
  272. usleep_range(100, 200);
  273. rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
  274. CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN |
  275. CTSR_VMST | CTSR_THSST);
  276. usleep_range(1000, 2000);
  277. }
  278. static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
  279. {
  280. u32 reg_val;
  281. reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
  282. reg_val &= ~THCTR_PONM;
  283. rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
  284. usleep_range(1000, 2000);
  285. rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0);
  286. rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
  287. if (tsc->zone->ops->set_trips)
  288. rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN,
  289. IRQ_TEMPD1 | IRQ_TEMP2);
  290. reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
  291. reg_val |= THCTR_THSST;
  292. rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
  293. usleep_range(1000, 2000);
  294. }
  295. static const int rcar_gen3_ths_tj_1 = 126;
  296. static const int rcar_gen3_ths_tj_1_m3_w = 116;
  297. static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
  298. {
  299. .compatible = "renesas,r8a774a1-thermal",
  300. .data = &rcar_gen3_ths_tj_1_m3_w,
  301. },
  302. {
  303. .compatible = "renesas,r8a774b1-thermal",
  304. .data = &rcar_gen3_ths_tj_1,
  305. },
  306. {
  307. .compatible = "renesas,r8a774e1-thermal",
  308. .data = &rcar_gen3_ths_tj_1,
  309. },
  310. {
  311. .compatible = "renesas,r8a7795-thermal",
  312. .data = &rcar_gen3_ths_tj_1,
  313. },
  314. {
  315. .compatible = "renesas,r8a7796-thermal",
  316. .data = &rcar_gen3_ths_tj_1_m3_w,
  317. },
  318. {
  319. .compatible = "renesas,r8a77961-thermal",
  320. .data = &rcar_gen3_ths_tj_1_m3_w,
  321. },
  322. {
  323. .compatible = "renesas,r8a77965-thermal",
  324. .data = &rcar_gen3_ths_tj_1,
  325. },
  326. {
  327. .compatible = "renesas,r8a77980-thermal",
  328. .data = &rcar_gen3_ths_tj_1,
  329. },
  330. {
  331. .compatible = "renesas,r8a779a0-thermal",
  332. .data = &rcar_gen3_ths_tj_1,
  333. },
  334. {
  335. .compatible = "renesas,r8a779f0-thermal",
  336. .data = &rcar_gen3_ths_tj_1,
  337. },
  338. {},
  339. };
  340. MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);
  341. static int rcar_gen3_thermal_remove(struct platform_device *pdev)
  342. {
  343. struct device *dev = &pdev->dev;
  344. pm_runtime_put(dev);
  345. pm_runtime_disable(dev);
  346. return 0;
  347. }
  348. static void rcar_gen3_hwmon_action(void *data)
  349. {
  350. struct thermal_zone_device *zone = data;
  351. thermal_remove_hwmon_sysfs(zone);
  352. }
  353. static int rcar_gen3_thermal_request_irqs(struct rcar_gen3_thermal_priv *priv,
  354. struct platform_device *pdev)
  355. {
  356. struct device *dev = &pdev->dev;
  357. unsigned int i;
  358. char *irqname;
  359. int ret, irq;
  360. for (i = 0; i < 2; i++) {
  361. irq = platform_get_irq_optional(pdev, i);
  362. if (irq < 0)
  363. return irq;
  364. irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:ch%d",
  365. dev_name(dev), i);
  366. if (!irqname)
  367. return -ENOMEM;
  368. ret = devm_request_threaded_irq(dev, irq, NULL,
  369. rcar_gen3_thermal_irq,
  370. IRQF_ONESHOT, irqname, priv);
  371. if (ret)
  372. return ret;
  373. }
  374. return 0;
  375. }
  376. static int rcar_gen3_thermal_probe(struct platform_device *pdev)
  377. {
  378. struct rcar_gen3_thermal_priv *priv;
  379. struct device *dev = &pdev->dev;
  380. const int *ths_tj_1 = of_device_get_match_data(dev);
  381. struct resource *res;
  382. struct thermal_zone_device *zone;
  383. unsigned int i;
  384. int ret;
  385. priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  386. if (!priv)
  387. return -ENOMEM;
  388. priv->thermal_init = rcar_gen3_thermal_init;
  389. if (soc_device_match(r8a7795es1))
  390. priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1;
  391. platform_set_drvdata(pdev, priv);
  392. if (rcar_gen3_thermal_request_irqs(priv, pdev))
  393. rcar_gen3_tz_of_ops.set_trips = NULL;
  394. pm_runtime_enable(dev);
  395. pm_runtime_get_sync(dev);
  396. for (i = 0; i < TSC_MAX_NUM; i++) {
  397. struct rcar_gen3_thermal_tsc *tsc;
  398. res = platform_get_resource(pdev, IORESOURCE_MEM, i);
  399. if (!res)
  400. break;
  401. tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
  402. if (!tsc) {
  403. ret = -ENOMEM;
  404. goto error_unregister;
  405. }
  406. tsc->base = devm_ioremap_resource(dev, res);
  407. if (IS_ERR(tsc->base)) {
  408. ret = PTR_ERR(tsc->base);
  409. goto error_unregister;
  410. }
  411. priv->tscs[i] = tsc;
  412. }
  413. priv->num_tscs = i;
  414. if (!rcar_gen3_thermal_read_fuses(priv))
  415. dev_info(dev, "No calibration values fused, fallback to driver values\n");
  416. for (i = 0; i < priv->num_tscs; i++) {
  417. struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
  418. zone = devm_thermal_of_zone_register(dev, i, tsc,
  419. &rcar_gen3_tz_of_ops);
  420. if (IS_ERR(zone)) {
  421. dev_err(dev, "Sensor %u: Can't register thermal zone\n", i);
  422. ret = PTR_ERR(zone);
  423. goto error_unregister;
  424. }
  425. tsc->zone = zone;
  426. priv->thermal_init(tsc);
  427. rcar_gen3_thermal_calc_coefs(priv, tsc, *ths_tj_1);
  428. tsc->zone->tzp->no_hwmon = false;
  429. ret = thermal_add_hwmon_sysfs(tsc->zone);
  430. if (ret)
  431. goto error_unregister;
  432. ret = devm_add_action_or_reset(dev, rcar_gen3_hwmon_action, zone);
  433. if (ret)
  434. goto error_unregister;
  435. ret = of_thermal_get_ntrips(tsc->zone);
  436. if (ret < 0)
  437. goto error_unregister;
  438. dev_info(dev, "Sensor %u: Loaded %d trip points\n", i, ret);
  439. }
  440. if (!priv->num_tscs) {
  441. ret = -ENODEV;
  442. goto error_unregister;
  443. }
  444. return 0;
  445. error_unregister:
  446. rcar_gen3_thermal_remove(pdev);
  447. return ret;
  448. }
  449. static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
  450. {
  451. struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
  452. unsigned int i;
  453. for (i = 0; i < priv->num_tscs; i++) {
  454. struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
  455. struct thermal_zone_device *zone = tsc->zone;
  456. priv->thermal_init(tsc);
  457. if (zone->ops->set_trips)
  458. rcar_gen3_thermal_set_trips(zone, zone->prev_low_trip,
  459. zone->prev_high_trip);
  460. }
  461. return 0;
  462. }
  463. static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, NULL,
  464. rcar_gen3_thermal_resume);
  465. static struct platform_driver rcar_gen3_thermal_driver = {
  466. .driver = {
  467. .name = "rcar_gen3_thermal",
  468. .pm = &rcar_gen3_thermal_pm_ops,
  469. .of_match_table = rcar_gen3_thermal_dt_ids,
  470. },
  471. .probe = rcar_gen3_thermal_probe,
  472. .remove = rcar_gen3_thermal_remove,
  473. };
  474. module_platform_driver(rcar_gen3_thermal_driver);
  475. MODULE_LICENSE("GPL v2");
  476. MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
  477. MODULE_AUTHOR("Wolfram Sang <[email protected]>");