cxgbit_lro.h 1.9 KB

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  1. /*
  2. * Copyright (c) 2016 Chelsio Communications, Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation.
  7. *
  8. */
  9. #ifndef __CXGBIT_LRO_H__
  10. #define __CXGBIT_LRO_H__
  11. #include <linux/kernel.h>
  12. #include <linux/module.h>
  13. #include <linux/errno.h>
  14. #include <linux/types.h>
  15. #include <linux/skbuff.h>
  16. #define LRO_FLUSH_LEN_MAX 65535
  17. struct cxgbit_lro_cb {
  18. struct cxgbit_sock *csk;
  19. u32 pdu_totallen;
  20. u32 offset;
  21. u8 pdu_idx;
  22. bool complete;
  23. };
  24. enum cxgbit_pducb_flags {
  25. PDUCBF_RX_HDR = (1 << 0), /* received pdu header */
  26. PDUCBF_RX_DATA = (1 << 1), /* received pdu payload */
  27. PDUCBF_RX_STATUS = (1 << 2), /* received ddp status */
  28. PDUCBF_RX_DATA_DDPD = (1 << 3), /* pdu payload ddp'd */
  29. PDUCBF_RX_DDP_CMP = (1 << 4), /* ddp completion */
  30. PDUCBF_RX_HCRC_ERR = (1 << 5), /* header digest error */
  31. PDUCBF_RX_DCRC_ERR = (1 << 6), /* data digest error */
  32. };
  33. struct cxgbit_lro_pdu_cb {
  34. u8 flags;
  35. u8 frags;
  36. u8 hfrag_idx;
  37. u8 nr_dfrags;
  38. u8 dfrag_idx;
  39. bool complete;
  40. u32 seq;
  41. u32 pdulen;
  42. u32 hlen;
  43. u32 dlen;
  44. u32 doffset;
  45. u32 ddigest;
  46. void *hdr;
  47. };
  48. #define LRO_SKB_MAX_HEADROOM \
  49. (sizeof(struct cxgbit_lro_cb) + \
  50. (MAX_SKB_FRAGS * sizeof(struct cxgbit_lro_pdu_cb)))
  51. #define LRO_SKB_MIN_HEADROOM \
  52. (sizeof(struct cxgbit_lro_cb) + \
  53. sizeof(struct cxgbit_lro_pdu_cb))
  54. #define cxgbit_skb_lro_cb(skb) ((struct cxgbit_lro_cb *)skb->data)
  55. #define cxgbit_skb_lro_pdu_cb(skb, i) \
  56. ((struct cxgbit_lro_pdu_cb *)(skb->data + sizeof(struct cxgbit_lro_cb) \
  57. + (i * sizeof(struct cxgbit_lro_pdu_cb))))
  58. #define CPL_RX_ISCSI_DDP_STATUS_DDP_SHIFT 16 /* ddp'able */
  59. #define CPL_RX_ISCSI_DDP_STATUS_PAD_SHIFT 19 /* pad error */
  60. #define CPL_RX_ISCSI_DDP_STATUS_HCRC_SHIFT 20 /* hcrc error */
  61. #define CPL_RX_ISCSI_DDP_STATUS_DCRC_SHIFT 21 /* dcrc error */
  62. #endif /*__CXGBIT_LRO_H_*/