qla_iocb.c 111 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * QLogic Fibre Channel HBA Driver
  4. * Copyright (c) 2003-2014 QLogic Corporation
  5. */
  6. #include "qla_def.h"
  7. #include "qla_target.h"
  8. #include <linux/blkdev.h>
  9. #include <linux/delay.h>
  10. #include <scsi/scsi_tcq.h>
  11. /**
  12. * qla2x00_get_cmd_direction() - Determine control_flag data direction.
  13. * @sp: SCSI command
  14. *
  15. * Returns the proper CF_* direction based on CDB.
  16. */
  17. static inline uint16_t
  18. qla2x00_get_cmd_direction(srb_t *sp)
  19. {
  20. uint16_t cflags;
  21. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  22. struct scsi_qla_host *vha = sp->vha;
  23. cflags = 0;
  24. /* Set transfer direction */
  25. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  26. cflags = CF_WRITE;
  27. vha->qla_stats.output_bytes += scsi_bufflen(cmd);
  28. vha->qla_stats.output_requests++;
  29. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  30. cflags = CF_READ;
  31. vha->qla_stats.input_bytes += scsi_bufflen(cmd);
  32. vha->qla_stats.input_requests++;
  33. }
  34. return (cflags);
  35. }
  36. /**
  37. * qla2x00_calc_iocbs_32() - Determine number of Command Type 2 and
  38. * Continuation Type 0 IOCBs to allocate.
  39. *
  40. * @dsds: number of data segment descriptors needed
  41. *
  42. * Returns the number of IOCB entries needed to store @dsds.
  43. */
  44. uint16_t
  45. qla2x00_calc_iocbs_32(uint16_t dsds)
  46. {
  47. uint16_t iocbs;
  48. iocbs = 1;
  49. if (dsds > 3) {
  50. iocbs += (dsds - 3) / 7;
  51. if ((dsds - 3) % 7)
  52. iocbs++;
  53. }
  54. return (iocbs);
  55. }
  56. /**
  57. * qla2x00_calc_iocbs_64() - Determine number of Command Type 3 and
  58. * Continuation Type 1 IOCBs to allocate.
  59. *
  60. * @dsds: number of data segment descriptors needed
  61. *
  62. * Returns the number of IOCB entries needed to store @dsds.
  63. */
  64. uint16_t
  65. qla2x00_calc_iocbs_64(uint16_t dsds)
  66. {
  67. uint16_t iocbs;
  68. iocbs = 1;
  69. if (dsds > 2) {
  70. iocbs += (dsds - 2) / 5;
  71. if ((dsds - 2) % 5)
  72. iocbs++;
  73. }
  74. return (iocbs);
  75. }
  76. /**
  77. * qla2x00_prep_cont_type0_iocb() - Initialize a Continuation Type 0 IOCB.
  78. * @vha: HA context
  79. *
  80. * Returns a pointer to the Continuation Type 0 IOCB packet.
  81. */
  82. static inline cont_entry_t *
  83. qla2x00_prep_cont_type0_iocb(struct scsi_qla_host *vha)
  84. {
  85. cont_entry_t *cont_pkt;
  86. struct req_que *req = vha->req;
  87. /* Adjust ring index. */
  88. req->ring_index++;
  89. if (req->ring_index == req->length) {
  90. req->ring_index = 0;
  91. req->ring_ptr = req->ring;
  92. } else {
  93. req->ring_ptr++;
  94. }
  95. cont_pkt = (cont_entry_t *)req->ring_ptr;
  96. /* Load packet defaults. */
  97. put_unaligned_le32(CONTINUE_TYPE, &cont_pkt->entry_type);
  98. return (cont_pkt);
  99. }
  100. /**
  101. * qla2x00_prep_cont_type1_iocb() - Initialize a Continuation Type 1 IOCB.
  102. * @vha: HA context
  103. * @req: request queue
  104. *
  105. * Returns a pointer to the continuation type 1 IOCB packet.
  106. */
  107. cont_a64_entry_t *
  108. qla2x00_prep_cont_type1_iocb(scsi_qla_host_t *vha, struct req_que *req)
  109. {
  110. cont_a64_entry_t *cont_pkt;
  111. /* Adjust ring index. */
  112. req->ring_index++;
  113. if (req->ring_index == req->length) {
  114. req->ring_index = 0;
  115. req->ring_ptr = req->ring;
  116. } else {
  117. req->ring_ptr++;
  118. }
  119. cont_pkt = (cont_a64_entry_t *)req->ring_ptr;
  120. /* Load packet defaults. */
  121. put_unaligned_le32(IS_QLAFX00(vha->hw) ? CONTINUE_A64_TYPE_FX00 :
  122. CONTINUE_A64_TYPE, &cont_pkt->entry_type);
  123. return (cont_pkt);
  124. }
  125. inline int
  126. qla24xx_configure_prot_mode(srb_t *sp, uint16_t *fw_prot_opts)
  127. {
  128. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  129. /* We always use DIFF Bundling for best performance */
  130. *fw_prot_opts = 0;
  131. /* Translate SCSI opcode to a protection opcode */
  132. switch (scsi_get_prot_op(cmd)) {
  133. case SCSI_PROT_READ_STRIP:
  134. *fw_prot_opts |= PO_MODE_DIF_REMOVE;
  135. break;
  136. case SCSI_PROT_WRITE_INSERT:
  137. *fw_prot_opts |= PO_MODE_DIF_INSERT;
  138. break;
  139. case SCSI_PROT_READ_INSERT:
  140. *fw_prot_opts |= PO_MODE_DIF_INSERT;
  141. break;
  142. case SCSI_PROT_WRITE_STRIP:
  143. *fw_prot_opts |= PO_MODE_DIF_REMOVE;
  144. break;
  145. case SCSI_PROT_READ_PASS:
  146. case SCSI_PROT_WRITE_PASS:
  147. if (cmd->prot_flags & SCSI_PROT_IP_CHECKSUM)
  148. *fw_prot_opts |= PO_MODE_DIF_TCP_CKSUM;
  149. else
  150. *fw_prot_opts |= PO_MODE_DIF_PASS;
  151. break;
  152. default: /* Normal Request */
  153. *fw_prot_opts |= PO_MODE_DIF_PASS;
  154. break;
  155. }
  156. if (!(cmd->prot_flags & SCSI_PROT_GUARD_CHECK))
  157. *fw_prot_opts |= PO_DISABLE_GUARD_CHECK;
  158. return scsi_prot_sg_count(cmd);
  159. }
  160. /*
  161. * qla2x00_build_scsi_iocbs_32() - Build IOCB command utilizing 32bit
  162. * capable IOCB types.
  163. *
  164. * @sp: SRB command to process
  165. * @cmd_pkt: Command type 2 IOCB
  166. * @tot_dsds: Total number of segments to transfer
  167. */
  168. void qla2x00_build_scsi_iocbs_32(srb_t *sp, cmd_entry_t *cmd_pkt,
  169. uint16_t tot_dsds)
  170. {
  171. uint16_t avail_dsds;
  172. struct dsd32 *cur_dsd;
  173. scsi_qla_host_t *vha;
  174. struct scsi_cmnd *cmd;
  175. struct scatterlist *sg;
  176. int i;
  177. cmd = GET_CMD_SP(sp);
  178. /* Update entry type to indicate Command Type 2 IOCB */
  179. put_unaligned_le32(COMMAND_TYPE, &cmd_pkt->entry_type);
  180. /* No data transfer */
  181. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  182. cmd_pkt->byte_count = cpu_to_le32(0);
  183. return;
  184. }
  185. vha = sp->vha;
  186. cmd_pkt->control_flags |= cpu_to_le16(qla2x00_get_cmd_direction(sp));
  187. /* Three DSDs are available in the Command Type 2 IOCB */
  188. avail_dsds = ARRAY_SIZE(cmd_pkt->dsd32);
  189. cur_dsd = cmd_pkt->dsd32;
  190. /* Load data segments */
  191. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  192. cont_entry_t *cont_pkt;
  193. /* Allocate additional continuation packets? */
  194. if (avail_dsds == 0) {
  195. /*
  196. * Seven DSDs are available in the Continuation
  197. * Type 0 IOCB.
  198. */
  199. cont_pkt = qla2x00_prep_cont_type0_iocb(vha);
  200. cur_dsd = cont_pkt->dsd;
  201. avail_dsds = ARRAY_SIZE(cont_pkt->dsd);
  202. }
  203. append_dsd32(&cur_dsd, sg);
  204. avail_dsds--;
  205. }
  206. }
  207. /**
  208. * qla2x00_build_scsi_iocbs_64() - Build IOCB command utilizing 64bit
  209. * capable IOCB types.
  210. *
  211. * @sp: SRB command to process
  212. * @cmd_pkt: Command type 3 IOCB
  213. * @tot_dsds: Total number of segments to transfer
  214. */
  215. void qla2x00_build_scsi_iocbs_64(srb_t *sp, cmd_entry_t *cmd_pkt,
  216. uint16_t tot_dsds)
  217. {
  218. uint16_t avail_dsds;
  219. struct dsd64 *cur_dsd;
  220. scsi_qla_host_t *vha;
  221. struct scsi_cmnd *cmd;
  222. struct scatterlist *sg;
  223. int i;
  224. cmd = GET_CMD_SP(sp);
  225. /* Update entry type to indicate Command Type 3 IOCB */
  226. put_unaligned_le32(COMMAND_A64_TYPE, &cmd_pkt->entry_type);
  227. /* No data transfer */
  228. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  229. cmd_pkt->byte_count = cpu_to_le32(0);
  230. return;
  231. }
  232. vha = sp->vha;
  233. cmd_pkt->control_flags |= cpu_to_le16(qla2x00_get_cmd_direction(sp));
  234. /* Two DSDs are available in the Command Type 3 IOCB */
  235. avail_dsds = ARRAY_SIZE(cmd_pkt->dsd64);
  236. cur_dsd = cmd_pkt->dsd64;
  237. /* Load data segments */
  238. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  239. cont_a64_entry_t *cont_pkt;
  240. /* Allocate additional continuation packets? */
  241. if (avail_dsds == 0) {
  242. /*
  243. * Five DSDs are available in the Continuation
  244. * Type 1 IOCB.
  245. */
  246. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  247. cur_dsd = cont_pkt->dsd;
  248. avail_dsds = ARRAY_SIZE(cont_pkt->dsd);
  249. }
  250. append_dsd64(&cur_dsd, sg);
  251. avail_dsds--;
  252. }
  253. }
  254. /*
  255. * Find the first handle that is not in use, starting from
  256. * req->current_outstanding_cmd + 1. The caller must hold the lock that is
  257. * associated with @req.
  258. */
  259. uint32_t qla2xxx_get_next_handle(struct req_que *req)
  260. {
  261. uint32_t index, handle = req->current_outstanding_cmd;
  262. for (index = 1; index < req->num_outstanding_cmds; index++) {
  263. handle++;
  264. if (handle == req->num_outstanding_cmds)
  265. handle = 1;
  266. if (!req->outstanding_cmds[handle])
  267. return handle;
  268. }
  269. return 0;
  270. }
  271. /**
  272. * qla2x00_start_scsi() - Send a SCSI command to the ISP
  273. * @sp: command to send to the ISP
  274. *
  275. * Returns non-zero if a failure occurred, else zero.
  276. */
  277. int
  278. qla2x00_start_scsi(srb_t *sp)
  279. {
  280. int nseg;
  281. unsigned long flags;
  282. scsi_qla_host_t *vha;
  283. struct scsi_cmnd *cmd;
  284. uint32_t *clr_ptr;
  285. uint32_t handle;
  286. cmd_entry_t *cmd_pkt;
  287. uint16_t cnt;
  288. uint16_t req_cnt;
  289. uint16_t tot_dsds;
  290. struct device_reg_2xxx __iomem *reg;
  291. struct qla_hw_data *ha;
  292. struct req_que *req;
  293. struct rsp_que *rsp;
  294. /* Setup device pointers. */
  295. vha = sp->vha;
  296. ha = vha->hw;
  297. reg = &ha->iobase->isp;
  298. cmd = GET_CMD_SP(sp);
  299. req = ha->req_q_map[0];
  300. rsp = ha->rsp_q_map[0];
  301. /* So we know we haven't pci_map'ed anything yet */
  302. tot_dsds = 0;
  303. /* Send marker if required */
  304. if (vha->marker_needed != 0) {
  305. if (qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL) !=
  306. QLA_SUCCESS) {
  307. return (QLA_FUNCTION_FAILED);
  308. }
  309. vha->marker_needed = 0;
  310. }
  311. /* Acquire ring specific lock */
  312. spin_lock_irqsave(&ha->hardware_lock, flags);
  313. handle = qla2xxx_get_next_handle(req);
  314. if (handle == 0)
  315. goto queuing_error;
  316. /* Map the sg table so we have an accurate count of sg entries needed */
  317. if (scsi_sg_count(cmd)) {
  318. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  319. scsi_sg_count(cmd), cmd->sc_data_direction);
  320. if (unlikely(!nseg))
  321. goto queuing_error;
  322. } else
  323. nseg = 0;
  324. tot_dsds = nseg;
  325. /* Calculate the number of request entries needed. */
  326. req_cnt = ha->isp_ops->calc_req_entries(tot_dsds);
  327. if (req->cnt < (req_cnt + 2)) {
  328. cnt = rd_reg_word_relaxed(ISP_REQ_Q_OUT(ha, reg));
  329. if (req->ring_index < cnt)
  330. req->cnt = cnt - req->ring_index;
  331. else
  332. req->cnt = req->length -
  333. (req->ring_index - cnt);
  334. /* If still no head room then bail out */
  335. if (req->cnt < (req_cnt + 2))
  336. goto queuing_error;
  337. }
  338. /* Build command packet */
  339. req->current_outstanding_cmd = handle;
  340. req->outstanding_cmds[handle] = sp;
  341. sp->handle = handle;
  342. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  343. req->cnt -= req_cnt;
  344. cmd_pkt = (cmd_entry_t *)req->ring_ptr;
  345. cmd_pkt->handle = handle;
  346. /* Zero out remaining portion of packet. */
  347. clr_ptr = (uint32_t *)cmd_pkt + 2;
  348. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  349. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  350. /* Set target ID and LUN number*/
  351. SET_TARGET_ID(ha, cmd_pkt->target, sp->fcport->loop_id);
  352. cmd_pkt->lun = cpu_to_le16(cmd->device->lun);
  353. cmd_pkt->control_flags = cpu_to_le16(CF_SIMPLE_TAG);
  354. /* Load SCSI command packet. */
  355. memcpy(cmd_pkt->scsi_cdb, cmd->cmnd, cmd->cmd_len);
  356. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  357. /* Build IOCB segments */
  358. ha->isp_ops->build_iocbs(sp, cmd_pkt, tot_dsds);
  359. /* Set total data segment count. */
  360. cmd_pkt->entry_count = (uint8_t)req_cnt;
  361. wmb();
  362. /* Adjust ring index. */
  363. req->ring_index++;
  364. if (req->ring_index == req->length) {
  365. req->ring_index = 0;
  366. req->ring_ptr = req->ring;
  367. } else
  368. req->ring_ptr++;
  369. sp->flags |= SRB_DMA_VALID;
  370. /* Set chip new ring index. */
  371. wrt_reg_word(ISP_REQ_Q_IN(ha, reg), req->ring_index);
  372. rd_reg_word_relaxed(ISP_REQ_Q_IN(ha, reg)); /* PCI Posting. */
  373. /* Manage unprocessed RIO/ZIO commands in response queue. */
  374. if (vha->flags.process_response_queue &&
  375. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  376. qla2x00_process_response_queue(rsp);
  377. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  378. return (QLA_SUCCESS);
  379. queuing_error:
  380. if (tot_dsds)
  381. scsi_dma_unmap(cmd);
  382. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  383. return (QLA_FUNCTION_FAILED);
  384. }
  385. /**
  386. * qla2x00_start_iocbs() - Execute the IOCB command
  387. * @vha: HA context
  388. * @req: request queue
  389. */
  390. void
  391. qla2x00_start_iocbs(struct scsi_qla_host *vha, struct req_que *req)
  392. {
  393. struct qla_hw_data *ha = vha->hw;
  394. device_reg_t *reg = ISP_QUE_REG(ha, req->id);
  395. if (IS_P3P_TYPE(ha)) {
  396. qla82xx_start_iocbs(vha);
  397. } else {
  398. /* Adjust ring index. */
  399. req->ring_index++;
  400. if (req->ring_index == req->length) {
  401. req->ring_index = 0;
  402. req->ring_ptr = req->ring;
  403. } else
  404. req->ring_ptr++;
  405. /* Set chip new ring index. */
  406. if (ha->mqenable || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
  407. wrt_reg_dword(req->req_q_in, req->ring_index);
  408. } else if (IS_QLA83XX(ha)) {
  409. wrt_reg_dword(req->req_q_in, req->ring_index);
  410. rd_reg_dword_relaxed(&ha->iobase->isp24.hccr);
  411. } else if (IS_QLAFX00(ha)) {
  412. wrt_reg_dword(&reg->ispfx00.req_q_in, req->ring_index);
  413. rd_reg_dword_relaxed(&reg->ispfx00.req_q_in);
  414. QLAFX00_SET_HST_INTR(ha, ha->rqstq_intr_code);
  415. } else if (IS_FWI2_CAPABLE(ha)) {
  416. wrt_reg_dword(&reg->isp24.req_q_in, req->ring_index);
  417. rd_reg_dword_relaxed(&reg->isp24.req_q_in);
  418. } else {
  419. wrt_reg_word(ISP_REQ_Q_IN(ha, &reg->isp),
  420. req->ring_index);
  421. rd_reg_word_relaxed(ISP_REQ_Q_IN(ha, &reg->isp));
  422. }
  423. }
  424. }
  425. /**
  426. * __qla2x00_marker() - Send a marker IOCB to the firmware.
  427. * @vha: HA context
  428. * @qpair: queue pair pointer
  429. * @loop_id: loop ID
  430. * @lun: LUN
  431. * @type: marker modifier
  432. *
  433. * Can be called from both normal and interrupt context.
  434. *
  435. * Returns non-zero if a failure occurred, else zero.
  436. */
  437. static int
  438. __qla2x00_marker(struct scsi_qla_host *vha, struct qla_qpair *qpair,
  439. uint16_t loop_id, uint64_t lun, uint8_t type)
  440. {
  441. mrk_entry_t *mrk;
  442. struct mrk_entry_24xx *mrk24 = NULL;
  443. struct req_que *req = qpair->req;
  444. struct qla_hw_data *ha = vha->hw;
  445. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  446. mrk = (mrk_entry_t *)__qla2x00_alloc_iocbs(qpair, NULL);
  447. if (mrk == NULL) {
  448. ql_log(ql_log_warn, base_vha, 0x3026,
  449. "Failed to allocate Marker IOCB.\n");
  450. return (QLA_FUNCTION_FAILED);
  451. }
  452. mrk24 = (struct mrk_entry_24xx *)mrk;
  453. mrk->entry_type = MARKER_TYPE;
  454. mrk->modifier = type;
  455. if (type != MK_SYNC_ALL) {
  456. if (IS_FWI2_CAPABLE(ha)) {
  457. mrk24->nport_handle = cpu_to_le16(loop_id);
  458. int_to_scsilun(lun, (struct scsi_lun *)&mrk24->lun);
  459. host_to_fcp_swap(mrk24->lun, sizeof(mrk24->lun));
  460. mrk24->vp_index = vha->vp_idx;
  461. } else {
  462. SET_TARGET_ID(ha, mrk->target, loop_id);
  463. mrk->lun = cpu_to_le16((uint16_t)lun);
  464. }
  465. }
  466. if (IS_FWI2_CAPABLE(ha))
  467. mrk24->handle = QLA_SKIP_HANDLE;
  468. wmb();
  469. qla2x00_start_iocbs(vha, req);
  470. return (QLA_SUCCESS);
  471. }
  472. int
  473. qla2x00_marker(struct scsi_qla_host *vha, struct qla_qpair *qpair,
  474. uint16_t loop_id, uint64_t lun, uint8_t type)
  475. {
  476. int ret;
  477. unsigned long flags = 0;
  478. spin_lock_irqsave(qpair->qp_lock_ptr, flags);
  479. ret = __qla2x00_marker(vha, qpair, loop_id, lun, type);
  480. spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
  481. return (ret);
  482. }
  483. /*
  484. * qla2x00_issue_marker
  485. *
  486. * Issue marker
  487. * Caller CAN have hardware lock held as specified by ha_locked parameter.
  488. * Might release it, then reaquire.
  489. */
  490. int qla2x00_issue_marker(scsi_qla_host_t *vha, int ha_locked)
  491. {
  492. if (ha_locked) {
  493. if (__qla2x00_marker(vha, vha->hw->base_qpair, 0, 0,
  494. MK_SYNC_ALL) != QLA_SUCCESS)
  495. return QLA_FUNCTION_FAILED;
  496. } else {
  497. if (qla2x00_marker(vha, vha->hw->base_qpair, 0, 0,
  498. MK_SYNC_ALL) != QLA_SUCCESS)
  499. return QLA_FUNCTION_FAILED;
  500. }
  501. vha->marker_needed = 0;
  502. return QLA_SUCCESS;
  503. }
  504. static inline int
  505. qla24xx_build_scsi_type_6_iocbs(srb_t *sp, struct cmd_type_6 *cmd_pkt,
  506. uint16_t tot_dsds)
  507. {
  508. struct dsd64 *cur_dsd = NULL, *next_dsd;
  509. scsi_qla_host_t *vha;
  510. struct qla_hw_data *ha;
  511. struct scsi_cmnd *cmd;
  512. struct scatterlist *cur_seg;
  513. uint8_t avail_dsds;
  514. uint8_t first_iocb = 1;
  515. uint32_t dsd_list_len;
  516. struct dsd_dma *dsd_ptr;
  517. struct ct6_dsd *ctx;
  518. struct qla_qpair *qpair = sp->qpair;
  519. cmd = GET_CMD_SP(sp);
  520. /* Update entry type to indicate Command Type 3 IOCB */
  521. put_unaligned_le32(COMMAND_TYPE_6, &cmd_pkt->entry_type);
  522. /* No data transfer */
  523. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE ||
  524. tot_dsds == 0) {
  525. cmd_pkt->byte_count = cpu_to_le32(0);
  526. return 0;
  527. }
  528. vha = sp->vha;
  529. ha = vha->hw;
  530. /* Set transfer direction */
  531. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  532. cmd_pkt->control_flags = cpu_to_le16(CF_WRITE_DATA);
  533. qpair->counters.output_bytes += scsi_bufflen(cmd);
  534. qpair->counters.output_requests++;
  535. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  536. cmd_pkt->control_flags = cpu_to_le16(CF_READ_DATA);
  537. qpair->counters.input_bytes += scsi_bufflen(cmd);
  538. qpair->counters.input_requests++;
  539. }
  540. cur_seg = scsi_sglist(cmd);
  541. ctx = sp->u.scmd.ct6_ctx;
  542. while (tot_dsds) {
  543. avail_dsds = (tot_dsds > QLA_DSDS_PER_IOCB) ?
  544. QLA_DSDS_PER_IOCB : tot_dsds;
  545. tot_dsds -= avail_dsds;
  546. dsd_list_len = (avail_dsds + 1) * QLA_DSD_SIZE;
  547. dsd_ptr = list_first_entry(&ha->gbl_dsd_list,
  548. struct dsd_dma, list);
  549. next_dsd = dsd_ptr->dsd_addr;
  550. list_del(&dsd_ptr->list);
  551. ha->gbl_dsd_avail--;
  552. list_add_tail(&dsd_ptr->list, &ctx->dsd_list);
  553. ctx->dsd_use_cnt++;
  554. ha->gbl_dsd_inuse++;
  555. if (first_iocb) {
  556. first_iocb = 0;
  557. put_unaligned_le64(dsd_ptr->dsd_list_dma,
  558. &cmd_pkt->fcp_dsd.address);
  559. cmd_pkt->fcp_dsd.length = cpu_to_le32(dsd_list_len);
  560. } else {
  561. put_unaligned_le64(dsd_ptr->dsd_list_dma,
  562. &cur_dsd->address);
  563. cur_dsd->length = cpu_to_le32(dsd_list_len);
  564. cur_dsd++;
  565. }
  566. cur_dsd = next_dsd;
  567. while (avail_dsds) {
  568. append_dsd64(&cur_dsd, cur_seg);
  569. cur_seg = sg_next(cur_seg);
  570. avail_dsds--;
  571. }
  572. }
  573. /* Null termination */
  574. cur_dsd->address = 0;
  575. cur_dsd->length = 0;
  576. cur_dsd++;
  577. cmd_pkt->control_flags |= cpu_to_le16(CF_DATA_SEG_DESCR_ENABLE);
  578. return 0;
  579. }
  580. /*
  581. * qla24xx_calc_dsd_lists() - Determine number of DSD list required
  582. * for Command Type 6.
  583. *
  584. * @dsds: number of data segment descriptors needed
  585. *
  586. * Returns the number of dsd list needed to store @dsds.
  587. */
  588. static inline uint16_t
  589. qla24xx_calc_dsd_lists(uint16_t dsds)
  590. {
  591. uint16_t dsd_lists = 0;
  592. dsd_lists = (dsds/QLA_DSDS_PER_IOCB);
  593. if (dsds % QLA_DSDS_PER_IOCB)
  594. dsd_lists++;
  595. return dsd_lists;
  596. }
  597. /**
  598. * qla24xx_build_scsi_iocbs() - Build IOCB command utilizing Command Type 7
  599. * IOCB types.
  600. *
  601. * @sp: SRB command to process
  602. * @cmd_pkt: Command type 3 IOCB
  603. * @tot_dsds: Total number of segments to transfer
  604. * @req: pointer to request queue
  605. */
  606. inline void
  607. qla24xx_build_scsi_iocbs(srb_t *sp, struct cmd_type_7 *cmd_pkt,
  608. uint16_t tot_dsds, struct req_que *req)
  609. {
  610. uint16_t avail_dsds;
  611. struct dsd64 *cur_dsd;
  612. scsi_qla_host_t *vha;
  613. struct scsi_cmnd *cmd;
  614. struct scatterlist *sg;
  615. int i;
  616. struct qla_qpair *qpair = sp->qpair;
  617. cmd = GET_CMD_SP(sp);
  618. /* Update entry type to indicate Command Type 3 IOCB */
  619. put_unaligned_le32(COMMAND_TYPE_7, &cmd_pkt->entry_type);
  620. /* No data transfer */
  621. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  622. cmd_pkt->byte_count = cpu_to_le32(0);
  623. return;
  624. }
  625. vha = sp->vha;
  626. /* Set transfer direction */
  627. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  628. cmd_pkt->task_mgmt_flags = cpu_to_le16(TMF_WRITE_DATA);
  629. qpair->counters.output_bytes += scsi_bufflen(cmd);
  630. qpair->counters.output_requests++;
  631. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  632. cmd_pkt->task_mgmt_flags = cpu_to_le16(TMF_READ_DATA);
  633. qpair->counters.input_bytes += scsi_bufflen(cmd);
  634. qpair->counters.input_requests++;
  635. }
  636. /* One DSD is available in the Command Type 3 IOCB */
  637. avail_dsds = 1;
  638. cur_dsd = &cmd_pkt->dsd;
  639. /* Load data segments */
  640. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  641. cont_a64_entry_t *cont_pkt;
  642. /* Allocate additional continuation packets? */
  643. if (avail_dsds == 0) {
  644. /*
  645. * Five DSDs are available in the Continuation
  646. * Type 1 IOCB.
  647. */
  648. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, req);
  649. cur_dsd = cont_pkt->dsd;
  650. avail_dsds = ARRAY_SIZE(cont_pkt->dsd);
  651. }
  652. append_dsd64(&cur_dsd, sg);
  653. avail_dsds--;
  654. }
  655. }
  656. struct fw_dif_context {
  657. __le32 ref_tag;
  658. __le16 app_tag;
  659. uint8_t ref_tag_mask[4]; /* Validation/Replacement Mask*/
  660. uint8_t app_tag_mask[2]; /* Validation/Replacement Mask*/
  661. };
  662. /*
  663. * qla24xx_set_t10dif_tags_from_cmd - Extract Ref and App tags from SCSI command
  664. *
  665. */
  666. static inline void
  667. qla24xx_set_t10dif_tags(srb_t *sp, struct fw_dif_context *pkt,
  668. unsigned int protcnt)
  669. {
  670. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  671. pkt->ref_tag = cpu_to_le32(scsi_prot_ref_tag(cmd));
  672. if (cmd->prot_flags & SCSI_PROT_REF_CHECK &&
  673. qla2x00_hba_err_chk_enabled(sp)) {
  674. pkt->ref_tag_mask[0] = 0xff;
  675. pkt->ref_tag_mask[1] = 0xff;
  676. pkt->ref_tag_mask[2] = 0xff;
  677. pkt->ref_tag_mask[3] = 0xff;
  678. }
  679. pkt->app_tag = cpu_to_le16(0);
  680. pkt->app_tag_mask[0] = 0x0;
  681. pkt->app_tag_mask[1] = 0x0;
  682. }
  683. int
  684. qla24xx_get_one_block_sg(uint32_t blk_sz, struct qla2_sgx *sgx,
  685. uint32_t *partial)
  686. {
  687. struct scatterlist *sg;
  688. uint32_t cumulative_partial, sg_len;
  689. dma_addr_t sg_dma_addr;
  690. if (sgx->num_bytes == sgx->tot_bytes)
  691. return 0;
  692. sg = sgx->cur_sg;
  693. cumulative_partial = sgx->tot_partial;
  694. sg_dma_addr = sg_dma_address(sg);
  695. sg_len = sg_dma_len(sg);
  696. sgx->dma_addr = sg_dma_addr + sgx->bytes_consumed;
  697. if ((cumulative_partial + (sg_len - sgx->bytes_consumed)) >= blk_sz) {
  698. sgx->dma_len = (blk_sz - cumulative_partial);
  699. sgx->tot_partial = 0;
  700. sgx->num_bytes += blk_sz;
  701. *partial = 0;
  702. } else {
  703. sgx->dma_len = sg_len - sgx->bytes_consumed;
  704. sgx->tot_partial += sgx->dma_len;
  705. *partial = 1;
  706. }
  707. sgx->bytes_consumed += sgx->dma_len;
  708. if (sg_len == sgx->bytes_consumed) {
  709. sg = sg_next(sg);
  710. sgx->num_sg++;
  711. sgx->cur_sg = sg;
  712. sgx->bytes_consumed = 0;
  713. }
  714. return 1;
  715. }
  716. int
  717. qla24xx_walk_and_build_sglist_no_difb(struct qla_hw_data *ha, srb_t *sp,
  718. struct dsd64 *dsd, uint16_t tot_dsds, struct qla_tc_param *tc)
  719. {
  720. void *next_dsd;
  721. uint8_t avail_dsds = 0;
  722. uint32_t dsd_list_len;
  723. struct dsd_dma *dsd_ptr;
  724. struct scatterlist *sg_prot;
  725. struct dsd64 *cur_dsd = dsd;
  726. uint16_t used_dsds = tot_dsds;
  727. uint32_t prot_int; /* protection interval */
  728. uint32_t partial;
  729. struct qla2_sgx sgx;
  730. dma_addr_t sle_dma;
  731. uint32_t sle_dma_len, tot_prot_dma_len = 0;
  732. struct scsi_cmnd *cmd;
  733. memset(&sgx, 0, sizeof(struct qla2_sgx));
  734. if (sp) {
  735. cmd = GET_CMD_SP(sp);
  736. prot_int = scsi_prot_interval(cmd);
  737. sgx.tot_bytes = scsi_bufflen(cmd);
  738. sgx.cur_sg = scsi_sglist(cmd);
  739. sgx.sp = sp;
  740. sg_prot = scsi_prot_sglist(cmd);
  741. } else if (tc) {
  742. prot_int = tc->blk_sz;
  743. sgx.tot_bytes = tc->bufflen;
  744. sgx.cur_sg = tc->sg;
  745. sg_prot = tc->prot_sg;
  746. } else {
  747. BUG();
  748. return 1;
  749. }
  750. while (qla24xx_get_one_block_sg(prot_int, &sgx, &partial)) {
  751. sle_dma = sgx.dma_addr;
  752. sle_dma_len = sgx.dma_len;
  753. alloc_and_fill:
  754. /* Allocate additional continuation packets? */
  755. if (avail_dsds == 0) {
  756. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  757. QLA_DSDS_PER_IOCB : used_dsds;
  758. dsd_list_len = (avail_dsds + 1) * 12;
  759. used_dsds -= avail_dsds;
  760. /* allocate tracking DS */
  761. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  762. if (!dsd_ptr)
  763. return 1;
  764. /* allocate new list */
  765. dsd_ptr->dsd_addr = next_dsd =
  766. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  767. &dsd_ptr->dsd_list_dma);
  768. if (!next_dsd) {
  769. /*
  770. * Need to cleanup only this dsd_ptr, rest
  771. * will be done by sp_free_dma()
  772. */
  773. kfree(dsd_ptr);
  774. return 1;
  775. }
  776. if (sp) {
  777. list_add_tail(&dsd_ptr->list,
  778. &sp->u.scmd.crc_ctx->dsd_list);
  779. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  780. } else {
  781. list_add_tail(&dsd_ptr->list,
  782. &(tc->ctx->dsd_list));
  783. *tc->ctx_dsd_alloced = 1;
  784. }
  785. /* add new list to cmd iocb or last list */
  786. put_unaligned_le64(dsd_ptr->dsd_list_dma,
  787. &cur_dsd->address);
  788. cur_dsd->length = cpu_to_le32(dsd_list_len);
  789. cur_dsd = next_dsd;
  790. }
  791. put_unaligned_le64(sle_dma, &cur_dsd->address);
  792. cur_dsd->length = cpu_to_le32(sle_dma_len);
  793. cur_dsd++;
  794. avail_dsds--;
  795. if (partial == 0) {
  796. /* Got a full protection interval */
  797. sle_dma = sg_dma_address(sg_prot) + tot_prot_dma_len;
  798. sle_dma_len = 8;
  799. tot_prot_dma_len += sle_dma_len;
  800. if (tot_prot_dma_len == sg_dma_len(sg_prot)) {
  801. tot_prot_dma_len = 0;
  802. sg_prot = sg_next(sg_prot);
  803. }
  804. partial = 1; /* So as to not re-enter this block */
  805. goto alloc_and_fill;
  806. }
  807. }
  808. /* Null termination */
  809. cur_dsd->address = 0;
  810. cur_dsd->length = 0;
  811. cur_dsd++;
  812. return 0;
  813. }
  814. int
  815. qla24xx_walk_and_build_sglist(struct qla_hw_data *ha, srb_t *sp,
  816. struct dsd64 *dsd, uint16_t tot_dsds, struct qla_tc_param *tc)
  817. {
  818. void *next_dsd;
  819. uint8_t avail_dsds = 0;
  820. uint32_t dsd_list_len;
  821. struct dsd_dma *dsd_ptr;
  822. struct scatterlist *sg, *sgl;
  823. struct dsd64 *cur_dsd = dsd;
  824. int i;
  825. uint16_t used_dsds = tot_dsds;
  826. struct scsi_cmnd *cmd;
  827. if (sp) {
  828. cmd = GET_CMD_SP(sp);
  829. sgl = scsi_sglist(cmd);
  830. } else if (tc) {
  831. sgl = tc->sg;
  832. } else {
  833. BUG();
  834. return 1;
  835. }
  836. for_each_sg(sgl, sg, tot_dsds, i) {
  837. /* Allocate additional continuation packets? */
  838. if (avail_dsds == 0) {
  839. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  840. QLA_DSDS_PER_IOCB : used_dsds;
  841. dsd_list_len = (avail_dsds + 1) * 12;
  842. used_dsds -= avail_dsds;
  843. /* allocate tracking DS */
  844. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  845. if (!dsd_ptr)
  846. return 1;
  847. /* allocate new list */
  848. dsd_ptr->dsd_addr = next_dsd =
  849. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  850. &dsd_ptr->dsd_list_dma);
  851. if (!next_dsd) {
  852. /*
  853. * Need to cleanup only this dsd_ptr, rest
  854. * will be done by sp_free_dma()
  855. */
  856. kfree(dsd_ptr);
  857. return 1;
  858. }
  859. if (sp) {
  860. list_add_tail(&dsd_ptr->list,
  861. &sp->u.scmd.crc_ctx->dsd_list);
  862. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  863. } else {
  864. list_add_tail(&dsd_ptr->list,
  865. &(tc->ctx->dsd_list));
  866. *tc->ctx_dsd_alloced = 1;
  867. }
  868. /* add new list to cmd iocb or last list */
  869. put_unaligned_le64(dsd_ptr->dsd_list_dma,
  870. &cur_dsd->address);
  871. cur_dsd->length = cpu_to_le32(dsd_list_len);
  872. cur_dsd = next_dsd;
  873. }
  874. append_dsd64(&cur_dsd, sg);
  875. avail_dsds--;
  876. }
  877. /* Null termination */
  878. cur_dsd->address = 0;
  879. cur_dsd->length = 0;
  880. cur_dsd++;
  881. return 0;
  882. }
  883. int
  884. qla24xx_walk_and_build_prot_sglist(struct qla_hw_data *ha, srb_t *sp,
  885. struct dsd64 *cur_dsd, uint16_t tot_dsds, struct qla_tgt_cmd *tc)
  886. {
  887. struct dsd_dma *dsd_ptr = NULL, *dif_dsd, *nxt_dsd;
  888. struct scatterlist *sg, *sgl;
  889. struct crc_context *difctx = NULL;
  890. struct scsi_qla_host *vha;
  891. uint dsd_list_len;
  892. uint avail_dsds = 0;
  893. uint used_dsds = tot_dsds;
  894. bool dif_local_dma_alloc = false;
  895. bool direction_to_device = false;
  896. int i;
  897. if (sp) {
  898. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  899. sgl = scsi_prot_sglist(cmd);
  900. vha = sp->vha;
  901. difctx = sp->u.scmd.crc_ctx;
  902. direction_to_device = cmd->sc_data_direction == DMA_TO_DEVICE;
  903. ql_dbg(ql_dbg_tgt + ql_dbg_verbose, vha, 0xe021,
  904. "%s: scsi_cmnd: %p, crc_ctx: %p, sp: %p\n",
  905. __func__, cmd, difctx, sp);
  906. } else if (tc) {
  907. vha = tc->vha;
  908. sgl = tc->prot_sg;
  909. difctx = tc->ctx;
  910. direction_to_device = tc->dma_data_direction == DMA_TO_DEVICE;
  911. } else {
  912. BUG();
  913. return 1;
  914. }
  915. ql_dbg(ql_dbg_tgt + ql_dbg_verbose, vha, 0xe021,
  916. "%s: enter (write=%u)\n", __func__, direction_to_device);
  917. /* if initiator doing write or target doing read */
  918. if (direction_to_device) {
  919. for_each_sg(sgl, sg, tot_dsds, i) {
  920. u64 sle_phys = sg_phys(sg);
  921. /* If SGE addr + len flips bits in upper 32-bits */
  922. if (MSD(sle_phys + sg->length) ^ MSD(sle_phys)) {
  923. ql_dbg(ql_dbg_tgt + ql_dbg_verbose, vha, 0xe022,
  924. "%s: page boundary crossing (phys=%llx len=%x)\n",
  925. __func__, sle_phys, sg->length);
  926. if (difctx) {
  927. ha->dif_bundle_crossed_pages++;
  928. dif_local_dma_alloc = true;
  929. } else {
  930. ql_dbg(ql_dbg_tgt + ql_dbg_verbose,
  931. vha, 0xe022,
  932. "%s: difctx pointer is NULL\n",
  933. __func__);
  934. }
  935. break;
  936. }
  937. }
  938. ha->dif_bundle_writes++;
  939. } else {
  940. ha->dif_bundle_reads++;
  941. }
  942. if (ql2xdifbundlinginternalbuffers)
  943. dif_local_dma_alloc = direction_to_device;
  944. if (dif_local_dma_alloc) {
  945. u32 track_difbundl_buf = 0;
  946. u32 ldma_sg_len = 0;
  947. u8 ldma_needed = 1;
  948. difctx->no_dif_bundl = 0;
  949. difctx->dif_bundl_len = 0;
  950. /* Track DSD buffers */
  951. INIT_LIST_HEAD(&difctx->ldif_dsd_list);
  952. /* Track local DMA buffers */
  953. INIT_LIST_HEAD(&difctx->ldif_dma_hndl_list);
  954. for_each_sg(sgl, sg, tot_dsds, i) {
  955. u32 sglen = sg_dma_len(sg);
  956. ql_dbg(ql_dbg_tgt + ql_dbg_verbose, vha, 0xe023,
  957. "%s: sg[%x] (phys=%llx sglen=%x) ldma_sg_len: %x dif_bundl_len: %x ldma_needed: %x\n",
  958. __func__, i, (u64)sg_phys(sg), sglen, ldma_sg_len,
  959. difctx->dif_bundl_len, ldma_needed);
  960. while (sglen) {
  961. u32 xfrlen = 0;
  962. if (ldma_needed) {
  963. /*
  964. * Allocate list item to store
  965. * the DMA buffers
  966. */
  967. dsd_ptr = kzalloc(sizeof(*dsd_ptr),
  968. GFP_ATOMIC);
  969. if (!dsd_ptr) {
  970. ql_dbg(ql_dbg_tgt, vha, 0xe024,
  971. "%s: failed alloc dsd_ptr\n",
  972. __func__);
  973. return 1;
  974. }
  975. ha->dif_bundle_kallocs++;
  976. /* allocate dma buffer */
  977. dsd_ptr->dsd_addr = dma_pool_alloc
  978. (ha->dif_bundl_pool, GFP_ATOMIC,
  979. &dsd_ptr->dsd_list_dma);
  980. if (!dsd_ptr->dsd_addr) {
  981. ql_dbg(ql_dbg_tgt, vha, 0xe024,
  982. "%s: failed alloc ->dsd_ptr\n",
  983. __func__);
  984. /*
  985. * need to cleanup only this
  986. * dsd_ptr rest will be done
  987. * by sp_free_dma()
  988. */
  989. kfree(dsd_ptr);
  990. ha->dif_bundle_kallocs--;
  991. return 1;
  992. }
  993. ha->dif_bundle_dma_allocs++;
  994. ldma_needed = 0;
  995. difctx->no_dif_bundl++;
  996. list_add_tail(&dsd_ptr->list,
  997. &difctx->ldif_dma_hndl_list);
  998. }
  999. /* xfrlen is min of dma pool size and sglen */
  1000. xfrlen = (sglen >
  1001. (DIF_BUNDLING_DMA_POOL_SIZE - ldma_sg_len)) ?
  1002. DIF_BUNDLING_DMA_POOL_SIZE - ldma_sg_len :
  1003. sglen;
  1004. /* replace with local allocated dma buffer */
  1005. sg_pcopy_to_buffer(sgl, sg_nents(sgl),
  1006. dsd_ptr->dsd_addr + ldma_sg_len, xfrlen,
  1007. difctx->dif_bundl_len);
  1008. difctx->dif_bundl_len += xfrlen;
  1009. sglen -= xfrlen;
  1010. ldma_sg_len += xfrlen;
  1011. if (ldma_sg_len == DIF_BUNDLING_DMA_POOL_SIZE ||
  1012. sg_is_last(sg)) {
  1013. ldma_needed = 1;
  1014. ldma_sg_len = 0;
  1015. }
  1016. }
  1017. }
  1018. track_difbundl_buf = used_dsds = difctx->no_dif_bundl;
  1019. ql_dbg(ql_dbg_tgt + ql_dbg_verbose, vha, 0xe025,
  1020. "dif_bundl_len=%x, no_dif_bundl=%x track_difbundl_buf: %x\n",
  1021. difctx->dif_bundl_len, difctx->no_dif_bundl,
  1022. track_difbundl_buf);
  1023. if (sp)
  1024. sp->flags |= SRB_DIF_BUNDL_DMA_VALID;
  1025. else
  1026. tc->prot_flags = DIF_BUNDL_DMA_VALID;
  1027. list_for_each_entry_safe(dif_dsd, nxt_dsd,
  1028. &difctx->ldif_dma_hndl_list, list) {
  1029. u32 sglen = (difctx->dif_bundl_len >
  1030. DIF_BUNDLING_DMA_POOL_SIZE) ?
  1031. DIF_BUNDLING_DMA_POOL_SIZE : difctx->dif_bundl_len;
  1032. BUG_ON(track_difbundl_buf == 0);
  1033. /* Allocate additional continuation packets? */
  1034. if (avail_dsds == 0) {
  1035. ql_dbg(ql_dbg_tgt + ql_dbg_verbose, vha,
  1036. 0xe024,
  1037. "%s: adding continuation iocb's\n",
  1038. __func__);
  1039. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  1040. QLA_DSDS_PER_IOCB : used_dsds;
  1041. dsd_list_len = (avail_dsds + 1) * 12;
  1042. used_dsds -= avail_dsds;
  1043. /* allocate tracking DS */
  1044. dsd_ptr = kzalloc(sizeof(*dsd_ptr), GFP_ATOMIC);
  1045. if (!dsd_ptr) {
  1046. ql_dbg(ql_dbg_tgt, vha, 0xe026,
  1047. "%s: failed alloc dsd_ptr\n",
  1048. __func__);
  1049. return 1;
  1050. }
  1051. ha->dif_bundle_kallocs++;
  1052. difctx->no_ldif_dsd++;
  1053. /* allocate new list */
  1054. dsd_ptr->dsd_addr =
  1055. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  1056. &dsd_ptr->dsd_list_dma);
  1057. if (!dsd_ptr->dsd_addr) {
  1058. ql_dbg(ql_dbg_tgt, vha, 0xe026,
  1059. "%s: failed alloc ->dsd_addr\n",
  1060. __func__);
  1061. /*
  1062. * need to cleanup only this dsd_ptr
  1063. * rest will be done by sp_free_dma()
  1064. */
  1065. kfree(dsd_ptr);
  1066. ha->dif_bundle_kallocs--;
  1067. return 1;
  1068. }
  1069. ha->dif_bundle_dma_allocs++;
  1070. if (sp) {
  1071. list_add_tail(&dsd_ptr->list,
  1072. &difctx->ldif_dsd_list);
  1073. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  1074. } else {
  1075. list_add_tail(&dsd_ptr->list,
  1076. &difctx->ldif_dsd_list);
  1077. tc->ctx_dsd_alloced = 1;
  1078. }
  1079. /* add new list to cmd iocb or last list */
  1080. put_unaligned_le64(dsd_ptr->dsd_list_dma,
  1081. &cur_dsd->address);
  1082. cur_dsd->length = cpu_to_le32(dsd_list_len);
  1083. cur_dsd = dsd_ptr->dsd_addr;
  1084. }
  1085. put_unaligned_le64(dif_dsd->dsd_list_dma,
  1086. &cur_dsd->address);
  1087. cur_dsd->length = cpu_to_le32(sglen);
  1088. cur_dsd++;
  1089. avail_dsds--;
  1090. difctx->dif_bundl_len -= sglen;
  1091. track_difbundl_buf--;
  1092. }
  1093. ql_dbg(ql_dbg_tgt + ql_dbg_verbose, vha, 0xe026,
  1094. "%s: no_ldif_dsd:%x, no_dif_bundl:%x\n", __func__,
  1095. difctx->no_ldif_dsd, difctx->no_dif_bundl);
  1096. } else {
  1097. for_each_sg(sgl, sg, tot_dsds, i) {
  1098. /* Allocate additional continuation packets? */
  1099. if (avail_dsds == 0) {
  1100. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  1101. QLA_DSDS_PER_IOCB : used_dsds;
  1102. dsd_list_len = (avail_dsds + 1) * 12;
  1103. used_dsds -= avail_dsds;
  1104. /* allocate tracking DS */
  1105. dsd_ptr = kzalloc(sizeof(*dsd_ptr), GFP_ATOMIC);
  1106. if (!dsd_ptr) {
  1107. ql_dbg(ql_dbg_tgt + ql_dbg_verbose,
  1108. vha, 0xe027,
  1109. "%s: failed alloc dsd_dma...\n",
  1110. __func__);
  1111. return 1;
  1112. }
  1113. /* allocate new list */
  1114. dsd_ptr->dsd_addr =
  1115. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  1116. &dsd_ptr->dsd_list_dma);
  1117. if (!dsd_ptr->dsd_addr) {
  1118. /* need to cleanup only this dsd_ptr */
  1119. /* rest will be done by sp_free_dma() */
  1120. kfree(dsd_ptr);
  1121. return 1;
  1122. }
  1123. if (sp) {
  1124. list_add_tail(&dsd_ptr->list,
  1125. &difctx->dsd_list);
  1126. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  1127. } else {
  1128. list_add_tail(&dsd_ptr->list,
  1129. &difctx->dsd_list);
  1130. tc->ctx_dsd_alloced = 1;
  1131. }
  1132. /* add new list to cmd iocb or last list */
  1133. put_unaligned_le64(dsd_ptr->dsd_list_dma,
  1134. &cur_dsd->address);
  1135. cur_dsd->length = cpu_to_le32(dsd_list_len);
  1136. cur_dsd = dsd_ptr->dsd_addr;
  1137. }
  1138. append_dsd64(&cur_dsd, sg);
  1139. avail_dsds--;
  1140. }
  1141. }
  1142. /* Null termination */
  1143. cur_dsd->address = 0;
  1144. cur_dsd->length = 0;
  1145. cur_dsd++;
  1146. return 0;
  1147. }
  1148. /**
  1149. * qla24xx_build_scsi_crc_2_iocbs() - Build IOCB command utilizing Command
  1150. * Type 6 IOCB types.
  1151. *
  1152. * @sp: SRB command to process
  1153. * @cmd_pkt: Command type 3 IOCB
  1154. * @tot_dsds: Total number of segments to transfer
  1155. * @tot_prot_dsds: Total number of segments with protection information
  1156. * @fw_prot_opts: Protection options to be passed to firmware
  1157. */
  1158. static inline int
  1159. qla24xx_build_scsi_crc_2_iocbs(srb_t *sp, struct cmd_type_crc_2 *cmd_pkt,
  1160. uint16_t tot_dsds, uint16_t tot_prot_dsds, uint16_t fw_prot_opts)
  1161. {
  1162. struct dsd64 *cur_dsd;
  1163. __be32 *fcp_dl;
  1164. scsi_qla_host_t *vha;
  1165. struct scsi_cmnd *cmd;
  1166. uint32_t total_bytes = 0;
  1167. uint32_t data_bytes;
  1168. uint32_t dif_bytes;
  1169. uint8_t bundling = 1;
  1170. uint16_t blk_size;
  1171. struct crc_context *crc_ctx_pkt = NULL;
  1172. struct qla_hw_data *ha;
  1173. uint8_t additional_fcpcdb_len;
  1174. uint16_t fcp_cmnd_len;
  1175. struct fcp_cmnd *fcp_cmnd;
  1176. dma_addr_t crc_ctx_dma;
  1177. cmd = GET_CMD_SP(sp);
  1178. /* Update entry type to indicate Command Type CRC_2 IOCB */
  1179. put_unaligned_le32(COMMAND_TYPE_CRC_2, &cmd_pkt->entry_type);
  1180. vha = sp->vha;
  1181. ha = vha->hw;
  1182. /* No data transfer */
  1183. data_bytes = scsi_bufflen(cmd);
  1184. if (!data_bytes || cmd->sc_data_direction == DMA_NONE) {
  1185. cmd_pkt->byte_count = cpu_to_le32(0);
  1186. return QLA_SUCCESS;
  1187. }
  1188. cmd_pkt->vp_index = sp->vha->vp_idx;
  1189. /* Set transfer direction */
  1190. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  1191. cmd_pkt->control_flags =
  1192. cpu_to_le16(CF_WRITE_DATA);
  1193. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  1194. cmd_pkt->control_flags =
  1195. cpu_to_le16(CF_READ_DATA);
  1196. }
  1197. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1198. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP) ||
  1199. (scsi_get_prot_op(cmd) == SCSI_PROT_READ_STRIP) ||
  1200. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_INSERT))
  1201. bundling = 0;
  1202. /* Allocate CRC context from global pool */
  1203. crc_ctx_pkt = sp->u.scmd.crc_ctx =
  1204. dma_pool_zalloc(ha->dl_dma_pool, GFP_ATOMIC, &crc_ctx_dma);
  1205. if (!crc_ctx_pkt)
  1206. goto crc_queuing_error;
  1207. crc_ctx_pkt->crc_ctx_dma = crc_ctx_dma;
  1208. sp->flags |= SRB_CRC_CTX_DMA_VALID;
  1209. /* Set handle */
  1210. crc_ctx_pkt->handle = cmd_pkt->handle;
  1211. INIT_LIST_HEAD(&crc_ctx_pkt->dsd_list);
  1212. qla24xx_set_t10dif_tags(sp, (struct fw_dif_context *)
  1213. &crc_ctx_pkt->ref_tag, tot_prot_dsds);
  1214. put_unaligned_le64(crc_ctx_dma, &cmd_pkt->crc_context_address);
  1215. cmd_pkt->crc_context_len = cpu_to_le16(CRC_CONTEXT_LEN_FW);
  1216. /* Determine SCSI command length -- align to 4 byte boundary */
  1217. if (cmd->cmd_len > 16) {
  1218. additional_fcpcdb_len = cmd->cmd_len - 16;
  1219. if ((cmd->cmd_len % 4) != 0) {
  1220. /* SCSI cmd > 16 bytes must be multiple of 4 */
  1221. goto crc_queuing_error;
  1222. }
  1223. fcp_cmnd_len = 12 + cmd->cmd_len + 4;
  1224. } else {
  1225. additional_fcpcdb_len = 0;
  1226. fcp_cmnd_len = 12 + 16 + 4;
  1227. }
  1228. fcp_cmnd = &crc_ctx_pkt->fcp_cmnd;
  1229. fcp_cmnd->additional_cdb_len = additional_fcpcdb_len;
  1230. if (cmd->sc_data_direction == DMA_TO_DEVICE)
  1231. fcp_cmnd->additional_cdb_len |= 1;
  1232. else if (cmd->sc_data_direction == DMA_FROM_DEVICE)
  1233. fcp_cmnd->additional_cdb_len |= 2;
  1234. int_to_scsilun(cmd->device->lun, &fcp_cmnd->lun);
  1235. memcpy(fcp_cmnd->cdb, cmd->cmnd, cmd->cmd_len);
  1236. cmd_pkt->fcp_cmnd_dseg_len = cpu_to_le16(fcp_cmnd_len);
  1237. put_unaligned_le64(crc_ctx_dma + CRC_CONTEXT_FCPCMND_OFF,
  1238. &cmd_pkt->fcp_cmnd_dseg_address);
  1239. fcp_cmnd->task_management = 0;
  1240. fcp_cmnd->task_attribute = TSK_SIMPLE;
  1241. cmd_pkt->fcp_rsp_dseg_len = 0; /* Let response come in status iocb */
  1242. /* Compute dif len and adjust data len to incude protection */
  1243. dif_bytes = 0;
  1244. blk_size = cmd->device->sector_size;
  1245. dif_bytes = (data_bytes / blk_size) * 8;
  1246. switch (scsi_get_prot_op(GET_CMD_SP(sp))) {
  1247. case SCSI_PROT_READ_INSERT:
  1248. case SCSI_PROT_WRITE_STRIP:
  1249. total_bytes = data_bytes;
  1250. data_bytes += dif_bytes;
  1251. break;
  1252. case SCSI_PROT_READ_STRIP:
  1253. case SCSI_PROT_WRITE_INSERT:
  1254. case SCSI_PROT_READ_PASS:
  1255. case SCSI_PROT_WRITE_PASS:
  1256. total_bytes = data_bytes + dif_bytes;
  1257. break;
  1258. default:
  1259. BUG();
  1260. }
  1261. if (!qla2x00_hba_err_chk_enabled(sp))
  1262. fw_prot_opts |= 0x10; /* Disable Guard tag checking */
  1263. /* HBA error checking enabled */
  1264. else if (IS_PI_UNINIT_CAPABLE(ha)) {
  1265. if ((scsi_get_prot_type(GET_CMD_SP(sp)) == SCSI_PROT_DIF_TYPE1)
  1266. || (scsi_get_prot_type(GET_CMD_SP(sp)) ==
  1267. SCSI_PROT_DIF_TYPE2))
  1268. fw_prot_opts |= BIT_10;
  1269. else if (scsi_get_prot_type(GET_CMD_SP(sp)) ==
  1270. SCSI_PROT_DIF_TYPE3)
  1271. fw_prot_opts |= BIT_11;
  1272. }
  1273. if (!bundling) {
  1274. cur_dsd = &crc_ctx_pkt->u.nobundling.data_dsd[0];
  1275. } else {
  1276. /*
  1277. * Configure Bundling if we need to fetch interlaving
  1278. * protection PCI accesses
  1279. */
  1280. fw_prot_opts |= PO_ENABLE_DIF_BUNDLING;
  1281. crc_ctx_pkt->u.bundling.dif_byte_count = cpu_to_le32(dif_bytes);
  1282. crc_ctx_pkt->u.bundling.dseg_count = cpu_to_le16(tot_dsds -
  1283. tot_prot_dsds);
  1284. cur_dsd = &crc_ctx_pkt->u.bundling.data_dsd[0];
  1285. }
  1286. /* Finish the common fields of CRC pkt */
  1287. crc_ctx_pkt->blk_size = cpu_to_le16(blk_size);
  1288. crc_ctx_pkt->prot_opts = cpu_to_le16(fw_prot_opts);
  1289. crc_ctx_pkt->byte_count = cpu_to_le32(data_bytes);
  1290. crc_ctx_pkt->guard_seed = cpu_to_le16(0);
  1291. /* Fibre channel byte count */
  1292. cmd_pkt->byte_count = cpu_to_le32(total_bytes);
  1293. fcp_dl = (__be32 *)(crc_ctx_pkt->fcp_cmnd.cdb + 16 +
  1294. additional_fcpcdb_len);
  1295. *fcp_dl = htonl(total_bytes);
  1296. if (!data_bytes || cmd->sc_data_direction == DMA_NONE) {
  1297. cmd_pkt->byte_count = cpu_to_le32(0);
  1298. return QLA_SUCCESS;
  1299. }
  1300. /* Walks data segments */
  1301. cmd_pkt->control_flags |= cpu_to_le16(CF_DATA_SEG_DESCR_ENABLE);
  1302. if (!bundling && tot_prot_dsds) {
  1303. if (qla24xx_walk_and_build_sglist_no_difb(ha, sp,
  1304. cur_dsd, tot_dsds, NULL))
  1305. goto crc_queuing_error;
  1306. } else if (qla24xx_walk_and_build_sglist(ha, sp, cur_dsd,
  1307. (tot_dsds - tot_prot_dsds), NULL))
  1308. goto crc_queuing_error;
  1309. if (bundling && tot_prot_dsds) {
  1310. /* Walks dif segments */
  1311. cmd_pkt->control_flags |= cpu_to_le16(CF_DIF_SEG_DESCR_ENABLE);
  1312. cur_dsd = &crc_ctx_pkt->u.bundling.dif_dsd;
  1313. if (qla24xx_walk_and_build_prot_sglist(ha, sp, cur_dsd,
  1314. tot_prot_dsds, NULL))
  1315. goto crc_queuing_error;
  1316. }
  1317. return QLA_SUCCESS;
  1318. crc_queuing_error:
  1319. /* Cleanup will be performed by the caller */
  1320. return QLA_FUNCTION_FAILED;
  1321. }
  1322. /**
  1323. * qla24xx_start_scsi() - Send a SCSI command to the ISP
  1324. * @sp: command to send to the ISP
  1325. *
  1326. * Returns non-zero if a failure occurred, else zero.
  1327. */
  1328. int
  1329. qla24xx_start_scsi(srb_t *sp)
  1330. {
  1331. int nseg;
  1332. unsigned long flags;
  1333. uint32_t *clr_ptr;
  1334. uint32_t handle;
  1335. struct cmd_type_7 *cmd_pkt;
  1336. uint16_t cnt;
  1337. uint16_t req_cnt;
  1338. uint16_t tot_dsds;
  1339. struct req_que *req = NULL;
  1340. struct rsp_que *rsp;
  1341. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1342. struct scsi_qla_host *vha = sp->vha;
  1343. struct qla_hw_data *ha = vha->hw;
  1344. if (sp->fcport->edif.enable && (sp->fcport->flags & FCF_FCSP_DEVICE))
  1345. return qla28xx_start_scsi_edif(sp);
  1346. /* Setup device pointers. */
  1347. req = vha->req;
  1348. rsp = req->rsp;
  1349. /* So we know we haven't pci_map'ed anything yet */
  1350. tot_dsds = 0;
  1351. /* Send marker if required */
  1352. if (vha->marker_needed != 0) {
  1353. if (qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL) !=
  1354. QLA_SUCCESS)
  1355. return QLA_FUNCTION_FAILED;
  1356. vha->marker_needed = 0;
  1357. }
  1358. /* Acquire ring specific lock */
  1359. spin_lock_irqsave(&ha->hardware_lock, flags);
  1360. handle = qla2xxx_get_next_handle(req);
  1361. if (handle == 0)
  1362. goto queuing_error;
  1363. /* Map the sg table so we have an accurate count of sg entries needed */
  1364. if (scsi_sg_count(cmd)) {
  1365. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1366. scsi_sg_count(cmd), cmd->sc_data_direction);
  1367. if (unlikely(!nseg))
  1368. goto queuing_error;
  1369. } else
  1370. nseg = 0;
  1371. tot_dsds = nseg;
  1372. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  1373. sp->iores.res_type = RESOURCE_IOCB | RESOURCE_EXCH;
  1374. sp->iores.exch_cnt = 1;
  1375. sp->iores.iocb_cnt = req_cnt;
  1376. if (qla_get_fw_resources(sp->qpair, &sp->iores))
  1377. goto queuing_error;
  1378. if (req->cnt < (req_cnt + 2)) {
  1379. if (IS_SHADOW_REG_CAPABLE(ha)) {
  1380. cnt = *req->out_ptr;
  1381. } else {
  1382. cnt = rd_reg_dword_relaxed(req->req_q_out);
  1383. if (qla2x00_check_reg16_for_disconnect(vha, cnt))
  1384. goto queuing_error;
  1385. }
  1386. if (req->ring_index < cnt)
  1387. req->cnt = cnt - req->ring_index;
  1388. else
  1389. req->cnt = req->length -
  1390. (req->ring_index - cnt);
  1391. if (req->cnt < (req_cnt + 2))
  1392. goto queuing_error;
  1393. }
  1394. /* Build command packet. */
  1395. req->current_outstanding_cmd = handle;
  1396. req->outstanding_cmds[handle] = sp;
  1397. sp->handle = handle;
  1398. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  1399. req->cnt -= req_cnt;
  1400. cmd_pkt = (struct cmd_type_7 *)req->ring_ptr;
  1401. cmd_pkt->handle = make_handle(req->id, handle);
  1402. /* Zero out remaining portion of packet. */
  1403. /* tagged queuing modifier -- default is TSK_SIMPLE (0). */
  1404. clr_ptr = (uint32_t *)cmd_pkt + 2;
  1405. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  1406. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  1407. /* Set NPORT-ID and LUN number*/
  1408. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1409. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  1410. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  1411. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  1412. cmd_pkt->vp_index = sp->vha->vp_idx;
  1413. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  1414. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  1415. cmd_pkt->task = TSK_SIMPLE;
  1416. /* Load SCSI command packet. */
  1417. memcpy(cmd_pkt->fcp_cdb, cmd->cmnd, cmd->cmd_len);
  1418. host_to_fcp_swap(cmd_pkt->fcp_cdb, sizeof(cmd_pkt->fcp_cdb));
  1419. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  1420. /* Build IOCB segments */
  1421. qla24xx_build_scsi_iocbs(sp, cmd_pkt, tot_dsds, req);
  1422. /* Set total data segment count. */
  1423. cmd_pkt->entry_count = (uint8_t)req_cnt;
  1424. wmb();
  1425. /* Adjust ring index. */
  1426. req->ring_index++;
  1427. if (req->ring_index == req->length) {
  1428. req->ring_index = 0;
  1429. req->ring_ptr = req->ring;
  1430. } else
  1431. req->ring_ptr++;
  1432. sp->qpair->cmd_cnt++;
  1433. sp->flags |= SRB_DMA_VALID;
  1434. /* Set chip new ring index. */
  1435. wrt_reg_dword(req->req_q_in, req->ring_index);
  1436. /* Manage unprocessed RIO/ZIO commands in response queue. */
  1437. if (vha->flags.process_response_queue &&
  1438. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  1439. qla24xx_process_response_queue(vha, rsp);
  1440. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1441. return QLA_SUCCESS;
  1442. queuing_error:
  1443. if (tot_dsds)
  1444. scsi_dma_unmap(cmd);
  1445. qla_put_fw_resources(sp->qpair, &sp->iores);
  1446. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1447. return QLA_FUNCTION_FAILED;
  1448. }
  1449. /**
  1450. * qla24xx_dif_start_scsi() - Send a SCSI command to the ISP
  1451. * @sp: command to send to the ISP
  1452. *
  1453. * Returns non-zero if a failure occurred, else zero.
  1454. */
  1455. int
  1456. qla24xx_dif_start_scsi(srb_t *sp)
  1457. {
  1458. int nseg;
  1459. unsigned long flags;
  1460. uint32_t *clr_ptr;
  1461. uint32_t handle;
  1462. uint16_t cnt;
  1463. uint16_t req_cnt = 0;
  1464. uint16_t tot_dsds;
  1465. uint16_t tot_prot_dsds;
  1466. uint16_t fw_prot_opts = 0;
  1467. struct req_que *req = NULL;
  1468. struct rsp_que *rsp = NULL;
  1469. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1470. struct scsi_qla_host *vha = sp->vha;
  1471. struct qla_hw_data *ha = vha->hw;
  1472. struct cmd_type_crc_2 *cmd_pkt;
  1473. uint32_t status = 0;
  1474. #define QDSS_GOT_Q_SPACE BIT_0
  1475. /* Only process protection or >16 cdb in this routine */
  1476. if (scsi_get_prot_op(cmd) == SCSI_PROT_NORMAL) {
  1477. if (cmd->cmd_len <= 16)
  1478. return qla24xx_start_scsi(sp);
  1479. }
  1480. /* Setup device pointers. */
  1481. req = vha->req;
  1482. rsp = req->rsp;
  1483. /* So we know we haven't pci_map'ed anything yet */
  1484. tot_dsds = 0;
  1485. /* Send marker if required */
  1486. if (vha->marker_needed != 0) {
  1487. if (qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL) !=
  1488. QLA_SUCCESS)
  1489. return QLA_FUNCTION_FAILED;
  1490. vha->marker_needed = 0;
  1491. }
  1492. /* Acquire ring specific lock */
  1493. spin_lock_irqsave(&ha->hardware_lock, flags);
  1494. handle = qla2xxx_get_next_handle(req);
  1495. if (handle == 0)
  1496. goto queuing_error;
  1497. /* Compute number of required data segments */
  1498. /* Map the sg table so we have an accurate count of sg entries needed */
  1499. if (scsi_sg_count(cmd)) {
  1500. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1501. scsi_sg_count(cmd), cmd->sc_data_direction);
  1502. if (unlikely(!nseg))
  1503. goto queuing_error;
  1504. else
  1505. sp->flags |= SRB_DMA_VALID;
  1506. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1507. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP)) {
  1508. struct qla2_sgx sgx;
  1509. uint32_t partial;
  1510. memset(&sgx, 0, sizeof(struct qla2_sgx));
  1511. sgx.tot_bytes = scsi_bufflen(cmd);
  1512. sgx.cur_sg = scsi_sglist(cmd);
  1513. sgx.sp = sp;
  1514. nseg = 0;
  1515. while (qla24xx_get_one_block_sg(
  1516. cmd->device->sector_size, &sgx, &partial))
  1517. nseg++;
  1518. }
  1519. } else
  1520. nseg = 0;
  1521. /* number of required data segments */
  1522. tot_dsds = nseg;
  1523. /* Compute number of required protection segments */
  1524. if (qla24xx_configure_prot_mode(sp, &fw_prot_opts)) {
  1525. nseg = dma_map_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
  1526. scsi_prot_sg_count(cmd), cmd->sc_data_direction);
  1527. if (unlikely(!nseg))
  1528. goto queuing_error;
  1529. else
  1530. sp->flags |= SRB_CRC_PROT_DMA_VALID;
  1531. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1532. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP)) {
  1533. nseg = scsi_bufflen(cmd) / cmd->device->sector_size;
  1534. }
  1535. } else {
  1536. nseg = 0;
  1537. }
  1538. req_cnt = 1;
  1539. /* Total Data and protection sg segment(s) */
  1540. tot_prot_dsds = nseg;
  1541. tot_dsds += nseg;
  1542. sp->iores.res_type = RESOURCE_IOCB | RESOURCE_EXCH;
  1543. sp->iores.exch_cnt = 1;
  1544. sp->iores.iocb_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  1545. if (qla_get_fw_resources(sp->qpair, &sp->iores))
  1546. goto queuing_error;
  1547. if (req->cnt < (req_cnt + 2)) {
  1548. if (IS_SHADOW_REG_CAPABLE(ha)) {
  1549. cnt = *req->out_ptr;
  1550. } else {
  1551. cnt = rd_reg_dword_relaxed(req->req_q_out);
  1552. if (qla2x00_check_reg16_for_disconnect(vha, cnt))
  1553. goto queuing_error;
  1554. }
  1555. if (req->ring_index < cnt)
  1556. req->cnt = cnt - req->ring_index;
  1557. else
  1558. req->cnt = req->length -
  1559. (req->ring_index - cnt);
  1560. if (req->cnt < (req_cnt + 2))
  1561. goto queuing_error;
  1562. }
  1563. status |= QDSS_GOT_Q_SPACE;
  1564. /* Build header part of command packet (excluding the OPCODE). */
  1565. req->current_outstanding_cmd = handle;
  1566. req->outstanding_cmds[handle] = sp;
  1567. sp->handle = handle;
  1568. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  1569. req->cnt -= req_cnt;
  1570. /* Fill-in common area */
  1571. cmd_pkt = (struct cmd_type_crc_2 *)req->ring_ptr;
  1572. cmd_pkt->handle = make_handle(req->id, handle);
  1573. clr_ptr = (uint32_t *)cmd_pkt + 2;
  1574. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  1575. /* Set NPORT-ID and LUN number*/
  1576. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1577. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  1578. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  1579. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  1580. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  1581. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  1582. /* Total Data and protection segment(s) */
  1583. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  1584. /* Build IOCB segments and adjust for data protection segments */
  1585. if (qla24xx_build_scsi_crc_2_iocbs(sp, (struct cmd_type_crc_2 *)
  1586. req->ring_ptr, tot_dsds, tot_prot_dsds, fw_prot_opts) !=
  1587. QLA_SUCCESS)
  1588. goto queuing_error;
  1589. cmd_pkt->entry_count = (uint8_t)req_cnt;
  1590. /* Specify response queue number where completion should happen */
  1591. cmd_pkt->entry_status = (uint8_t) rsp->id;
  1592. cmd_pkt->timeout = cpu_to_le16(0);
  1593. wmb();
  1594. /* Adjust ring index. */
  1595. req->ring_index++;
  1596. if (req->ring_index == req->length) {
  1597. req->ring_index = 0;
  1598. req->ring_ptr = req->ring;
  1599. } else
  1600. req->ring_ptr++;
  1601. sp->qpair->cmd_cnt++;
  1602. /* Set chip new ring index. */
  1603. wrt_reg_dword(req->req_q_in, req->ring_index);
  1604. /* Manage unprocessed RIO/ZIO commands in response queue. */
  1605. if (vha->flags.process_response_queue &&
  1606. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  1607. qla24xx_process_response_queue(vha, rsp);
  1608. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1609. return QLA_SUCCESS;
  1610. queuing_error:
  1611. if (status & QDSS_GOT_Q_SPACE) {
  1612. req->outstanding_cmds[handle] = NULL;
  1613. req->cnt += req_cnt;
  1614. }
  1615. /* Cleanup will be performed by the caller (queuecommand) */
  1616. qla_put_fw_resources(sp->qpair, &sp->iores);
  1617. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1618. return QLA_FUNCTION_FAILED;
  1619. }
  1620. /**
  1621. * qla2xxx_start_scsi_mq() - Send a SCSI command to the ISP
  1622. * @sp: command to send to the ISP
  1623. *
  1624. * Returns non-zero if a failure occurred, else zero.
  1625. */
  1626. static int
  1627. qla2xxx_start_scsi_mq(srb_t *sp)
  1628. {
  1629. int nseg;
  1630. unsigned long flags;
  1631. uint32_t *clr_ptr;
  1632. uint32_t handle;
  1633. struct cmd_type_7 *cmd_pkt;
  1634. uint16_t cnt;
  1635. uint16_t req_cnt;
  1636. uint16_t tot_dsds;
  1637. struct req_que *req = NULL;
  1638. struct rsp_que *rsp;
  1639. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1640. struct scsi_qla_host *vha = sp->fcport->vha;
  1641. struct qla_hw_data *ha = vha->hw;
  1642. struct qla_qpair *qpair = sp->qpair;
  1643. if (sp->fcport->edif.enable && (sp->fcport->flags & FCF_FCSP_DEVICE))
  1644. return qla28xx_start_scsi_edif(sp);
  1645. /* Acquire qpair specific lock */
  1646. spin_lock_irqsave(&qpair->qp_lock, flags);
  1647. /* Setup qpair pointers */
  1648. req = qpair->req;
  1649. rsp = qpair->rsp;
  1650. /* So we know we haven't pci_map'ed anything yet */
  1651. tot_dsds = 0;
  1652. /* Send marker if required */
  1653. if (vha->marker_needed != 0) {
  1654. if (__qla2x00_marker(vha, qpair, 0, 0, MK_SYNC_ALL) !=
  1655. QLA_SUCCESS) {
  1656. spin_unlock_irqrestore(&qpair->qp_lock, flags);
  1657. return QLA_FUNCTION_FAILED;
  1658. }
  1659. vha->marker_needed = 0;
  1660. }
  1661. handle = qla2xxx_get_next_handle(req);
  1662. if (handle == 0)
  1663. goto queuing_error;
  1664. /* Map the sg table so we have an accurate count of sg entries needed */
  1665. if (scsi_sg_count(cmd)) {
  1666. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1667. scsi_sg_count(cmd), cmd->sc_data_direction);
  1668. if (unlikely(!nseg))
  1669. goto queuing_error;
  1670. } else
  1671. nseg = 0;
  1672. tot_dsds = nseg;
  1673. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  1674. sp->iores.res_type = RESOURCE_IOCB | RESOURCE_EXCH;
  1675. sp->iores.exch_cnt = 1;
  1676. sp->iores.iocb_cnt = req_cnt;
  1677. if (qla_get_fw_resources(sp->qpair, &sp->iores))
  1678. goto queuing_error;
  1679. if (req->cnt < (req_cnt + 2)) {
  1680. if (IS_SHADOW_REG_CAPABLE(ha)) {
  1681. cnt = *req->out_ptr;
  1682. } else {
  1683. cnt = rd_reg_dword_relaxed(req->req_q_out);
  1684. if (qla2x00_check_reg16_for_disconnect(vha, cnt))
  1685. goto queuing_error;
  1686. }
  1687. if (req->ring_index < cnt)
  1688. req->cnt = cnt - req->ring_index;
  1689. else
  1690. req->cnt = req->length -
  1691. (req->ring_index - cnt);
  1692. if (req->cnt < (req_cnt + 2))
  1693. goto queuing_error;
  1694. }
  1695. /* Build command packet. */
  1696. req->current_outstanding_cmd = handle;
  1697. req->outstanding_cmds[handle] = sp;
  1698. sp->handle = handle;
  1699. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  1700. req->cnt -= req_cnt;
  1701. cmd_pkt = (struct cmd_type_7 *)req->ring_ptr;
  1702. cmd_pkt->handle = make_handle(req->id, handle);
  1703. /* Zero out remaining portion of packet. */
  1704. /* tagged queuing modifier -- default is TSK_SIMPLE (0). */
  1705. clr_ptr = (uint32_t *)cmd_pkt + 2;
  1706. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  1707. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  1708. /* Set NPORT-ID and LUN number*/
  1709. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1710. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  1711. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  1712. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  1713. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  1714. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  1715. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  1716. cmd_pkt->task = TSK_SIMPLE;
  1717. /* Load SCSI command packet. */
  1718. memcpy(cmd_pkt->fcp_cdb, cmd->cmnd, cmd->cmd_len);
  1719. host_to_fcp_swap(cmd_pkt->fcp_cdb, sizeof(cmd_pkt->fcp_cdb));
  1720. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  1721. /* Build IOCB segments */
  1722. qla24xx_build_scsi_iocbs(sp, cmd_pkt, tot_dsds, req);
  1723. /* Set total data segment count. */
  1724. cmd_pkt->entry_count = (uint8_t)req_cnt;
  1725. wmb();
  1726. /* Adjust ring index. */
  1727. req->ring_index++;
  1728. if (req->ring_index == req->length) {
  1729. req->ring_index = 0;
  1730. req->ring_ptr = req->ring;
  1731. } else
  1732. req->ring_ptr++;
  1733. sp->qpair->cmd_cnt++;
  1734. sp->flags |= SRB_DMA_VALID;
  1735. /* Set chip new ring index. */
  1736. wrt_reg_dword(req->req_q_in, req->ring_index);
  1737. /* Manage unprocessed RIO/ZIO commands in response queue. */
  1738. if (vha->flags.process_response_queue &&
  1739. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  1740. qla24xx_process_response_queue(vha, rsp);
  1741. spin_unlock_irqrestore(&qpair->qp_lock, flags);
  1742. return QLA_SUCCESS;
  1743. queuing_error:
  1744. if (tot_dsds)
  1745. scsi_dma_unmap(cmd);
  1746. qla_put_fw_resources(sp->qpair, &sp->iores);
  1747. spin_unlock_irqrestore(&qpair->qp_lock, flags);
  1748. return QLA_FUNCTION_FAILED;
  1749. }
  1750. /**
  1751. * qla2xxx_dif_start_scsi_mq() - Send a SCSI command to the ISP
  1752. * @sp: command to send to the ISP
  1753. *
  1754. * Returns non-zero if a failure occurred, else zero.
  1755. */
  1756. int
  1757. qla2xxx_dif_start_scsi_mq(srb_t *sp)
  1758. {
  1759. int nseg;
  1760. unsigned long flags;
  1761. uint32_t *clr_ptr;
  1762. uint32_t handle;
  1763. uint16_t cnt;
  1764. uint16_t req_cnt = 0;
  1765. uint16_t tot_dsds;
  1766. uint16_t tot_prot_dsds;
  1767. uint16_t fw_prot_opts = 0;
  1768. struct req_que *req = NULL;
  1769. struct rsp_que *rsp = NULL;
  1770. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1771. struct scsi_qla_host *vha = sp->fcport->vha;
  1772. struct qla_hw_data *ha = vha->hw;
  1773. struct cmd_type_crc_2 *cmd_pkt;
  1774. uint32_t status = 0;
  1775. struct qla_qpair *qpair = sp->qpair;
  1776. #define QDSS_GOT_Q_SPACE BIT_0
  1777. /* Check for host side state */
  1778. if (!qpair->online) {
  1779. cmd->result = DID_NO_CONNECT << 16;
  1780. return QLA_INTERFACE_ERROR;
  1781. }
  1782. if (!qpair->difdix_supported &&
  1783. scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
  1784. cmd->result = DID_NO_CONNECT << 16;
  1785. return QLA_INTERFACE_ERROR;
  1786. }
  1787. /* Only process protection or >16 cdb in this routine */
  1788. if (scsi_get_prot_op(cmd) == SCSI_PROT_NORMAL) {
  1789. if (cmd->cmd_len <= 16)
  1790. return qla2xxx_start_scsi_mq(sp);
  1791. }
  1792. spin_lock_irqsave(&qpair->qp_lock, flags);
  1793. /* Setup qpair pointers */
  1794. rsp = qpair->rsp;
  1795. req = qpair->req;
  1796. /* So we know we haven't pci_map'ed anything yet */
  1797. tot_dsds = 0;
  1798. /* Send marker if required */
  1799. if (vha->marker_needed != 0) {
  1800. if (__qla2x00_marker(vha, qpair, 0, 0, MK_SYNC_ALL) !=
  1801. QLA_SUCCESS) {
  1802. spin_unlock_irqrestore(&qpair->qp_lock, flags);
  1803. return QLA_FUNCTION_FAILED;
  1804. }
  1805. vha->marker_needed = 0;
  1806. }
  1807. handle = qla2xxx_get_next_handle(req);
  1808. if (handle == 0)
  1809. goto queuing_error;
  1810. /* Compute number of required data segments */
  1811. /* Map the sg table so we have an accurate count of sg entries needed */
  1812. if (scsi_sg_count(cmd)) {
  1813. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1814. scsi_sg_count(cmd), cmd->sc_data_direction);
  1815. if (unlikely(!nseg))
  1816. goto queuing_error;
  1817. else
  1818. sp->flags |= SRB_DMA_VALID;
  1819. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1820. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP)) {
  1821. struct qla2_sgx sgx;
  1822. uint32_t partial;
  1823. memset(&sgx, 0, sizeof(struct qla2_sgx));
  1824. sgx.tot_bytes = scsi_bufflen(cmd);
  1825. sgx.cur_sg = scsi_sglist(cmd);
  1826. sgx.sp = sp;
  1827. nseg = 0;
  1828. while (qla24xx_get_one_block_sg(
  1829. cmd->device->sector_size, &sgx, &partial))
  1830. nseg++;
  1831. }
  1832. } else
  1833. nseg = 0;
  1834. /* number of required data segments */
  1835. tot_dsds = nseg;
  1836. /* Compute number of required protection segments */
  1837. if (qla24xx_configure_prot_mode(sp, &fw_prot_opts)) {
  1838. nseg = dma_map_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
  1839. scsi_prot_sg_count(cmd), cmd->sc_data_direction);
  1840. if (unlikely(!nseg))
  1841. goto queuing_error;
  1842. else
  1843. sp->flags |= SRB_CRC_PROT_DMA_VALID;
  1844. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1845. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP)) {
  1846. nseg = scsi_bufflen(cmd) / cmd->device->sector_size;
  1847. }
  1848. } else {
  1849. nseg = 0;
  1850. }
  1851. req_cnt = 1;
  1852. /* Total Data and protection sg segment(s) */
  1853. tot_prot_dsds = nseg;
  1854. tot_dsds += nseg;
  1855. sp->iores.res_type = RESOURCE_IOCB | RESOURCE_EXCH;
  1856. sp->iores.exch_cnt = 1;
  1857. sp->iores.iocb_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  1858. if (qla_get_fw_resources(sp->qpair, &sp->iores))
  1859. goto queuing_error;
  1860. if (req->cnt < (req_cnt + 2)) {
  1861. if (IS_SHADOW_REG_CAPABLE(ha)) {
  1862. cnt = *req->out_ptr;
  1863. } else {
  1864. cnt = rd_reg_dword_relaxed(req->req_q_out);
  1865. if (qla2x00_check_reg16_for_disconnect(vha, cnt))
  1866. goto queuing_error;
  1867. }
  1868. if (req->ring_index < cnt)
  1869. req->cnt = cnt - req->ring_index;
  1870. else
  1871. req->cnt = req->length -
  1872. (req->ring_index - cnt);
  1873. if (req->cnt < (req_cnt + 2))
  1874. goto queuing_error;
  1875. }
  1876. status |= QDSS_GOT_Q_SPACE;
  1877. /* Build header part of command packet (excluding the OPCODE). */
  1878. req->current_outstanding_cmd = handle;
  1879. req->outstanding_cmds[handle] = sp;
  1880. sp->handle = handle;
  1881. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  1882. req->cnt -= req_cnt;
  1883. /* Fill-in common area */
  1884. cmd_pkt = (struct cmd_type_crc_2 *)req->ring_ptr;
  1885. cmd_pkt->handle = make_handle(req->id, handle);
  1886. clr_ptr = (uint32_t *)cmd_pkt + 2;
  1887. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  1888. /* Set NPORT-ID and LUN number*/
  1889. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1890. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  1891. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  1892. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  1893. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  1894. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  1895. /* Total Data and protection segment(s) */
  1896. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  1897. /* Build IOCB segments and adjust for data protection segments */
  1898. if (qla24xx_build_scsi_crc_2_iocbs(sp, (struct cmd_type_crc_2 *)
  1899. req->ring_ptr, tot_dsds, tot_prot_dsds, fw_prot_opts) !=
  1900. QLA_SUCCESS)
  1901. goto queuing_error;
  1902. cmd_pkt->entry_count = (uint8_t)req_cnt;
  1903. cmd_pkt->timeout = cpu_to_le16(0);
  1904. wmb();
  1905. /* Adjust ring index. */
  1906. req->ring_index++;
  1907. if (req->ring_index == req->length) {
  1908. req->ring_index = 0;
  1909. req->ring_ptr = req->ring;
  1910. } else
  1911. req->ring_ptr++;
  1912. sp->qpair->cmd_cnt++;
  1913. /* Set chip new ring index. */
  1914. wrt_reg_dword(req->req_q_in, req->ring_index);
  1915. /* Manage unprocessed RIO/ZIO commands in response queue. */
  1916. if (vha->flags.process_response_queue &&
  1917. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  1918. qla24xx_process_response_queue(vha, rsp);
  1919. spin_unlock_irqrestore(&qpair->qp_lock, flags);
  1920. return QLA_SUCCESS;
  1921. queuing_error:
  1922. if (status & QDSS_GOT_Q_SPACE) {
  1923. req->outstanding_cmds[handle] = NULL;
  1924. req->cnt += req_cnt;
  1925. }
  1926. /* Cleanup will be performed by the caller (queuecommand) */
  1927. qla_put_fw_resources(sp->qpair, &sp->iores);
  1928. spin_unlock_irqrestore(&qpair->qp_lock, flags);
  1929. return QLA_FUNCTION_FAILED;
  1930. }
  1931. /* Generic Control-SRB manipulation functions. */
  1932. /* hardware_lock assumed to be held. */
  1933. void *
  1934. __qla2x00_alloc_iocbs(struct qla_qpair *qpair, srb_t *sp)
  1935. {
  1936. scsi_qla_host_t *vha = qpair->vha;
  1937. struct qla_hw_data *ha = vha->hw;
  1938. struct req_que *req = qpair->req;
  1939. device_reg_t *reg = ISP_QUE_REG(ha, req->id);
  1940. uint32_t handle;
  1941. request_t *pkt;
  1942. uint16_t cnt, req_cnt;
  1943. pkt = NULL;
  1944. req_cnt = 1;
  1945. handle = 0;
  1946. if (sp && (sp->type != SRB_SCSI_CMD)) {
  1947. /* Adjust entry-counts as needed. */
  1948. req_cnt = sp->iocbs;
  1949. }
  1950. /* Check for room on request queue. */
  1951. if (req->cnt < req_cnt + 2) {
  1952. if (qpair->use_shadow_reg)
  1953. cnt = *req->out_ptr;
  1954. else if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
  1955. IS_QLA28XX(ha))
  1956. cnt = rd_reg_dword(&reg->isp25mq.req_q_out);
  1957. else if (IS_P3P_TYPE(ha))
  1958. cnt = rd_reg_dword(reg->isp82.req_q_out);
  1959. else if (IS_FWI2_CAPABLE(ha))
  1960. cnt = rd_reg_dword(&reg->isp24.req_q_out);
  1961. else if (IS_QLAFX00(ha))
  1962. cnt = rd_reg_dword(&reg->ispfx00.req_q_out);
  1963. else
  1964. cnt = qla2x00_debounce_register(
  1965. ISP_REQ_Q_OUT(ha, &reg->isp));
  1966. if (!qpair->use_shadow_reg && cnt == ISP_REG16_DISCONNECT) {
  1967. qla_schedule_eeh_work(vha);
  1968. return NULL;
  1969. }
  1970. if (req->ring_index < cnt)
  1971. req->cnt = cnt - req->ring_index;
  1972. else
  1973. req->cnt = req->length -
  1974. (req->ring_index - cnt);
  1975. }
  1976. if (req->cnt < req_cnt + 2)
  1977. goto queuing_error;
  1978. if (sp) {
  1979. handle = qla2xxx_get_next_handle(req);
  1980. if (handle == 0) {
  1981. ql_log(ql_log_warn, vha, 0x700b,
  1982. "No room on outstanding cmd array.\n");
  1983. goto queuing_error;
  1984. }
  1985. /* Prep command array. */
  1986. req->current_outstanding_cmd = handle;
  1987. req->outstanding_cmds[handle] = sp;
  1988. sp->handle = handle;
  1989. }
  1990. /* Prep packet */
  1991. req->cnt -= req_cnt;
  1992. pkt = req->ring_ptr;
  1993. memset(pkt, 0, REQUEST_ENTRY_SIZE);
  1994. if (IS_QLAFX00(ha)) {
  1995. wrt_reg_byte((u8 __force __iomem *)&pkt->entry_count, req_cnt);
  1996. wrt_reg_dword((__le32 __force __iomem *)&pkt->handle, handle);
  1997. } else {
  1998. pkt->entry_count = req_cnt;
  1999. pkt->handle = handle;
  2000. }
  2001. return pkt;
  2002. queuing_error:
  2003. qpair->tgt_counters.num_alloc_iocb_failed++;
  2004. return pkt;
  2005. }
  2006. void *
  2007. qla2x00_alloc_iocbs_ready(struct qla_qpair *qpair, srb_t *sp)
  2008. {
  2009. scsi_qla_host_t *vha = qpair->vha;
  2010. if (qla2x00_reset_active(vha))
  2011. return NULL;
  2012. return __qla2x00_alloc_iocbs(qpair, sp);
  2013. }
  2014. void *
  2015. qla2x00_alloc_iocbs(struct scsi_qla_host *vha, srb_t *sp)
  2016. {
  2017. return __qla2x00_alloc_iocbs(vha->hw->base_qpair, sp);
  2018. }
  2019. static void
  2020. qla24xx_prli_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  2021. {
  2022. struct srb_iocb *lio = &sp->u.iocb_cmd;
  2023. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  2024. logio->control_flags = cpu_to_le16(LCF_COMMAND_PRLI);
  2025. if (lio->u.logio.flags & SRB_LOGIN_NVME_PRLI) {
  2026. logio->control_flags |= cpu_to_le16(LCF_NVME_PRLI);
  2027. if (sp->vha->flags.nvme_first_burst)
  2028. logio->io_parameter[0] =
  2029. cpu_to_le32(NVME_PRLI_SP_FIRST_BURST);
  2030. if (sp->vha->flags.nvme2_enabled) {
  2031. /* Set service parameter BIT_7 for NVME CONF support */
  2032. logio->io_parameter[0] |=
  2033. cpu_to_le32(NVME_PRLI_SP_CONF);
  2034. /* Set service parameter BIT_8 for SLER support */
  2035. logio->io_parameter[0] |=
  2036. cpu_to_le32(NVME_PRLI_SP_SLER);
  2037. /* Set service parameter BIT_9 for PI control support */
  2038. logio->io_parameter[0] |=
  2039. cpu_to_le32(NVME_PRLI_SP_PI_CTRL);
  2040. }
  2041. }
  2042. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2043. logio->port_id[0] = sp->fcport->d_id.b.al_pa;
  2044. logio->port_id[1] = sp->fcport->d_id.b.area;
  2045. logio->port_id[2] = sp->fcport->d_id.b.domain;
  2046. logio->vp_index = sp->vha->vp_idx;
  2047. }
  2048. static void
  2049. qla24xx_login_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  2050. {
  2051. struct srb_iocb *lio = &sp->u.iocb_cmd;
  2052. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  2053. logio->control_flags = cpu_to_le16(LCF_COMMAND_PLOGI);
  2054. if (lio->u.logio.flags & SRB_LOGIN_PRLI_ONLY) {
  2055. logio->control_flags = cpu_to_le16(LCF_COMMAND_PRLI);
  2056. } else {
  2057. logio->control_flags = cpu_to_le16(LCF_COMMAND_PLOGI);
  2058. if (lio->u.logio.flags & SRB_LOGIN_COND_PLOGI)
  2059. logio->control_flags |= cpu_to_le16(LCF_COND_PLOGI);
  2060. if (lio->u.logio.flags & SRB_LOGIN_SKIP_PRLI)
  2061. logio->control_flags |= cpu_to_le16(LCF_SKIP_PRLI);
  2062. if (lio->u.logio.flags & SRB_LOGIN_FCSP) {
  2063. logio->control_flags |=
  2064. cpu_to_le16(LCF_COMMON_FEAT | LCF_SKIP_PRLI);
  2065. logio->io_parameter[0] =
  2066. cpu_to_le32(LIO_COMM_FEAT_FCSP | LIO_COMM_FEAT_CIO);
  2067. }
  2068. }
  2069. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2070. logio->port_id[0] = sp->fcport->d_id.b.al_pa;
  2071. logio->port_id[1] = sp->fcport->d_id.b.area;
  2072. logio->port_id[2] = sp->fcport->d_id.b.domain;
  2073. logio->vp_index = sp->vha->vp_idx;
  2074. }
  2075. static void
  2076. qla2x00_login_iocb(srb_t *sp, struct mbx_entry *mbx)
  2077. {
  2078. struct qla_hw_data *ha = sp->vha->hw;
  2079. struct srb_iocb *lio = &sp->u.iocb_cmd;
  2080. uint16_t opts;
  2081. mbx->entry_type = MBX_IOCB_TYPE;
  2082. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  2083. mbx->mb0 = cpu_to_le16(MBC_LOGIN_FABRIC_PORT);
  2084. opts = lio->u.logio.flags & SRB_LOGIN_COND_PLOGI ? BIT_0 : 0;
  2085. opts |= lio->u.logio.flags & SRB_LOGIN_SKIP_PRLI ? BIT_1 : 0;
  2086. if (HAS_EXTENDED_IDS(ha)) {
  2087. mbx->mb1 = cpu_to_le16(sp->fcport->loop_id);
  2088. mbx->mb10 = cpu_to_le16(opts);
  2089. } else {
  2090. mbx->mb1 = cpu_to_le16((sp->fcport->loop_id << 8) | opts);
  2091. }
  2092. mbx->mb2 = cpu_to_le16(sp->fcport->d_id.b.domain);
  2093. mbx->mb3 = cpu_to_le16(sp->fcport->d_id.b.area << 8 |
  2094. sp->fcport->d_id.b.al_pa);
  2095. mbx->mb9 = cpu_to_le16(sp->vha->vp_idx);
  2096. }
  2097. static void
  2098. qla24xx_logout_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  2099. {
  2100. u16 control_flags = LCF_COMMAND_LOGO;
  2101. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  2102. if (sp->fcport->explicit_logout) {
  2103. control_flags |= LCF_EXPL_LOGO|LCF_FREE_NPORT;
  2104. } else {
  2105. control_flags |= LCF_IMPL_LOGO;
  2106. if (!sp->fcport->keep_nport_handle)
  2107. control_flags |= LCF_FREE_NPORT;
  2108. }
  2109. logio->control_flags = cpu_to_le16(control_flags);
  2110. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2111. logio->port_id[0] = sp->fcport->d_id.b.al_pa;
  2112. logio->port_id[1] = sp->fcport->d_id.b.area;
  2113. logio->port_id[2] = sp->fcport->d_id.b.domain;
  2114. logio->vp_index = sp->vha->vp_idx;
  2115. }
  2116. static void
  2117. qla2x00_logout_iocb(srb_t *sp, struct mbx_entry *mbx)
  2118. {
  2119. struct qla_hw_data *ha = sp->vha->hw;
  2120. mbx->entry_type = MBX_IOCB_TYPE;
  2121. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  2122. mbx->mb0 = cpu_to_le16(MBC_LOGOUT_FABRIC_PORT);
  2123. mbx->mb1 = HAS_EXTENDED_IDS(ha) ?
  2124. cpu_to_le16(sp->fcport->loop_id) :
  2125. cpu_to_le16(sp->fcport->loop_id << 8);
  2126. mbx->mb2 = cpu_to_le16(sp->fcport->d_id.b.domain);
  2127. mbx->mb3 = cpu_to_le16(sp->fcport->d_id.b.area << 8 |
  2128. sp->fcport->d_id.b.al_pa);
  2129. mbx->mb9 = cpu_to_le16(sp->vha->vp_idx);
  2130. /* Implicit: mbx->mbx10 = 0. */
  2131. }
  2132. static void
  2133. qla24xx_adisc_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  2134. {
  2135. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  2136. logio->control_flags = cpu_to_le16(LCF_COMMAND_ADISC);
  2137. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2138. logio->vp_index = sp->vha->vp_idx;
  2139. }
  2140. static void
  2141. qla2x00_adisc_iocb(srb_t *sp, struct mbx_entry *mbx)
  2142. {
  2143. struct qla_hw_data *ha = sp->vha->hw;
  2144. mbx->entry_type = MBX_IOCB_TYPE;
  2145. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  2146. mbx->mb0 = cpu_to_le16(MBC_GET_PORT_DATABASE);
  2147. if (HAS_EXTENDED_IDS(ha)) {
  2148. mbx->mb1 = cpu_to_le16(sp->fcport->loop_id);
  2149. mbx->mb10 = cpu_to_le16(BIT_0);
  2150. } else {
  2151. mbx->mb1 = cpu_to_le16((sp->fcport->loop_id << 8) | BIT_0);
  2152. }
  2153. mbx->mb2 = cpu_to_le16(MSW(ha->async_pd_dma));
  2154. mbx->mb3 = cpu_to_le16(LSW(ha->async_pd_dma));
  2155. mbx->mb6 = cpu_to_le16(MSW(MSD(ha->async_pd_dma)));
  2156. mbx->mb7 = cpu_to_le16(LSW(MSD(ha->async_pd_dma)));
  2157. mbx->mb9 = cpu_to_le16(sp->vha->vp_idx);
  2158. }
  2159. static void
  2160. qla24xx_tm_iocb(srb_t *sp, struct tsk_mgmt_entry *tsk)
  2161. {
  2162. uint32_t flags;
  2163. uint64_t lun;
  2164. struct fc_port *fcport = sp->fcport;
  2165. scsi_qla_host_t *vha = fcport->vha;
  2166. struct qla_hw_data *ha = vha->hw;
  2167. struct srb_iocb *iocb = &sp->u.iocb_cmd;
  2168. struct req_que *req = sp->qpair->req;
  2169. flags = iocb->u.tmf.flags;
  2170. lun = iocb->u.tmf.lun;
  2171. tsk->entry_type = TSK_MGMT_IOCB_TYPE;
  2172. tsk->entry_count = 1;
  2173. tsk->handle = make_handle(req->id, tsk->handle);
  2174. tsk->nport_handle = cpu_to_le16(fcport->loop_id);
  2175. tsk->timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
  2176. tsk->control_flags = cpu_to_le32(flags);
  2177. tsk->port_id[0] = fcport->d_id.b.al_pa;
  2178. tsk->port_id[1] = fcport->d_id.b.area;
  2179. tsk->port_id[2] = fcport->d_id.b.domain;
  2180. tsk->vp_index = fcport->vha->vp_idx;
  2181. if (flags & (TCF_LUN_RESET | TCF_ABORT_TASK_SET|
  2182. TCF_CLEAR_TASK_SET|TCF_CLEAR_ACA)) {
  2183. int_to_scsilun(lun, &tsk->lun);
  2184. host_to_fcp_swap((uint8_t *)&tsk->lun,
  2185. sizeof(tsk->lun));
  2186. }
  2187. }
  2188. static void
  2189. qla2x00_async_done(struct srb *sp, int res)
  2190. {
  2191. if (del_timer(&sp->u.iocb_cmd.timer)) {
  2192. /*
  2193. * Successfully cancelled the timeout handler
  2194. * ref: TMR
  2195. */
  2196. if (kref_put(&sp->cmd_kref, qla2x00_sp_release))
  2197. return;
  2198. }
  2199. sp->async_done(sp, res);
  2200. }
  2201. void
  2202. qla2x00_sp_release(struct kref *kref)
  2203. {
  2204. struct srb *sp = container_of(kref, struct srb, cmd_kref);
  2205. sp->free(sp);
  2206. }
  2207. void
  2208. qla2x00_init_async_sp(srb_t *sp, unsigned long tmo,
  2209. void (*done)(struct srb *sp, int res))
  2210. {
  2211. timer_setup(&sp->u.iocb_cmd.timer, qla2x00_sp_timeout, 0);
  2212. sp->done = qla2x00_async_done;
  2213. sp->async_done = done;
  2214. sp->free = qla2x00_sp_free;
  2215. sp->u.iocb_cmd.timeout = qla2x00_async_iocb_timeout;
  2216. sp->u.iocb_cmd.timer.expires = jiffies + tmo * HZ;
  2217. if (IS_QLAFX00(sp->vha->hw) && sp->type == SRB_FXIOCB_DCMD)
  2218. init_completion(&sp->u.iocb_cmd.u.fxiocb.fxiocb_comp);
  2219. sp->start_timer = 1;
  2220. }
  2221. static void qla2x00_els_dcmd_sp_free(srb_t *sp)
  2222. {
  2223. struct srb_iocb *elsio = &sp->u.iocb_cmd;
  2224. kfree(sp->fcport);
  2225. if (elsio->u.els_logo.els_logo_pyld)
  2226. dma_free_coherent(&sp->vha->hw->pdev->dev, DMA_POOL_SIZE,
  2227. elsio->u.els_logo.els_logo_pyld,
  2228. elsio->u.els_logo.els_logo_pyld_dma);
  2229. del_timer(&elsio->timer);
  2230. qla2x00_rel_sp(sp);
  2231. }
  2232. static void
  2233. qla2x00_els_dcmd_iocb_timeout(void *data)
  2234. {
  2235. srb_t *sp = data;
  2236. fc_port_t *fcport = sp->fcport;
  2237. struct scsi_qla_host *vha = sp->vha;
  2238. struct srb_iocb *lio = &sp->u.iocb_cmd;
  2239. unsigned long flags = 0;
  2240. int res, h;
  2241. ql_dbg(ql_dbg_io, vha, 0x3069,
  2242. "%s Timeout, hdl=%x, portid=%02x%02x%02x\n",
  2243. sp->name, sp->handle, fcport->d_id.b.domain, fcport->d_id.b.area,
  2244. fcport->d_id.b.al_pa);
  2245. /* Abort the exchange */
  2246. res = qla24xx_async_abort_cmd(sp, false);
  2247. if (res) {
  2248. ql_dbg(ql_dbg_io, vha, 0x3070,
  2249. "mbx abort_command failed.\n");
  2250. spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
  2251. for (h = 1; h < sp->qpair->req->num_outstanding_cmds; h++) {
  2252. if (sp->qpair->req->outstanding_cmds[h] == sp) {
  2253. sp->qpair->req->outstanding_cmds[h] = NULL;
  2254. break;
  2255. }
  2256. }
  2257. spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
  2258. complete(&lio->u.els_logo.comp);
  2259. } else {
  2260. ql_dbg(ql_dbg_io, vha, 0x3071,
  2261. "mbx abort_command success.\n");
  2262. }
  2263. }
  2264. static void qla2x00_els_dcmd_sp_done(srb_t *sp, int res)
  2265. {
  2266. fc_port_t *fcport = sp->fcport;
  2267. struct srb_iocb *lio = &sp->u.iocb_cmd;
  2268. struct scsi_qla_host *vha = sp->vha;
  2269. ql_dbg(ql_dbg_io, vha, 0x3072,
  2270. "%s hdl=%x, portid=%02x%02x%02x done\n",
  2271. sp->name, sp->handle, fcport->d_id.b.domain,
  2272. fcport->d_id.b.area, fcport->d_id.b.al_pa);
  2273. complete(&lio->u.els_logo.comp);
  2274. }
  2275. int
  2276. qla24xx_els_dcmd_iocb(scsi_qla_host_t *vha, int els_opcode,
  2277. port_id_t remote_did)
  2278. {
  2279. srb_t *sp;
  2280. fc_port_t *fcport = NULL;
  2281. struct srb_iocb *elsio = NULL;
  2282. struct qla_hw_data *ha = vha->hw;
  2283. struct els_logo_payload logo_pyld;
  2284. int rval = QLA_SUCCESS;
  2285. fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2286. if (!fcport) {
  2287. ql_log(ql_log_info, vha, 0x70e5, "fcport allocation failed\n");
  2288. return -ENOMEM;
  2289. }
  2290. /* Alloc SRB structure
  2291. * ref: INIT
  2292. */
  2293. sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
  2294. if (!sp) {
  2295. kfree(fcport);
  2296. ql_log(ql_log_info, vha, 0x70e6,
  2297. "SRB allocation failed\n");
  2298. return -ENOMEM;
  2299. }
  2300. elsio = &sp->u.iocb_cmd;
  2301. fcport->loop_id = 0xFFFF;
  2302. fcport->d_id.b.domain = remote_did.b.domain;
  2303. fcport->d_id.b.area = remote_did.b.area;
  2304. fcport->d_id.b.al_pa = remote_did.b.al_pa;
  2305. ql_dbg(ql_dbg_io, vha, 0x3073, "portid=%02x%02x%02x done\n",
  2306. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa);
  2307. sp->type = SRB_ELS_DCMD;
  2308. sp->name = "ELS_DCMD";
  2309. sp->fcport = fcport;
  2310. qla2x00_init_async_sp(sp, ELS_DCMD_TIMEOUT,
  2311. qla2x00_els_dcmd_sp_done);
  2312. sp->free = qla2x00_els_dcmd_sp_free;
  2313. sp->u.iocb_cmd.timeout = qla2x00_els_dcmd_iocb_timeout;
  2314. init_completion(&sp->u.iocb_cmd.u.els_logo.comp);
  2315. elsio->u.els_logo.els_logo_pyld = dma_alloc_coherent(&ha->pdev->dev,
  2316. DMA_POOL_SIZE, &elsio->u.els_logo.els_logo_pyld_dma,
  2317. GFP_KERNEL);
  2318. if (!elsio->u.els_logo.els_logo_pyld) {
  2319. /* ref: INIT */
  2320. kref_put(&sp->cmd_kref, qla2x00_sp_release);
  2321. return QLA_FUNCTION_FAILED;
  2322. }
  2323. memset(&logo_pyld, 0, sizeof(struct els_logo_payload));
  2324. elsio->u.els_logo.els_cmd = els_opcode;
  2325. logo_pyld.opcode = els_opcode;
  2326. logo_pyld.s_id[0] = vha->d_id.b.al_pa;
  2327. logo_pyld.s_id[1] = vha->d_id.b.area;
  2328. logo_pyld.s_id[2] = vha->d_id.b.domain;
  2329. host_to_fcp_swap(logo_pyld.s_id, sizeof(uint32_t));
  2330. memcpy(&logo_pyld.wwpn, vha->port_name, WWN_SIZE);
  2331. memcpy(elsio->u.els_logo.els_logo_pyld, &logo_pyld,
  2332. sizeof(struct els_logo_payload));
  2333. ql_dbg(ql_dbg_disc + ql_dbg_buffer, vha, 0x3075, "LOGO buffer:");
  2334. ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x010a,
  2335. elsio->u.els_logo.els_logo_pyld,
  2336. sizeof(*elsio->u.els_logo.els_logo_pyld));
  2337. rval = qla2x00_start_sp(sp);
  2338. if (rval != QLA_SUCCESS) {
  2339. /* ref: INIT */
  2340. kref_put(&sp->cmd_kref, qla2x00_sp_release);
  2341. return QLA_FUNCTION_FAILED;
  2342. }
  2343. ql_dbg(ql_dbg_io, vha, 0x3074,
  2344. "%s LOGO sent, hdl=%x, loopid=%x, portid=%02x%02x%02x.\n",
  2345. sp->name, sp->handle, fcport->loop_id, fcport->d_id.b.domain,
  2346. fcport->d_id.b.area, fcport->d_id.b.al_pa);
  2347. wait_for_completion(&elsio->u.els_logo.comp);
  2348. /* ref: INIT */
  2349. kref_put(&sp->cmd_kref, qla2x00_sp_release);
  2350. return rval;
  2351. }
  2352. static void
  2353. qla24xx_els_logo_iocb(srb_t *sp, struct els_entry_24xx *els_iocb)
  2354. {
  2355. scsi_qla_host_t *vha = sp->vha;
  2356. struct srb_iocb *elsio = &sp->u.iocb_cmd;
  2357. els_iocb->entry_type = ELS_IOCB_TYPE;
  2358. els_iocb->entry_count = 1;
  2359. els_iocb->sys_define = 0;
  2360. els_iocb->entry_status = 0;
  2361. els_iocb->handle = sp->handle;
  2362. els_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2363. els_iocb->tx_dsd_count = cpu_to_le16(1);
  2364. els_iocb->vp_index = vha->vp_idx;
  2365. els_iocb->sof_type = EST_SOFI3;
  2366. els_iocb->rx_dsd_count = 0;
  2367. els_iocb->opcode = elsio->u.els_logo.els_cmd;
  2368. els_iocb->d_id[0] = sp->fcport->d_id.b.al_pa;
  2369. els_iocb->d_id[1] = sp->fcport->d_id.b.area;
  2370. els_iocb->d_id[2] = sp->fcport->d_id.b.domain;
  2371. /* For SID the byte order is different than DID */
  2372. els_iocb->s_id[1] = vha->d_id.b.al_pa;
  2373. els_iocb->s_id[2] = vha->d_id.b.area;
  2374. els_iocb->s_id[0] = vha->d_id.b.domain;
  2375. if (elsio->u.els_logo.els_cmd == ELS_DCMD_PLOGI) {
  2376. if (vha->hw->flags.edif_enabled)
  2377. els_iocb->control_flags = cpu_to_le16(ECF_SEC_LOGIN);
  2378. else
  2379. els_iocb->control_flags = 0;
  2380. els_iocb->tx_byte_count = els_iocb->tx_len =
  2381. cpu_to_le32(sizeof(struct els_plogi_payload));
  2382. put_unaligned_le64(elsio->u.els_plogi.els_plogi_pyld_dma,
  2383. &els_iocb->tx_address);
  2384. els_iocb->rx_dsd_count = cpu_to_le16(1);
  2385. els_iocb->rx_byte_count = els_iocb->rx_len =
  2386. cpu_to_le32(sizeof(struct els_plogi_payload));
  2387. put_unaligned_le64(elsio->u.els_plogi.els_resp_pyld_dma,
  2388. &els_iocb->rx_address);
  2389. ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x3073,
  2390. "PLOGI ELS IOCB:\n");
  2391. ql_dump_buffer(ql_log_info, vha, 0x0109,
  2392. (uint8_t *)els_iocb,
  2393. sizeof(*els_iocb));
  2394. } else {
  2395. els_iocb->tx_byte_count =
  2396. cpu_to_le32(sizeof(struct els_logo_payload));
  2397. put_unaligned_le64(elsio->u.els_logo.els_logo_pyld_dma,
  2398. &els_iocb->tx_address);
  2399. els_iocb->tx_len = cpu_to_le32(sizeof(struct els_logo_payload));
  2400. els_iocb->rx_byte_count = 0;
  2401. els_iocb->rx_address = 0;
  2402. els_iocb->rx_len = 0;
  2403. ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x3076,
  2404. "LOGO ELS IOCB:");
  2405. ql_dump_buffer(ql_log_info, vha, 0x010b,
  2406. els_iocb,
  2407. sizeof(*els_iocb));
  2408. }
  2409. sp->vha->qla_stats.control_requests++;
  2410. }
  2411. void
  2412. qla2x00_els_dcmd2_iocb_timeout(void *data)
  2413. {
  2414. srb_t *sp = data;
  2415. fc_port_t *fcport = sp->fcport;
  2416. struct scsi_qla_host *vha = sp->vha;
  2417. unsigned long flags = 0;
  2418. int res, h;
  2419. ql_dbg(ql_dbg_io + ql_dbg_disc, vha, 0x3069,
  2420. "%s hdl=%x ELS Timeout, %8phC portid=%06x\n",
  2421. sp->name, sp->handle, fcport->port_name, fcport->d_id.b24);
  2422. /* Abort the exchange */
  2423. res = qla24xx_async_abort_cmd(sp, false);
  2424. ql_dbg(ql_dbg_io, vha, 0x3070,
  2425. "mbx abort_command %s\n",
  2426. (res == QLA_SUCCESS) ? "successful" : "failed");
  2427. if (res) {
  2428. spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
  2429. for (h = 1; h < sp->qpair->req->num_outstanding_cmds; h++) {
  2430. if (sp->qpair->req->outstanding_cmds[h] == sp) {
  2431. sp->qpair->req->outstanding_cmds[h] = NULL;
  2432. break;
  2433. }
  2434. }
  2435. spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
  2436. sp->done(sp, QLA_FUNCTION_TIMEOUT);
  2437. }
  2438. }
  2439. void qla2x00_els_dcmd2_free(scsi_qla_host_t *vha, struct els_plogi *els_plogi)
  2440. {
  2441. if (els_plogi->els_plogi_pyld)
  2442. dma_free_coherent(&vha->hw->pdev->dev,
  2443. els_plogi->tx_size,
  2444. els_plogi->els_plogi_pyld,
  2445. els_plogi->els_plogi_pyld_dma);
  2446. if (els_plogi->els_resp_pyld)
  2447. dma_free_coherent(&vha->hw->pdev->dev,
  2448. els_plogi->rx_size,
  2449. els_plogi->els_resp_pyld,
  2450. els_plogi->els_resp_pyld_dma);
  2451. }
  2452. static void qla2x00_els_dcmd2_sp_done(srb_t *sp, int res)
  2453. {
  2454. fc_port_t *fcport = sp->fcport;
  2455. struct srb_iocb *lio = &sp->u.iocb_cmd;
  2456. struct scsi_qla_host *vha = sp->vha;
  2457. struct event_arg ea;
  2458. struct qla_work_evt *e;
  2459. struct fc_port *conflict_fcport;
  2460. port_id_t cid; /* conflict Nport id */
  2461. const __le32 *fw_status = sp->u.iocb_cmd.u.els_plogi.fw_status;
  2462. u16 lid;
  2463. ql_dbg(ql_dbg_disc, vha, 0x3072,
  2464. "%s ELS done rc %d hdl=%x, portid=%06x %8phC\n",
  2465. sp->name, res, sp->handle, fcport->d_id.b24, fcport->port_name);
  2466. fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE);
  2467. /* For edif, set logout on delete to ensure any residual key from FW is flushed.*/
  2468. fcport->logout_on_delete = 1;
  2469. fcport->chip_reset = vha->hw->base_qpair->chip_reset;
  2470. if (sp->flags & SRB_WAKEUP_ON_COMP)
  2471. complete(&lio->u.els_plogi.comp);
  2472. else {
  2473. switch (le32_to_cpu(fw_status[0])) {
  2474. case CS_DATA_UNDERRUN:
  2475. case CS_COMPLETE:
  2476. memset(&ea, 0, sizeof(ea));
  2477. ea.fcport = fcport;
  2478. ea.rc = res;
  2479. qla_handle_els_plogi_done(vha, &ea);
  2480. break;
  2481. case CS_IOCB_ERROR:
  2482. switch (le32_to_cpu(fw_status[1])) {
  2483. case LSC_SCODE_PORTID_USED:
  2484. lid = le32_to_cpu(fw_status[2]) & 0xffff;
  2485. qlt_find_sess_invalidate_other(vha,
  2486. wwn_to_u64(fcport->port_name),
  2487. fcport->d_id, lid, &conflict_fcport);
  2488. if (conflict_fcport) {
  2489. /*
  2490. * Another fcport shares the same
  2491. * loop_id & nport id; conflict
  2492. * fcport needs to finish cleanup
  2493. * before this fcport can proceed
  2494. * to login.
  2495. */
  2496. conflict_fcport->conflict = fcport;
  2497. fcport->login_pause = 1;
  2498. ql_dbg(ql_dbg_disc, vha, 0x20ed,
  2499. "%s %d %8phC pid %06x inuse with lid %#x post gidpn\n",
  2500. __func__, __LINE__,
  2501. fcport->port_name,
  2502. fcport->d_id.b24, lid);
  2503. } else {
  2504. ql_dbg(ql_dbg_disc, vha, 0x20ed,
  2505. "%s %d %8phC pid %06x inuse with lid %#x sched del\n",
  2506. __func__, __LINE__,
  2507. fcport->port_name,
  2508. fcport->d_id.b24, lid);
  2509. qla2x00_clear_loop_id(fcport);
  2510. set_bit(lid, vha->hw->loop_id_map);
  2511. fcport->loop_id = lid;
  2512. fcport->keep_nport_handle = 0;
  2513. qlt_schedule_sess_for_deletion(fcport);
  2514. }
  2515. break;
  2516. case LSC_SCODE_NPORT_USED:
  2517. cid.b.domain = (le32_to_cpu(fw_status[2]) >> 16)
  2518. & 0xff;
  2519. cid.b.area = (le32_to_cpu(fw_status[2]) >> 8)
  2520. & 0xff;
  2521. cid.b.al_pa = le32_to_cpu(fw_status[2]) & 0xff;
  2522. cid.b.rsvd_1 = 0;
  2523. ql_dbg(ql_dbg_disc, vha, 0x20ec,
  2524. "%s %d %8phC lid %#x in use with pid %06x post gnl\n",
  2525. __func__, __LINE__, fcport->port_name,
  2526. fcport->loop_id, cid.b24);
  2527. set_bit(fcport->loop_id,
  2528. vha->hw->loop_id_map);
  2529. fcport->loop_id = FC_NO_LOOP_ID;
  2530. qla24xx_post_gnl_work(vha, fcport);
  2531. break;
  2532. case LSC_SCODE_NOXCB:
  2533. vha->hw->exch_starvation++;
  2534. if (vha->hw->exch_starvation > 5) {
  2535. ql_log(ql_log_warn, vha, 0xd046,
  2536. "Exchange starvation. Resetting RISC\n");
  2537. vha->hw->exch_starvation = 0;
  2538. set_bit(ISP_ABORT_NEEDED,
  2539. &vha->dpc_flags);
  2540. qla2xxx_wake_dpc(vha);
  2541. break;
  2542. }
  2543. fallthrough;
  2544. default:
  2545. ql_dbg(ql_dbg_disc, vha, 0x20eb,
  2546. "%s %8phC cmd error fw_status 0x%x 0x%x 0x%x\n",
  2547. __func__, sp->fcport->port_name,
  2548. fw_status[0], fw_status[1], fw_status[2]);
  2549. fcport->flags &= ~FCF_ASYNC_SENT;
  2550. qlt_schedule_sess_for_deletion(fcport);
  2551. break;
  2552. }
  2553. break;
  2554. default:
  2555. ql_dbg(ql_dbg_disc, vha, 0x20eb,
  2556. "%s %8phC cmd error 2 fw_status 0x%x 0x%x 0x%x\n",
  2557. __func__, sp->fcport->port_name,
  2558. fw_status[0], fw_status[1], fw_status[2]);
  2559. sp->fcport->flags &= ~FCF_ASYNC_SENT;
  2560. qlt_schedule_sess_for_deletion(fcport);
  2561. break;
  2562. }
  2563. e = qla2x00_alloc_work(vha, QLA_EVT_UNMAP);
  2564. if (!e) {
  2565. struct srb_iocb *elsio = &sp->u.iocb_cmd;
  2566. qla2x00_els_dcmd2_free(vha, &elsio->u.els_plogi);
  2567. /* ref: INIT */
  2568. kref_put(&sp->cmd_kref, qla2x00_sp_release);
  2569. return;
  2570. }
  2571. e->u.iosb.sp = sp;
  2572. qla2x00_post_work(vha, e);
  2573. }
  2574. }
  2575. int
  2576. qla24xx_els_dcmd2_iocb(scsi_qla_host_t *vha, int els_opcode,
  2577. fc_port_t *fcport, bool wait)
  2578. {
  2579. srb_t *sp;
  2580. struct srb_iocb *elsio = NULL;
  2581. struct qla_hw_data *ha = vha->hw;
  2582. int rval = QLA_SUCCESS;
  2583. void *ptr, *resp_ptr;
  2584. /* Alloc SRB structure
  2585. * ref: INIT
  2586. */
  2587. sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
  2588. if (!sp) {
  2589. ql_log(ql_log_info, vha, 0x70e6,
  2590. "SRB allocation failed\n");
  2591. fcport->flags &= ~FCF_ASYNC_ACTIVE;
  2592. return -ENOMEM;
  2593. }
  2594. fcport->flags |= FCF_ASYNC_SENT;
  2595. qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND);
  2596. elsio = &sp->u.iocb_cmd;
  2597. ql_dbg(ql_dbg_io, vha, 0x3073,
  2598. "%s Enter: PLOGI portid=%06x\n", __func__, fcport->d_id.b24);
  2599. if (wait)
  2600. sp->flags = SRB_WAKEUP_ON_COMP;
  2601. sp->type = SRB_ELS_DCMD;
  2602. sp->name = "ELS_DCMD";
  2603. sp->fcport = fcport;
  2604. qla2x00_init_async_sp(sp, ELS_DCMD_TIMEOUT + 2,
  2605. qla2x00_els_dcmd2_sp_done);
  2606. sp->u.iocb_cmd.timeout = qla2x00_els_dcmd2_iocb_timeout;
  2607. elsio->u.els_plogi.tx_size = elsio->u.els_plogi.rx_size = DMA_POOL_SIZE;
  2608. ptr = elsio->u.els_plogi.els_plogi_pyld =
  2609. dma_alloc_coherent(&ha->pdev->dev, elsio->u.els_plogi.tx_size,
  2610. &elsio->u.els_plogi.els_plogi_pyld_dma, GFP_KERNEL);
  2611. if (!elsio->u.els_plogi.els_plogi_pyld) {
  2612. rval = QLA_FUNCTION_FAILED;
  2613. goto out;
  2614. }
  2615. resp_ptr = elsio->u.els_plogi.els_resp_pyld =
  2616. dma_alloc_coherent(&ha->pdev->dev, elsio->u.els_plogi.rx_size,
  2617. &elsio->u.els_plogi.els_resp_pyld_dma, GFP_KERNEL);
  2618. if (!elsio->u.els_plogi.els_resp_pyld) {
  2619. rval = QLA_FUNCTION_FAILED;
  2620. goto out;
  2621. }
  2622. ql_dbg(ql_dbg_io, vha, 0x3073, "PLOGI %p %p\n", ptr, resp_ptr);
  2623. memset(ptr, 0, sizeof(struct els_plogi_payload));
  2624. memset(resp_ptr, 0, sizeof(struct els_plogi_payload));
  2625. memcpy(elsio->u.els_plogi.els_plogi_pyld->data,
  2626. &ha->plogi_els_payld.fl_csp, LOGIN_TEMPLATE_SIZE);
  2627. elsio->u.els_plogi.els_cmd = els_opcode;
  2628. elsio->u.els_plogi.els_plogi_pyld->opcode = els_opcode;
  2629. if (els_opcode == ELS_DCMD_PLOGI && DBELL_ACTIVE(vha)) {
  2630. struct fc_els_flogi *p = ptr;
  2631. p->fl_csp.sp_features |= cpu_to_be16(FC_SP_FT_SEC);
  2632. }
  2633. ql_dbg(ql_dbg_disc + ql_dbg_buffer, vha, 0x3073, "PLOGI buffer:\n");
  2634. ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x0109,
  2635. (uint8_t *)elsio->u.els_plogi.els_plogi_pyld,
  2636. sizeof(*elsio->u.els_plogi.els_plogi_pyld));
  2637. init_completion(&elsio->u.els_plogi.comp);
  2638. rval = qla2x00_start_sp(sp);
  2639. if (rval != QLA_SUCCESS) {
  2640. rval = QLA_FUNCTION_FAILED;
  2641. } else {
  2642. ql_dbg(ql_dbg_disc, vha, 0x3074,
  2643. "%s PLOGI sent, hdl=%x, loopid=%x, to port_id %06x from port_id %06x\n",
  2644. sp->name, sp->handle, fcport->loop_id,
  2645. fcport->d_id.b24, vha->d_id.b24);
  2646. }
  2647. if (wait) {
  2648. wait_for_completion(&elsio->u.els_plogi.comp);
  2649. if (elsio->u.els_plogi.comp_status != CS_COMPLETE)
  2650. rval = QLA_FUNCTION_FAILED;
  2651. } else {
  2652. goto done;
  2653. }
  2654. out:
  2655. fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
  2656. qla2x00_els_dcmd2_free(vha, &elsio->u.els_plogi);
  2657. /* ref: INIT */
  2658. kref_put(&sp->cmd_kref, qla2x00_sp_release);
  2659. done:
  2660. return rval;
  2661. }
  2662. /* it is assume qpair lock is held */
  2663. void qla_els_pt_iocb(struct scsi_qla_host *vha,
  2664. struct els_entry_24xx *els_iocb,
  2665. struct qla_els_pt_arg *a)
  2666. {
  2667. els_iocb->entry_type = ELS_IOCB_TYPE;
  2668. els_iocb->entry_count = 1;
  2669. els_iocb->sys_define = 0;
  2670. els_iocb->entry_status = 0;
  2671. els_iocb->handle = QLA_SKIP_HANDLE;
  2672. els_iocb->nport_handle = a->nport_handle;
  2673. els_iocb->rx_xchg_address = a->rx_xchg_address;
  2674. els_iocb->tx_dsd_count = cpu_to_le16(1);
  2675. els_iocb->vp_index = a->vp_idx;
  2676. els_iocb->sof_type = EST_SOFI3;
  2677. els_iocb->rx_dsd_count = cpu_to_le16(0);
  2678. els_iocb->opcode = a->els_opcode;
  2679. els_iocb->d_id[0] = a->did.b.al_pa;
  2680. els_iocb->d_id[1] = a->did.b.area;
  2681. els_iocb->d_id[2] = a->did.b.domain;
  2682. /* For SID the byte order is different than DID */
  2683. els_iocb->s_id[1] = vha->d_id.b.al_pa;
  2684. els_iocb->s_id[2] = vha->d_id.b.area;
  2685. els_iocb->s_id[0] = vha->d_id.b.domain;
  2686. els_iocb->control_flags = cpu_to_le16(a->control_flags);
  2687. els_iocb->tx_byte_count = cpu_to_le32(a->tx_byte_count);
  2688. els_iocb->tx_len = cpu_to_le32(a->tx_len);
  2689. put_unaligned_le64(a->tx_addr, &els_iocb->tx_address);
  2690. els_iocb->rx_byte_count = cpu_to_le32(a->rx_byte_count);
  2691. els_iocb->rx_len = cpu_to_le32(a->rx_len);
  2692. put_unaligned_le64(a->rx_addr, &els_iocb->rx_address);
  2693. }
  2694. static void
  2695. qla24xx_els_iocb(srb_t *sp, struct els_entry_24xx *els_iocb)
  2696. {
  2697. struct bsg_job *bsg_job = sp->u.bsg_job;
  2698. struct fc_bsg_request *bsg_request = bsg_job->request;
  2699. els_iocb->entry_type = ELS_IOCB_TYPE;
  2700. els_iocb->entry_count = 1;
  2701. els_iocb->sys_define = 0;
  2702. els_iocb->entry_status = 0;
  2703. els_iocb->handle = sp->handle;
  2704. els_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2705. els_iocb->tx_dsd_count = cpu_to_le16(bsg_job->request_payload.sg_cnt);
  2706. els_iocb->vp_index = sp->vha->vp_idx;
  2707. els_iocb->sof_type = EST_SOFI3;
  2708. els_iocb->rx_dsd_count = cpu_to_le16(bsg_job->reply_payload.sg_cnt);
  2709. els_iocb->opcode =
  2710. sp->type == SRB_ELS_CMD_RPT ?
  2711. bsg_request->rqst_data.r_els.els_code :
  2712. bsg_request->rqst_data.h_els.command_code;
  2713. els_iocb->d_id[0] = sp->fcport->d_id.b.al_pa;
  2714. els_iocb->d_id[1] = sp->fcport->d_id.b.area;
  2715. els_iocb->d_id[2] = sp->fcport->d_id.b.domain;
  2716. els_iocb->control_flags = 0;
  2717. els_iocb->rx_byte_count =
  2718. cpu_to_le32(bsg_job->reply_payload.payload_len);
  2719. els_iocb->tx_byte_count =
  2720. cpu_to_le32(bsg_job->request_payload.payload_len);
  2721. put_unaligned_le64(sg_dma_address(bsg_job->request_payload.sg_list),
  2722. &els_iocb->tx_address);
  2723. els_iocb->tx_len = cpu_to_le32(sg_dma_len
  2724. (bsg_job->request_payload.sg_list));
  2725. put_unaligned_le64(sg_dma_address(bsg_job->reply_payload.sg_list),
  2726. &els_iocb->rx_address);
  2727. els_iocb->rx_len = cpu_to_le32(sg_dma_len
  2728. (bsg_job->reply_payload.sg_list));
  2729. sp->vha->qla_stats.control_requests++;
  2730. }
  2731. static void
  2732. qla2x00_ct_iocb(srb_t *sp, ms_iocb_entry_t *ct_iocb)
  2733. {
  2734. uint16_t avail_dsds;
  2735. struct dsd64 *cur_dsd;
  2736. struct scatterlist *sg;
  2737. int index;
  2738. uint16_t tot_dsds;
  2739. scsi_qla_host_t *vha = sp->vha;
  2740. struct qla_hw_data *ha = vha->hw;
  2741. struct bsg_job *bsg_job = sp->u.bsg_job;
  2742. int entry_count = 1;
  2743. memset(ct_iocb, 0, sizeof(ms_iocb_entry_t));
  2744. ct_iocb->entry_type = CT_IOCB_TYPE;
  2745. ct_iocb->entry_status = 0;
  2746. ct_iocb->handle1 = sp->handle;
  2747. SET_TARGET_ID(ha, ct_iocb->loop_id, sp->fcport->loop_id);
  2748. ct_iocb->status = cpu_to_le16(0);
  2749. ct_iocb->control_flags = cpu_to_le16(0);
  2750. ct_iocb->timeout = 0;
  2751. ct_iocb->cmd_dsd_count =
  2752. cpu_to_le16(bsg_job->request_payload.sg_cnt);
  2753. ct_iocb->total_dsd_count =
  2754. cpu_to_le16(bsg_job->request_payload.sg_cnt + 1);
  2755. ct_iocb->req_bytecount =
  2756. cpu_to_le32(bsg_job->request_payload.payload_len);
  2757. ct_iocb->rsp_bytecount =
  2758. cpu_to_le32(bsg_job->reply_payload.payload_len);
  2759. put_unaligned_le64(sg_dma_address(bsg_job->request_payload.sg_list),
  2760. &ct_iocb->req_dsd.address);
  2761. ct_iocb->req_dsd.length = ct_iocb->req_bytecount;
  2762. put_unaligned_le64(sg_dma_address(bsg_job->reply_payload.sg_list),
  2763. &ct_iocb->rsp_dsd.address);
  2764. ct_iocb->rsp_dsd.length = ct_iocb->rsp_bytecount;
  2765. avail_dsds = 1;
  2766. cur_dsd = &ct_iocb->rsp_dsd;
  2767. index = 0;
  2768. tot_dsds = bsg_job->reply_payload.sg_cnt;
  2769. for_each_sg(bsg_job->reply_payload.sg_list, sg, tot_dsds, index) {
  2770. cont_a64_entry_t *cont_pkt;
  2771. /* Allocate additional continuation packets? */
  2772. if (avail_dsds == 0) {
  2773. /*
  2774. * Five DSDs are available in the Cont.
  2775. * Type 1 IOCB.
  2776. */
  2777. cont_pkt = qla2x00_prep_cont_type1_iocb(vha,
  2778. vha->hw->req_q_map[0]);
  2779. cur_dsd = cont_pkt->dsd;
  2780. avail_dsds = 5;
  2781. entry_count++;
  2782. }
  2783. append_dsd64(&cur_dsd, sg);
  2784. avail_dsds--;
  2785. }
  2786. ct_iocb->entry_count = entry_count;
  2787. sp->vha->qla_stats.control_requests++;
  2788. }
  2789. static void
  2790. qla24xx_ct_iocb(srb_t *sp, struct ct_entry_24xx *ct_iocb)
  2791. {
  2792. uint16_t avail_dsds;
  2793. struct dsd64 *cur_dsd;
  2794. struct scatterlist *sg;
  2795. int index;
  2796. uint16_t cmd_dsds, rsp_dsds;
  2797. scsi_qla_host_t *vha = sp->vha;
  2798. struct qla_hw_data *ha = vha->hw;
  2799. struct bsg_job *bsg_job = sp->u.bsg_job;
  2800. int entry_count = 1;
  2801. cont_a64_entry_t *cont_pkt = NULL;
  2802. ct_iocb->entry_type = CT_IOCB_TYPE;
  2803. ct_iocb->entry_status = 0;
  2804. ct_iocb->sys_define = 0;
  2805. ct_iocb->handle = sp->handle;
  2806. ct_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2807. ct_iocb->vp_index = sp->vha->vp_idx;
  2808. ct_iocb->comp_status = cpu_to_le16(0);
  2809. cmd_dsds = bsg_job->request_payload.sg_cnt;
  2810. rsp_dsds = bsg_job->reply_payload.sg_cnt;
  2811. ct_iocb->cmd_dsd_count = cpu_to_le16(cmd_dsds);
  2812. ct_iocb->timeout = 0;
  2813. ct_iocb->rsp_dsd_count = cpu_to_le16(rsp_dsds);
  2814. ct_iocb->cmd_byte_count =
  2815. cpu_to_le32(bsg_job->request_payload.payload_len);
  2816. avail_dsds = 2;
  2817. cur_dsd = ct_iocb->dsd;
  2818. index = 0;
  2819. for_each_sg(bsg_job->request_payload.sg_list, sg, cmd_dsds, index) {
  2820. /* Allocate additional continuation packets? */
  2821. if (avail_dsds == 0) {
  2822. /*
  2823. * Five DSDs are available in the Cont.
  2824. * Type 1 IOCB.
  2825. */
  2826. cont_pkt = qla2x00_prep_cont_type1_iocb(
  2827. vha, ha->req_q_map[0]);
  2828. cur_dsd = cont_pkt->dsd;
  2829. avail_dsds = 5;
  2830. entry_count++;
  2831. }
  2832. append_dsd64(&cur_dsd, sg);
  2833. avail_dsds--;
  2834. }
  2835. index = 0;
  2836. for_each_sg(bsg_job->reply_payload.sg_list, sg, rsp_dsds, index) {
  2837. /* Allocate additional continuation packets? */
  2838. if (avail_dsds == 0) {
  2839. /*
  2840. * Five DSDs are available in the Cont.
  2841. * Type 1 IOCB.
  2842. */
  2843. cont_pkt = qla2x00_prep_cont_type1_iocb(vha,
  2844. ha->req_q_map[0]);
  2845. cur_dsd = cont_pkt->dsd;
  2846. avail_dsds = 5;
  2847. entry_count++;
  2848. }
  2849. append_dsd64(&cur_dsd, sg);
  2850. avail_dsds--;
  2851. }
  2852. ct_iocb->entry_count = entry_count;
  2853. }
  2854. /*
  2855. * qla82xx_start_scsi() - Send a SCSI command to the ISP
  2856. * @sp: command to send to the ISP
  2857. *
  2858. * Returns non-zero if a failure occurred, else zero.
  2859. */
  2860. int
  2861. qla82xx_start_scsi(srb_t *sp)
  2862. {
  2863. int nseg;
  2864. unsigned long flags;
  2865. struct scsi_cmnd *cmd;
  2866. uint32_t *clr_ptr;
  2867. uint32_t handle;
  2868. uint16_t cnt;
  2869. uint16_t req_cnt;
  2870. uint16_t tot_dsds;
  2871. struct device_reg_82xx __iomem *reg;
  2872. uint32_t dbval;
  2873. __be32 *fcp_dl;
  2874. uint8_t additional_cdb_len;
  2875. struct ct6_dsd *ctx;
  2876. struct scsi_qla_host *vha = sp->vha;
  2877. struct qla_hw_data *ha = vha->hw;
  2878. struct req_que *req = NULL;
  2879. struct rsp_que *rsp = NULL;
  2880. /* Setup device pointers. */
  2881. reg = &ha->iobase->isp82;
  2882. cmd = GET_CMD_SP(sp);
  2883. req = vha->req;
  2884. rsp = ha->rsp_q_map[0];
  2885. /* So we know we haven't pci_map'ed anything yet */
  2886. tot_dsds = 0;
  2887. dbval = 0x04 | (ha->portnum << 5);
  2888. /* Send marker if required */
  2889. if (vha->marker_needed != 0) {
  2890. if (qla2x00_marker(vha, ha->base_qpair,
  2891. 0, 0, MK_SYNC_ALL) != QLA_SUCCESS) {
  2892. ql_log(ql_log_warn, vha, 0x300c,
  2893. "qla2x00_marker failed for cmd=%p.\n", cmd);
  2894. return QLA_FUNCTION_FAILED;
  2895. }
  2896. vha->marker_needed = 0;
  2897. }
  2898. /* Acquire ring specific lock */
  2899. spin_lock_irqsave(&ha->hardware_lock, flags);
  2900. handle = qla2xxx_get_next_handle(req);
  2901. if (handle == 0)
  2902. goto queuing_error;
  2903. /* Map the sg table so we have an accurate count of sg entries needed */
  2904. if (scsi_sg_count(cmd)) {
  2905. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  2906. scsi_sg_count(cmd), cmd->sc_data_direction);
  2907. if (unlikely(!nseg))
  2908. goto queuing_error;
  2909. } else
  2910. nseg = 0;
  2911. tot_dsds = nseg;
  2912. if (tot_dsds > ql2xshiftctondsd) {
  2913. struct cmd_type_6 *cmd_pkt;
  2914. uint16_t more_dsd_lists = 0;
  2915. struct dsd_dma *dsd_ptr;
  2916. uint16_t i;
  2917. more_dsd_lists = qla24xx_calc_dsd_lists(tot_dsds);
  2918. if ((more_dsd_lists + ha->gbl_dsd_inuse) >= NUM_DSD_CHAIN) {
  2919. ql_dbg(ql_dbg_io, vha, 0x300d,
  2920. "Num of DSD list %d is than %d for cmd=%p.\n",
  2921. more_dsd_lists + ha->gbl_dsd_inuse, NUM_DSD_CHAIN,
  2922. cmd);
  2923. goto queuing_error;
  2924. }
  2925. if (more_dsd_lists <= ha->gbl_dsd_avail)
  2926. goto sufficient_dsds;
  2927. else
  2928. more_dsd_lists -= ha->gbl_dsd_avail;
  2929. for (i = 0; i < more_dsd_lists; i++) {
  2930. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  2931. if (!dsd_ptr) {
  2932. ql_log(ql_log_fatal, vha, 0x300e,
  2933. "Failed to allocate memory for dsd_dma "
  2934. "for cmd=%p.\n", cmd);
  2935. goto queuing_error;
  2936. }
  2937. dsd_ptr->dsd_addr = dma_pool_alloc(ha->dl_dma_pool,
  2938. GFP_ATOMIC, &dsd_ptr->dsd_list_dma);
  2939. if (!dsd_ptr->dsd_addr) {
  2940. kfree(dsd_ptr);
  2941. ql_log(ql_log_fatal, vha, 0x300f,
  2942. "Failed to allocate memory for dsd_addr "
  2943. "for cmd=%p.\n", cmd);
  2944. goto queuing_error;
  2945. }
  2946. list_add_tail(&dsd_ptr->list, &ha->gbl_dsd_list);
  2947. ha->gbl_dsd_avail++;
  2948. }
  2949. sufficient_dsds:
  2950. req_cnt = 1;
  2951. if (req->cnt < (req_cnt + 2)) {
  2952. cnt = (uint16_t)rd_reg_dword_relaxed(
  2953. &reg->req_q_out[0]);
  2954. if (req->ring_index < cnt)
  2955. req->cnt = cnt - req->ring_index;
  2956. else
  2957. req->cnt = req->length -
  2958. (req->ring_index - cnt);
  2959. if (req->cnt < (req_cnt + 2))
  2960. goto queuing_error;
  2961. }
  2962. ctx = sp->u.scmd.ct6_ctx =
  2963. mempool_alloc(ha->ctx_mempool, GFP_ATOMIC);
  2964. if (!ctx) {
  2965. ql_log(ql_log_fatal, vha, 0x3010,
  2966. "Failed to allocate ctx for cmd=%p.\n", cmd);
  2967. goto queuing_error;
  2968. }
  2969. memset(ctx, 0, sizeof(struct ct6_dsd));
  2970. ctx->fcp_cmnd = dma_pool_zalloc(ha->fcp_cmnd_dma_pool,
  2971. GFP_ATOMIC, &ctx->fcp_cmnd_dma);
  2972. if (!ctx->fcp_cmnd) {
  2973. ql_log(ql_log_fatal, vha, 0x3011,
  2974. "Failed to allocate fcp_cmnd for cmd=%p.\n", cmd);
  2975. goto queuing_error;
  2976. }
  2977. /* Initialize the DSD list and dma handle */
  2978. INIT_LIST_HEAD(&ctx->dsd_list);
  2979. ctx->dsd_use_cnt = 0;
  2980. if (cmd->cmd_len > 16) {
  2981. additional_cdb_len = cmd->cmd_len - 16;
  2982. if ((cmd->cmd_len % 4) != 0) {
  2983. /* SCSI command bigger than 16 bytes must be
  2984. * multiple of 4
  2985. */
  2986. ql_log(ql_log_warn, vha, 0x3012,
  2987. "scsi cmd len %d not multiple of 4 "
  2988. "for cmd=%p.\n", cmd->cmd_len, cmd);
  2989. goto queuing_error_fcp_cmnd;
  2990. }
  2991. ctx->fcp_cmnd_len = 12 + cmd->cmd_len + 4;
  2992. } else {
  2993. additional_cdb_len = 0;
  2994. ctx->fcp_cmnd_len = 12 + 16 + 4;
  2995. }
  2996. cmd_pkt = (struct cmd_type_6 *)req->ring_ptr;
  2997. cmd_pkt->handle = make_handle(req->id, handle);
  2998. /* Zero out remaining portion of packet. */
  2999. /* tagged queuing modifier -- default is TSK_SIMPLE (0). */
  3000. clr_ptr = (uint32_t *)cmd_pkt + 2;
  3001. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  3002. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  3003. /* Set NPORT-ID and LUN number*/
  3004. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  3005. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  3006. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  3007. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  3008. cmd_pkt->vp_index = sp->vha->vp_idx;
  3009. /* Build IOCB segments */
  3010. if (qla24xx_build_scsi_type_6_iocbs(sp, cmd_pkt, tot_dsds))
  3011. goto queuing_error_fcp_cmnd;
  3012. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  3013. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  3014. /* build FCP_CMND IU */
  3015. int_to_scsilun(cmd->device->lun, &ctx->fcp_cmnd->lun);
  3016. ctx->fcp_cmnd->additional_cdb_len = additional_cdb_len;
  3017. if (cmd->sc_data_direction == DMA_TO_DEVICE)
  3018. ctx->fcp_cmnd->additional_cdb_len |= 1;
  3019. else if (cmd->sc_data_direction == DMA_FROM_DEVICE)
  3020. ctx->fcp_cmnd->additional_cdb_len |= 2;
  3021. /* Populate the FCP_PRIO. */
  3022. if (ha->flags.fcp_prio_enabled)
  3023. ctx->fcp_cmnd->task_attribute |=
  3024. sp->fcport->fcp_prio << 3;
  3025. memcpy(ctx->fcp_cmnd->cdb, cmd->cmnd, cmd->cmd_len);
  3026. fcp_dl = (__be32 *)(ctx->fcp_cmnd->cdb + 16 +
  3027. additional_cdb_len);
  3028. *fcp_dl = htonl((uint32_t)scsi_bufflen(cmd));
  3029. cmd_pkt->fcp_cmnd_dseg_len = cpu_to_le16(ctx->fcp_cmnd_len);
  3030. put_unaligned_le64(ctx->fcp_cmnd_dma,
  3031. &cmd_pkt->fcp_cmnd_dseg_address);
  3032. sp->flags |= SRB_FCP_CMND_DMA_VALID;
  3033. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  3034. /* Set total data segment count. */
  3035. cmd_pkt->entry_count = (uint8_t)req_cnt;
  3036. /* Specify response queue number where
  3037. * completion should happen
  3038. */
  3039. cmd_pkt->entry_status = (uint8_t) rsp->id;
  3040. } else {
  3041. struct cmd_type_7 *cmd_pkt;
  3042. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  3043. if (req->cnt < (req_cnt + 2)) {
  3044. cnt = (uint16_t)rd_reg_dword_relaxed(
  3045. &reg->req_q_out[0]);
  3046. if (req->ring_index < cnt)
  3047. req->cnt = cnt - req->ring_index;
  3048. else
  3049. req->cnt = req->length -
  3050. (req->ring_index - cnt);
  3051. }
  3052. if (req->cnt < (req_cnt + 2))
  3053. goto queuing_error;
  3054. cmd_pkt = (struct cmd_type_7 *)req->ring_ptr;
  3055. cmd_pkt->handle = make_handle(req->id, handle);
  3056. /* Zero out remaining portion of packet. */
  3057. /* tagged queuing modifier -- default is TSK_SIMPLE (0).*/
  3058. clr_ptr = (uint32_t *)cmd_pkt + 2;
  3059. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  3060. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  3061. /* Set NPORT-ID and LUN number*/
  3062. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  3063. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  3064. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  3065. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  3066. cmd_pkt->vp_index = sp->vha->vp_idx;
  3067. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  3068. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun,
  3069. sizeof(cmd_pkt->lun));
  3070. /* Populate the FCP_PRIO. */
  3071. if (ha->flags.fcp_prio_enabled)
  3072. cmd_pkt->task |= sp->fcport->fcp_prio << 3;
  3073. /* Load SCSI command packet. */
  3074. memcpy(cmd_pkt->fcp_cdb, cmd->cmnd, cmd->cmd_len);
  3075. host_to_fcp_swap(cmd_pkt->fcp_cdb, sizeof(cmd_pkt->fcp_cdb));
  3076. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  3077. /* Build IOCB segments */
  3078. qla24xx_build_scsi_iocbs(sp, cmd_pkt, tot_dsds, req);
  3079. /* Set total data segment count. */
  3080. cmd_pkt->entry_count = (uint8_t)req_cnt;
  3081. /* Specify response queue number where
  3082. * completion should happen.
  3083. */
  3084. cmd_pkt->entry_status = (uint8_t) rsp->id;
  3085. }
  3086. /* Build command packet. */
  3087. req->current_outstanding_cmd = handle;
  3088. req->outstanding_cmds[handle] = sp;
  3089. sp->handle = handle;
  3090. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  3091. req->cnt -= req_cnt;
  3092. wmb();
  3093. /* Adjust ring index. */
  3094. req->ring_index++;
  3095. if (req->ring_index == req->length) {
  3096. req->ring_index = 0;
  3097. req->ring_ptr = req->ring;
  3098. } else
  3099. req->ring_ptr++;
  3100. sp->flags |= SRB_DMA_VALID;
  3101. /* Set chip new ring index. */
  3102. /* write, read and verify logic */
  3103. dbval = dbval | (req->id << 8) | (req->ring_index << 16);
  3104. if (ql2xdbwr)
  3105. qla82xx_wr_32(ha, (uintptr_t __force)ha->nxdb_wr_ptr, dbval);
  3106. else {
  3107. wrt_reg_dword(ha->nxdb_wr_ptr, dbval);
  3108. wmb();
  3109. while (rd_reg_dword(ha->nxdb_rd_ptr) != dbval) {
  3110. wrt_reg_dword(ha->nxdb_wr_ptr, dbval);
  3111. wmb();
  3112. }
  3113. }
  3114. /* Manage unprocessed RIO/ZIO commands in response queue. */
  3115. if (vha->flags.process_response_queue &&
  3116. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  3117. qla24xx_process_response_queue(vha, rsp);
  3118. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3119. return QLA_SUCCESS;
  3120. queuing_error_fcp_cmnd:
  3121. dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd, ctx->fcp_cmnd_dma);
  3122. queuing_error:
  3123. if (tot_dsds)
  3124. scsi_dma_unmap(cmd);
  3125. if (sp->u.scmd.crc_ctx) {
  3126. mempool_free(sp->u.scmd.crc_ctx, ha->ctx_mempool);
  3127. sp->u.scmd.crc_ctx = NULL;
  3128. }
  3129. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3130. return QLA_FUNCTION_FAILED;
  3131. }
  3132. static void
  3133. qla24xx_abort_iocb(srb_t *sp, struct abort_entry_24xx *abt_iocb)
  3134. {
  3135. struct srb_iocb *aio = &sp->u.iocb_cmd;
  3136. scsi_qla_host_t *vha = sp->vha;
  3137. struct req_que *req = sp->qpair->req;
  3138. srb_t *orig_sp = sp->cmd_sp;
  3139. memset(abt_iocb, 0, sizeof(struct abort_entry_24xx));
  3140. abt_iocb->entry_type = ABORT_IOCB_TYPE;
  3141. abt_iocb->entry_count = 1;
  3142. abt_iocb->handle = make_handle(req->id, sp->handle);
  3143. if (sp->fcport) {
  3144. abt_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  3145. abt_iocb->port_id[0] = sp->fcport->d_id.b.al_pa;
  3146. abt_iocb->port_id[1] = sp->fcport->d_id.b.area;
  3147. abt_iocb->port_id[2] = sp->fcport->d_id.b.domain;
  3148. }
  3149. abt_iocb->handle_to_abort =
  3150. make_handle(le16_to_cpu(aio->u.abt.req_que_no),
  3151. aio->u.abt.cmd_hndl);
  3152. abt_iocb->vp_index = vha->vp_idx;
  3153. abt_iocb->req_que_no = aio->u.abt.req_que_no;
  3154. /* need to pass original sp */
  3155. if (orig_sp)
  3156. qla_nvme_abort_set_option(abt_iocb, orig_sp);
  3157. /* Send the command to the firmware */
  3158. wmb();
  3159. }
  3160. static void
  3161. qla2x00_mb_iocb(srb_t *sp, struct mbx_24xx_entry *mbx)
  3162. {
  3163. int i, sz;
  3164. mbx->entry_type = MBX_IOCB_TYPE;
  3165. mbx->handle = sp->handle;
  3166. sz = min(ARRAY_SIZE(mbx->mb), ARRAY_SIZE(sp->u.iocb_cmd.u.mbx.out_mb));
  3167. for (i = 0; i < sz; i++)
  3168. mbx->mb[i] = sp->u.iocb_cmd.u.mbx.out_mb[i];
  3169. }
  3170. static void
  3171. qla2x00_ctpthru_cmd_iocb(srb_t *sp, struct ct_entry_24xx *ct_pkt)
  3172. {
  3173. sp->u.iocb_cmd.u.ctarg.iocb = ct_pkt;
  3174. qla24xx_prep_ms_iocb(sp->vha, &sp->u.iocb_cmd.u.ctarg);
  3175. ct_pkt->handle = sp->handle;
  3176. }
  3177. static void qla2x00_send_notify_ack_iocb(srb_t *sp,
  3178. struct nack_to_isp *nack)
  3179. {
  3180. struct imm_ntfy_from_isp *ntfy = sp->u.iocb_cmd.u.nack.ntfy;
  3181. nack->entry_type = NOTIFY_ACK_TYPE;
  3182. nack->entry_count = 1;
  3183. nack->ox_id = ntfy->ox_id;
  3184. nack->u.isp24.handle = sp->handle;
  3185. nack->u.isp24.nport_handle = ntfy->u.isp24.nport_handle;
  3186. if (le16_to_cpu(ntfy->u.isp24.status) == IMM_NTFY_ELS) {
  3187. nack->u.isp24.flags = ntfy->u.isp24.flags &
  3188. cpu_to_le16(NOTIFY24XX_FLAGS_PUREX_IOCB);
  3189. }
  3190. nack->u.isp24.srr_rx_id = ntfy->u.isp24.srr_rx_id;
  3191. nack->u.isp24.status = ntfy->u.isp24.status;
  3192. nack->u.isp24.status_subcode = ntfy->u.isp24.status_subcode;
  3193. nack->u.isp24.fw_handle = ntfy->u.isp24.fw_handle;
  3194. nack->u.isp24.exchange_address = ntfy->u.isp24.exchange_address;
  3195. nack->u.isp24.srr_rel_offs = ntfy->u.isp24.srr_rel_offs;
  3196. nack->u.isp24.srr_ui = ntfy->u.isp24.srr_ui;
  3197. nack->u.isp24.srr_flags = 0;
  3198. nack->u.isp24.srr_reject_code = 0;
  3199. nack->u.isp24.srr_reject_code_expl = 0;
  3200. nack->u.isp24.vp_index = ntfy->u.isp24.vp_index;
  3201. if (ntfy->u.isp24.status_subcode == ELS_PLOGI &&
  3202. (le16_to_cpu(ntfy->u.isp24.flags) & NOTIFY24XX_FLAGS_FCSP) &&
  3203. sp->vha->hw->flags.edif_enabled) {
  3204. ql_dbg(ql_dbg_disc, sp->vha, 0x3074,
  3205. "%s PLOGI NACK sent with FC SECURITY bit, hdl=%x, loopid=%x, to pid %06x\n",
  3206. sp->name, sp->handle, sp->fcport->loop_id,
  3207. sp->fcport->d_id.b24);
  3208. nack->u.isp24.flags |= cpu_to_le16(NOTIFY_ACK_FLAGS_FCSP);
  3209. }
  3210. }
  3211. /*
  3212. * Build NVME LS request
  3213. */
  3214. static void
  3215. qla_nvme_ls(srb_t *sp, struct pt_ls4_request *cmd_pkt)
  3216. {
  3217. struct srb_iocb *nvme;
  3218. nvme = &sp->u.iocb_cmd;
  3219. cmd_pkt->entry_type = PT_LS4_REQUEST;
  3220. cmd_pkt->entry_count = 1;
  3221. cmd_pkt->control_flags = cpu_to_le16(CF_LS4_ORIGINATOR << CF_LS4_SHIFT);
  3222. cmd_pkt->timeout = cpu_to_le16(nvme->u.nvme.timeout_sec);
  3223. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  3224. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  3225. cmd_pkt->tx_dseg_count = cpu_to_le16(1);
  3226. cmd_pkt->tx_byte_count = cpu_to_le32(nvme->u.nvme.cmd_len);
  3227. cmd_pkt->dsd[0].length = cpu_to_le32(nvme->u.nvme.cmd_len);
  3228. put_unaligned_le64(nvme->u.nvme.cmd_dma, &cmd_pkt->dsd[0].address);
  3229. cmd_pkt->rx_dseg_count = cpu_to_le16(1);
  3230. cmd_pkt->rx_byte_count = cpu_to_le32(nvme->u.nvme.rsp_len);
  3231. cmd_pkt->dsd[1].length = cpu_to_le32(nvme->u.nvme.rsp_len);
  3232. put_unaligned_le64(nvme->u.nvme.rsp_dma, &cmd_pkt->dsd[1].address);
  3233. }
  3234. static void
  3235. qla25xx_ctrlvp_iocb(srb_t *sp, struct vp_ctrl_entry_24xx *vce)
  3236. {
  3237. int map, pos;
  3238. vce->entry_type = VP_CTRL_IOCB_TYPE;
  3239. vce->handle = sp->handle;
  3240. vce->entry_count = 1;
  3241. vce->command = cpu_to_le16(sp->u.iocb_cmd.u.ctrlvp.cmd);
  3242. vce->vp_count = cpu_to_le16(1);
  3243. /*
  3244. * index map in firmware starts with 1; decrement index
  3245. * this is ok as we never use index 0
  3246. */
  3247. map = (sp->u.iocb_cmd.u.ctrlvp.vp_index - 1) / 8;
  3248. pos = (sp->u.iocb_cmd.u.ctrlvp.vp_index - 1) & 7;
  3249. vce->vp_idx_map[map] |= 1 << pos;
  3250. }
  3251. static void
  3252. qla24xx_prlo_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  3253. {
  3254. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  3255. logio->control_flags =
  3256. cpu_to_le16(LCF_COMMAND_PRLO|LCF_IMPL_PRLO);
  3257. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  3258. logio->port_id[0] = sp->fcport->d_id.b.al_pa;
  3259. logio->port_id[1] = sp->fcport->d_id.b.area;
  3260. logio->port_id[2] = sp->fcport->d_id.b.domain;
  3261. logio->vp_index = sp->fcport->vha->vp_idx;
  3262. }
  3263. int qla_get_iocbs_resource(struct srb *sp)
  3264. {
  3265. bool get_exch;
  3266. bool push_it_through = false;
  3267. if (!ql2xenforce_iocb_limit) {
  3268. sp->iores.res_type = RESOURCE_NONE;
  3269. return 0;
  3270. }
  3271. sp->iores.res_type = RESOURCE_NONE;
  3272. switch (sp->type) {
  3273. case SRB_TM_CMD:
  3274. case SRB_PRLI_CMD:
  3275. case SRB_ADISC_CMD:
  3276. push_it_through = true;
  3277. fallthrough;
  3278. case SRB_LOGIN_CMD:
  3279. case SRB_ELS_CMD_RPT:
  3280. case SRB_ELS_CMD_HST:
  3281. case SRB_ELS_CMD_HST_NOLOGIN:
  3282. case SRB_CT_CMD:
  3283. case SRB_NVME_LS:
  3284. case SRB_ELS_DCMD:
  3285. get_exch = true;
  3286. break;
  3287. case SRB_FXIOCB_DCMD:
  3288. case SRB_FXIOCB_BCMD:
  3289. sp->iores.res_type = RESOURCE_NONE;
  3290. return 0;
  3291. case SRB_SA_UPDATE:
  3292. case SRB_SA_REPLACE:
  3293. case SRB_MB_IOCB:
  3294. case SRB_ABT_CMD:
  3295. case SRB_NACK_PLOGI:
  3296. case SRB_NACK_PRLI:
  3297. case SRB_NACK_LOGO:
  3298. case SRB_LOGOUT_CMD:
  3299. case SRB_CTRL_VP:
  3300. case SRB_MARKER:
  3301. default:
  3302. push_it_through = true;
  3303. get_exch = false;
  3304. }
  3305. sp->iores.res_type |= RESOURCE_IOCB;
  3306. sp->iores.iocb_cnt = 1;
  3307. if (get_exch) {
  3308. sp->iores.res_type |= RESOURCE_EXCH;
  3309. sp->iores.exch_cnt = 1;
  3310. }
  3311. if (push_it_through)
  3312. sp->iores.res_type |= RESOURCE_FORCE;
  3313. return qla_get_fw_resources(sp->qpair, &sp->iores);
  3314. }
  3315. static void
  3316. qla_marker_iocb(srb_t *sp, struct mrk_entry_24xx *mrk)
  3317. {
  3318. mrk->entry_type = MARKER_TYPE;
  3319. mrk->modifier = sp->u.iocb_cmd.u.tmf.modifier;
  3320. mrk->handle = make_handle(sp->qpair->req->id, sp->handle);
  3321. if (sp->u.iocb_cmd.u.tmf.modifier != MK_SYNC_ALL) {
  3322. mrk->nport_handle = cpu_to_le16(sp->u.iocb_cmd.u.tmf.loop_id);
  3323. int_to_scsilun(sp->u.iocb_cmd.u.tmf.lun, (struct scsi_lun *)&mrk->lun);
  3324. host_to_fcp_swap(mrk->lun, sizeof(mrk->lun));
  3325. mrk->vp_index = sp->u.iocb_cmd.u.tmf.vp_index;
  3326. }
  3327. }
  3328. int
  3329. qla2x00_start_sp(srb_t *sp)
  3330. {
  3331. int rval = QLA_SUCCESS;
  3332. scsi_qla_host_t *vha = sp->vha;
  3333. struct qla_hw_data *ha = vha->hw;
  3334. struct qla_qpair *qp = sp->qpair;
  3335. void *pkt;
  3336. unsigned long flags;
  3337. if (vha->hw->flags.eeh_busy)
  3338. return -EIO;
  3339. spin_lock_irqsave(qp->qp_lock_ptr, flags);
  3340. rval = qla_get_iocbs_resource(sp);
  3341. if (rval) {
  3342. spin_unlock_irqrestore(qp->qp_lock_ptr, flags);
  3343. return -EAGAIN;
  3344. }
  3345. pkt = __qla2x00_alloc_iocbs(sp->qpair, sp);
  3346. if (!pkt) {
  3347. rval = -EAGAIN;
  3348. ql_log(ql_log_warn, vha, 0x700c,
  3349. "qla2x00_alloc_iocbs failed.\n");
  3350. goto done;
  3351. }
  3352. switch (sp->type) {
  3353. case SRB_LOGIN_CMD:
  3354. IS_FWI2_CAPABLE(ha) ?
  3355. qla24xx_login_iocb(sp, pkt) :
  3356. qla2x00_login_iocb(sp, pkt);
  3357. break;
  3358. case SRB_PRLI_CMD:
  3359. qla24xx_prli_iocb(sp, pkt);
  3360. break;
  3361. case SRB_LOGOUT_CMD:
  3362. IS_FWI2_CAPABLE(ha) ?
  3363. qla24xx_logout_iocb(sp, pkt) :
  3364. qla2x00_logout_iocb(sp, pkt);
  3365. break;
  3366. case SRB_ELS_CMD_RPT:
  3367. case SRB_ELS_CMD_HST:
  3368. qla24xx_els_iocb(sp, pkt);
  3369. break;
  3370. case SRB_ELS_CMD_HST_NOLOGIN:
  3371. qla_els_pt_iocb(sp->vha, pkt, &sp->u.bsg_cmd.u.els_arg);
  3372. ((struct els_entry_24xx *)pkt)->handle = sp->handle;
  3373. break;
  3374. case SRB_CT_CMD:
  3375. IS_FWI2_CAPABLE(ha) ?
  3376. qla24xx_ct_iocb(sp, pkt) :
  3377. qla2x00_ct_iocb(sp, pkt);
  3378. break;
  3379. case SRB_ADISC_CMD:
  3380. IS_FWI2_CAPABLE(ha) ?
  3381. qla24xx_adisc_iocb(sp, pkt) :
  3382. qla2x00_adisc_iocb(sp, pkt);
  3383. break;
  3384. case SRB_TM_CMD:
  3385. IS_QLAFX00(ha) ?
  3386. qlafx00_tm_iocb(sp, pkt) :
  3387. qla24xx_tm_iocb(sp, pkt);
  3388. break;
  3389. case SRB_FXIOCB_DCMD:
  3390. case SRB_FXIOCB_BCMD:
  3391. qlafx00_fxdisc_iocb(sp, pkt);
  3392. break;
  3393. case SRB_NVME_LS:
  3394. qla_nvme_ls(sp, pkt);
  3395. break;
  3396. case SRB_ABT_CMD:
  3397. IS_QLAFX00(ha) ?
  3398. qlafx00_abort_iocb(sp, pkt) :
  3399. qla24xx_abort_iocb(sp, pkt);
  3400. break;
  3401. case SRB_ELS_DCMD:
  3402. qla24xx_els_logo_iocb(sp, pkt);
  3403. break;
  3404. case SRB_CT_PTHRU_CMD:
  3405. qla2x00_ctpthru_cmd_iocb(sp, pkt);
  3406. break;
  3407. case SRB_MB_IOCB:
  3408. qla2x00_mb_iocb(sp, pkt);
  3409. break;
  3410. case SRB_NACK_PLOGI:
  3411. case SRB_NACK_PRLI:
  3412. case SRB_NACK_LOGO:
  3413. qla2x00_send_notify_ack_iocb(sp, pkt);
  3414. break;
  3415. case SRB_CTRL_VP:
  3416. qla25xx_ctrlvp_iocb(sp, pkt);
  3417. break;
  3418. case SRB_PRLO_CMD:
  3419. qla24xx_prlo_iocb(sp, pkt);
  3420. break;
  3421. case SRB_SA_UPDATE:
  3422. qla24xx_sa_update_iocb(sp, pkt);
  3423. break;
  3424. case SRB_SA_REPLACE:
  3425. qla24xx_sa_replace_iocb(sp, pkt);
  3426. break;
  3427. case SRB_MARKER:
  3428. qla_marker_iocb(sp, pkt);
  3429. break;
  3430. default:
  3431. break;
  3432. }
  3433. if (sp->start_timer) {
  3434. /* ref: TMR timer ref
  3435. * this code should be just before start_iocbs function
  3436. * This will make sure that caller function don't to do
  3437. * kref_put even on failure
  3438. */
  3439. kref_get(&sp->cmd_kref);
  3440. add_timer(&sp->u.iocb_cmd.timer);
  3441. }
  3442. wmb();
  3443. qla2x00_start_iocbs(vha, qp->req);
  3444. done:
  3445. if (rval)
  3446. qla_put_fw_resources(sp->qpair, &sp->iores);
  3447. spin_unlock_irqrestore(qp->qp_lock_ptr, flags);
  3448. return rval;
  3449. }
  3450. static void
  3451. qla25xx_build_bidir_iocb(srb_t *sp, struct scsi_qla_host *vha,
  3452. struct cmd_bidir *cmd_pkt, uint32_t tot_dsds)
  3453. {
  3454. uint16_t avail_dsds;
  3455. struct dsd64 *cur_dsd;
  3456. uint32_t req_data_len = 0;
  3457. uint32_t rsp_data_len = 0;
  3458. struct scatterlist *sg;
  3459. int index;
  3460. int entry_count = 1;
  3461. struct bsg_job *bsg_job = sp->u.bsg_job;
  3462. /*Update entry type to indicate bidir command */
  3463. put_unaligned_le32(COMMAND_BIDIRECTIONAL, &cmd_pkt->entry_type);
  3464. /* Set the transfer direction, in this set both flags
  3465. * Also set the BD_WRAP_BACK flag, firmware will take care
  3466. * assigning DID=SID for outgoing pkts.
  3467. */
  3468. cmd_pkt->wr_dseg_count = cpu_to_le16(bsg_job->request_payload.sg_cnt);
  3469. cmd_pkt->rd_dseg_count = cpu_to_le16(bsg_job->reply_payload.sg_cnt);
  3470. cmd_pkt->control_flags = cpu_to_le16(BD_WRITE_DATA | BD_READ_DATA |
  3471. BD_WRAP_BACK);
  3472. req_data_len = rsp_data_len = bsg_job->request_payload.payload_len;
  3473. cmd_pkt->wr_byte_count = cpu_to_le32(req_data_len);
  3474. cmd_pkt->rd_byte_count = cpu_to_le32(rsp_data_len);
  3475. cmd_pkt->timeout = cpu_to_le16(qla2x00_get_async_timeout(vha) + 2);
  3476. vha->bidi_stats.transfer_bytes += req_data_len;
  3477. vha->bidi_stats.io_count++;
  3478. vha->qla_stats.output_bytes += req_data_len;
  3479. vha->qla_stats.output_requests++;
  3480. /* Only one dsd is available for bidirectional IOCB, remaining dsds
  3481. * are bundled in continuation iocb
  3482. */
  3483. avail_dsds = 1;
  3484. cur_dsd = &cmd_pkt->fcp_dsd;
  3485. index = 0;
  3486. for_each_sg(bsg_job->request_payload.sg_list, sg,
  3487. bsg_job->request_payload.sg_cnt, index) {
  3488. cont_a64_entry_t *cont_pkt;
  3489. /* Allocate additional continuation packets */
  3490. if (avail_dsds == 0) {
  3491. /* Continuation type 1 IOCB can accomodate
  3492. * 5 DSDS
  3493. */
  3494. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  3495. cur_dsd = cont_pkt->dsd;
  3496. avail_dsds = 5;
  3497. entry_count++;
  3498. }
  3499. append_dsd64(&cur_dsd, sg);
  3500. avail_dsds--;
  3501. }
  3502. /* For read request DSD will always goes to continuation IOCB
  3503. * and follow the write DSD. If there is room on the current IOCB
  3504. * then it is added to that IOCB else new continuation IOCB is
  3505. * allocated.
  3506. */
  3507. for_each_sg(bsg_job->reply_payload.sg_list, sg,
  3508. bsg_job->reply_payload.sg_cnt, index) {
  3509. cont_a64_entry_t *cont_pkt;
  3510. /* Allocate additional continuation packets */
  3511. if (avail_dsds == 0) {
  3512. /* Continuation type 1 IOCB can accomodate
  3513. * 5 DSDS
  3514. */
  3515. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  3516. cur_dsd = cont_pkt->dsd;
  3517. avail_dsds = 5;
  3518. entry_count++;
  3519. }
  3520. append_dsd64(&cur_dsd, sg);
  3521. avail_dsds--;
  3522. }
  3523. /* This value should be same as number of IOCB required for this cmd */
  3524. cmd_pkt->entry_count = entry_count;
  3525. }
  3526. int
  3527. qla2x00_start_bidir(srb_t *sp, struct scsi_qla_host *vha, uint32_t tot_dsds)
  3528. {
  3529. struct qla_hw_data *ha = vha->hw;
  3530. unsigned long flags;
  3531. uint32_t handle;
  3532. uint16_t req_cnt;
  3533. uint16_t cnt;
  3534. uint32_t *clr_ptr;
  3535. struct cmd_bidir *cmd_pkt = NULL;
  3536. struct rsp_que *rsp;
  3537. struct req_que *req;
  3538. int rval = EXT_STATUS_OK;
  3539. rval = QLA_SUCCESS;
  3540. rsp = ha->rsp_q_map[0];
  3541. req = vha->req;
  3542. /* Send marker if required */
  3543. if (vha->marker_needed != 0) {
  3544. if (qla2x00_marker(vha, ha->base_qpair,
  3545. 0, 0, MK_SYNC_ALL) != QLA_SUCCESS)
  3546. return EXT_STATUS_MAILBOX;
  3547. vha->marker_needed = 0;
  3548. }
  3549. /* Acquire ring specific lock */
  3550. spin_lock_irqsave(&ha->hardware_lock, flags);
  3551. handle = qla2xxx_get_next_handle(req);
  3552. if (handle == 0) {
  3553. rval = EXT_STATUS_BUSY;
  3554. goto queuing_error;
  3555. }
  3556. /* Calculate number of IOCB required */
  3557. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  3558. /* Check for room on request queue. */
  3559. if (req->cnt < req_cnt + 2) {
  3560. if (IS_SHADOW_REG_CAPABLE(ha)) {
  3561. cnt = *req->out_ptr;
  3562. } else {
  3563. cnt = rd_reg_dword_relaxed(req->req_q_out);
  3564. if (qla2x00_check_reg16_for_disconnect(vha, cnt))
  3565. goto queuing_error;
  3566. }
  3567. if (req->ring_index < cnt)
  3568. req->cnt = cnt - req->ring_index;
  3569. else
  3570. req->cnt = req->length -
  3571. (req->ring_index - cnt);
  3572. }
  3573. if (req->cnt < req_cnt + 2) {
  3574. rval = EXT_STATUS_BUSY;
  3575. goto queuing_error;
  3576. }
  3577. cmd_pkt = (struct cmd_bidir *)req->ring_ptr;
  3578. cmd_pkt->handle = make_handle(req->id, handle);
  3579. /* Zero out remaining portion of packet. */
  3580. /* tagged queuing modifier -- default is TSK_SIMPLE (0).*/
  3581. clr_ptr = (uint32_t *)cmd_pkt + 2;
  3582. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  3583. /* Set NPORT-ID (of vha)*/
  3584. cmd_pkt->nport_handle = cpu_to_le16(vha->self_login_loop_id);
  3585. cmd_pkt->port_id[0] = vha->d_id.b.al_pa;
  3586. cmd_pkt->port_id[1] = vha->d_id.b.area;
  3587. cmd_pkt->port_id[2] = vha->d_id.b.domain;
  3588. qla25xx_build_bidir_iocb(sp, vha, cmd_pkt, tot_dsds);
  3589. cmd_pkt->entry_status = (uint8_t) rsp->id;
  3590. /* Build command packet. */
  3591. req->current_outstanding_cmd = handle;
  3592. req->outstanding_cmds[handle] = sp;
  3593. sp->handle = handle;
  3594. req->cnt -= req_cnt;
  3595. /* Send the command to the firmware */
  3596. wmb();
  3597. qla2x00_start_iocbs(vha, req);
  3598. queuing_error:
  3599. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3600. return rval;
  3601. }