ism.h 4.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #ifndef S390_ISM_H
  3. #define S390_ISM_H
  4. #include <linux/spinlock.h>
  5. #include <linux/types.h>
  6. #include <linux/pci.h>
  7. #include <net/smc.h>
  8. #include <asm/pci_insn.h>
  9. #define UTIL_STR_LEN 16
  10. /*
  11. * Do not use the first word of the DMB bits to ensure 8 byte aligned access.
  12. */
  13. #define ISM_DMB_WORD_OFFSET 1
  14. #define ISM_DMB_BIT_OFFSET (ISM_DMB_WORD_OFFSET * 32)
  15. #define ISM_NR_DMBS 1920
  16. #define ISM_IDENT_MASK 0x00FFFF
  17. #define ISM_REG_SBA 0x1
  18. #define ISM_REG_IEQ 0x2
  19. #define ISM_READ_GID 0x3
  20. #define ISM_ADD_VLAN_ID 0x4
  21. #define ISM_DEL_VLAN_ID 0x5
  22. #define ISM_SET_VLAN 0x6
  23. #define ISM_RESET_VLAN 0x7
  24. #define ISM_QUERY_INFO 0x8
  25. #define ISM_QUERY_RGID 0x9
  26. #define ISM_REG_DMB 0xA
  27. #define ISM_UNREG_DMB 0xB
  28. #define ISM_SIGNAL_IEQ 0xE
  29. #define ISM_UNREG_SBA 0x11
  30. #define ISM_UNREG_IEQ 0x12
  31. struct ism_req_hdr {
  32. u32 cmd;
  33. u16 : 16;
  34. u16 len;
  35. };
  36. struct ism_resp_hdr {
  37. u32 cmd;
  38. u16 ret;
  39. u16 len;
  40. };
  41. union ism_reg_sba {
  42. struct {
  43. struct ism_req_hdr hdr;
  44. u64 sba;
  45. } request;
  46. struct {
  47. struct ism_resp_hdr hdr;
  48. } response;
  49. } __aligned(16);
  50. union ism_reg_ieq {
  51. struct {
  52. struct ism_req_hdr hdr;
  53. u64 ieq;
  54. u64 len;
  55. } request;
  56. struct {
  57. struct ism_resp_hdr hdr;
  58. } response;
  59. } __aligned(16);
  60. union ism_read_gid {
  61. struct {
  62. struct ism_req_hdr hdr;
  63. } request;
  64. struct {
  65. struct ism_resp_hdr hdr;
  66. u64 gid;
  67. } response;
  68. } __aligned(16);
  69. union ism_qi {
  70. struct {
  71. struct ism_req_hdr hdr;
  72. } request;
  73. struct {
  74. struct ism_resp_hdr hdr;
  75. u32 version;
  76. u32 max_len;
  77. u64 ism_state;
  78. u64 my_gid;
  79. u64 sba;
  80. u64 ieq;
  81. u32 ieq_len;
  82. u32 : 32;
  83. u32 dmbs_owned;
  84. u32 dmbs_used;
  85. u32 vlan_required;
  86. u32 vlan_nr_ids;
  87. u16 vlan_id[64];
  88. } response;
  89. } __aligned(64);
  90. union ism_query_rgid {
  91. struct {
  92. struct ism_req_hdr hdr;
  93. u64 rgid;
  94. u32 vlan_valid;
  95. u32 vlan_id;
  96. } request;
  97. struct {
  98. struct ism_resp_hdr hdr;
  99. } response;
  100. } __aligned(16);
  101. union ism_reg_dmb {
  102. struct {
  103. struct ism_req_hdr hdr;
  104. u64 dmb;
  105. u32 dmb_len;
  106. u32 sba_idx;
  107. u32 vlan_valid;
  108. u32 vlan_id;
  109. u64 rgid;
  110. } request;
  111. struct {
  112. struct ism_resp_hdr hdr;
  113. u64 dmb_tok;
  114. } response;
  115. } __aligned(32);
  116. union ism_sig_ieq {
  117. struct {
  118. struct ism_req_hdr hdr;
  119. u64 rgid;
  120. u32 trigger_irq;
  121. u32 event_code;
  122. u64 info;
  123. } request;
  124. struct {
  125. struct ism_resp_hdr hdr;
  126. } response;
  127. } __aligned(32);
  128. union ism_unreg_dmb {
  129. struct {
  130. struct ism_req_hdr hdr;
  131. u64 dmb_tok;
  132. } request;
  133. struct {
  134. struct ism_resp_hdr hdr;
  135. } response;
  136. } __aligned(16);
  137. union ism_cmd_simple {
  138. struct {
  139. struct ism_req_hdr hdr;
  140. } request;
  141. struct {
  142. struct ism_resp_hdr hdr;
  143. } response;
  144. } __aligned(8);
  145. union ism_set_vlan_id {
  146. struct {
  147. struct ism_req_hdr hdr;
  148. u64 vlan_id;
  149. } request;
  150. struct {
  151. struct ism_resp_hdr hdr;
  152. } response;
  153. } __aligned(16);
  154. struct ism_eq_header {
  155. u64 idx;
  156. u64 ieq_len;
  157. u64 entry_len;
  158. u64 : 64;
  159. };
  160. struct ism_eq {
  161. struct ism_eq_header header;
  162. struct smcd_event entry[15];
  163. };
  164. struct ism_sba {
  165. u32 s : 1; /* summary bit */
  166. u32 e : 1; /* event bit */
  167. u32 : 30;
  168. u32 dmb_bits[ISM_NR_DMBS / 32];
  169. u32 reserved[3];
  170. u16 dmbe_mask[ISM_NR_DMBS];
  171. };
  172. struct ism_dev {
  173. spinlock_t lock;
  174. struct pci_dev *pdev;
  175. struct smcd_dev *smcd;
  176. struct ism_sba *sba;
  177. dma_addr_t sba_dma_addr;
  178. DECLARE_BITMAP(sba_bitmap, ISM_NR_DMBS);
  179. struct ism_eq *ieq;
  180. dma_addr_t ieq_dma_addr;
  181. int ieq_idx;
  182. };
  183. #define ISM_CREATE_REQ(dmb, idx, sf, offset) \
  184. ((dmb) | (idx) << 24 | (sf) << 23 | (offset))
  185. struct ism_systemeid {
  186. u8 seid_string[24];
  187. u8 serial_number[4];
  188. u8 type[4];
  189. };
  190. static inline void __ism_read_cmd(struct ism_dev *ism, void *data,
  191. unsigned long offset, unsigned long len)
  192. {
  193. struct zpci_dev *zdev = to_zpci(ism->pdev);
  194. u64 req = ZPCI_CREATE_REQ(zdev->fh, 2, 8);
  195. while (len > 0) {
  196. __zpci_load(data, req, offset);
  197. offset += 8;
  198. data += 8;
  199. len -= 8;
  200. }
  201. }
  202. static inline void __ism_write_cmd(struct ism_dev *ism, void *data,
  203. unsigned long offset, unsigned long len)
  204. {
  205. struct zpci_dev *zdev = to_zpci(ism->pdev);
  206. u64 req = ZPCI_CREATE_REQ(zdev->fh, 2, len);
  207. if (len)
  208. __zpci_store_block(data, req, offset);
  209. }
  210. static inline int __ism_move(struct ism_dev *ism, u64 dmb_req, void *data,
  211. unsigned int size)
  212. {
  213. struct zpci_dev *zdev = to_zpci(ism->pdev);
  214. u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, size);
  215. return __zpci_store_block(data, req, dmb_req);
  216. }
  217. #endif /* S390_ISM_H */