qcom_glink_smem.c 7.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2016, Linaro Ltd
  4. */
  5. #include <linux/io.h>
  6. #include <linux/module.h>
  7. #include <linux/of.h>
  8. #include <linux/of_address.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mfd/syscon.h>
  12. #include <linux/slab.h>
  13. #include <linux/rpmsg.h>
  14. #include <linux/idr.h>
  15. #include <linux/circ_buf.h>
  16. #include <linux/soc/qcom/smem.h>
  17. #include <linux/sizes.h>
  18. #include <linux/delay.h>
  19. #include <linux/regmap.h>
  20. #include <linux/workqueue.h>
  21. #include <linux/list.h>
  22. #include <linux/rpmsg/qcom_glink.h>
  23. #include "qcom_glink_native.h"
  24. #define FIFO_FULL_RESERVE 8
  25. #define FIFO_ALIGNMENT 8
  26. #define TX_BLOCKED_CMD_RESERVE 8 /* size of struct read_notif_request */
  27. #define SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR 478
  28. #define SMEM_GLINK_NATIVE_XPRT_FIFO_0 479
  29. #define SMEM_GLINK_NATIVE_XPRT_FIFO_1 480
  30. struct glink_smem_pipe {
  31. struct qcom_glink_pipe native;
  32. __le32 *tail;
  33. __le32 *head;
  34. void *fifo;
  35. int remote_pid;
  36. };
  37. #define to_smem_pipe(p) container_of(p, struct glink_smem_pipe, native)
  38. static size_t glink_smem_rx_avail(struct qcom_glink_pipe *np)
  39. {
  40. struct glink_smem_pipe *pipe = to_smem_pipe(np);
  41. size_t len;
  42. void *fifo;
  43. u32 head;
  44. u32 tail;
  45. if (!pipe->fifo) {
  46. fifo = qcom_smem_get(pipe->remote_pid,
  47. SMEM_GLINK_NATIVE_XPRT_FIFO_1, &len);
  48. if (IS_ERR(fifo)) {
  49. pr_err("failed to acquire RX fifo handle: %ld\n",
  50. PTR_ERR(fifo));
  51. return 0;
  52. }
  53. pipe->fifo = fifo;
  54. pipe->native.length = len;
  55. }
  56. head = le32_to_cpu(*pipe->head);
  57. tail = le32_to_cpu(*pipe->tail);
  58. if (head < tail)
  59. len = pipe->native.length - tail + head;
  60. else
  61. len = head - tail;
  62. if (WARN_ON_ONCE(len > pipe->native.length))
  63. len = 0;
  64. return len;
  65. }
  66. static void glink_smem_rx_peak(struct qcom_glink_pipe *np,
  67. void *data, unsigned int offset, size_t count)
  68. {
  69. struct glink_smem_pipe *pipe = to_smem_pipe(np);
  70. size_t len;
  71. u32 tail;
  72. tail = le32_to_cpu(*pipe->tail);
  73. if (WARN_ON_ONCE(tail > pipe->native.length))
  74. return;
  75. tail += offset;
  76. if (tail >= pipe->native.length)
  77. tail -= pipe->native.length;
  78. len = min_t(size_t, count, pipe->native.length - tail);
  79. if (len)
  80. memcpy_fromio(data, pipe->fifo + tail, len);
  81. if (len != count)
  82. memcpy_fromio(data + len, pipe->fifo, (count - len));
  83. }
  84. static void glink_smem_rx_advance(struct qcom_glink_pipe *np,
  85. size_t count)
  86. {
  87. struct glink_smem_pipe *pipe = to_smem_pipe(np);
  88. u32 tail;
  89. tail = le32_to_cpu(*pipe->tail);
  90. tail += count;
  91. if (tail >= pipe->native.length)
  92. tail %= pipe->native.length;
  93. *pipe->tail = cpu_to_le32(tail);
  94. }
  95. static size_t glink_smem_tx_avail(struct qcom_glink_pipe *np)
  96. {
  97. struct glink_smem_pipe *pipe = to_smem_pipe(np);
  98. u32 head;
  99. u32 tail;
  100. u32 avail;
  101. head = le32_to_cpu(*pipe->head);
  102. tail = le32_to_cpu(*pipe->tail);
  103. if (tail <= head)
  104. avail = pipe->native.length - head + tail;
  105. else
  106. avail = tail - head;
  107. if (avail < (FIFO_FULL_RESERVE + TX_BLOCKED_CMD_RESERVE))
  108. avail = 0;
  109. else
  110. avail -= FIFO_FULL_RESERVE + TX_BLOCKED_CMD_RESERVE;
  111. if (WARN_ON_ONCE(avail > pipe->native.length))
  112. avail = 0;
  113. return avail;
  114. }
  115. static unsigned int glink_smem_tx_write_one(struct glink_smem_pipe *pipe,
  116. unsigned int head,
  117. const void *data, size_t count)
  118. {
  119. size_t len;
  120. if (WARN_ON_ONCE(head > pipe->native.length))
  121. return head;
  122. len = min_t(size_t, count, pipe->native.length - head);
  123. if (len)
  124. memcpy(pipe->fifo + head, data, len);
  125. if (len != count)
  126. memcpy(pipe->fifo, data + len, count - len);
  127. head += count;
  128. if (head >= pipe->native.length)
  129. head -= pipe->native.length;
  130. return head;
  131. }
  132. static void glink_smem_tx_write(struct qcom_glink_pipe *glink_pipe,
  133. const void *hdr, size_t hlen,
  134. const void *data, size_t dlen)
  135. {
  136. struct glink_smem_pipe *pipe = to_smem_pipe(glink_pipe);
  137. unsigned int head;
  138. head = le32_to_cpu(*pipe->head);
  139. head = glink_smem_tx_write_one(pipe, head, hdr, hlen);
  140. head = glink_smem_tx_write_one(pipe, head, data, dlen);
  141. /* Ensure head is always aligned to 8 bytes */
  142. head = ALIGN(head, 8);
  143. if (head >= pipe->native.length)
  144. head -= pipe->native.length;
  145. /* Ensure ordering of fifo and head update */
  146. wmb();
  147. *pipe->head = cpu_to_le32(head);
  148. }
  149. static void qcom_glink_smem_release(struct device *dev)
  150. {
  151. kfree(dev);
  152. }
  153. struct qcom_glink *qcom_glink_smem_register(struct device *parent,
  154. struct device_node *node)
  155. {
  156. struct glink_smem_pipe *rx_pipe;
  157. struct glink_smem_pipe *tx_pipe;
  158. struct qcom_glink *glink;
  159. struct device *dev;
  160. u32 remote_pid;
  161. __le32 *descs;
  162. size_t size;
  163. int ret;
  164. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  165. if (!dev)
  166. return ERR_PTR(-ENOMEM);
  167. dev->parent = parent;
  168. dev->of_node = node;
  169. dev->release = qcom_glink_smem_release;
  170. dev_set_name(dev, "%s:%pOFn", dev_name(parent->parent), node);
  171. ret = device_register(dev);
  172. if (ret) {
  173. pr_err("failed to register glink edge\n");
  174. put_device(dev);
  175. return ERR_PTR(ret);
  176. }
  177. ret = of_property_read_u32(dev->of_node, "qcom,remote-pid",
  178. &remote_pid);
  179. if (ret) {
  180. dev_err(dev, "failed to parse qcom,remote-pid\n");
  181. goto err_put_dev;
  182. }
  183. rx_pipe = devm_kzalloc(dev, sizeof(*rx_pipe), GFP_KERNEL);
  184. tx_pipe = devm_kzalloc(dev, sizeof(*tx_pipe), GFP_KERNEL);
  185. if (!rx_pipe || !tx_pipe) {
  186. ret = -ENOMEM;
  187. goto err_put_dev;
  188. }
  189. ret = qcom_smem_alloc(remote_pid,
  190. SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR, 32);
  191. if (ret && ret != -EEXIST) {
  192. dev_err(dev, "failed to allocate glink descriptors\n");
  193. goto err_put_dev;
  194. }
  195. descs = qcom_smem_get(remote_pid,
  196. SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR, &size);
  197. if (IS_ERR(descs)) {
  198. dev_err(dev, "failed to acquire xprt descriptor\n");
  199. ret = PTR_ERR(descs);
  200. goto err_put_dev;
  201. }
  202. if (size != 32) {
  203. dev_err(dev, "glink descriptor of invalid size\n");
  204. ret = -EINVAL;
  205. goto err_put_dev;
  206. }
  207. tx_pipe->tail = &descs[0];
  208. tx_pipe->head = &descs[1];
  209. rx_pipe->tail = &descs[2];
  210. rx_pipe->head = &descs[3];
  211. ret = qcom_smem_alloc(remote_pid, SMEM_GLINK_NATIVE_XPRT_FIFO_0,
  212. SZ_16K);
  213. if (ret && ret != -EEXIST) {
  214. dev_err(dev, "failed to allocate TX fifo\n");
  215. goto err_put_dev;
  216. }
  217. tx_pipe->fifo = qcom_smem_get(remote_pid, SMEM_GLINK_NATIVE_XPRT_FIFO_0,
  218. &tx_pipe->native.length);
  219. if (IS_ERR(tx_pipe->fifo)) {
  220. dev_err(dev, "failed to acquire TX fifo\n");
  221. ret = PTR_ERR(tx_pipe->fifo);
  222. goto err_put_dev;
  223. }
  224. rx_pipe->native.avail = glink_smem_rx_avail;
  225. rx_pipe->native.peak = glink_smem_rx_peak;
  226. rx_pipe->native.advance = glink_smem_rx_advance;
  227. rx_pipe->remote_pid = remote_pid;
  228. tx_pipe->native.avail = glink_smem_tx_avail;
  229. tx_pipe->native.write = glink_smem_tx_write;
  230. tx_pipe->remote_pid = remote_pid;
  231. *rx_pipe->tail = 0;
  232. *tx_pipe->head = 0;
  233. glink = qcom_glink_native_probe(dev,
  234. GLINK_FEATURE_INTENT_REUSE | GLINK_FEATURE_ZERO_COPY,
  235. &rx_pipe->native, &tx_pipe->native,
  236. false);
  237. if (IS_ERR(glink)) {
  238. ret = PTR_ERR(glink);
  239. goto err_put_dev;
  240. }
  241. return glink;
  242. err_put_dev:
  243. device_unregister(dev);
  244. return ERR_PTR(ret);
  245. }
  246. EXPORT_SYMBOL_GPL(qcom_glink_smem_register);
  247. int qcom_glink_smem_start(struct qcom_glink *glink)
  248. {
  249. return qcom_glink_native_start(glink);
  250. }
  251. EXPORT_SYMBOL(qcom_glink_smem_start);
  252. void qcom_glink_smem_unregister(struct qcom_glink *glink)
  253. {
  254. if (!glink)
  255. return;
  256. qcom_glink_native_remove(glink);
  257. qcom_glink_native_unregister(glink);
  258. }
  259. EXPORT_SYMBOL_GPL(qcom_glink_smem_unregister);
  260. MODULE_AUTHOR("Bjorn Andersson <[email protected]>");
  261. MODULE_DESCRIPTION("Qualcomm GLINK SMEM driver");
  262. MODULE_LICENSE("GPL v2");