omap_remoteproc.c 36 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * OMAP Remote Processor driver
  4. *
  5. * Copyright (C) 2011-2020 Texas Instruments Incorporated - http://www.ti.com/
  6. * Copyright (C) 2011 Google, Inc.
  7. *
  8. * Ohad Ben-Cohen <[email protected]>
  9. * Brian Swetland <[email protected]>
  10. * Fernando Guzman Lugo <[email protected]>
  11. * Mark Grosen <[email protected]>
  12. * Suman Anna <[email protected]>
  13. * Hari Kanigeri <[email protected]>
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/clk.h>
  18. #include <linux/clk/ti.h>
  19. #include <linux/err.h>
  20. #include <linux/io.h>
  21. #include <linux/of_device.h>
  22. #include <linux/of_reserved_mem.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/pm_runtime.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/remoteproc.h>
  28. #include <linux/mailbox_client.h>
  29. #include <linux/omap-iommu.h>
  30. #include <linux/omap-mailbox.h>
  31. #include <linux/regmap.h>
  32. #include <linux/mfd/syscon.h>
  33. #include <linux/reset.h>
  34. #include <clocksource/timer-ti-dm.h>
  35. #include <linux/platform_data/dmtimer-omap.h>
  36. #include "omap_remoteproc.h"
  37. #include "remoteproc_internal.h"
  38. /* default auto-suspend delay (ms) */
  39. #define DEFAULT_AUTOSUSPEND_DELAY 10000
  40. /**
  41. * struct omap_rproc_boot_data - boot data structure for the DSP omap rprocs
  42. * @syscon: regmap handle for the system control configuration module
  43. * @boot_reg: boot register offset within the @syscon regmap
  44. * @boot_reg_shift: bit-field shift required for the boot address value in
  45. * @boot_reg
  46. */
  47. struct omap_rproc_boot_data {
  48. struct regmap *syscon;
  49. unsigned int boot_reg;
  50. unsigned int boot_reg_shift;
  51. };
  52. /**
  53. * struct omap_rproc_mem - internal memory structure
  54. * @cpu_addr: MPU virtual address of the memory region
  55. * @bus_addr: bus address used to access the memory region
  56. * @dev_addr: device address of the memory region from DSP view
  57. * @size: size of the memory region
  58. */
  59. struct omap_rproc_mem {
  60. void __iomem *cpu_addr;
  61. phys_addr_t bus_addr;
  62. u32 dev_addr;
  63. size_t size;
  64. };
  65. /**
  66. * struct omap_rproc_timer - data structure for a timer used by a omap rproc
  67. * @odt: timer pointer
  68. * @timer_ops: OMAP dmtimer ops for @odt timer
  69. * @irq: timer irq
  70. */
  71. struct omap_rproc_timer {
  72. struct omap_dm_timer *odt;
  73. const struct omap_dm_timer_ops *timer_ops;
  74. int irq;
  75. };
  76. /**
  77. * struct omap_rproc - omap remote processor state
  78. * @mbox: mailbox channel handle
  79. * @client: mailbox client to request the mailbox channel
  80. * @boot_data: boot data structure for setting processor boot address
  81. * @mem: internal memory regions data
  82. * @num_mems: number of internal memory regions
  83. * @num_timers: number of rproc timer(s)
  84. * @num_wd_timers: number of rproc watchdog timers
  85. * @timers: timer(s) info used by rproc
  86. * @autosuspend_delay: auto-suspend delay value to be used for runtime pm
  87. * @need_resume: if true a resume is needed in the system resume callback
  88. * @rproc: rproc handle
  89. * @reset: reset handle
  90. * @pm_comp: completion primitive to sync for suspend response
  91. * @fck: functional clock for the remoteproc
  92. * @suspend_acked: state machine flag to store the suspend request ack
  93. */
  94. struct omap_rproc {
  95. struct mbox_chan *mbox;
  96. struct mbox_client client;
  97. struct omap_rproc_boot_data *boot_data;
  98. struct omap_rproc_mem *mem;
  99. int num_mems;
  100. int num_timers;
  101. int num_wd_timers;
  102. struct omap_rproc_timer *timers;
  103. int autosuspend_delay;
  104. bool need_resume;
  105. struct rproc *rproc;
  106. struct reset_control *reset;
  107. struct completion pm_comp;
  108. struct clk *fck;
  109. bool suspend_acked;
  110. };
  111. /**
  112. * struct omap_rproc_mem_data - memory definitions for an omap remote processor
  113. * @name: name for this memory entry
  114. * @dev_addr: device address for the memory entry
  115. */
  116. struct omap_rproc_mem_data {
  117. const char *name;
  118. const u32 dev_addr;
  119. };
  120. /**
  121. * struct omap_rproc_dev_data - device data for the omap remote processor
  122. * @device_name: device name of the remote processor
  123. * @mems: memory definitions for this remote processor
  124. */
  125. struct omap_rproc_dev_data {
  126. const char *device_name;
  127. const struct omap_rproc_mem_data *mems;
  128. };
  129. /**
  130. * omap_rproc_request_timer() - request a timer for a remoteproc
  131. * @dev: device requesting the timer
  132. * @np: device node pointer to the desired timer
  133. * @timer: handle to a struct omap_rproc_timer to return the timer handle
  134. *
  135. * This helper function is used primarily to request a timer associated with
  136. * a remoteproc. The returned handle is stored in the .odt field of the
  137. * @timer structure passed in, and is used to invoke other timer specific
  138. * ops (like starting a timer either during device initialization or during
  139. * a resume operation, or for stopping/freeing a timer).
  140. *
  141. * Return: 0 on success, otherwise an appropriate failure
  142. */
  143. static int omap_rproc_request_timer(struct device *dev, struct device_node *np,
  144. struct omap_rproc_timer *timer)
  145. {
  146. int ret;
  147. timer->odt = timer->timer_ops->request_by_node(np);
  148. if (!timer->odt) {
  149. dev_err(dev, "request for timer node %p failed\n", np);
  150. return -EBUSY;
  151. }
  152. ret = timer->timer_ops->set_source(timer->odt, OMAP_TIMER_SRC_SYS_CLK);
  153. if (ret) {
  154. dev_err(dev, "error setting OMAP_TIMER_SRC_SYS_CLK as source for timer node %p\n",
  155. np);
  156. timer->timer_ops->free(timer->odt);
  157. return ret;
  158. }
  159. /* clean counter, remoteproc code will set the value */
  160. timer->timer_ops->set_load(timer->odt, 0);
  161. return 0;
  162. }
  163. /**
  164. * omap_rproc_start_timer() - start a timer for a remoteproc
  165. * @timer: handle to a OMAP rproc timer
  166. *
  167. * This helper function is used to start a timer associated with a remoteproc,
  168. * obtained using the request_timer ops. The helper function needs to be
  169. * invoked by the driver to start the timer (during device initialization)
  170. * or to just resume the timer.
  171. *
  172. * Return: 0 on success, otherwise a failure as returned by DMTimer ops
  173. */
  174. static inline int omap_rproc_start_timer(struct omap_rproc_timer *timer)
  175. {
  176. return timer->timer_ops->start(timer->odt);
  177. }
  178. /**
  179. * omap_rproc_stop_timer() - stop a timer for a remoteproc
  180. * @timer: handle to a OMAP rproc timer
  181. *
  182. * This helper function is used to disable a timer associated with a
  183. * remoteproc, and needs to be called either during a device shutdown
  184. * or suspend operation. The separate helper function allows the driver
  185. * to just stop a timer without having to release the timer during a
  186. * suspend operation.
  187. *
  188. * Return: 0 on success, otherwise a failure as returned by DMTimer ops
  189. */
  190. static inline int omap_rproc_stop_timer(struct omap_rproc_timer *timer)
  191. {
  192. return timer->timer_ops->stop(timer->odt);
  193. }
  194. /**
  195. * omap_rproc_release_timer() - release a timer for a remoteproc
  196. * @timer: handle to a OMAP rproc timer
  197. *
  198. * This helper function is used primarily to release a timer associated
  199. * with a remoteproc. The dmtimer will be available for other clients to
  200. * use once released.
  201. *
  202. * Return: 0 on success, otherwise a failure as returned by DMTimer ops
  203. */
  204. static inline int omap_rproc_release_timer(struct omap_rproc_timer *timer)
  205. {
  206. return timer->timer_ops->free(timer->odt);
  207. }
  208. /**
  209. * omap_rproc_get_timer_irq() - get the irq for a timer
  210. * @timer: handle to a OMAP rproc timer
  211. *
  212. * This function is used to get the irq associated with a watchdog timer. The
  213. * function is called by the OMAP remoteproc driver to register a interrupt
  214. * handler to handle watchdog events on the remote processor.
  215. *
  216. * Return: irq id on success, otherwise a failure as returned by DMTimer ops
  217. */
  218. static inline int omap_rproc_get_timer_irq(struct omap_rproc_timer *timer)
  219. {
  220. return timer->timer_ops->get_irq(timer->odt);
  221. }
  222. /**
  223. * omap_rproc_ack_timer_irq() - acknowledge a timer irq
  224. * @timer: handle to a OMAP rproc timer
  225. *
  226. * This function is used to clear the irq associated with a watchdog timer.
  227. * The function is called by the OMAP remoteproc upon a watchdog event on the
  228. * remote processor to clear the interrupt status of the watchdog timer.
  229. */
  230. static inline void omap_rproc_ack_timer_irq(struct omap_rproc_timer *timer)
  231. {
  232. timer->timer_ops->write_status(timer->odt, OMAP_TIMER_INT_OVERFLOW);
  233. }
  234. /**
  235. * omap_rproc_watchdog_isr() - Watchdog ISR handler for remoteproc device
  236. * @irq: IRQ number associated with a watchdog timer
  237. * @data: IRQ handler data
  238. *
  239. * This ISR routine executes the required necessary low-level code to
  240. * acknowledge a watchdog timer interrupt. There can be multiple watchdog
  241. * timers associated with a rproc (like IPUs which have 2 watchdog timers,
  242. * one per Cortex M3/M4 core), so a lookup has to be performed to identify
  243. * the timer to acknowledge its interrupt.
  244. *
  245. * The function also invokes rproc_report_crash to report the watchdog event
  246. * to the remoteproc driver core, to trigger a recovery.
  247. *
  248. * Return: IRQ_HANDLED on success, otherwise IRQ_NONE
  249. */
  250. static irqreturn_t omap_rproc_watchdog_isr(int irq, void *data)
  251. {
  252. struct rproc *rproc = data;
  253. struct omap_rproc *oproc = rproc->priv;
  254. struct device *dev = rproc->dev.parent;
  255. struct omap_rproc_timer *timers = oproc->timers;
  256. struct omap_rproc_timer *wd_timer = NULL;
  257. int num_timers = oproc->num_timers + oproc->num_wd_timers;
  258. int i;
  259. for (i = oproc->num_timers; i < num_timers; i++) {
  260. if (timers[i].irq > 0 && irq == timers[i].irq) {
  261. wd_timer = &timers[i];
  262. break;
  263. }
  264. }
  265. if (!wd_timer) {
  266. dev_err(dev, "invalid timer\n");
  267. return IRQ_NONE;
  268. }
  269. omap_rproc_ack_timer_irq(wd_timer);
  270. rproc_report_crash(rproc, RPROC_WATCHDOG);
  271. return IRQ_HANDLED;
  272. }
  273. /**
  274. * omap_rproc_enable_timers() - enable the timers for a remoteproc
  275. * @rproc: handle of a remote processor
  276. * @configure: boolean flag used to acquire and configure the timer handle
  277. *
  278. * This function is used primarily to enable the timers associated with
  279. * a remoteproc. The configure flag is provided to allow the driver
  280. * to either acquire and start a timer (during device initialization) or
  281. * to just start a timer (during a resume operation).
  282. *
  283. * Return: 0 on success, otherwise an appropriate failure
  284. */
  285. static int omap_rproc_enable_timers(struct rproc *rproc, bool configure)
  286. {
  287. int i;
  288. int ret = 0;
  289. struct platform_device *tpdev;
  290. struct dmtimer_platform_data *tpdata;
  291. const struct omap_dm_timer_ops *timer_ops;
  292. struct omap_rproc *oproc = rproc->priv;
  293. struct omap_rproc_timer *timers = oproc->timers;
  294. struct device *dev = rproc->dev.parent;
  295. struct device_node *np = NULL;
  296. int num_timers = oproc->num_timers + oproc->num_wd_timers;
  297. if (!num_timers)
  298. return 0;
  299. if (!configure)
  300. goto start_timers;
  301. for (i = 0; i < num_timers; i++) {
  302. if (i < oproc->num_timers)
  303. np = of_parse_phandle(dev->of_node, "ti,timers", i);
  304. else
  305. np = of_parse_phandle(dev->of_node,
  306. "ti,watchdog-timers",
  307. (i - oproc->num_timers));
  308. if (!np) {
  309. ret = -ENXIO;
  310. dev_err(dev, "device node lookup for timer at index %d failed: %d\n",
  311. i < oproc->num_timers ? i :
  312. i - oproc->num_timers, ret);
  313. goto free_timers;
  314. }
  315. tpdev = of_find_device_by_node(np);
  316. if (!tpdev) {
  317. ret = -ENODEV;
  318. dev_err(dev, "could not get timer platform device\n");
  319. goto put_node;
  320. }
  321. tpdata = dev_get_platdata(&tpdev->dev);
  322. put_device(&tpdev->dev);
  323. if (!tpdata) {
  324. ret = -EINVAL;
  325. dev_err(dev, "dmtimer pdata structure NULL\n");
  326. goto put_node;
  327. }
  328. timer_ops = tpdata->timer_ops;
  329. if (!timer_ops || !timer_ops->request_by_node ||
  330. !timer_ops->set_source || !timer_ops->set_load ||
  331. !timer_ops->free || !timer_ops->start ||
  332. !timer_ops->stop || !timer_ops->get_irq ||
  333. !timer_ops->write_status) {
  334. ret = -EINVAL;
  335. dev_err(dev, "device does not have required timer ops\n");
  336. goto put_node;
  337. }
  338. timers[i].irq = -1;
  339. timers[i].timer_ops = timer_ops;
  340. ret = omap_rproc_request_timer(dev, np, &timers[i]);
  341. if (ret) {
  342. dev_err(dev, "request for timer %p failed: %d\n", np,
  343. ret);
  344. goto put_node;
  345. }
  346. of_node_put(np);
  347. if (i >= oproc->num_timers) {
  348. timers[i].irq = omap_rproc_get_timer_irq(&timers[i]);
  349. if (timers[i].irq < 0) {
  350. dev_err(dev, "get_irq for timer %p failed: %d\n",
  351. np, timers[i].irq);
  352. ret = -EBUSY;
  353. goto free_timers;
  354. }
  355. ret = request_irq(timers[i].irq,
  356. omap_rproc_watchdog_isr, IRQF_SHARED,
  357. "rproc-wdt", rproc);
  358. if (ret) {
  359. dev_err(dev, "error requesting irq for timer %p\n",
  360. np);
  361. omap_rproc_release_timer(&timers[i]);
  362. timers[i].odt = NULL;
  363. timers[i].timer_ops = NULL;
  364. timers[i].irq = -1;
  365. goto free_timers;
  366. }
  367. }
  368. }
  369. start_timers:
  370. for (i = 0; i < num_timers; i++) {
  371. ret = omap_rproc_start_timer(&timers[i]);
  372. if (ret) {
  373. dev_err(dev, "start timer %p failed failed: %d\n", np,
  374. ret);
  375. break;
  376. }
  377. }
  378. if (ret) {
  379. while (i >= 0) {
  380. omap_rproc_stop_timer(&timers[i]);
  381. i--;
  382. }
  383. goto put_node;
  384. }
  385. return 0;
  386. put_node:
  387. if (configure)
  388. of_node_put(np);
  389. free_timers:
  390. while (i--) {
  391. if (i >= oproc->num_timers)
  392. free_irq(timers[i].irq, rproc);
  393. omap_rproc_release_timer(&timers[i]);
  394. timers[i].odt = NULL;
  395. timers[i].timer_ops = NULL;
  396. timers[i].irq = -1;
  397. }
  398. return ret;
  399. }
  400. /**
  401. * omap_rproc_disable_timers() - disable the timers for a remoteproc
  402. * @rproc: handle of a remote processor
  403. * @configure: boolean flag used to release the timer handle
  404. *
  405. * This function is used primarily to disable the timers associated with
  406. * a remoteproc. The configure flag is provided to allow the driver
  407. * to either stop and release a timer (during device shutdown) or to just
  408. * stop a timer (during a suspend operation).
  409. *
  410. * Return: 0 on success or no timers
  411. */
  412. static int omap_rproc_disable_timers(struct rproc *rproc, bool configure)
  413. {
  414. int i;
  415. struct omap_rproc *oproc = rproc->priv;
  416. struct omap_rproc_timer *timers = oproc->timers;
  417. int num_timers = oproc->num_timers + oproc->num_wd_timers;
  418. if (!num_timers)
  419. return 0;
  420. for (i = 0; i < num_timers; i++) {
  421. omap_rproc_stop_timer(&timers[i]);
  422. if (configure) {
  423. if (i >= oproc->num_timers)
  424. free_irq(timers[i].irq, rproc);
  425. omap_rproc_release_timer(&timers[i]);
  426. timers[i].odt = NULL;
  427. timers[i].timer_ops = NULL;
  428. timers[i].irq = -1;
  429. }
  430. }
  431. return 0;
  432. }
  433. /**
  434. * omap_rproc_mbox_callback() - inbound mailbox message handler
  435. * @client: mailbox client pointer used for requesting the mailbox channel
  436. * @data: mailbox payload
  437. *
  438. * This handler is invoked by omap's mailbox driver whenever a mailbox
  439. * message is received. Usually, the mailbox payload simply contains
  440. * the index of the virtqueue that is kicked by the remote processor,
  441. * and we let remoteproc core handle it.
  442. *
  443. * In addition to virtqueue indices, we also have some out-of-band values
  444. * that indicates different events. Those values are deliberately very
  445. * big so they don't coincide with virtqueue indices.
  446. */
  447. static void omap_rproc_mbox_callback(struct mbox_client *client, void *data)
  448. {
  449. struct omap_rproc *oproc = container_of(client, struct omap_rproc,
  450. client);
  451. struct device *dev = oproc->rproc->dev.parent;
  452. const char *name = oproc->rproc->name;
  453. u32 msg = (u32)data;
  454. dev_dbg(dev, "mbox msg: 0x%x\n", msg);
  455. switch (msg) {
  456. case RP_MBOX_CRASH:
  457. /*
  458. * remoteproc detected an exception, notify the rproc core.
  459. * The remoteproc core will handle the recovery.
  460. */
  461. dev_err(dev, "omap rproc %s crashed\n", name);
  462. rproc_report_crash(oproc->rproc, RPROC_FATAL_ERROR);
  463. break;
  464. case RP_MBOX_ECHO_REPLY:
  465. dev_info(dev, "received echo reply from %s\n", name);
  466. break;
  467. case RP_MBOX_SUSPEND_ACK:
  468. case RP_MBOX_SUSPEND_CANCEL:
  469. oproc->suspend_acked = msg == RP_MBOX_SUSPEND_ACK;
  470. complete(&oproc->pm_comp);
  471. break;
  472. default:
  473. if (msg >= RP_MBOX_READY && msg < RP_MBOX_END_MSG)
  474. return;
  475. if (msg > oproc->rproc->max_notifyid) {
  476. dev_dbg(dev, "dropping unknown message 0x%x", msg);
  477. return;
  478. }
  479. /* msg contains the index of the triggered vring */
  480. if (rproc_vq_interrupt(oproc->rproc, msg) == IRQ_NONE)
  481. dev_dbg(dev, "no message was found in vqid %d\n", msg);
  482. }
  483. }
  484. /* kick a virtqueue */
  485. static void omap_rproc_kick(struct rproc *rproc, int vqid)
  486. {
  487. struct omap_rproc *oproc = rproc->priv;
  488. struct device *dev = rproc->dev.parent;
  489. int ret;
  490. /* wake up the rproc before kicking it */
  491. ret = pm_runtime_get_sync(dev);
  492. if (WARN_ON(ret < 0)) {
  493. dev_err(dev, "pm_runtime_get_sync() failed during kick, ret = %d\n",
  494. ret);
  495. pm_runtime_put_noidle(dev);
  496. return;
  497. }
  498. /* send the index of the triggered virtqueue in the mailbox payload */
  499. ret = mbox_send_message(oproc->mbox, (void *)vqid);
  500. if (ret < 0)
  501. dev_err(dev, "failed to send mailbox message, status = %d\n",
  502. ret);
  503. pm_runtime_mark_last_busy(dev);
  504. pm_runtime_put_autosuspend(dev);
  505. }
  506. /**
  507. * omap_rproc_write_dsp_boot_addr() - set boot address for DSP remote processor
  508. * @rproc: handle of a remote processor
  509. *
  510. * Set boot address for a supported DSP remote processor.
  511. *
  512. * Return: 0 on success, or -EINVAL if boot address is not aligned properly
  513. */
  514. static int omap_rproc_write_dsp_boot_addr(struct rproc *rproc)
  515. {
  516. struct device *dev = rproc->dev.parent;
  517. struct omap_rproc *oproc = rproc->priv;
  518. struct omap_rproc_boot_data *bdata = oproc->boot_data;
  519. u32 offset = bdata->boot_reg;
  520. u32 value;
  521. u32 mask;
  522. if (rproc->bootaddr & (SZ_1K - 1)) {
  523. dev_err(dev, "invalid boot address 0x%llx, must be aligned on a 1KB boundary\n",
  524. rproc->bootaddr);
  525. return -EINVAL;
  526. }
  527. value = rproc->bootaddr >> bdata->boot_reg_shift;
  528. mask = ~(SZ_1K - 1) >> bdata->boot_reg_shift;
  529. return regmap_update_bits(bdata->syscon, offset, mask, value);
  530. }
  531. /*
  532. * Power up the remote processor.
  533. *
  534. * This function will be invoked only after the firmware for this rproc
  535. * was loaded, parsed successfully, and all of its resource requirements
  536. * were met.
  537. */
  538. static int omap_rproc_start(struct rproc *rproc)
  539. {
  540. struct omap_rproc *oproc = rproc->priv;
  541. struct device *dev = rproc->dev.parent;
  542. int ret;
  543. struct mbox_client *client = &oproc->client;
  544. if (oproc->boot_data) {
  545. ret = omap_rproc_write_dsp_boot_addr(rproc);
  546. if (ret)
  547. return ret;
  548. }
  549. client->dev = dev;
  550. client->tx_done = NULL;
  551. client->rx_callback = omap_rproc_mbox_callback;
  552. client->tx_block = false;
  553. client->knows_txdone = false;
  554. oproc->mbox = mbox_request_channel(client, 0);
  555. if (IS_ERR(oproc->mbox)) {
  556. ret = -EBUSY;
  557. dev_err(dev, "mbox_request_channel failed: %ld\n",
  558. PTR_ERR(oproc->mbox));
  559. return ret;
  560. }
  561. /*
  562. * Ping the remote processor. this is only for sanity-sake;
  563. * there is no functional effect whatsoever.
  564. *
  565. * Note that the reply will _not_ arrive immediately: this message
  566. * will wait in the mailbox fifo until the remote processor is booted.
  567. */
  568. ret = mbox_send_message(oproc->mbox, (void *)RP_MBOX_ECHO_REQUEST);
  569. if (ret < 0) {
  570. dev_err(dev, "mbox_send_message failed: %d\n", ret);
  571. goto put_mbox;
  572. }
  573. ret = omap_rproc_enable_timers(rproc, true);
  574. if (ret) {
  575. dev_err(dev, "omap_rproc_enable_timers failed: %d\n", ret);
  576. goto put_mbox;
  577. }
  578. ret = reset_control_deassert(oproc->reset);
  579. if (ret) {
  580. dev_err(dev, "reset control deassert failed: %d\n", ret);
  581. goto disable_timers;
  582. }
  583. /*
  584. * remote processor is up, so update the runtime pm status and
  585. * enable the auto-suspend. The device usage count is incremented
  586. * manually for balancing it for auto-suspend
  587. */
  588. pm_runtime_set_active(dev);
  589. pm_runtime_use_autosuspend(dev);
  590. pm_runtime_get_noresume(dev);
  591. pm_runtime_enable(dev);
  592. pm_runtime_mark_last_busy(dev);
  593. pm_runtime_put_autosuspend(dev);
  594. return 0;
  595. disable_timers:
  596. omap_rproc_disable_timers(rproc, true);
  597. put_mbox:
  598. mbox_free_channel(oproc->mbox);
  599. return ret;
  600. }
  601. /* power off the remote processor */
  602. static int omap_rproc_stop(struct rproc *rproc)
  603. {
  604. struct device *dev = rproc->dev.parent;
  605. struct omap_rproc *oproc = rproc->priv;
  606. int ret;
  607. /*
  608. * cancel any possible scheduled runtime suspend by incrementing
  609. * the device usage count, and resuming the device. The remoteproc
  610. * also needs to be woken up if suspended, to avoid the remoteproc
  611. * OS to continue to remember any context that it has saved, and
  612. * avoid potential issues in misindentifying a subsequent device
  613. * reboot as a power restore boot
  614. */
  615. ret = pm_runtime_get_sync(dev);
  616. if (ret < 0) {
  617. pm_runtime_put_noidle(dev);
  618. return ret;
  619. }
  620. ret = reset_control_assert(oproc->reset);
  621. if (ret)
  622. goto out;
  623. ret = omap_rproc_disable_timers(rproc, true);
  624. if (ret)
  625. goto enable_device;
  626. mbox_free_channel(oproc->mbox);
  627. /*
  628. * update the runtime pm states and status now that the remoteproc
  629. * has stopped
  630. */
  631. pm_runtime_disable(dev);
  632. pm_runtime_dont_use_autosuspend(dev);
  633. pm_runtime_put_noidle(dev);
  634. pm_runtime_set_suspended(dev);
  635. return 0;
  636. enable_device:
  637. reset_control_deassert(oproc->reset);
  638. out:
  639. /* schedule the next auto-suspend */
  640. pm_runtime_mark_last_busy(dev);
  641. pm_runtime_put_autosuspend(dev);
  642. return ret;
  643. }
  644. /**
  645. * omap_rproc_da_to_va() - internal memory translation helper
  646. * @rproc: remote processor to apply the address translation for
  647. * @da: device address to translate
  648. * @len: length of the memory buffer
  649. *
  650. * Custom function implementing the rproc .da_to_va ops to provide address
  651. * translation (device address to kernel virtual address) for internal RAMs
  652. * present in a DSP or IPU device). The translated addresses can be used
  653. * either by the remoteproc core for loading, or by any rpmsg bus drivers.
  654. *
  655. * Return: translated virtual address in kernel memory space on success,
  656. * or NULL on failure.
  657. */
  658. static void *omap_rproc_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem)
  659. {
  660. struct omap_rproc *oproc = rproc->priv;
  661. int i;
  662. u32 offset;
  663. if (len <= 0)
  664. return NULL;
  665. if (!oproc->num_mems)
  666. return NULL;
  667. for (i = 0; i < oproc->num_mems; i++) {
  668. if (da >= oproc->mem[i].dev_addr && da + len <=
  669. oproc->mem[i].dev_addr + oproc->mem[i].size) {
  670. offset = da - oproc->mem[i].dev_addr;
  671. /* __force to make sparse happy with type conversion */
  672. return (__force void *)(oproc->mem[i].cpu_addr +
  673. offset);
  674. }
  675. }
  676. return NULL;
  677. }
  678. static const struct rproc_ops omap_rproc_ops = {
  679. .start = omap_rproc_start,
  680. .stop = omap_rproc_stop,
  681. .kick = omap_rproc_kick,
  682. .da_to_va = omap_rproc_da_to_va,
  683. };
  684. #ifdef CONFIG_PM
  685. static bool _is_rproc_in_standby(struct omap_rproc *oproc)
  686. {
  687. return ti_clk_is_in_standby(oproc->fck);
  688. }
  689. /* 1 sec is long enough time to let the remoteproc side suspend the device */
  690. #define DEF_SUSPEND_TIMEOUT 1000
  691. static int _omap_rproc_suspend(struct rproc *rproc, bool auto_suspend)
  692. {
  693. struct device *dev = rproc->dev.parent;
  694. struct omap_rproc *oproc = rproc->priv;
  695. unsigned long to = msecs_to_jiffies(DEF_SUSPEND_TIMEOUT);
  696. unsigned long ta = jiffies + to;
  697. u32 suspend_msg = auto_suspend ?
  698. RP_MBOX_SUSPEND_AUTO : RP_MBOX_SUSPEND_SYSTEM;
  699. int ret;
  700. reinit_completion(&oproc->pm_comp);
  701. oproc->suspend_acked = false;
  702. ret = mbox_send_message(oproc->mbox, (void *)suspend_msg);
  703. if (ret < 0) {
  704. dev_err(dev, "PM mbox_send_message failed: %d\n", ret);
  705. return ret;
  706. }
  707. ret = wait_for_completion_timeout(&oproc->pm_comp, to);
  708. if (!oproc->suspend_acked)
  709. return -EBUSY;
  710. /*
  711. * The remoteproc side is returning the ACK message before saving the
  712. * context, because the context saving is performed within a SYS/BIOS
  713. * function, and it cannot have any inter-dependencies against the IPC
  714. * layer. Also, as the SYS/BIOS needs to preserve properly the processor
  715. * register set, sending this ACK or signalling the completion of the
  716. * context save through a shared memory variable can never be the
  717. * absolute last thing to be executed on the remoteproc side, and the
  718. * MPU cannot use the ACK message as a sync point to put the remoteproc
  719. * into reset. The only way to ensure that the remote processor has
  720. * completed saving the context is to check that the module has reached
  721. * STANDBY state (after saving the context, the SYS/BIOS executes the
  722. * appropriate target-specific WFI instruction causing the module to
  723. * enter STANDBY).
  724. */
  725. while (!_is_rproc_in_standby(oproc)) {
  726. if (time_after(jiffies, ta))
  727. return -ETIME;
  728. schedule();
  729. }
  730. ret = reset_control_assert(oproc->reset);
  731. if (ret) {
  732. dev_err(dev, "reset assert during suspend failed %d\n", ret);
  733. return ret;
  734. }
  735. ret = omap_rproc_disable_timers(rproc, false);
  736. if (ret) {
  737. dev_err(dev, "disabling timers during suspend failed %d\n",
  738. ret);
  739. goto enable_device;
  740. }
  741. /*
  742. * IOMMUs would have to be disabled specifically for runtime suspend.
  743. * They are handled automatically through System PM callbacks for
  744. * regular system suspend
  745. */
  746. if (auto_suspend) {
  747. ret = omap_iommu_domain_deactivate(rproc->domain);
  748. if (ret) {
  749. dev_err(dev, "iommu domain deactivate failed %d\n",
  750. ret);
  751. goto enable_timers;
  752. }
  753. }
  754. return 0;
  755. enable_timers:
  756. /* ignore errors on re-enabling code */
  757. omap_rproc_enable_timers(rproc, false);
  758. enable_device:
  759. reset_control_deassert(oproc->reset);
  760. return ret;
  761. }
  762. static int _omap_rproc_resume(struct rproc *rproc, bool auto_suspend)
  763. {
  764. struct device *dev = rproc->dev.parent;
  765. struct omap_rproc *oproc = rproc->priv;
  766. int ret;
  767. /*
  768. * IOMMUs would have to be enabled specifically for runtime resume.
  769. * They would have been already enabled automatically through System
  770. * PM callbacks for regular system resume
  771. */
  772. if (auto_suspend) {
  773. ret = omap_iommu_domain_activate(rproc->domain);
  774. if (ret) {
  775. dev_err(dev, "omap_iommu activate failed %d\n", ret);
  776. goto out;
  777. }
  778. }
  779. /* boot address could be lost after suspend, so restore it */
  780. if (oproc->boot_data) {
  781. ret = omap_rproc_write_dsp_boot_addr(rproc);
  782. if (ret) {
  783. dev_err(dev, "boot address restore failed %d\n", ret);
  784. goto suspend_iommu;
  785. }
  786. }
  787. ret = omap_rproc_enable_timers(rproc, false);
  788. if (ret) {
  789. dev_err(dev, "enabling timers during resume failed %d\n", ret);
  790. goto suspend_iommu;
  791. }
  792. ret = reset_control_deassert(oproc->reset);
  793. if (ret) {
  794. dev_err(dev, "reset deassert during resume failed %d\n", ret);
  795. goto disable_timers;
  796. }
  797. return 0;
  798. disable_timers:
  799. omap_rproc_disable_timers(rproc, false);
  800. suspend_iommu:
  801. if (auto_suspend)
  802. omap_iommu_domain_deactivate(rproc->domain);
  803. out:
  804. return ret;
  805. }
  806. static int __maybe_unused omap_rproc_suspend(struct device *dev)
  807. {
  808. struct rproc *rproc = dev_get_drvdata(dev);
  809. struct omap_rproc *oproc = rproc->priv;
  810. int ret = 0;
  811. mutex_lock(&rproc->lock);
  812. if (rproc->state == RPROC_OFFLINE)
  813. goto out;
  814. if (rproc->state == RPROC_SUSPENDED)
  815. goto out;
  816. if (rproc->state != RPROC_RUNNING) {
  817. ret = -EBUSY;
  818. goto out;
  819. }
  820. ret = _omap_rproc_suspend(rproc, false);
  821. if (ret) {
  822. dev_err(dev, "suspend failed %d\n", ret);
  823. goto out;
  824. }
  825. /*
  826. * remoteproc is running at the time of system suspend, so remember
  827. * it so as to wake it up during system resume
  828. */
  829. oproc->need_resume = true;
  830. rproc->state = RPROC_SUSPENDED;
  831. out:
  832. mutex_unlock(&rproc->lock);
  833. return ret;
  834. }
  835. static int __maybe_unused omap_rproc_resume(struct device *dev)
  836. {
  837. struct rproc *rproc = dev_get_drvdata(dev);
  838. struct omap_rproc *oproc = rproc->priv;
  839. int ret = 0;
  840. mutex_lock(&rproc->lock);
  841. if (rproc->state == RPROC_OFFLINE)
  842. goto out;
  843. if (rproc->state != RPROC_SUSPENDED) {
  844. ret = -EBUSY;
  845. goto out;
  846. }
  847. /*
  848. * remoteproc was auto-suspended at the time of system suspend,
  849. * so no need to wake-up the processor (leave it in suspended
  850. * state, will be woken up during a subsequent runtime_resume)
  851. */
  852. if (!oproc->need_resume)
  853. goto out;
  854. ret = _omap_rproc_resume(rproc, false);
  855. if (ret) {
  856. dev_err(dev, "resume failed %d\n", ret);
  857. goto out;
  858. }
  859. oproc->need_resume = false;
  860. rproc->state = RPROC_RUNNING;
  861. pm_runtime_mark_last_busy(dev);
  862. out:
  863. mutex_unlock(&rproc->lock);
  864. return ret;
  865. }
  866. static int omap_rproc_runtime_suspend(struct device *dev)
  867. {
  868. struct rproc *rproc = dev_get_drvdata(dev);
  869. struct omap_rproc *oproc = rproc->priv;
  870. int ret;
  871. mutex_lock(&rproc->lock);
  872. if (rproc->state == RPROC_CRASHED) {
  873. dev_dbg(dev, "rproc cannot be runtime suspended when crashed!\n");
  874. ret = -EBUSY;
  875. goto out;
  876. }
  877. if (WARN_ON(rproc->state != RPROC_RUNNING)) {
  878. dev_err(dev, "rproc cannot be runtime suspended when not running!\n");
  879. ret = -EBUSY;
  880. goto out;
  881. }
  882. /*
  883. * do not even attempt suspend if the remote processor is not
  884. * idled for runtime auto-suspend
  885. */
  886. if (!_is_rproc_in_standby(oproc)) {
  887. ret = -EBUSY;
  888. goto abort;
  889. }
  890. ret = _omap_rproc_suspend(rproc, true);
  891. if (ret)
  892. goto abort;
  893. rproc->state = RPROC_SUSPENDED;
  894. mutex_unlock(&rproc->lock);
  895. return 0;
  896. abort:
  897. pm_runtime_mark_last_busy(dev);
  898. out:
  899. mutex_unlock(&rproc->lock);
  900. return ret;
  901. }
  902. static int omap_rproc_runtime_resume(struct device *dev)
  903. {
  904. struct rproc *rproc = dev_get_drvdata(dev);
  905. int ret;
  906. mutex_lock(&rproc->lock);
  907. if (WARN_ON(rproc->state != RPROC_SUSPENDED)) {
  908. dev_err(dev, "rproc cannot be runtime resumed if not suspended! state=%d\n",
  909. rproc->state);
  910. ret = -EBUSY;
  911. goto out;
  912. }
  913. ret = _omap_rproc_resume(rproc, true);
  914. if (ret) {
  915. dev_err(dev, "runtime resume failed %d\n", ret);
  916. goto out;
  917. }
  918. rproc->state = RPROC_RUNNING;
  919. out:
  920. mutex_unlock(&rproc->lock);
  921. return ret;
  922. }
  923. #endif /* CONFIG_PM */
  924. static const struct omap_rproc_mem_data ipu_mems[] = {
  925. { .name = "l2ram", .dev_addr = 0x20000000 },
  926. { },
  927. };
  928. static const struct omap_rproc_mem_data dra7_dsp_mems[] = {
  929. { .name = "l2ram", .dev_addr = 0x800000 },
  930. { .name = "l1pram", .dev_addr = 0xe00000 },
  931. { .name = "l1dram", .dev_addr = 0xf00000 },
  932. { },
  933. };
  934. static const struct omap_rproc_dev_data omap4_dsp_dev_data = {
  935. .device_name = "dsp",
  936. };
  937. static const struct omap_rproc_dev_data omap4_ipu_dev_data = {
  938. .device_name = "ipu",
  939. .mems = ipu_mems,
  940. };
  941. static const struct omap_rproc_dev_data omap5_dsp_dev_data = {
  942. .device_name = "dsp",
  943. };
  944. static const struct omap_rproc_dev_data omap5_ipu_dev_data = {
  945. .device_name = "ipu",
  946. .mems = ipu_mems,
  947. };
  948. static const struct omap_rproc_dev_data dra7_dsp_dev_data = {
  949. .device_name = "dsp",
  950. .mems = dra7_dsp_mems,
  951. };
  952. static const struct omap_rproc_dev_data dra7_ipu_dev_data = {
  953. .device_name = "ipu",
  954. .mems = ipu_mems,
  955. };
  956. static const struct of_device_id omap_rproc_of_match[] = {
  957. {
  958. .compatible = "ti,omap4-dsp",
  959. .data = &omap4_dsp_dev_data,
  960. },
  961. {
  962. .compatible = "ti,omap4-ipu",
  963. .data = &omap4_ipu_dev_data,
  964. },
  965. {
  966. .compatible = "ti,omap5-dsp",
  967. .data = &omap5_dsp_dev_data,
  968. },
  969. {
  970. .compatible = "ti,omap5-ipu",
  971. .data = &omap5_ipu_dev_data,
  972. },
  973. {
  974. .compatible = "ti,dra7-dsp",
  975. .data = &dra7_dsp_dev_data,
  976. },
  977. {
  978. .compatible = "ti,dra7-ipu",
  979. .data = &dra7_ipu_dev_data,
  980. },
  981. {
  982. /* end */
  983. },
  984. };
  985. MODULE_DEVICE_TABLE(of, omap_rproc_of_match);
  986. static const char *omap_rproc_get_firmware(struct platform_device *pdev)
  987. {
  988. const char *fw_name;
  989. int ret;
  990. ret = of_property_read_string(pdev->dev.of_node, "firmware-name",
  991. &fw_name);
  992. if (ret)
  993. return ERR_PTR(ret);
  994. return fw_name;
  995. }
  996. static int omap_rproc_get_boot_data(struct platform_device *pdev,
  997. struct rproc *rproc)
  998. {
  999. struct device_node *np = pdev->dev.of_node;
  1000. struct omap_rproc *oproc = rproc->priv;
  1001. const struct omap_rproc_dev_data *data;
  1002. int ret;
  1003. data = of_device_get_match_data(&pdev->dev);
  1004. if (!data)
  1005. return -ENODEV;
  1006. if (!of_property_read_bool(np, "ti,bootreg"))
  1007. return 0;
  1008. oproc->boot_data = devm_kzalloc(&pdev->dev, sizeof(*oproc->boot_data),
  1009. GFP_KERNEL);
  1010. if (!oproc->boot_data)
  1011. return -ENOMEM;
  1012. oproc->boot_data->syscon =
  1013. syscon_regmap_lookup_by_phandle(np, "ti,bootreg");
  1014. if (IS_ERR(oproc->boot_data->syscon)) {
  1015. ret = PTR_ERR(oproc->boot_data->syscon);
  1016. return ret;
  1017. }
  1018. if (of_property_read_u32_index(np, "ti,bootreg", 1,
  1019. &oproc->boot_data->boot_reg)) {
  1020. dev_err(&pdev->dev, "couldn't get the boot register\n");
  1021. return -EINVAL;
  1022. }
  1023. of_property_read_u32_index(np, "ti,bootreg", 2,
  1024. &oproc->boot_data->boot_reg_shift);
  1025. return 0;
  1026. }
  1027. static int omap_rproc_of_get_internal_memories(struct platform_device *pdev,
  1028. struct rproc *rproc)
  1029. {
  1030. struct omap_rproc *oproc = rproc->priv;
  1031. struct device *dev = &pdev->dev;
  1032. const struct omap_rproc_dev_data *data;
  1033. struct resource *res;
  1034. int num_mems;
  1035. int i;
  1036. data = of_device_get_match_data(dev);
  1037. if (!data)
  1038. return -ENODEV;
  1039. if (!data->mems)
  1040. return 0;
  1041. num_mems = of_property_count_elems_of_size(dev->of_node, "reg",
  1042. sizeof(u32)) / 2;
  1043. oproc->mem = devm_kcalloc(dev, num_mems, sizeof(*oproc->mem),
  1044. GFP_KERNEL);
  1045. if (!oproc->mem)
  1046. return -ENOMEM;
  1047. for (i = 0; data->mems[i].name; i++) {
  1048. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  1049. data->mems[i].name);
  1050. if (!res) {
  1051. dev_err(dev, "no memory defined for %s\n",
  1052. data->mems[i].name);
  1053. return -ENOMEM;
  1054. }
  1055. oproc->mem[i].cpu_addr = devm_ioremap_resource(dev, res);
  1056. if (IS_ERR(oproc->mem[i].cpu_addr)) {
  1057. dev_err(dev, "failed to parse and map %s memory\n",
  1058. data->mems[i].name);
  1059. return PTR_ERR(oproc->mem[i].cpu_addr);
  1060. }
  1061. oproc->mem[i].bus_addr = res->start;
  1062. oproc->mem[i].dev_addr = data->mems[i].dev_addr;
  1063. oproc->mem[i].size = resource_size(res);
  1064. dev_dbg(dev, "memory %8s: bus addr %pa size 0x%x va %pK da 0x%x\n",
  1065. data->mems[i].name, &oproc->mem[i].bus_addr,
  1066. oproc->mem[i].size, oproc->mem[i].cpu_addr,
  1067. oproc->mem[i].dev_addr);
  1068. }
  1069. oproc->num_mems = num_mems;
  1070. return 0;
  1071. }
  1072. #ifdef CONFIG_OMAP_REMOTEPROC_WATCHDOG
  1073. static int omap_rproc_count_wdog_timers(struct device *dev)
  1074. {
  1075. struct device_node *np = dev->of_node;
  1076. int ret;
  1077. ret = of_count_phandle_with_args(np, "ti,watchdog-timers", NULL);
  1078. if (ret <= 0) {
  1079. dev_dbg(dev, "device does not have watchdog timers, status = %d\n",
  1080. ret);
  1081. ret = 0;
  1082. }
  1083. return ret;
  1084. }
  1085. #else
  1086. static int omap_rproc_count_wdog_timers(struct device *dev)
  1087. {
  1088. return 0;
  1089. }
  1090. #endif
  1091. static int omap_rproc_of_get_timers(struct platform_device *pdev,
  1092. struct rproc *rproc)
  1093. {
  1094. struct device_node *np = pdev->dev.of_node;
  1095. struct omap_rproc *oproc = rproc->priv;
  1096. struct device *dev = &pdev->dev;
  1097. int num_timers;
  1098. /*
  1099. * Timer nodes are directly used in client nodes as phandles, so
  1100. * retrieve the count using appropriate size
  1101. */
  1102. oproc->num_timers = of_count_phandle_with_args(np, "ti,timers", NULL);
  1103. if (oproc->num_timers <= 0) {
  1104. dev_dbg(dev, "device does not have timers, status = %d\n",
  1105. oproc->num_timers);
  1106. oproc->num_timers = 0;
  1107. }
  1108. oproc->num_wd_timers = omap_rproc_count_wdog_timers(dev);
  1109. num_timers = oproc->num_timers + oproc->num_wd_timers;
  1110. if (num_timers) {
  1111. oproc->timers = devm_kcalloc(dev, num_timers,
  1112. sizeof(*oproc->timers),
  1113. GFP_KERNEL);
  1114. if (!oproc->timers)
  1115. return -ENOMEM;
  1116. dev_dbg(dev, "device has %d tick timers and %d watchdog timers\n",
  1117. oproc->num_timers, oproc->num_wd_timers);
  1118. }
  1119. return 0;
  1120. }
  1121. static int omap_rproc_probe(struct platform_device *pdev)
  1122. {
  1123. struct device_node *np = pdev->dev.of_node;
  1124. struct omap_rproc *oproc;
  1125. struct rproc *rproc;
  1126. const char *firmware;
  1127. int ret;
  1128. struct reset_control *reset;
  1129. if (!np) {
  1130. dev_err(&pdev->dev, "only DT-based devices are supported\n");
  1131. return -ENODEV;
  1132. }
  1133. reset = devm_reset_control_array_get_exclusive(&pdev->dev);
  1134. if (IS_ERR(reset))
  1135. return PTR_ERR(reset);
  1136. firmware = omap_rproc_get_firmware(pdev);
  1137. if (IS_ERR(firmware))
  1138. return PTR_ERR(firmware);
  1139. ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
  1140. if (ret) {
  1141. dev_err(&pdev->dev, "dma_set_coherent_mask: %d\n", ret);
  1142. return ret;
  1143. }
  1144. rproc = rproc_alloc(&pdev->dev, dev_name(&pdev->dev), &omap_rproc_ops,
  1145. firmware, sizeof(*oproc));
  1146. if (!rproc)
  1147. return -ENOMEM;
  1148. oproc = rproc->priv;
  1149. oproc->rproc = rproc;
  1150. oproc->reset = reset;
  1151. /* All existing OMAP IPU and DSP processors have an MMU */
  1152. rproc->has_iommu = true;
  1153. ret = omap_rproc_of_get_internal_memories(pdev, rproc);
  1154. if (ret)
  1155. goto free_rproc;
  1156. ret = omap_rproc_get_boot_data(pdev, rproc);
  1157. if (ret)
  1158. goto free_rproc;
  1159. ret = omap_rproc_of_get_timers(pdev, rproc);
  1160. if (ret)
  1161. goto free_rproc;
  1162. init_completion(&oproc->pm_comp);
  1163. oproc->autosuspend_delay = DEFAULT_AUTOSUSPEND_DELAY;
  1164. of_property_read_u32(pdev->dev.of_node, "ti,autosuspend-delay-ms",
  1165. &oproc->autosuspend_delay);
  1166. pm_runtime_set_autosuspend_delay(&pdev->dev, oproc->autosuspend_delay);
  1167. oproc->fck = devm_clk_get(&pdev->dev, 0);
  1168. if (IS_ERR(oproc->fck)) {
  1169. ret = PTR_ERR(oproc->fck);
  1170. goto free_rproc;
  1171. }
  1172. ret = of_reserved_mem_device_init(&pdev->dev);
  1173. if (ret) {
  1174. dev_warn(&pdev->dev, "device does not have specific CMA pool.\n");
  1175. dev_warn(&pdev->dev, "Typically this should be provided,\n");
  1176. dev_warn(&pdev->dev, "only omit if you know what you are doing.\n");
  1177. }
  1178. platform_set_drvdata(pdev, rproc);
  1179. ret = rproc_add(rproc);
  1180. if (ret)
  1181. goto release_mem;
  1182. return 0;
  1183. release_mem:
  1184. of_reserved_mem_device_release(&pdev->dev);
  1185. free_rproc:
  1186. rproc_free(rproc);
  1187. return ret;
  1188. }
  1189. static int omap_rproc_remove(struct platform_device *pdev)
  1190. {
  1191. struct rproc *rproc = platform_get_drvdata(pdev);
  1192. rproc_del(rproc);
  1193. rproc_free(rproc);
  1194. of_reserved_mem_device_release(&pdev->dev);
  1195. return 0;
  1196. }
  1197. static const struct dev_pm_ops omap_rproc_pm_ops = {
  1198. SET_SYSTEM_SLEEP_PM_OPS(omap_rproc_suspend, omap_rproc_resume)
  1199. SET_RUNTIME_PM_OPS(omap_rproc_runtime_suspend,
  1200. omap_rproc_runtime_resume, NULL)
  1201. };
  1202. static struct platform_driver omap_rproc_driver = {
  1203. .probe = omap_rproc_probe,
  1204. .remove = omap_rproc_remove,
  1205. .driver = {
  1206. .name = "omap-rproc",
  1207. .pm = &omap_rproc_pm_ops,
  1208. .of_match_table = omap_rproc_of_match,
  1209. },
  1210. };
  1211. module_platform_driver(omap_rproc_driver);
  1212. MODULE_LICENSE("GPL v2");
  1213. MODULE_DESCRIPTION("OMAP Remote Processor control driver");