qcom_smd-regulator.c 53 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015, Sony Mobile Communications AB.
  4. * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/of.h>
  8. #include <linux/of_device.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/regulator/driver.h>
  11. #include <linux/regulator/of_regulator.h>
  12. #include <linux/soc/qcom/smd-rpm.h>
  13. struct qcom_rpm_reg {
  14. struct device *dev;
  15. struct qcom_smd_rpm *rpm;
  16. u32 type;
  17. u32 id;
  18. struct regulator_desc desc;
  19. int is_enabled;
  20. int uV;
  21. u32 load;
  22. unsigned int enabled_updated:1;
  23. unsigned int uv_updated:1;
  24. unsigned int load_updated:1;
  25. };
  26. struct rpm_regulator_req {
  27. __le32 key;
  28. __le32 nbytes;
  29. __le32 value;
  30. };
  31. #define RPM_KEY_SWEN 0x6e657773 /* "swen" */
  32. #define RPM_KEY_UV 0x00007675 /* "uv" */
  33. #define RPM_KEY_MA 0x0000616d /* "ma" */
  34. static int rpm_reg_write_active(struct qcom_rpm_reg *vreg)
  35. {
  36. struct rpm_regulator_req req[3];
  37. int reqlen = 0;
  38. int ret;
  39. if (vreg->enabled_updated) {
  40. req[reqlen].key = cpu_to_le32(RPM_KEY_SWEN);
  41. req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
  42. req[reqlen].value = cpu_to_le32(vreg->is_enabled);
  43. reqlen++;
  44. }
  45. if (vreg->uv_updated && vreg->is_enabled) {
  46. req[reqlen].key = cpu_to_le32(RPM_KEY_UV);
  47. req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
  48. req[reqlen].value = cpu_to_le32(vreg->uV);
  49. reqlen++;
  50. }
  51. if (vreg->load_updated && vreg->is_enabled) {
  52. req[reqlen].key = cpu_to_le32(RPM_KEY_MA);
  53. req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
  54. req[reqlen].value = cpu_to_le32(vreg->load / 1000);
  55. reqlen++;
  56. }
  57. if (!reqlen)
  58. return 0;
  59. ret = qcom_rpm_smd_write(vreg->rpm, QCOM_SMD_RPM_ACTIVE_STATE,
  60. vreg->type, vreg->id,
  61. req, sizeof(req[0]) * reqlen);
  62. if (!ret) {
  63. vreg->enabled_updated = 0;
  64. vreg->uv_updated = 0;
  65. vreg->load_updated = 0;
  66. }
  67. return ret;
  68. }
  69. static int rpm_reg_enable(struct regulator_dev *rdev)
  70. {
  71. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  72. int ret;
  73. vreg->is_enabled = 1;
  74. vreg->enabled_updated = 1;
  75. ret = rpm_reg_write_active(vreg);
  76. if (ret)
  77. vreg->is_enabled = 0;
  78. return ret;
  79. }
  80. static int rpm_reg_is_enabled(struct regulator_dev *rdev)
  81. {
  82. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  83. return vreg->is_enabled;
  84. }
  85. static int rpm_reg_disable(struct regulator_dev *rdev)
  86. {
  87. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  88. int ret;
  89. vreg->is_enabled = 0;
  90. vreg->enabled_updated = 1;
  91. ret = rpm_reg_write_active(vreg);
  92. if (ret)
  93. vreg->is_enabled = 1;
  94. return ret;
  95. }
  96. static int rpm_reg_get_voltage(struct regulator_dev *rdev)
  97. {
  98. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  99. return vreg->uV;
  100. }
  101. static int rpm_reg_set_voltage(struct regulator_dev *rdev,
  102. int min_uV,
  103. int max_uV,
  104. unsigned *selector)
  105. {
  106. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  107. int ret;
  108. int old_uV = vreg->uV;
  109. vreg->uV = min_uV;
  110. vreg->uv_updated = 1;
  111. ret = rpm_reg_write_active(vreg);
  112. if (ret)
  113. vreg->uV = old_uV;
  114. return ret;
  115. }
  116. static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA)
  117. {
  118. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  119. u32 old_load = vreg->load;
  120. int ret;
  121. vreg->load = load_uA;
  122. vreg->load_updated = 1;
  123. ret = rpm_reg_write_active(vreg);
  124. if (ret)
  125. vreg->load = old_load;
  126. return ret;
  127. }
  128. static const struct regulator_ops rpm_smps_ldo_ops = {
  129. .enable = rpm_reg_enable,
  130. .disable = rpm_reg_disable,
  131. .is_enabled = rpm_reg_is_enabled,
  132. .list_voltage = regulator_list_voltage_linear_range,
  133. .get_voltage = rpm_reg_get_voltage,
  134. .set_voltage = rpm_reg_set_voltage,
  135. .set_load = rpm_reg_set_load,
  136. };
  137. static const struct regulator_ops rpm_smps_ldo_ops_fixed = {
  138. .enable = rpm_reg_enable,
  139. .disable = rpm_reg_disable,
  140. .is_enabled = rpm_reg_is_enabled,
  141. .get_voltage = rpm_reg_get_voltage,
  142. .set_voltage = rpm_reg_set_voltage,
  143. .set_load = rpm_reg_set_load,
  144. };
  145. static const struct regulator_ops rpm_switch_ops = {
  146. .enable = rpm_reg_enable,
  147. .disable = rpm_reg_disable,
  148. .is_enabled = rpm_reg_is_enabled,
  149. };
  150. static const struct regulator_ops rpm_bob_ops = {
  151. .enable = rpm_reg_enable,
  152. .disable = rpm_reg_disable,
  153. .is_enabled = rpm_reg_is_enabled,
  154. .get_voltage = rpm_reg_get_voltage,
  155. .set_voltage = rpm_reg_set_voltage,
  156. };
  157. static const struct regulator_ops rpm_mp5496_ops = {
  158. .enable = rpm_reg_enable,
  159. .disable = rpm_reg_disable,
  160. .is_enabled = rpm_reg_is_enabled,
  161. .list_voltage = regulator_list_voltage_linear_range,
  162. .get_voltage = rpm_reg_get_voltage,
  163. .set_voltage = rpm_reg_set_voltage,
  164. };
  165. static const struct regulator_desc pma8084_hfsmps = {
  166. .linear_ranges = (struct linear_range[]) {
  167. REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
  168. REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
  169. },
  170. .n_linear_ranges = 2,
  171. .n_voltages = 159,
  172. .ops = &rpm_smps_ldo_ops,
  173. };
  174. static const struct regulator_desc pma8084_ftsmps = {
  175. .linear_ranges = (struct linear_range[]) {
  176. REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000),
  177. REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
  178. },
  179. .n_linear_ranges = 2,
  180. .n_voltages = 262,
  181. .ops = &rpm_smps_ldo_ops,
  182. };
  183. static const struct regulator_desc pma8084_pldo = {
  184. .linear_ranges = (struct linear_range[]) {
  185. REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
  186. REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
  187. REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
  188. },
  189. .n_linear_ranges = 3,
  190. .n_voltages = 164,
  191. .ops = &rpm_smps_ldo_ops,
  192. };
  193. static const struct regulator_desc pma8084_nldo = {
  194. .linear_ranges = (struct linear_range[]) {
  195. REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
  196. },
  197. .n_linear_ranges = 1,
  198. .n_voltages = 64,
  199. .ops = &rpm_smps_ldo_ops,
  200. };
  201. static const struct regulator_desc pma8084_switch = {
  202. .ops = &rpm_switch_ops,
  203. };
  204. static const struct regulator_desc pm8226_hfsmps = {
  205. .linear_ranges = (struct linear_range[]) {
  206. REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
  207. REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000),
  208. },
  209. .n_linear_ranges = 2,
  210. .n_voltages = 159,
  211. .ops = &rpm_smps_ldo_ops,
  212. };
  213. static const struct regulator_desc pm8226_ftsmps = {
  214. .linear_ranges = (struct linear_range[]) {
  215. REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000),
  216. REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
  217. },
  218. .n_linear_ranges = 2,
  219. .n_voltages = 262,
  220. .ops = &rpm_smps_ldo_ops,
  221. };
  222. static const struct regulator_desc pm8226_pldo = {
  223. .linear_ranges = (struct linear_range[]) {
  224. REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
  225. REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
  226. REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
  227. },
  228. .n_linear_ranges = 3,
  229. .n_voltages = 164,
  230. .ops = &rpm_smps_ldo_ops,
  231. };
  232. static const struct regulator_desc pm8226_nldo = {
  233. .linear_ranges = (struct linear_range[]) {
  234. REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
  235. },
  236. .n_linear_ranges = 1,
  237. .n_voltages = 64,
  238. .ops = &rpm_smps_ldo_ops,
  239. };
  240. static const struct regulator_desc pm8226_switch = {
  241. .ops = &rpm_switch_ops,
  242. };
  243. static const struct regulator_desc pm8x41_hfsmps = {
  244. .linear_ranges = (struct linear_range[]) {
  245. REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500),
  246. REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000),
  247. },
  248. .n_linear_ranges = 2,
  249. .n_voltages = 159,
  250. .ops = &rpm_smps_ldo_ops,
  251. };
  252. static const struct regulator_desc pm8841_ftsmps = {
  253. .linear_ranges = (struct linear_range[]) {
  254. REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000),
  255. REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
  256. },
  257. .n_linear_ranges = 2,
  258. .n_voltages = 262,
  259. .ops = &rpm_smps_ldo_ops,
  260. };
  261. static const struct regulator_desc pm8941_boost = {
  262. .linear_ranges = (struct linear_range[]) {
  263. REGULATOR_LINEAR_RANGE(4000000, 0, 30, 50000),
  264. },
  265. .n_linear_ranges = 1,
  266. .n_voltages = 31,
  267. .ops = &rpm_smps_ldo_ops,
  268. };
  269. static const struct regulator_desc pm8941_pldo = {
  270. .linear_ranges = (struct linear_range[]) {
  271. REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
  272. REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
  273. REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
  274. },
  275. .n_linear_ranges = 3,
  276. .n_voltages = 164,
  277. .ops = &rpm_smps_ldo_ops,
  278. };
  279. static const struct regulator_desc pm8941_nldo = {
  280. .linear_ranges = (struct linear_range[]) {
  281. REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
  282. },
  283. .n_linear_ranges = 1,
  284. .n_voltages = 64,
  285. .ops = &rpm_smps_ldo_ops,
  286. };
  287. static const struct regulator_desc pm8941_lnldo = {
  288. .fixed_uV = 1740000,
  289. .n_voltages = 1,
  290. .ops = &rpm_smps_ldo_ops_fixed,
  291. };
  292. static const struct regulator_desc pm8941_switch = {
  293. .ops = &rpm_switch_ops,
  294. };
  295. static const struct regulator_desc pm8916_pldo = {
  296. .linear_ranges = (struct linear_range[]) {
  297. REGULATOR_LINEAR_RANGE(1750000, 0, 127, 12500),
  298. },
  299. .n_linear_ranges = 1,
  300. .n_voltages = 128,
  301. .ops = &rpm_smps_ldo_ops,
  302. };
  303. static const struct regulator_desc pm8916_nldo = {
  304. .linear_ranges = (struct linear_range[]) {
  305. REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
  306. },
  307. .n_linear_ranges = 1,
  308. .n_voltages = 94,
  309. .ops = &rpm_smps_ldo_ops,
  310. };
  311. static const struct regulator_desc pm8916_buck_lvo_smps = {
  312. .linear_ranges = (struct linear_range[]) {
  313. REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
  314. REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000),
  315. },
  316. .n_linear_ranges = 2,
  317. .n_voltages = 128,
  318. .ops = &rpm_smps_ldo_ops,
  319. };
  320. static const struct regulator_desc pm8916_buck_hvo_smps = {
  321. .linear_ranges = (struct linear_range[]) {
  322. REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000),
  323. },
  324. .n_linear_ranges = 1,
  325. .n_voltages = 32,
  326. .ops = &rpm_smps_ldo_ops,
  327. };
  328. static const struct regulator_desc pm8950_hfsmps = {
  329. .linear_ranges = (struct linear_range[]) {
  330. REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
  331. REGULATOR_LINEAR_RANGE(1550000, 96, 127, 25000),
  332. },
  333. .n_linear_ranges = 2,
  334. .n_voltages = 128,
  335. .ops = &rpm_smps_ldo_ops,
  336. };
  337. static const struct regulator_desc pm8950_ftsmps2p5 = {
  338. .linear_ranges = (struct linear_range[]) {
  339. REGULATOR_LINEAR_RANGE(80000, 0, 255, 5000),
  340. REGULATOR_LINEAR_RANGE(160000, 256, 460, 10000),
  341. },
  342. .n_linear_ranges = 2,
  343. .n_voltages = 461,
  344. .ops = &rpm_smps_ldo_ops,
  345. };
  346. static const struct regulator_desc pm8950_ult_nldo = {
  347. .linear_ranges = (struct linear_range[]) {
  348. REGULATOR_LINEAR_RANGE(375000, 0, 202, 12500),
  349. },
  350. .n_linear_ranges = 1,
  351. .n_voltages = 203,
  352. .ops = &rpm_smps_ldo_ops,
  353. };
  354. static const struct regulator_desc pm8950_ult_pldo = {
  355. .linear_ranges = (struct linear_range[]) {
  356. REGULATOR_LINEAR_RANGE(1750000, 0, 127, 12500),
  357. },
  358. .n_linear_ranges = 1,
  359. .n_voltages = 128,
  360. .ops = &rpm_smps_ldo_ops,
  361. };
  362. static const struct regulator_desc pm8950_pldo_lv = {
  363. .linear_ranges = (struct linear_range[]) {
  364. REGULATOR_LINEAR_RANGE(1500000, 0, 16, 25000),
  365. },
  366. .n_linear_ranges = 1,
  367. .n_voltages = 17,
  368. .ops = &rpm_smps_ldo_ops,
  369. };
  370. static const struct regulator_desc pm8950_pldo = {
  371. .linear_ranges = (struct linear_range[]) {
  372. REGULATOR_LINEAR_RANGE(975000, 0, 164, 12500),
  373. },
  374. .n_linear_ranges = 1,
  375. .n_voltages = 165,
  376. .ops = &rpm_smps_ldo_ops,
  377. };
  378. static const struct regulator_desc pm8953_lnldo = {
  379. .linear_ranges = (struct linear_range[]) {
  380. REGULATOR_LINEAR_RANGE(690000, 0, 7, 60000),
  381. REGULATOR_LINEAR_RANGE(1380000, 8, 15, 120000),
  382. },
  383. .n_linear_ranges = 2,
  384. .n_voltages = 16,
  385. .ops = &rpm_smps_ldo_ops,
  386. };
  387. static const struct regulator_desc pm8953_ult_nldo = {
  388. .linear_ranges = (struct linear_range[]) {
  389. REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
  390. },
  391. .n_linear_ranges = 1,
  392. .n_voltages = 94,
  393. .ops = &rpm_smps_ldo_ops,
  394. };
  395. static const struct regulator_desc pm8994_hfsmps = {
  396. .linear_ranges = (struct linear_range[]) {
  397. REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500),
  398. REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
  399. },
  400. .n_linear_ranges = 2,
  401. .n_voltages = 159,
  402. .ops = &rpm_smps_ldo_ops,
  403. };
  404. static const struct regulator_desc pm8994_ftsmps = {
  405. .linear_ranges = (struct linear_range[]) {
  406. REGULATOR_LINEAR_RANGE(350000, 0, 199, 5000),
  407. REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000),
  408. },
  409. .n_linear_ranges = 2,
  410. .n_voltages = 350,
  411. .ops = &rpm_smps_ldo_ops,
  412. };
  413. static const struct regulator_desc pm8994_nldo = {
  414. .linear_ranges = (struct linear_range[]) {
  415. REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
  416. },
  417. .n_linear_ranges = 1,
  418. .n_voltages = 64,
  419. .ops = &rpm_smps_ldo_ops,
  420. };
  421. static const struct regulator_desc pm8994_pldo = {
  422. .linear_ranges = (struct linear_range[]) {
  423. REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
  424. REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
  425. REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
  426. },
  427. .n_linear_ranges = 3,
  428. .n_voltages = 164,
  429. .ops = &rpm_smps_ldo_ops,
  430. };
  431. static const struct regulator_desc pm8994_switch = {
  432. .ops = &rpm_switch_ops,
  433. };
  434. static const struct regulator_desc pm8994_lnldo = {
  435. .fixed_uV = 1740000,
  436. .n_voltages = 1,
  437. .ops = &rpm_smps_ldo_ops_fixed,
  438. };
  439. static const struct regulator_desc pmi8994_ftsmps = {
  440. .linear_ranges = (struct linear_range[]) {
  441. REGULATOR_LINEAR_RANGE(350000, 0, 199, 5000),
  442. REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000),
  443. },
  444. .n_linear_ranges = 2,
  445. .n_voltages = 350,
  446. .ops = &rpm_smps_ldo_ops,
  447. };
  448. static const struct regulator_desc pmi8994_hfsmps = {
  449. .linear_ranges = (struct linear_range[]) {
  450. REGULATOR_LINEAR_RANGE(350000, 0, 80, 12500),
  451. REGULATOR_LINEAR_RANGE(700000, 81, 141, 25000),
  452. },
  453. .n_linear_ranges = 2,
  454. .n_voltages = 142,
  455. .ops = &rpm_smps_ldo_ops,
  456. };
  457. static const struct regulator_desc pmi8994_bby = {
  458. .linear_ranges = (struct linear_range[]) {
  459. REGULATOR_LINEAR_RANGE(3000000, 0, 44, 50000),
  460. },
  461. .n_linear_ranges = 1,
  462. .n_voltages = 45,
  463. .ops = &rpm_bob_ops,
  464. };
  465. static const struct regulator_desc pm8998_ftsmps = {
  466. .linear_ranges = (struct linear_range[]) {
  467. REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000),
  468. },
  469. .n_linear_ranges = 1,
  470. .n_voltages = 259,
  471. .ops = &rpm_smps_ldo_ops,
  472. };
  473. static const struct regulator_desc pm8998_hfsmps = {
  474. .linear_ranges = (struct linear_range[]) {
  475. REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
  476. },
  477. .n_linear_ranges = 1,
  478. .n_voltages = 216,
  479. .ops = &rpm_smps_ldo_ops,
  480. };
  481. static const struct regulator_desc pm8998_nldo = {
  482. .linear_ranges = (struct linear_range[]) {
  483. REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
  484. },
  485. .n_linear_ranges = 1,
  486. .n_voltages = 128,
  487. .ops = &rpm_smps_ldo_ops,
  488. };
  489. static const struct regulator_desc pm8998_pldo = {
  490. .linear_ranges = (struct linear_range[]) {
  491. REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000),
  492. },
  493. .n_linear_ranges = 1,
  494. .n_voltages = 256,
  495. .ops = &rpm_smps_ldo_ops,
  496. };
  497. static const struct regulator_desc pm8998_pldo_lv = {
  498. .linear_ranges = (struct linear_range[]) {
  499. REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000),
  500. },
  501. .n_linear_ranges = 1,
  502. .n_voltages = 128,
  503. .ops = &rpm_smps_ldo_ops,
  504. };
  505. static const struct regulator_desc pm8998_switch = {
  506. .ops = &rpm_switch_ops,
  507. };
  508. static const struct regulator_desc pmi8998_bob = {
  509. .linear_ranges = (struct linear_range[]) {
  510. REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000),
  511. },
  512. .n_linear_ranges = 1,
  513. .n_voltages = 84,
  514. .ops = &rpm_bob_ops,
  515. };
  516. static const struct regulator_desc pm660_ftsmps = {
  517. .linear_ranges = (struct linear_range[]) {
  518. REGULATOR_LINEAR_RANGE(355000, 0, 199, 5000),
  519. },
  520. .n_linear_ranges = 1,
  521. .n_voltages = 200,
  522. .ops = &rpm_smps_ldo_ops,
  523. };
  524. static const struct regulator_desc pm660_hfsmps = {
  525. .linear_ranges = (struct linear_range[]) {
  526. REGULATOR_LINEAR_RANGE(320000, 0, 216, 8000),
  527. },
  528. .n_linear_ranges = 1,
  529. .n_voltages = 217,
  530. .ops = &rpm_smps_ldo_ops,
  531. };
  532. static const struct regulator_desc pm660_ht_nldo = {
  533. .linear_ranges = (struct linear_range[]) {
  534. REGULATOR_LINEAR_RANGE(312000, 0, 124, 8000),
  535. },
  536. .n_linear_ranges = 1,
  537. .n_voltages = 125,
  538. .ops = &rpm_smps_ldo_ops,
  539. };
  540. static const struct regulator_desc pm660_ht_lvpldo = {
  541. .linear_ranges = (struct linear_range[]) {
  542. REGULATOR_LINEAR_RANGE(1504000, 0, 62, 8000),
  543. },
  544. .n_linear_ranges = 1,
  545. .n_voltages = 63,
  546. .ops = &rpm_smps_ldo_ops,
  547. };
  548. static const struct regulator_desc pm660_nldo660 = {
  549. .linear_ranges = (struct linear_range[]) {
  550. REGULATOR_LINEAR_RANGE(320000, 0, 123, 8000),
  551. },
  552. .n_linear_ranges = 1,
  553. .n_voltages = 124,
  554. .ops = &rpm_smps_ldo_ops,
  555. };
  556. static const struct regulator_desc pm660_pldo660 = {
  557. .linear_ranges = (struct linear_range[]) {
  558. REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000),
  559. },
  560. .n_linear_ranges = 1,
  561. .n_voltages = 256,
  562. .ops = &rpm_smps_ldo_ops,
  563. };
  564. static const struct regulator_desc pm660l_bob = {
  565. .linear_ranges = (struct linear_range[]) {
  566. REGULATOR_LINEAR_RANGE(1800000, 0, 84, 32000),
  567. },
  568. .n_linear_ranges = 1,
  569. .n_voltages = 85,
  570. .ops = &rpm_bob_ops,
  571. };
  572. static const struct regulator_desc pm6125_ftsmps = {
  573. .linear_ranges = (struct linear_range[]) {
  574. REGULATOR_LINEAR_RANGE(300000, 0, 268, 4000),
  575. },
  576. .n_linear_ranges = 1,
  577. .n_voltages = 269,
  578. .ops = &rpm_smps_ldo_ops,
  579. };
  580. static const struct regulator_desc pms405_hfsmps3 = {
  581. .linear_ranges = (struct linear_range[]) {
  582. REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
  583. },
  584. .n_linear_ranges = 1,
  585. .n_voltages = 216,
  586. .ops = &rpm_smps_ldo_ops,
  587. };
  588. static const struct regulator_desc pms405_nldo300 = {
  589. .linear_ranges = (struct linear_range[]) {
  590. REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
  591. },
  592. .n_linear_ranges = 1,
  593. .n_voltages = 128,
  594. .ops = &rpm_smps_ldo_ops,
  595. };
  596. static const struct regulator_desc pms405_nldo1200 = {
  597. .linear_ranges = (struct linear_range[]) {
  598. REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
  599. },
  600. .n_linear_ranges = 1,
  601. .n_voltages = 128,
  602. .ops = &rpm_smps_ldo_ops,
  603. };
  604. static const struct regulator_desc pms405_pldo50 = {
  605. .linear_ranges = (struct linear_range[]) {
  606. REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000),
  607. },
  608. .n_linear_ranges = 1,
  609. .n_voltages = 129,
  610. .ops = &rpm_smps_ldo_ops,
  611. };
  612. static const struct regulator_desc pms405_pldo150 = {
  613. .linear_ranges = (struct linear_range[]) {
  614. REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000),
  615. },
  616. .n_linear_ranges = 1,
  617. .n_voltages = 129,
  618. .ops = &rpm_smps_ldo_ops,
  619. };
  620. static const struct regulator_desc pms405_pldo600 = {
  621. .linear_ranges = (struct linear_range[]) {
  622. REGULATOR_LINEAR_RANGE(1256000, 0, 98, 8000),
  623. },
  624. .n_linear_ranges = 1,
  625. .n_voltages = 99,
  626. .ops = &rpm_smps_ldo_ops,
  627. };
  628. static const struct regulator_desc mp5496_smpa2 = {
  629. .linear_ranges = (struct linear_range[]) {
  630. REGULATOR_LINEAR_RANGE(600000, 0, 127, 12500),
  631. },
  632. .n_linear_ranges = 1,
  633. .n_voltages = 128,
  634. .ops = &rpm_mp5496_ops,
  635. };
  636. static const struct regulator_desc mp5496_ldoa2 = {
  637. .linear_ranges = (struct linear_range[]) {
  638. REGULATOR_LINEAR_RANGE(800000, 0, 127, 25000),
  639. },
  640. .n_linear_ranges = 1,
  641. .n_voltages = 128,
  642. .ops = &rpm_mp5496_ops,
  643. };
  644. static const struct regulator_desc pm2250_lvftsmps = {
  645. .linear_ranges = (struct linear_range[]) {
  646. REGULATOR_LINEAR_RANGE(320000, 0, 269, 4000),
  647. },
  648. .n_linear_ranges = 1,
  649. .n_voltages = 270,
  650. .ops = &rpm_smps_ldo_ops,
  651. };
  652. static const struct regulator_desc pm2250_ftsmps = {
  653. .linear_ranges = (struct linear_range[]) {
  654. REGULATOR_LINEAR_RANGE(640000, 0, 269, 8000),
  655. },
  656. .n_linear_ranges = 1,
  657. .n_voltages = 270,
  658. .ops = &rpm_smps_ldo_ops,
  659. };
  660. struct rpm_regulator_data {
  661. const char *name;
  662. u32 type;
  663. u32 id;
  664. const struct regulator_desc *desc;
  665. const char *supply;
  666. };
  667. static const struct rpm_regulator_data rpm_mp5496_regulators[] = {
  668. { "s2", QCOM_SMD_RPM_SMPA, 2, &mp5496_smpa2, "s2" },
  669. { "l2", QCOM_SMD_RPM_LDOA, 2, &mp5496_ldoa2, "l2" },
  670. {}
  671. };
  672. static const struct rpm_regulator_data rpm_pm2250_regulators[] = {
  673. { "s1", QCOM_SMD_RPM_SMPA, 1, &pm2250_lvftsmps, "vdd_s1" },
  674. { "s2", QCOM_SMD_RPM_SMPA, 2, &pm2250_lvftsmps, "vdd_s2" },
  675. { "s3", QCOM_SMD_RPM_SMPA, 3, &pm2250_lvftsmps, "vdd_s3" },
  676. { "s4", QCOM_SMD_RPM_SMPA, 4, &pm2250_ftsmps, "vdd_s4" },
  677. { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
  678. { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
  679. { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
  680. { "l4", QCOM_SMD_RPM_LDOA, 4, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
  681. { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
  682. { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
  683. { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
  684. { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
  685. { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
  686. { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
  687. { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
  688. { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
  689. { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
  690. { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
  691. { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
  692. { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
  693. { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
  694. { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
  695. { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
  696. { "l20", QCOM_SMD_RPM_LDOA, 20, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
  697. { "l21", QCOM_SMD_RPM_LDOA, 21, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
  698. { "l22", QCOM_SMD_RPM_LDOA, 22, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
  699. {}
  700. };
  701. static const struct rpm_regulator_data rpm_pm6125_regulators[] = {
  702. { "s1", QCOM_SMD_RPM_SMPA, 1, &pm6125_ftsmps, "vdd_s1" },
  703. { "s2", QCOM_SMD_RPM_SMPA, 2, &pm6125_ftsmps, "vdd_s2" },
  704. { "s3", QCOM_SMD_RPM_SMPA, 3, &pm6125_ftsmps, "vdd_s3" },
  705. { "s4", QCOM_SMD_RPM_SMPA, 4, &pm6125_ftsmps, "vdd_s4" },
  706. { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8998_hfsmps, "vdd_s5" },
  707. { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8998_hfsmps, "vdd_s6" },
  708. { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_hfsmps, "vdd_s7" },
  709. { "s8", QCOM_SMD_RPM_SMPA, 8, &pm6125_ftsmps, "vdd_s8" },
  710. { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l7_l17_l18" },
  711. { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_nldo660, "vdd_l2_l3_l4" },
  712. { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l2_l3_l4" },
  713. { "l4", QCOM_SMD_RPM_LDOA, 4, &pm660_nldo660, "vdd_l2_l3_l4" },
  714. { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" },
  715. { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_nldo660, "vdd_l6_l8" },
  716. { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_nldo660, "vdd_l1_l7_l17_l18" },
  717. { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_nldo660, "vdd_l6_l8" },
  718. { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_ht_lvpldo, "vdd_l9_l11" },
  719. { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_ht_lvpldo, "vdd_l10_l13_l14" },
  720. { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_ht_lvpldo, "vdd_l9_l11" },
  721. { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_ht_lvpldo, "vdd_l12_l16" },
  722. { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l10_l13_l14" },
  723. { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l10_l13_l14" },
  724. { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" },
  725. { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_ht_lvpldo, "vdd_l12_l16" },
  726. { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_nldo660, "vdd_l1_l7_l17_l18" },
  727. { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_nldo660, "vdd_l1_l7_l17_l18" },
  728. { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" },
  729. { "l20", QCOM_SMD_RPM_LDOA, 20, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" },
  730. { "l21", QCOM_SMD_RPM_LDOA, 21, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" },
  731. { "l22", QCOM_SMD_RPM_LDOA, 22, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" },
  732. { "l23", QCOM_SMD_RPM_LDOA, 23, &pm660_pldo660, "vdd_l23_l24" },
  733. { "l24", QCOM_SMD_RPM_LDOA, 24, &pm660_pldo660, "vdd_l23_l24" },
  734. { }
  735. };
  736. static const struct rpm_regulator_data rpm_pm660_regulators[] = {
  737. { "s1", QCOM_SMD_RPM_SMPA, 1, &pm660_ftsmps, "vdd_s1" },
  738. { "s2", QCOM_SMD_RPM_SMPA, 2, &pm660_ftsmps, "vdd_s2" },
  739. { "s3", QCOM_SMD_RPM_SMPA, 3, &pm660_ftsmps, "vdd_s3" },
  740. { "s4", QCOM_SMD_RPM_SMPA, 4, &pm660_hfsmps, "vdd_s4" },
  741. { "s5", QCOM_SMD_RPM_SMPA, 5, &pm660_hfsmps, "vdd_s5" },
  742. { "s6", QCOM_SMD_RPM_SMPA, 6, &pm660_hfsmps, "vdd_s6" },
  743. { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l6_l7" },
  744. { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_ht_nldo, "vdd_l2_l3" },
  745. { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l2_l3" },
  746. /* l4 is unaccessible on PM660 */
  747. { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_ht_nldo, "vdd_l5" },
  748. { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_ht_nldo, "vdd_l1_l6_l7" },
  749. { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_ht_nldo, "vdd_l1_l6_l7" },
  750. { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
  751. { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
  752. { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
  753. { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
  754. { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
  755. { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
  756. { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
  757. { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
  758. { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
  759. { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
  760. { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
  761. { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
  762. { }
  763. };
  764. static const struct rpm_regulator_data rpm_pm660l_regulators[] = {
  765. { "s1", QCOM_SMD_RPM_SMPB, 1, &pm660_ftsmps, "vdd_s1" },
  766. { "s2", QCOM_SMD_RPM_SMPB, 2, &pm660_ftsmps, "vdd_s2" },
  767. { "s3", QCOM_SMD_RPM_RWCX, 0, &pm660_ftsmps, "vdd_s3_s4" },
  768. { "s5", QCOM_SMD_RPM_RWMX, 0, &pm660_ftsmps, "vdd_s5" },
  769. { "l1", QCOM_SMD_RPM_LDOB, 1, &pm660_nldo660, "vdd_l1_l9_l10" },
  770. { "l2", QCOM_SMD_RPM_LDOB, 2, &pm660_pldo660, "vdd_l2" },
  771. { "l3", QCOM_SMD_RPM_LDOB, 3, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
  772. { "l4", QCOM_SMD_RPM_LDOB, 4, &pm660_pldo660, "vdd_l4_l6" },
  773. { "l5", QCOM_SMD_RPM_LDOB, 5, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
  774. { "l6", QCOM_SMD_RPM_LDOB, 6, &pm660_pldo660, "vdd_l4_l6" },
  775. { "l7", QCOM_SMD_RPM_LDOB, 7, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
  776. { "l8", QCOM_SMD_RPM_LDOB, 8, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
  777. { "l9", QCOM_SMD_RPM_RWLC, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" },
  778. { "l10", QCOM_SMD_RPM_RWLM, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" },
  779. { "bob", QCOM_SMD_RPM_BOBB, 1, &pm660l_bob, "vdd_bob", },
  780. { }
  781. };
  782. static const struct rpm_regulator_data rpm_pm8226_regulators[] = {
  783. { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8226_hfsmps, "vdd_s1" },
  784. { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8226_ftsmps, "vdd_s2" },
  785. { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8226_hfsmps, "vdd_s3" },
  786. { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8226_hfsmps, "vdd_s4" },
  787. { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8226_hfsmps, "vdd_s5" },
  788. { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
  789. { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
  790. { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8226_nldo, "vdd_l3_l24_l26" },
  791. { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
  792. { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
  793. { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
  794. { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
  795. { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
  796. { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
  797. { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8226_pldo, "vdd_l10_l11_l13" },
  798. { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8226_pldo, "vdd_l10_l11_l13" },
  799. { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8226_pldo, "vdd_l12_l14" },
  800. { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8226_pldo, "vdd_l10_l11_l13" },
  801. { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8226_pldo, "vdd_l12_l14" },
  802. { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
  803. { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
  804. { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
  805. { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
  806. { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
  807. { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
  808. { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
  809. { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
  810. { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
  811. { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8226_nldo, "vdd_l3_l24_l26" },
  812. { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8226_pldo, "vdd_l25" },
  813. { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8226_nldo, "vdd_l3_l24_l26" },
  814. { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
  815. { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
  816. { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8226_switch, "vdd_lvs1" },
  817. {}
  818. };
  819. static const struct rpm_regulator_data rpm_pm8841_regulators[] = {
  820. { "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" },
  821. { "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" },
  822. { "s3", QCOM_SMD_RPM_SMPB, 3, &pm8x41_hfsmps, "vdd_s3" },
  823. { "s4", QCOM_SMD_RPM_SMPB, 4, &pm8841_ftsmps, "vdd_s4" },
  824. { "s5", QCOM_SMD_RPM_SMPB, 5, &pm8841_ftsmps, "vdd_s5" },
  825. { "s6", QCOM_SMD_RPM_SMPB, 6, &pm8841_ftsmps, "vdd_s6" },
  826. { "s7", QCOM_SMD_RPM_SMPB, 7, &pm8841_ftsmps, "vdd_s7" },
  827. { "s8", QCOM_SMD_RPM_SMPB, 8, &pm8841_ftsmps, "vdd_s8" },
  828. {}
  829. };
  830. static const struct rpm_regulator_data rpm_pm8909_regulators[] = {
  831. { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" },
  832. { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_hvo_smps, "vdd_s2" },
  833. { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1" },
  834. { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l2_l5" },
  835. { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l3_l6_l10" },
  836. { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l7" },
  837. { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8226_pldo, "vdd_l2_l5" },
  838. { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8226_pldo, "vdd_l3_l6_l10" },
  839. { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8226_pldo, "vdd_l4_l7" },
  840. { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l11_l15_l18" },
  841. { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l9_l12_l14_l17" },
  842. { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_nldo, "vdd_l3_l6_l10" },
  843. { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8226_pldo, "vdd_l8_l11_l15_l18" },
  844. { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l9_l12_l14_l17" },
  845. { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l13" },
  846. { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l9_l12_l14_l17" },
  847. { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l11_l15_l18" },
  848. { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l9_l12_l14_l17" },
  849. { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l11_l15_l18" },
  850. {}
  851. };
  852. static const struct rpm_regulator_data rpm_pm8916_regulators[] = {
  853. { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" },
  854. { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_lvo_smps, "vdd_s2" },
  855. { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8916_buck_lvo_smps, "vdd_s3" },
  856. { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8916_buck_hvo_smps, "vdd_s4" },
  857. { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1_l2_l3" },
  858. { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l1_l2_l3" },
  859. { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l1_l2_l3" },
  860. { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l5_l6" },
  861. { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8916_pldo, "vdd_l4_l5_l6" },
  862. { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8916_pldo, "vdd_l4_l5_l6" },
  863. { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8916_pldo, "vdd_l7" },
  864. { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
  865. { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
  866. { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  867. { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  868. { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  869. { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  870. { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  871. { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  872. { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  873. { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  874. { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  875. {}
  876. };
  877. static const struct rpm_regulator_data rpm_pm8941_regulators[] = {
  878. { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" },
  879. { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" },
  880. { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8x41_hfsmps, "vdd_s3" },
  881. { "s4", QCOM_SMD_RPM_BOOST, 1, &pm8941_boost },
  882. { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8941_nldo, "vdd_l1_l3" },
  883. { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8941_nldo, "vdd_l2_lvs1_2_3" },
  884. { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8941_nldo, "vdd_l1_l3" },
  885. { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8941_nldo, "vdd_l4_l11" },
  886. { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8941_lnldo, "vdd_l5_l7" },
  887. { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
  888. { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8941_lnldo, "vdd_l5_l7" },
  889. { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
  890. { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
  891. { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
  892. { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8941_nldo, "vdd_l4_l11" },
  893. { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
  894. { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
  895. { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
  896. { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
  897. { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
  898. { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
  899. { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
  900. { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
  901. { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
  902. { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8941_pldo, "vdd_l21" },
  903. { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
  904. { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
  905. { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
  906. { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8941_switch, "vdd_l2_lvs1_2_3" },
  907. { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8941_switch, "vdd_l2_lvs1_2_3" },
  908. { "lvs3", QCOM_SMD_RPM_VSA, 3, &pm8941_switch, "vdd_l2_lvs1_2_3" },
  909. { "5vs1", QCOM_SMD_RPM_VSA, 4, &pm8941_switch, "vin_5vs" },
  910. { "5vs2", QCOM_SMD_RPM_VSA, 5, &pm8941_switch, "vin_5vs" },
  911. {}
  912. };
  913. static const struct rpm_regulator_data rpm_pm8950_regulators[] = {
  914. { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8950_hfsmps, "vdd_s1" },
  915. { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8950_hfsmps, "vdd_s2" },
  916. { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8950_hfsmps, "vdd_s3" },
  917. { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8950_hfsmps, "vdd_s4" },
  918. /* S5 is managed via SPMI. */
  919. { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8950_hfsmps, "vdd_s6" },
  920. { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8950_ult_nldo, "vdd_l1_l19" },
  921. { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8950_ult_nldo, "vdd_l2_l23" },
  922. { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8950_ult_nldo, "vdd_l3" },
  923. /* L4 seems not to exist. */
  924. { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8950_pldo_lv, "vdd_l5_l6_l7_l16" },
  925. { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8950_pldo_lv, "vdd_l5_l6_l7_l16" },
  926. { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8950_pldo_lv, "vdd_l5_l6_l7_l16" },
  927. { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
  928. { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
  929. { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_nldo, "vdd_l9_l10_l13_l14_l15_l18"},
  930. { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
  931. { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
  932. { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
  933. { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
  934. { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
  935. { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l5_l6_l7_l16" },
  936. { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
  937. /* L18 seems not to exist. */
  938. { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8950_pldo, "vdd_l1_l19" },
  939. /* L20 & L21 seem not to exist. */
  940. { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8950_pldo, "vdd_l8_l11_l12_l17_l22" },
  941. { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8950_pldo, "vdd_l2_l23" },
  942. {}
  943. };
  944. static const struct rpm_regulator_data rpm_pm8953_regulators[] = {
  945. { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_hfsmps, "vdd_s1" },
  946. { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_hfsmps, "vdd_s2" },
  947. { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8998_hfsmps, "vdd_s3" },
  948. { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8998_hfsmps, "vdd_s4" },
  949. { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8950_ftsmps2p5, "vdd_s5" },
  950. { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8950_ftsmps2p5, "vdd_s6" },
  951. { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_hfsmps, "vdd_s7" },
  952. { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8953_ult_nldo, "vdd_l1" },
  953. { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8953_ult_nldo, "vdd_l2_l3" },
  954. { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8953_ult_nldo, "vdd_l2_l3" },
  955. { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
  956. { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
  957. { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
  958. { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
  959. { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
  960. { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
  961. { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
  962. { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
  963. { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
  964. { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
  965. { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
  966. { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
  967. { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
  968. { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
  969. { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
  970. { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8953_ult_nldo, "vdd_l4_l5_l6_l7_l16_l19" },
  971. { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8953_lnldo, "vdd_l20" },
  972. { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8953_lnldo, "vdd_l21" },
  973. { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
  974. { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8953_ult_nldo, "vdd_l23" },
  975. {}
  976. };
  977. static const struct rpm_regulator_data rpm_pm8994_regulators[] = {
  978. { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8994_ftsmps, "vdd_s1" },
  979. { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8994_ftsmps, "vdd_s2" },
  980. { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8994_hfsmps, "vdd_s3" },
  981. { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8994_hfsmps, "vdd_s4" },
  982. { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8994_hfsmps, "vdd_s5" },
  983. { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8994_ftsmps, "vdd_s6" },
  984. { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8994_hfsmps, "vdd_s7" },
  985. { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8994_ftsmps, "vdd_s8" },
  986. { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8994_ftsmps, "vdd_s9" },
  987. { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8994_ftsmps, "vdd_s10" },
  988. { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8994_ftsmps, "vdd_s11" },
  989. { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8994_ftsmps, "vdd_s12" },
  990. { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8994_nldo, "vdd_l1" },
  991. { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8994_nldo, "vdd_l2_l26_l28" },
  992. { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8994_nldo, "vdd_l3_l11" },
  993. { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8994_nldo, "vdd_l4_l27_l31" },
  994. { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8994_lnldo, "vdd_l5_l7" },
  995. { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8994_pldo, "vdd_l6_l12_l32" },
  996. { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8994_lnldo, "vdd_l5_l7" },
  997. { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8994_pldo, "vdd_l8_l16_l30" },
  998. { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
  999. { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
  1000. { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8994_nldo, "vdd_l3_l11" },
  1001. { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8994_pldo, "vdd_l6_l12_l32" },
  1002. { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
  1003. { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8994_pldo, "vdd_l14_l15" },
  1004. { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8994_pldo, "vdd_l14_l15" },
  1005. { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8994_pldo, "vdd_l8_l16_l30" },
  1006. { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8994_pldo, "vdd_l17_l29" },
  1007. { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
  1008. { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
  1009. { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8994_pldo, "vdd_l20_l21" },
  1010. { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8994_pldo, "vdd_l20_l21" },
  1011. { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
  1012. { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
  1013. { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
  1014. { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8994_pldo, "vdd_l25" },
  1015. { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8994_nldo, "vdd_l2_l26_l28" },
  1016. { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8994_nldo, "vdd_l4_l27_l31" },
  1017. { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8994_nldo, "vdd_l2_l26_l28" },
  1018. { "l29", QCOM_SMD_RPM_LDOA, 29, &pm8994_pldo, "vdd_l17_l29" },
  1019. { "l30", QCOM_SMD_RPM_LDOA, 30, &pm8994_pldo, "vdd_l8_l16_l30" },
  1020. { "l31", QCOM_SMD_RPM_LDOA, 31, &pm8994_nldo, "vdd_l4_l27_l31" },
  1021. { "l32", QCOM_SMD_RPM_LDOA, 32, &pm8994_pldo, "vdd_l6_l12_l32" },
  1022. { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8994_switch, "vdd_lvs1_2" },
  1023. { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8994_switch, "vdd_lvs1_2" },
  1024. {}
  1025. };
  1026. static const struct rpm_regulator_data rpm_pm8998_regulators[] = {
  1027. { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_ftsmps, "vdd_s1" },
  1028. { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_ftsmps, "vdd_s2" },
  1029. { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8998_hfsmps, "vdd_s3" },
  1030. { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8998_hfsmps, "vdd_s4" },
  1031. { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8998_hfsmps, "vdd_s5" },
  1032. { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8998_ftsmps, "vdd_s6" },
  1033. { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_ftsmps, "vdd_s7" },
  1034. { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8998_ftsmps, "vdd_s8" },
  1035. { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8998_ftsmps, "vdd_s9" },
  1036. { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8998_ftsmps, "vdd_s10" },
  1037. { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8998_ftsmps, "vdd_s11" },
  1038. { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8998_ftsmps, "vdd_s12" },
  1039. { "s13", QCOM_SMD_RPM_SMPA, 13, &pm8998_ftsmps, "vdd_s13" },
  1040. { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8998_nldo, "vdd_l1_l27" },
  1041. { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8998_nldo, "vdd_l2_l8_l17" },
  1042. { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8998_nldo, "vdd_l3_l11" },
  1043. { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8998_nldo, "vdd_l4_l5" },
  1044. { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8998_nldo, "vdd_l4_l5" },
  1045. { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8998_pldo, "vdd_l6" },
  1046. { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
  1047. { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8998_nldo, "vdd_l2_l8_l17" },
  1048. { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8998_pldo, "vdd_l9" },
  1049. { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8998_pldo, "vdd_l10_l23_l25" },
  1050. { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8998_nldo, "vdd_l3_l11" },
  1051. { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
  1052. { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8998_pldo, "vdd_l13_l19_l21" },
  1053. { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
  1054. { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
  1055. { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8998_pldo, "vdd_l16_l28" },
  1056. { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8998_nldo, "vdd_l2_l8_l17" },
  1057. { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8998_pldo, "vdd_l18_l22" },
  1058. { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8998_pldo, "vdd_l13_l19_l21" },
  1059. { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8998_pldo, "vdd_l20_l24" },
  1060. { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8998_pldo, "vdd_l13_l19_l21" },
  1061. { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8998_pldo, "vdd_l18_l22" },
  1062. { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8998_pldo, "vdd_l10_l23_l25" },
  1063. { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8998_pldo, "vdd_l20_l24" },
  1064. { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8998_pldo, "vdd_l10_l23_l25" },
  1065. { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8998_nldo, "vdd_l26" },
  1066. { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8998_nldo, "vdd_l1_l27" },
  1067. { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8998_pldo, "vdd_l16_l28" },
  1068. { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8998_switch, "vdd_lvs1_lvs2" },
  1069. { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8998_switch, "vdd_lvs1_lvs2" },
  1070. {}
  1071. };
  1072. static const struct rpm_regulator_data rpm_pma8084_regulators[] = {
  1073. { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" },
  1074. { "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" },
  1075. { "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" },
  1076. { "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" },
  1077. { "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" },
  1078. { "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" },
  1079. { "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" },
  1080. { "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" },
  1081. { "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" },
  1082. { "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" },
  1083. { "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" },
  1084. { "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" },
  1085. { "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" },
  1086. { "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
  1087. { "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
  1088. { "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
  1089. { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" },
  1090. { "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
  1091. { "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" },
  1092. { "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" },
  1093. { "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
  1094. { "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
  1095. { "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" },
  1096. { "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
  1097. { "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
  1098. { "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
  1099. { "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
  1100. { "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" },
  1101. { "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" },
  1102. { "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" },
  1103. { "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" },
  1104. { "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
  1105. { "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" },
  1106. { "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" },
  1107. { "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
  1108. { "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
  1109. { "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" },
  1110. { "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
  1111. { "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
  1112. { "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch },
  1113. { "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch },
  1114. { "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch },
  1115. { "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch },
  1116. { "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch },
  1117. {}
  1118. };
  1119. static const struct rpm_regulator_data rpm_pmi8994_regulators[] = {
  1120. { "s1", QCOM_SMD_RPM_SMPB, 1, &pmi8994_ftsmps, "vdd_s1" },
  1121. { "s2", QCOM_SMD_RPM_SMPB, 2, &pmi8994_hfsmps, "vdd_s2" },
  1122. { "s3", QCOM_SMD_RPM_SMPB, 3, &pmi8994_hfsmps, "vdd_s3" },
  1123. { "boost-bypass", QCOM_SMD_RPM_BBYB, 1, &pmi8994_bby, "vdd_bst_byp" },
  1124. {}
  1125. };
  1126. static const struct rpm_regulator_data rpm_pmi8998_regulators[] = {
  1127. { "bob", QCOM_SMD_RPM_BOBB, 1, &pmi8998_bob, "vdd_bob" },
  1128. {}
  1129. };
  1130. static const struct rpm_regulator_data rpm_pms405_regulators[] = {
  1131. { "s1", QCOM_SMD_RPM_SMPA, 1, &pms405_hfsmps3, "vdd_s1" },
  1132. { "s2", QCOM_SMD_RPM_SMPA, 2, &pms405_hfsmps3, "vdd_s2" },
  1133. { "s3", QCOM_SMD_RPM_SMPA, 3, &pms405_hfsmps3, "vdd_s3" },
  1134. { "s4", QCOM_SMD_RPM_SMPA, 4, &pms405_hfsmps3, "vdd_s4" },
  1135. { "s5", QCOM_SMD_RPM_SMPA, 5, &pms405_hfsmps3, "vdd_s5" },
  1136. { "l1", QCOM_SMD_RPM_LDOA, 1, &pms405_nldo1200, "vdd_l1_l2" },
  1137. { "l2", QCOM_SMD_RPM_LDOA, 2, &pms405_nldo1200, "vdd_l1_l2" },
  1138. { "l3", QCOM_SMD_RPM_LDOA, 3, &pms405_nldo1200, "vdd_l3_l8" },
  1139. { "l4", QCOM_SMD_RPM_LDOA, 4, &pms405_nldo300, "vdd_l4" },
  1140. { "l5", QCOM_SMD_RPM_LDOA, 5, &pms405_pldo600, "vdd_l5_l6" },
  1141. { "l6", QCOM_SMD_RPM_LDOA, 6, &pms405_pldo600, "vdd_l5_l6" },
  1142. { "l7", QCOM_SMD_RPM_LDOA, 7, &pms405_pldo150, "vdd_l7" },
  1143. { "l8", QCOM_SMD_RPM_LDOA, 8, &pms405_nldo1200, "vdd_l3_l8" },
  1144. { "l9", QCOM_SMD_RPM_LDOA, 9, &pms405_nldo1200, "vdd_l9" },
  1145. { "l10", QCOM_SMD_RPM_LDOA, 10, &pms405_pldo50, "vdd_l10_l11_l12_l13" },
  1146. { "l11", QCOM_SMD_RPM_LDOA, 11, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
  1147. { "l12", QCOM_SMD_RPM_LDOA, 12, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
  1148. { "l13", QCOM_SMD_RPM_LDOA, 13, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
  1149. {}
  1150. };
  1151. static const struct of_device_id rpm_of_match[] = {
  1152. { .compatible = "qcom,rpm-mp5496-regulators", .data = &rpm_mp5496_regulators },
  1153. { .compatible = "qcom,rpm-pm2250-regulators", .data = &rpm_pm2250_regulators },
  1154. { .compatible = "qcom,rpm-pm6125-regulators", .data = &rpm_pm6125_regulators },
  1155. { .compatible = "qcom,rpm-pm660-regulators", .data = &rpm_pm660_regulators },
  1156. { .compatible = "qcom,rpm-pm660l-regulators", .data = &rpm_pm660l_regulators },
  1157. { .compatible = "qcom,rpm-pm8226-regulators", .data = &rpm_pm8226_regulators },
  1158. { .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators },
  1159. { .compatible = "qcom,rpm-pm8909-regulators", .data = &rpm_pm8909_regulators },
  1160. { .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators },
  1161. { .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators },
  1162. { .compatible = "qcom,rpm-pm8950-regulators", .data = &rpm_pm8950_regulators },
  1163. { .compatible = "qcom,rpm-pm8953-regulators", .data = &rpm_pm8953_regulators },
  1164. { .compatible = "qcom,rpm-pm8994-regulators", .data = &rpm_pm8994_regulators },
  1165. { .compatible = "qcom,rpm-pm8998-regulators", .data = &rpm_pm8998_regulators },
  1166. { .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators },
  1167. { .compatible = "qcom,rpm-pmi8994-regulators", .data = &rpm_pmi8994_regulators },
  1168. { .compatible = "qcom,rpm-pmi8998-regulators", .data = &rpm_pmi8998_regulators },
  1169. { .compatible = "qcom,rpm-pms405-regulators", .data = &rpm_pms405_regulators },
  1170. {}
  1171. };
  1172. MODULE_DEVICE_TABLE(of, rpm_of_match);
  1173. /**
  1174. * rpm_regulator_init_vreg() - initialize all attributes of a qcom_smd-regulator
  1175. * @vreg: Pointer to the individual qcom_smd-regulator resource
  1176. * @dev: Pointer to the top level qcom_smd-regulator PMIC device
  1177. * @node: Pointer to the individual qcom_smd-regulator resource
  1178. * device node
  1179. * @rpm: Pointer to the rpm bus node
  1180. * @pmic_rpm_data: Pointer to a null-terminated array of qcom_smd-regulator
  1181. * resources defined for the top level PMIC device
  1182. *
  1183. * Return: 0 on success, errno on failure
  1184. */
  1185. static int rpm_regulator_init_vreg(struct qcom_rpm_reg *vreg, struct device *dev,
  1186. struct device_node *node, struct qcom_smd_rpm *rpm,
  1187. const struct rpm_regulator_data *pmic_rpm_data)
  1188. {
  1189. struct regulator_config config = {};
  1190. const struct rpm_regulator_data *rpm_data;
  1191. struct regulator_dev *rdev;
  1192. int ret;
  1193. for (rpm_data = pmic_rpm_data; rpm_data->name; rpm_data++)
  1194. if (of_node_name_eq(node, rpm_data->name))
  1195. break;
  1196. if (!rpm_data->name) {
  1197. dev_err(dev, "Unknown regulator %pOFn\n", node);
  1198. return -EINVAL;
  1199. }
  1200. vreg->dev = dev;
  1201. vreg->rpm = rpm;
  1202. vreg->type = rpm_data->type;
  1203. vreg->id = rpm_data->id;
  1204. memcpy(&vreg->desc, rpm_data->desc, sizeof(vreg->desc));
  1205. vreg->desc.name = rpm_data->name;
  1206. vreg->desc.supply_name = rpm_data->supply;
  1207. vreg->desc.owner = THIS_MODULE;
  1208. vreg->desc.type = REGULATOR_VOLTAGE;
  1209. vreg->desc.of_match = rpm_data->name;
  1210. config.dev = dev;
  1211. config.of_node = node;
  1212. config.driver_data = vreg;
  1213. rdev = devm_regulator_register(dev, &vreg->desc, &config);
  1214. if (IS_ERR(rdev)) {
  1215. ret = PTR_ERR(rdev);
  1216. dev_err(dev, "%pOFn: devm_regulator_register() failed, ret=%d\n", node, ret);
  1217. return ret;
  1218. }
  1219. return 0;
  1220. }
  1221. static int rpm_reg_probe(struct platform_device *pdev)
  1222. {
  1223. struct device *dev = &pdev->dev;
  1224. const struct rpm_regulator_data *vreg_data;
  1225. struct device_node *node;
  1226. struct qcom_rpm_reg *vreg;
  1227. struct qcom_smd_rpm *rpm;
  1228. int ret;
  1229. rpm = dev_get_drvdata(pdev->dev.parent);
  1230. if (!rpm) {
  1231. dev_err(&pdev->dev, "Unable to retrieve handle to rpm\n");
  1232. return -ENODEV;
  1233. }
  1234. vreg_data = of_device_get_match_data(dev);
  1235. if (!vreg_data)
  1236. return -ENODEV;
  1237. for_each_available_child_of_node(dev->of_node, node) {
  1238. vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL);
  1239. if (!vreg) {
  1240. of_node_put(node);
  1241. return -ENOMEM;
  1242. }
  1243. ret = rpm_regulator_init_vreg(vreg, dev, node, rpm, vreg_data);
  1244. if (ret < 0) {
  1245. of_node_put(node);
  1246. return ret;
  1247. }
  1248. }
  1249. return 0;
  1250. }
  1251. static struct platform_driver rpm_reg_driver = {
  1252. .probe = rpm_reg_probe,
  1253. .driver = {
  1254. .name = "qcom_rpm_smd_regulator",
  1255. .of_match_table = rpm_of_match,
  1256. },
  1257. };
  1258. static int __init rpm_reg_init(void)
  1259. {
  1260. return platform_driver_register(&rpm_reg_driver);
  1261. }
  1262. subsys_initcall(rpm_reg_init);
  1263. static void __exit rpm_reg_exit(void)
  1264. {
  1265. platform_driver_unregister(&rpm_reg_driver);
  1266. }
  1267. module_exit(rpm_reg_exit)
  1268. MODULE_DESCRIPTION("Qualcomm RPM regulator driver");
  1269. MODULE_LICENSE("GPL v2");