max77620-regulator.c 25 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Maxim MAX77620 Regulator driver
  4. *
  5. * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
  6. *
  7. * Author: Mallikarjun Kasoju <[email protected]>
  8. * Laxman Dewangan <[email protected]>
  9. */
  10. #include <linux/init.h>
  11. #include <linux/mfd/max77620.h>
  12. #include <linux/module.h>
  13. #include <linux/of.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/regmap.h>
  16. #include <linux/regulator/driver.h>
  17. #include <linux/regulator/machine.h>
  18. #include <linux/regulator/of_regulator.h>
  19. #define max77620_rails(_name) "max77620-"#_name
  20. /* Power Mode */
  21. #define MAX77620_POWER_MODE_NORMAL 3
  22. #define MAX77620_POWER_MODE_LPM 2
  23. #define MAX77620_POWER_MODE_GLPM 1
  24. #define MAX77620_POWER_MODE_DISABLE 0
  25. /* SD Slew Rate */
  26. #define MAX77620_SD_SR_13_75 0
  27. #define MAX77620_SD_SR_27_5 1
  28. #define MAX77620_SD_SR_55 2
  29. #define MAX77620_SD_SR_100 3
  30. enum max77620_regulators {
  31. MAX77620_REGULATOR_ID_SD0,
  32. MAX77620_REGULATOR_ID_SD1,
  33. MAX77620_REGULATOR_ID_SD2,
  34. MAX77620_REGULATOR_ID_SD3,
  35. MAX77620_REGULATOR_ID_SD4,
  36. MAX77620_REGULATOR_ID_LDO0,
  37. MAX77620_REGULATOR_ID_LDO1,
  38. MAX77620_REGULATOR_ID_LDO2,
  39. MAX77620_REGULATOR_ID_LDO3,
  40. MAX77620_REGULATOR_ID_LDO4,
  41. MAX77620_REGULATOR_ID_LDO5,
  42. MAX77620_REGULATOR_ID_LDO6,
  43. MAX77620_REGULATOR_ID_LDO7,
  44. MAX77620_REGULATOR_ID_LDO8,
  45. MAX77620_NUM_REGS,
  46. };
  47. /* Regulator types */
  48. enum max77620_regulator_type {
  49. MAX77620_REGULATOR_TYPE_SD,
  50. MAX77620_REGULATOR_TYPE_LDO_N,
  51. MAX77620_REGULATOR_TYPE_LDO_P,
  52. };
  53. struct max77620_regulator_info {
  54. u8 type;
  55. u8 fps_addr;
  56. u8 volt_addr;
  57. u8 cfg_addr;
  58. u8 power_mode_mask;
  59. u8 power_mode_shift;
  60. u8 remote_sense_addr;
  61. u8 remote_sense_mask;
  62. struct regulator_desc desc;
  63. };
  64. struct max77620_regulator_pdata {
  65. int active_fps_src;
  66. int active_fps_pd_slot;
  67. int active_fps_pu_slot;
  68. int suspend_fps_src;
  69. int suspend_fps_pd_slot;
  70. int suspend_fps_pu_slot;
  71. int current_mode;
  72. int power_ok;
  73. int ramp_rate_setting;
  74. };
  75. struct max77620_regulator {
  76. struct device *dev;
  77. struct regmap *rmap;
  78. struct max77620_regulator_info *rinfo[MAX77620_NUM_REGS];
  79. struct max77620_regulator_pdata reg_pdata[MAX77620_NUM_REGS];
  80. int enable_power_mode[MAX77620_NUM_REGS];
  81. int current_power_mode[MAX77620_NUM_REGS];
  82. int active_fps_src[MAX77620_NUM_REGS];
  83. };
  84. #define fps_src_name(fps_src) \
  85. (fps_src == MAX77620_FPS_SRC_0 ? "FPS_SRC_0" : \
  86. fps_src == MAX77620_FPS_SRC_1 ? "FPS_SRC_1" : \
  87. fps_src == MAX77620_FPS_SRC_2 ? "FPS_SRC_2" : "FPS_SRC_NONE")
  88. static int max77620_regulator_get_fps_src(struct max77620_regulator *pmic,
  89. int id)
  90. {
  91. struct max77620_regulator_info *rinfo = pmic->rinfo[id];
  92. unsigned int val;
  93. int ret;
  94. ret = regmap_read(pmic->rmap, rinfo->fps_addr, &val);
  95. if (ret < 0) {
  96. dev_err(pmic->dev, "Reg 0x%02x read failed %d\n",
  97. rinfo->fps_addr, ret);
  98. return ret;
  99. }
  100. return (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT;
  101. }
  102. static int max77620_regulator_set_fps_src(struct max77620_regulator *pmic,
  103. int fps_src, int id)
  104. {
  105. struct max77620_regulator_info *rinfo = pmic->rinfo[id];
  106. unsigned int val;
  107. int ret;
  108. if (!rinfo)
  109. return 0;
  110. switch (fps_src) {
  111. case MAX77620_FPS_SRC_0:
  112. case MAX77620_FPS_SRC_1:
  113. case MAX77620_FPS_SRC_2:
  114. case MAX77620_FPS_SRC_NONE:
  115. break;
  116. case MAX77620_FPS_SRC_DEF:
  117. ret = regmap_read(pmic->rmap, rinfo->fps_addr, &val);
  118. if (ret < 0) {
  119. dev_err(pmic->dev, "Reg 0x%02x read failed %d\n",
  120. rinfo->fps_addr, ret);
  121. return ret;
  122. }
  123. ret = (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT;
  124. pmic->active_fps_src[id] = ret;
  125. return 0;
  126. default:
  127. dev_err(pmic->dev, "Invalid FPS %d for regulator %d\n",
  128. fps_src, id);
  129. return -EINVAL;
  130. }
  131. ret = regmap_update_bits(pmic->rmap, rinfo->fps_addr,
  132. MAX77620_FPS_SRC_MASK,
  133. fps_src << MAX77620_FPS_SRC_SHIFT);
  134. if (ret < 0) {
  135. dev_err(pmic->dev, "Reg 0x%02x update failed %d\n",
  136. rinfo->fps_addr, ret);
  137. return ret;
  138. }
  139. pmic->active_fps_src[id] = fps_src;
  140. return 0;
  141. }
  142. static int max77620_regulator_set_fps_slots(struct max77620_regulator *pmic,
  143. int id, bool is_suspend)
  144. {
  145. struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];
  146. struct max77620_regulator_info *rinfo = pmic->rinfo[id];
  147. unsigned int val = 0;
  148. unsigned int mask = 0;
  149. int pu = rpdata->active_fps_pu_slot;
  150. int pd = rpdata->active_fps_pd_slot;
  151. int ret = 0;
  152. if (!rinfo)
  153. return 0;
  154. if (is_suspend) {
  155. pu = rpdata->suspend_fps_pu_slot;
  156. pd = rpdata->suspend_fps_pd_slot;
  157. }
  158. /* FPS power up period setting */
  159. if (pu >= 0) {
  160. val |= (pu << MAX77620_FPS_PU_PERIOD_SHIFT);
  161. mask |= MAX77620_FPS_PU_PERIOD_MASK;
  162. }
  163. /* FPS power down period setting */
  164. if (pd >= 0) {
  165. val |= (pd << MAX77620_FPS_PD_PERIOD_SHIFT);
  166. mask |= MAX77620_FPS_PD_PERIOD_MASK;
  167. }
  168. if (mask) {
  169. ret = regmap_update_bits(pmic->rmap, rinfo->fps_addr,
  170. mask, val);
  171. if (ret < 0) {
  172. dev_err(pmic->dev, "Reg 0x%02x update failed: %d\n",
  173. rinfo->fps_addr, ret);
  174. return ret;
  175. }
  176. }
  177. return ret;
  178. }
  179. static int max77620_regulator_set_power_mode(struct max77620_regulator *pmic,
  180. int power_mode, int id)
  181. {
  182. struct max77620_regulator_info *rinfo = pmic->rinfo[id];
  183. u8 mask = rinfo->power_mode_mask;
  184. u8 shift = rinfo->power_mode_shift;
  185. u8 addr;
  186. int ret;
  187. switch (rinfo->type) {
  188. case MAX77620_REGULATOR_TYPE_SD:
  189. addr = rinfo->cfg_addr;
  190. break;
  191. default:
  192. addr = rinfo->volt_addr;
  193. break;
  194. }
  195. ret = regmap_update_bits(pmic->rmap, addr, mask, power_mode << shift);
  196. if (ret < 0) {
  197. dev_err(pmic->dev, "Regulator %d mode set failed: %d\n",
  198. id, ret);
  199. return ret;
  200. }
  201. pmic->current_power_mode[id] = power_mode;
  202. return ret;
  203. }
  204. static int max77620_regulator_get_power_mode(struct max77620_regulator *pmic,
  205. int id)
  206. {
  207. struct max77620_regulator_info *rinfo = pmic->rinfo[id];
  208. unsigned int val, addr;
  209. u8 mask = rinfo->power_mode_mask;
  210. u8 shift = rinfo->power_mode_shift;
  211. int ret;
  212. switch (rinfo->type) {
  213. case MAX77620_REGULATOR_TYPE_SD:
  214. addr = rinfo->cfg_addr;
  215. break;
  216. default:
  217. addr = rinfo->volt_addr;
  218. break;
  219. }
  220. ret = regmap_read(pmic->rmap, addr, &val);
  221. if (ret < 0) {
  222. dev_err(pmic->dev, "Regulator %d: Reg 0x%02x read failed: %d\n",
  223. id, addr, ret);
  224. return ret;
  225. }
  226. return (val & mask) >> shift;
  227. }
  228. static int max77620_read_slew_rate(struct max77620_regulator *pmic, int id)
  229. {
  230. struct max77620_regulator_info *rinfo = pmic->rinfo[id];
  231. unsigned int rval;
  232. int slew_rate;
  233. int ret;
  234. ret = regmap_read(pmic->rmap, rinfo->cfg_addr, &rval);
  235. if (ret < 0) {
  236. dev_err(pmic->dev, "Register 0x%02x read failed: %d\n",
  237. rinfo->cfg_addr, ret);
  238. return ret;
  239. }
  240. switch (rinfo->type) {
  241. case MAX77620_REGULATOR_TYPE_SD:
  242. slew_rate = (rval >> MAX77620_SD_SR_SHIFT) & 0x3;
  243. switch (slew_rate) {
  244. case 0:
  245. slew_rate = 13750;
  246. break;
  247. case 1:
  248. slew_rate = 27500;
  249. break;
  250. case 2:
  251. slew_rate = 55000;
  252. break;
  253. case 3:
  254. slew_rate = 100000;
  255. break;
  256. }
  257. rinfo->desc.ramp_delay = slew_rate;
  258. break;
  259. default:
  260. slew_rate = rval & 0x1;
  261. switch (slew_rate) {
  262. case 0:
  263. slew_rate = 100000;
  264. break;
  265. case 1:
  266. slew_rate = 5000;
  267. break;
  268. }
  269. rinfo->desc.ramp_delay = slew_rate;
  270. break;
  271. }
  272. return 0;
  273. }
  274. static int max77620_set_slew_rate(struct max77620_regulator *pmic, int id,
  275. int slew_rate)
  276. {
  277. struct max77620_regulator_info *rinfo = pmic->rinfo[id];
  278. unsigned int val;
  279. int ret;
  280. u8 mask;
  281. if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) {
  282. if (slew_rate <= 13750)
  283. val = 0;
  284. else if (slew_rate <= 27500)
  285. val = 1;
  286. else if (slew_rate <= 55000)
  287. val = 2;
  288. else
  289. val = 3;
  290. val <<= MAX77620_SD_SR_SHIFT;
  291. mask = MAX77620_SD_SR_MASK;
  292. } else {
  293. if (slew_rate <= 5000)
  294. val = 1;
  295. else
  296. val = 0;
  297. mask = MAX77620_LDO_SLEW_RATE_MASK;
  298. }
  299. ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr, mask, val);
  300. if (ret < 0) {
  301. dev_err(pmic->dev, "Regulator %d slew rate set failed: %d\n",
  302. id, ret);
  303. return ret;
  304. }
  305. return 0;
  306. }
  307. static int max77620_config_power_ok(struct max77620_regulator *pmic, int id)
  308. {
  309. struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];
  310. struct max77620_regulator_info *rinfo = pmic->rinfo[id];
  311. struct max77620_chip *chip = dev_get_drvdata(pmic->dev->parent);
  312. u8 val, mask;
  313. int ret;
  314. switch (chip->chip_id) {
  315. case MAX20024:
  316. if (rpdata->power_ok >= 0) {
  317. if (rinfo->type == MAX77620_REGULATOR_TYPE_SD)
  318. mask = MAX20024_SD_CFG1_MPOK_MASK;
  319. else
  320. mask = MAX20024_LDO_CFG2_MPOK_MASK;
  321. val = rpdata->power_ok ? mask : 0;
  322. ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr,
  323. mask, val);
  324. if (ret < 0) {
  325. dev_err(pmic->dev, "Reg 0x%02x update failed %d\n",
  326. rinfo->cfg_addr, ret);
  327. return ret;
  328. }
  329. }
  330. break;
  331. default:
  332. break;
  333. }
  334. return 0;
  335. }
  336. static int max77620_init_pmic(struct max77620_regulator *pmic, int id)
  337. {
  338. struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];
  339. int ret;
  340. max77620_config_power_ok(pmic, id);
  341. /* Update power mode */
  342. ret = max77620_regulator_get_power_mode(pmic, id);
  343. if (ret < 0)
  344. return ret;
  345. pmic->current_power_mode[id] = ret;
  346. pmic->enable_power_mode[id] = MAX77620_POWER_MODE_NORMAL;
  347. if (rpdata->active_fps_src == MAX77620_FPS_SRC_DEF) {
  348. ret = max77620_regulator_get_fps_src(pmic, id);
  349. if (ret < 0)
  350. return ret;
  351. rpdata->active_fps_src = ret;
  352. }
  353. /* If rails are externally control of FPS then enable it always. */
  354. if (rpdata->active_fps_src == MAX77620_FPS_SRC_NONE) {
  355. ret = max77620_regulator_set_power_mode(pmic,
  356. pmic->enable_power_mode[id], id);
  357. if (ret < 0)
  358. return ret;
  359. } else {
  360. if (pmic->current_power_mode[id] !=
  361. pmic->enable_power_mode[id]) {
  362. ret = max77620_regulator_set_power_mode(pmic,
  363. pmic->enable_power_mode[id], id);
  364. if (ret < 0)
  365. return ret;
  366. }
  367. }
  368. ret = max77620_regulator_set_fps_src(pmic, rpdata->active_fps_src, id);
  369. if (ret < 0)
  370. return ret;
  371. ret = max77620_regulator_set_fps_slots(pmic, id, false);
  372. if (ret < 0)
  373. return ret;
  374. if (rpdata->ramp_rate_setting) {
  375. ret = max77620_set_slew_rate(pmic, id,
  376. rpdata->ramp_rate_setting);
  377. if (ret < 0)
  378. return ret;
  379. }
  380. return 0;
  381. }
  382. static int max77620_regulator_enable(struct regulator_dev *rdev)
  383. {
  384. struct max77620_regulator *pmic = rdev_get_drvdata(rdev);
  385. int id = rdev_get_id(rdev);
  386. if (pmic->active_fps_src[id] != MAX77620_FPS_SRC_NONE)
  387. return 0;
  388. return max77620_regulator_set_power_mode(pmic,
  389. pmic->enable_power_mode[id], id);
  390. }
  391. static int max77620_regulator_disable(struct regulator_dev *rdev)
  392. {
  393. struct max77620_regulator *pmic = rdev_get_drvdata(rdev);
  394. int id = rdev_get_id(rdev);
  395. if (pmic->active_fps_src[id] != MAX77620_FPS_SRC_NONE)
  396. return 0;
  397. return max77620_regulator_set_power_mode(pmic,
  398. MAX77620_POWER_MODE_DISABLE, id);
  399. }
  400. static int max77620_regulator_is_enabled(struct regulator_dev *rdev)
  401. {
  402. struct max77620_regulator *pmic = rdev_get_drvdata(rdev);
  403. int id = rdev_get_id(rdev);
  404. int ret;
  405. if (pmic->active_fps_src[id] != MAX77620_FPS_SRC_NONE)
  406. return 1;
  407. ret = max77620_regulator_get_power_mode(pmic, id);
  408. if (ret < 0)
  409. return ret;
  410. if (ret != MAX77620_POWER_MODE_DISABLE)
  411. return 1;
  412. return 0;
  413. }
  414. static int max77620_regulator_set_mode(struct regulator_dev *rdev,
  415. unsigned int mode)
  416. {
  417. struct max77620_regulator *pmic = rdev_get_drvdata(rdev);
  418. int id = rdev_get_id(rdev);
  419. struct max77620_regulator_info *rinfo = pmic->rinfo[id];
  420. struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];
  421. bool fpwm = false;
  422. int power_mode;
  423. int ret;
  424. u8 val;
  425. switch (mode) {
  426. case REGULATOR_MODE_FAST:
  427. fpwm = true;
  428. power_mode = MAX77620_POWER_MODE_NORMAL;
  429. break;
  430. case REGULATOR_MODE_NORMAL:
  431. power_mode = MAX77620_POWER_MODE_NORMAL;
  432. break;
  433. case REGULATOR_MODE_IDLE:
  434. power_mode = MAX77620_POWER_MODE_LPM;
  435. break;
  436. default:
  437. dev_err(pmic->dev, "Regulator %d mode %d is invalid\n",
  438. id, mode);
  439. return -EINVAL;
  440. }
  441. if (rinfo->type != MAX77620_REGULATOR_TYPE_SD)
  442. goto skip_fpwm;
  443. val = (fpwm) ? MAX77620_SD_FPWM_MASK : 0;
  444. ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr,
  445. MAX77620_SD_FPWM_MASK, val);
  446. if (ret < 0) {
  447. dev_err(pmic->dev, "Reg 0x%02x update failed: %d\n",
  448. rinfo->cfg_addr, ret);
  449. return ret;
  450. }
  451. rpdata->current_mode = mode;
  452. skip_fpwm:
  453. ret = max77620_regulator_set_power_mode(pmic, power_mode, id);
  454. if (ret < 0)
  455. return ret;
  456. pmic->enable_power_mode[id] = power_mode;
  457. return 0;
  458. }
  459. static unsigned int max77620_regulator_get_mode(struct regulator_dev *rdev)
  460. {
  461. struct max77620_regulator *pmic = rdev_get_drvdata(rdev);
  462. int id = rdev_get_id(rdev);
  463. struct max77620_regulator_info *rinfo = pmic->rinfo[id];
  464. int fpwm = 0;
  465. int ret;
  466. int pm_mode, reg_mode;
  467. unsigned int val;
  468. ret = max77620_regulator_get_power_mode(pmic, id);
  469. if (ret < 0)
  470. return 0;
  471. pm_mode = ret;
  472. if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) {
  473. ret = regmap_read(pmic->rmap, rinfo->cfg_addr, &val);
  474. if (ret < 0) {
  475. dev_err(pmic->dev, "Reg 0x%02x read failed: %d\n",
  476. rinfo->cfg_addr, ret);
  477. return ret;
  478. }
  479. fpwm = !!(val & MAX77620_SD_FPWM_MASK);
  480. }
  481. switch (pm_mode) {
  482. case MAX77620_POWER_MODE_NORMAL:
  483. case MAX77620_POWER_MODE_DISABLE:
  484. if (fpwm)
  485. reg_mode = REGULATOR_MODE_FAST;
  486. else
  487. reg_mode = REGULATOR_MODE_NORMAL;
  488. break;
  489. case MAX77620_POWER_MODE_LPM:
  490. case MAX77620_POWER_MODE_GLPM:
  491. reg_mode = REGULATOR_MODE_IDLE;
  492. break;
  493. default:
  494. return 0;
  495. }
  496. return reg_mode;
  497. }
  498. static int max77620_regulator_set_ramp_delay(struct regulator_dev *rdev,
  499. int ramp_delay)
  500. {
  501. struct max77620_regulator *pmic = rdev_get_drvdata(rdev);
  502. int id = rdev_get_id(rdev);
  503. struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];
  504. /* Device specific ramp rate setting tells that platform has
  505. * different ramp rate from advertised value. In this case,
  506. * do not configure anything and just return success.
  507. */
  508. if (rpdata->ramp_rate_setting)
  509. return 0;
  510. return max77620_set_slew_rate(pmic, id, ramp_delay);
  511. }
  512. static int max77620_of_parse_cb(struct device_node *np,
  513. const struct regulator_desc *desc,
  514. struct regulator_config *config)
  515. {
  516. struct max77620_regulator *pmic = config->driver_data;
  517. struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[desc->id];
  518. u32 pval;
  519. int ret;
  520. ret = of_property_read_u32(np, "maxim,active-fps-source", &pval);
  521. rpdata->active_fps_src = (!ret) ? pval : MAX77620_FPS_SRC_DEF;
  522. ret = of_property_read_u32(np, "maxim,active-fps-power-up-slot", &pval);
  523. rpdata->active_fps_pu_slot = (!ret) ? pval : -1;
  524. ret = of_property_read_u32(
  525. np, "maxim,active-fps-power-down-slot", &pval);
  526. rpdata->active_fps_pd_slot = (!ret) ? pval : -1;
  527. ret = of_property_read_u32(np, "maxim,suspend-fps-source", &pval);
  528. rpdata->suspend_fps_src = (!ret) ? pval : -1;
  529. ret = of_property_read_u32(
  530. np, "maxim,suspend-fps-power-up-slot", &pval);
  531. rpdata->suspend_fps_pu_slot = (!ret) ? pval : -1;
  532. ret = of_property_read_u32(
  533. np, "maxim,suspend-fps-power-down-slot", &pval);
  534. rpdata->suspend_fps_pd_slot = (!ret) ? pval : -1;
  535. ret = of_property_read_u32(np, "maxim,power-ok-control", &pval);
  536. if (!ret)
  537. rpdata->power_ok = pval;
  538. else
  539. rpdata->power_ok = -1;
  540. ret = of_property_read_u32(np, "maxim,ramp-rate-setting", &pval);
  541. rpdata->ramp_rate_setting = (!ret) ? pval : 0;
  542. return max77620_init_pmic(pmic, desc->id);
  543. }
  544. static const struct regulator_ops max77620_regulator_ops = {
  545. .is_enabled = max77620_regulator_is_enabled,
  546. .enable = max77620_regulator_enable,
  547. .disable = max77620_regulator_disable,
  548. .list_voltage = regulator_list_voltage_linear,
  549. .map_voltage = regulator_map_voltage_linear,
  550. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  551. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  552. .set_mode = max77620_regulator_set_mode,
  553. .get_mode = max77620_regulator_get_mode,
  554. .set_ramp_delay = max77620_regulator_set_ramp_delay,
  555. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  556. .set_active_discharge = regulator_set_active_discharge_regmap,
  557. };
  558. #define MAX77620_SD_CNF2_ROVS_EN_NONE 0
  559. #define RAIL_SD(_id, _name, _sname, _volt_mask, _min_uV, _max_uV, \
  560. _step_uV, _rs_add, _rs_mask) \
  561. [MAX77620_REGULATOR_ID_##_id] = { \
  562. .type = MAX77620_REGULATOR_TYPE_SD, \
  563. .volt_addr = MAX77620_REG_##_id, \
  564. .cfg_addr = MAX77620_REG_##_id##_CFG, \
  565. .fps_addr = MAX77620_REG_FPS_##_id, \
  566. .remote_sense_addr = _rs_add, \
  567. .remote_sense_mask = MAX77620_SD_CNF2_ROVS_EN_##_rs_mask, \
  568. .power_mode_mask = MAX77620_SD_POWER_MODE_MASK, \
  569. .power_mode_shift = MAX77620_SD_POWER_MODE_SHIFT, \
  570. .desc = { \
  571. .name = max77620_rails(_name), \
  572. .of_match = of_match_ptr(#_name), \
  573. .regulators_node = of_match_ptr("regulators"), \
  574. .of_parse_cb = max77620_of_parse_cb, \
  575. .supply_name = _sname, \
  576. .id = MAX77620_REGULATOR_ID_##_id, \
  577. .ops = &max77620_regulator_ops, \
  578. .n_voltages = ((_max_uV - _min_uV) / _step_uV) + 1, \
  579. .min_uV = _min_uV, \
  580. .uV_step = _step_uV, \
  581. .enable_time = 500, \
  582. .vsel_mask = MAX77620_##_volt_mask##_VOLT_MASK, \
  583. .vsel_reg = MAX77620_REG_##_id, \
  584. .active_discharge_off = 0, \
  585. .active_discharge_on = MAX77620_SD_CFG1_ADE_ENABLE, \
  586. .active_discharge_mask = MAX77620_SD_CFG1_ADE_MASK, \
  587. .active_discharge_reg = MAX77620_REG_##_id##_CFG, \
  588. .type = REGULATOR_VOLTAGE, \
  589. .owner = THIS_MODULE, \
  590. }, \
  591. }
  592. #define RAIL_LDO(_id, _name, _sname, _type, _min_uV, _max_uV, _step_uV) \
  593. [MAX77620_REGULATOR_ID_##_id] = { \
  594. .type = MAX77620_REGULATOR_TYPE_LDO_##_type, \
  595. .volt_addr = MAX77620_REG_##_id##_CFG, \
  596. .cfg_addr = MAX77620_REG_##_id##_CFG2, \
  597. .fps_addr = MAX77620_REG_FPS_##_id, \
  598. .remote_sense_addr = 0xFF, \
  599. .power_mode_mask = MAX77620_LDO_POWER_MODE_MASK, \
  600. .power_mode_shift = MAX77620_LDO_POWER_MODE_SHIFT, \
  601. .desc = { \
  602. .name = max77620_rails(_name), \
  603. .of_match = of_match_ptr(#_name), \
  604. .regulators_node = of_match_ptr("regulators"), \
  605. .of_parse_cb = max77620_of_parse_cb, \
  606. .supply_name = _sname, \
  607. .id = MAX77620_REGULATOR_ID_##_id, \
  608. .ops = &max77620_regulator_ops, \
  609. .n_voltages = ((_max_uV - _min_uV) / _step_uV) + 1, \
  610. .min_uV = _min_uV, \
  611. .uV_step = _step_uV, \
  612. .enable_time = 500, \
  613. .vsel_mask = MAX77620_LDO_VOLT_MASK, \
  614. .vsel_reg = MAX77620_REG_##_id##_CFG, \
  615. .active_discharge_off = 0, \
  616. .active_discharge_on = MAX77620_LDO_CFG2_ADE_ENABLE, \
  617. .active_discharge_mask = MAX77620_LDO_CFG2_ADE_MASK, \
  618. .active_discharge_reg = MAX77620_REG_##_id##_CFG2, \
  619. .type = REGULATOR_VOLTAGE, \
  620. .owner = THIS_MODULE, \
  621. }, \
  622. }
  623. static struct max77620_regulator_info max77620_regs_info[MAX77620_NUM_REGS] = {
  624. RAIL_SD(SD0, sd0, "in-sd0", SD0, 600000, 1400000, 12500, 0x22, SD0),
  625. RAIL_SD(SD1, sd1, "in-sd1", SD1, 600000, 1550000, 12500, 0x22, SD1),
  626. RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE),
  627. RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE),
  628. RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000),
  629. RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000),
  630. RAIL_LDO(LDO2, ldo2, "in-ldo2", P, 800000, 3950000, 50000),
  631. RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000),
  632. RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500),
  633. RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000),
  634. RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000),
  635. RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000),
  636. RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000),
  637. };
  638. static struct max77620_regulator_info max20024_regs_info[MAX77620_NUM_REGS] = {
  639. RAIL_SD(SD0, sd0, "in-sd0", SD0, 800000, 1587500, 12500, 0x22, SD0),
  640. RAIL_SD(SD1, sd1, "in-sd1", SD1, 600000, 3387500, 12500, 0x22, SD1),
  641. RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE),
  642. RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE),
  643. RAIL_SD(SD4, sd4, "in-sd4", SDX, 600000, 3787500, 12500, 0xFF, NONE),
  644. RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000),
  645. RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000),
  646. RAIL_LDO(LDO2, ldo2, "in-ldo2", P, 800000, 3950000, 50000),
  647. RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000),
  648. RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500),
  649. RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000),
  650. RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000),
  651. RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000),
  652. RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000),
  653. };
  654. static struct max77620_regulator_info max77663_regs_info[MAX77620_NUM_REGS] = {
  655. RAIL_SD(SD0, sd0, "in-sd0", SD0, 600000, 3387500, 12500, 0xFF, NONE),
  656. RAIL_SD(SD1, sd1, "in-sd1", SD1, 800000, 1587500, 12500, 0xFF, NONE),
  657. RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE),
  658. RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE),
  659. RAIL_SD(SD4, sd4, "in-sd4", SDX, 600000, 3787500, 12500, 0xFF, NONE),
  660. RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000),
  661. RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000),
  662. RAIL_LDO(LDO2, ldo2, "in-ldo2", P, 800000, 3950000, 50000),
  663. RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000),
  664. RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500),
  665. RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000),
  666. RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000),
  667. RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000),
  668. RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000),
  669. };
  670. static int max77620_regulator_probe(struct platform_device *pdev)
  671. {
  672. struct max77620_chip *max77620_chip = dev_get_drvdata(pdev->dev.parent);
  673. struct max77620_regulator_info *rinfo;
  674. struct device *dev = &pdev->dev;
  675. struct regulator_config config = { };
  676. struct max77620_regulator *pmic;
  677. int ret = 0;
  678. int id;
  679. pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL);
  680. if (!pmic)
  681. return -ENOMEM;
  682. platform_set_drvdata(pdev, pmic);
  683. pmic->dev = dev;
  684. pmic->rmap = max77620_chip->rmap;
  685. if (!dev->of_node)
  686. dev->of_node = pdev->dev.parent->of_node;
  687. switch (max77620_chip->chip_id) {
  688. case MAX77620:
  689. rinfo = max77620_regs_info;
  690. break;
  691. case MAX20024:
  692. rinfo = max20024_regs_info;
  693. break;
  694. case MAX77663:
  695. rinfo = max77663_regs_info;
  696. break;
  697. default:
  698. return -EINVAL;
  699. }
  700. config.regmap = pmic->rmap;
  701. config.dev = dev;
  702. config.driver_data = pmic;
  703. /*
  704. * Set of_node_reuse flag to prevent driver core from attempting to
  705. * claim any pinmux resources already claimed by the parent device.
  706. * Otherwise PMIC driver will fail to re-probe.
  707. */
  708. device_set_of_node_from_dev(&pdev->dev, pdev->dev.parent);
  709. for (id = 0; id < MAX77620_NUM_REGS; id++) {
  710. struct regulator_dev *rdev;
  711. struct regulator_desc *rdesc;
  712. if ((max77620_chip->chip_id == MAX77620) &&
  713. (id == MAX77620_REGULATOR_ID_SD4))
  714. continue;
  715. rdesc = &rinfo[id].desc;
  716. pmic->rinfo[id] = &rinfo[id];
  717. pmic->enable_power_mode[id] = MAX77620_POWER_MODE_NORMAL;
  718. pmic->reg_pdata[id].active_fps_src = -1;
  719. pmic->reg_pdata[id].active_fps_pd_slot = -1;
  720. pmic->reg_pdata[id].active_fps_pu_slot = -1;
  721. pmic->reg_pdata[id].suspend_fps_src = -1;
  722. pmic->reg_pdata[id].suspend_fps_pd_slot = -1;
  723. pmic->reg_pdata[id].suspend_fps_pu_slot = -1;
  724. pmic->reg_pdata[id].power_ok = -1;
  725. pmic->reg_pdata[id].ramp_rate_setting = -1;
  726. ret = max77620_read_slew_rate(pmic, id);
  727. if (ret < 0)
  728. return ret;
  729. rdev = devm_regulator_register(dev, rdesc, &config);
  730. if (IS_ERR(rdev))
  731. return dev_err_probe(dev, PTR_ERR(rdev),
  732. "Regulator registration %s failed\n",
  733. rdesc->name);
  734. }
  735. return 0;
  736. }
  737. #ifdef CONFIG_PM_SLEEP
  738. static int max77620_regulator_suspend(struct device *dev)
  739. {
  740. struct max77620_regulator *pmic = dev_get_drvdata(dev);
  741. struct max77620_regulator_pdata *reg_pdata;
  742. int id;
  743. for (id = 0; id < MAX77620_NUM_REGS; id++) {
  744. reg_pdata = &pmic->reg_pdata[id];
  745. max77620_regulator_set_fps_slots(pmic, id, true);
  746. if (reg_pdata->suspend_fps_src < 0)
  747. continue;
  748. max77620_regulator_set_fps_src(pmic, reg_pdata->suspend_fps_src,
  749. id);
  750. }
  751. return 0;
  752. }
  753. static int max77620_regulator_resume(struct device *dev)
  754. {
  755. struct max77620_regulator *pmic = dev_get_drvdata(dev);
  756. struct max77620_regulator_pdata *reg_pdata;
  757. int id;
  758. for (id = 0; id < MAX77620_NUM_REGS; id++) {
  759. reg_pdata = &pmic->reg_pdata[id];
  760. max77620_config_power_ok(pmic, id);
  761. max77620_regulator_set_fps_slots(pmic, id, false);
  762. if (reg_pdata->active_fps_src < 0)
  763. continue;
  764. max77620_regulator_set_fps_src(pmic, reg_pdata->active_fps_src,
  765. id);
  766. }
  767. return 0;
  768. }
  769. #endif
  770. static const struct dev_pm_ops max77620_regulator_pm_ops = {
  771. SET_SYSTEM_SLEEP_PM_OPS(max77620_regulator_suspend,
  772. max77620_regulator_resume)
  773. };
  774. static const struct platform_device_id max77620_regulator_devtype[] = {
  775. { .name = "max77620-pmic", },
  776. { .name = "max20024-pmic", },
  777. { .name = "max77663-pmic", },
  778. {},
  779. };
  780. MODULE_DEVICE_TABLE(platform, max77620_regulator_devtype);
  781. static struct platform_driver max77620_regulator_driver = {
  782. .probe = max77620_regulator_probe,
  783. .id_table = max77620_regulator_devtype,
  784. .driver = {
  785. .name = "max77620-pmic",
  786. .pm = &max77620_regulator_pm_ops,
  787. },
  788. };
  789. module_platform_driver(max77620_regulator_driver);
  790. MODULE_DESCRIPTION("MAX77620/MAX20024 regulator driver");
  791. MODULE_AUTHOR("Mallikarjun Kasoju <[email protected]>");
  792. MODULE_AUTHOR("Laxman Dewangan <[email protected]>");
  793. MODULE_LICENSE("GPL v2");