step-chg-jeita.c 31 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2017-2021 The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "QCOM-STEPCHG: %s: " fmt, __func__
  7. #include <linux/delay.h>
  8. #include <linux/module.h>
  9. #include <linux/of.h>
  10. #include <linux/power_supply.h>
  11. #include <linux/slab.h>
  12. #include <linux/pmic-voter.h>
  13. #include <linux/iio/consumer.h>
  14. #include <dt-bindings/iio/qti_power_supply_iio.h>
  15. #include "step-chg-jeita.h"
  16. #include "battery-profile-loader.h"
  17. #define STEP_CHG_VOTER "STEP_CHG_VOTER"
  18. #define JEITA_VOTER "JEITA_VOTER"
  19. #define JEITA_FCC_SCALE_VOTER "JEITA_FCC_SCALE_VOTER"
  20. #define is_between(left, right, value) \
  21. (((left) >= (right) && (left) >= (value) \
  22. && (value) >= (right)) \
  23. || ((left) <= (right) && (left) <= (value) \
  24. && (value) <= (right)))
  25. struct step_chg_cfg {
  26. struct step_chg_jeita_param param;
  27. struct range_data fcc_cfg[MAX_STEP_CHG_ENTRIES];
  28. };
  29. struct jeita_fcc_cfg {
  30. struct step_chg_jeita_param param;
  31. struct range_data fcc_cfg[MAX_STEP_CHG_ENTRIES];
  32. };
  33. struct jeita_fv_cfg {
  34. struct step_chg_jeita_param param;
  35. struct range_data fv_cfg[MAX_STEP_CHG_ENTRIES];
  36. };
  37. struct step_chg_info {
  38. struct device *dev;
  39. ktime_t step_last_update_time;
  40. ktime_t jeita_last_update_time;
  41. bool step_chg_enable;
  42. bool sw_jeita_enable;
  43. bool jeita_arb_en;
  44. bool config_is_read;
  45. bool step_chg_cfg_valid;
  46. bool sw_jeita_cfg_valid;
  47. bool soc_based_step_chg;
  48. bool ocv_based_step_chg;
  49. bool vbat_avg_based_step_chg;
  50. bool batt_missing;
  51. bool taper_fcc;
  52. bool jeita_fcc_scaling;
  53. int jeita_fcc_index;
  54. int jeita_fv_index;
  55. int step_index;
  56. int get_config_retry_count;
  57. int jeita_last_update_temp;
  58. int jeita_fcc_scaling_temp_threshold[2];
  59. long jeita_max_fcc_ua;
  60. long jeita_fcc_step_size;
  61. struct step_chg_cfg *step_chg_config;
  62. struct jeita_fcc_cfg *jeita_fcc_config;
  63. struct jeita_fv_cfg *jeita_fv_config;
  64. struct votable *fcc_votable;
  65. struct votable *fv_votable;
  66. struct votable *usb_icl_votable;
  67. struct wakeup_source *step_chg_ws;
  68. struct power_supply *batt_psy;
  69. struct power_supply *usb_psy;
  70. struct power_supply *dc_psy;
  71. struct delayed_work status_change_work;
  72. struct delayed_work get_config_work;
  73. struct notifier_block nb;
  74. struct iio_channel *iio_chans;
  75. struct iio_channel **iio_chan_list_qg;
  76. };
  77. static struct step_chg_info *the_chip;
  78. #define STEP_CHG_HYSTERISIS_DELAY_US 5000000 /* 5 secs */
  79. #define BATT_HOT_DECIDEGREE_MAX 600
  80. #define GET_CONFIG_DELAY_MS 2000
  81. #define GET_CONFIG_RETRY_COUNT 50
  82. #define WAIT_BATT_ID_READY_MS 200
  83. static bool is_batt_available(struct step_chg_info *chip)
  84. {
  85. if (!chip->batt_psy)
  86. chip->batt_psy = power_supply_get_by_name("battery");
  87. if (!chip->batt_psy)
  88. return false;
  89. return true;
  90. }
  91. static const char * const step_chg_ext_iio_chan[] = {
  92. [STEP_QG_RESISTANCE_ID] = "resistance_id",
  93. [STEP_QG_VOLTAGE_NOW] = "voltage_now",
  94. [STEP_QG_TEMP] = "temp",
  95. [STEP_QG_CAPACITY] = "capacity",
  96. [STEP_QG_VOLTAGE_OCV] = "voltage_ocv",
  97. [STEP_QG_VOLTAGE_AVG] = "voltage_avg",
  98. };
  99. static bool is_bms_available(struct step_chg_info *chip)
  100. {
  101. int rc = 0;
  102. struct iio_channel **iio_list;
  103. if (IS_ERR(chip->iio_chan_list_qg))
  104. return false;
  105. if (!chip->iio_chan_list_qg) {
  106. iio_list = get_ext_channels(chip->dev, step_chg_ext_iio_chan,
  107. ARRAY_SIZE(step_chg_ext_iio_chan));
  108. if (IS_ERR(iio_list)) {
  109. rc = PTR_ERR(iio_list);
  110. if (rc != -EPROBE_DEFER) {
  111. dev_err(chip->dev, "Failed to get channels, %d\n",
  112. rc);
  113. chip->iio_chan_list_qg = ERR_PTR(-EINVAL);
  114. }
  115. return false;
  116. }
  117. chip->iio_chan_list_qg = iio_list;
  118. }
  119. return true;
  120. }
  121. static bool is_usb_available(struct step_chg_info *chip)
  122. {
  123. if (!chip->usb_psy)
  124. chip->usb_psy = power_supply_get_by_name("usb");
  125. if (!chip->usb_psy)
  126. return false;
  127. return true;
  128. }
  129. static bool is_input_present(struct step_chg_info *chip)
  130. {
  131. int rc = 0, input_present = 0;
  132. union power_supply_propval pval = {0, };
  133. if (!chip->usb_psy)
  134. chip->usb_psy = power_supply_get_by_name("usb");
  135. if (chip->usb_psy) {
  136. rc = power_supply_get_property(chip->usb_psy,
  137. POWER_SUPPLY_PROP_PRESENT, &pval);
  138. if (rc < 0)
  139. pr_err("Couldn't read USB Present status, rc=%d\n", rc);
  140. else
  141. input_present |= pval.intval;
  142. }
  143. if (!chip->dc_psy)
  144. chip->dc_psy = power_supply_get_by_name("dc");
  145. if (chip->dc_psy) {
  146. rc = power_supply_get_property(chip->dc_psy,
  147. POWER_SUPPLY_PROP_PRESENT, &pval);
  148. if (rc < 0)
  149. pr_err("Couldn't read DC Present status, rc=%d\n", rc);
  150. else
  151. input_present |= pval.intval;
  152. }
  153. if (input_present)
  154. return true;
  155. return false;
  156. }
  157. static int read_range_data_from_node(struct device_node *node,
  158. const char *prop_str, struct range_data *ranges,
  159. int max_threshold, u32 max_value)
  160. {
  161. int rc = 0, i, length, per_tuple_length, tuples;
  162. if (!node || !prop_str || !ranges) {
  163. pr_err("Invalid parameters passed\n");
  164. return -EINVAL;
  165. }
  166. rc = of_property_count_elems_of_size(node, prop_str, sizeof(u32));
  167. if (rc < 0) {
  168. pr_err("Count %s failed, rc=%d\n", prop_str, rc);
  169. return rc;
  170. }
  171. length = rc;
  172. per_tuple_length = sizeof(struct range_data) / sizeof(u32);
  173. if (length % per_tuple_length) {
  174. pr_err("%s length (%d) should be multiple of %d\n",
  175. prop_str, length, per_tuple_length);
  176. return -EINVAL;
  177. }
  178. tuples = length / per_tuple_length;
  179. if (tuples > MAX_STEP_CHG_ENTRIES) {
  180. pr_err("too many entries(%d), only %d allowed\n",
  181. tuples, MAX_STEP_CHG_ENTRIES);
  182. return -EINVAL;
  183. }
  184. rc = of_property_read_u32_array(node, prop_str,
  185. (u32 *)ranges, length);
  186. if (rc) {
  187. pr_err("Read %s failed, rc=%d\n", prop_str, rc);
  188. return rc;
  189. }
  190. for (i = 0; i < tuples; i++) {
  191. if (ranges[i].low_threshold >
  192. ranges[i].high_threshold) {
  193. pr_err("%s thresholds should be in ascendant ranges\n",
  194. prop_str);
  195. rc = -EINVAL;
  196. goto clean;
  197. }
  198. if (i != 0) {
  199. if (ranges[i - 1].high_threshold >
  200. ranges[i].low_threshold) {
  201. pr_err("%s thresholds should be in ascendant ranges\n",
  202. prop_str);
  203. rc = -EINVAL;
  204. goto clean;
  205. }
  206. }
  207. if (ranges[i].low_threshold > max_threshold)
  208. ranges[i].low_threshold = max_threshold;
  209. if (ranges[i].high_threshold > max_threshold)
  210. ranges[i].high_threshold = max_threshold;
  211. if (ranges[i].value > max_value)
  212. ranges[i].value = max_value;
  213. }
  214. return rc;
  215. clean:
  216. memset(ranges, 0, tuples * sizeof(struct range_data));
  217. return rc;
  218. }
  219. static int step_chg_read_iio_prop(struct step_chg_info *chip,
  220. enum iio_type type, int iio_chan, int *val)
  221. {
  222. struct iio_channel *iio_chan_list;
  223. int rc;
  224. switch (type) {
  225. case MAIN:
  226. if (!chip->iio_chans)
  227. return -ENODEV;
  228. iio_chan_list = &chip->iio_chans[iio_chan];
  229. break;
  230. case QG:
  231. if (IS_ERR_OR_NULL(chip->iio_chan_list_qg))
  232. return -ENODEV;
  233. iio_chan_list = chip->iio_chan_list_qg[iio_chan];
  234. break;
  235. default:
  236. pr_err_ratelimited("iio_type %d is not supported\n", type);
  237. return -EINVAL;
  238. }
  239. rc = iio_read_channel_processed(iio_chan_list, val);
  240. return (rc < 0) ? rc : 0;
  241. }
  242. static int get_step_chg_jeita_setting_from_profile(struct step_chg_info *chip)
  243. {
  244. struct device_node *batt_node, *profile_node;
  245. u32 max_fv_uv, max_fcc_ma;
  246. const char *batt_type_str;
  247. const __be32 *handle;
  248. int batt_id_ohms, rc, hysteresis[2] = {0};
  249. u32 jeita_scaling_min_fcc_ua = 0;
  250. handle = of_get_property(chip->dev->of_node,
  251. "qcom,battery-data", NULL);
  252. if (!handle) {
  253. pr_debug("ignore getting sw-jeita/step charging settings from profile\n");
  254. return 0;
  255. }
  256. batt_node = of_find_node_by_phandle(be32_to_cpup(handle));
  257. if (!batt_node) {
  258. pr_err("Get battery data node failed\n");
  259. return -EINVAL;
  260. }
  261. if (!is_bms_available(chip))
  262. return -ENODEV;
  263. rc = step_chg_read_iio_prop(chip, QG, STEP_QG_RESISTANCE_ID,
  264. &batt_id_ohms);
  265. if (rc < 0)
  266. pr_err("Failed to read batt_id rc=%d\n", rc);
  267. /* bms_psy has not yet read the batt_id */
  268. if (batt_id_ohms < 0)
  269. return -EBUSY;
  270. profile_node = of_batterydata_get_best_profile(batt_node,
  271. batt_id_ohms / 1000, NULL);
  272. if (IS_ERR(profile_node))
  273. return PTR_ERR(profile_node);
  274. if (!profile_node) {
  275. pr_err("Couldn't find profile\n");
  276. return -ENODATA;
  277. }
  278. rc = of_property_read_string(profile_node, "qcom,battery-type",
  279. &batt_type_str);
  280. if (rc < 0) {
  281. pr_err("battery type unavailable, rc:%d\n", rc);
  282. return rc;
  283. }
  284. pr_debug("battery: %s detected, getting sw-jeita/step charging settings\n",
  285. batt_type_str);
  286. rc = of_property_read_u32(profile_node, "qcom,max-voltage-uv",
  287. &max_fv_uv);
  288. if (rc < 0) {
  289. pr_err("max-voltage_uv reading failed, rc=%d\n", rc);
  290. return rc;
  291. }
  292. rc = of_property_read_u32(profile_node, "qcom,fastchg-current-ma",
  293. &max_fcc_ma);
  294. if (rc < 0) {
  295. pr_err("max-fastchg-current-ma reading failed, rc=%d\n", rc);
  296. return rc;
  297. }
  298. chip->jeita_max_fcc_ua = max_fcc_ma * 1000;
  299. chip->taper_fcc = of_property_read_bool(profile_node, "qcom,taper-fcc");
  300. chip->soc_based_step_chg =
  301. of_property_read_bool(profile_node, "qcom,soc-based-step-chg");
  302. if (chip->soc_based_step_chg) {
  303. chip->step_chg_config->param.psy_prop =
  304. POWER_SUPPLY_PROP_CAPACITY;
  305. chip->step_chg_config->param.iio_prop = STEP_QG_CAPACITY;
  306. chip->step_chg_config->param.prop_name = "SOC";
  307. chip->step_chg_config->param.rise_hys = 0;
  308. chip->step_chg_config->param.fall_hys = 0;
  309. }
  310. chip->ocv_based_step_chg =
  311. of_property_read_bool(profile_node, "qcom,ocv-based-step-chg");
  312. if (chip->ocv_based_step_chg) {
  313. chip->step_chg_config->param.psy_prop =
  314. POWER_SUPPLY_PROP_VOLTAGE_OCV;
  315. chip->step_chg_config->param.iio_prop = STEP_QG_VOLTAGE_OCV;
  316. chip->step_chg_config->param.prop_name = "OCV";
  317. chip->step_chg_config->param.rise_hys = 0;
  318. chip->step_chg_config->param.fall_hys = 0;
  319. chip->step_chg_config->param.use_bms = true;
  320. }
  321. chip->vbat_avg_based_step_chg =
  322. of_property_read_bool(profile_node,
  323. "qcom,vbat-avg-based-step-chg");
  324. if (chip->vbat_avg_based_step_chg) {
  325. chip->step_chg_config->param.psy_prop =
  326. POWER_SUPPLY_PROP_VOLTAGE_AVG;
  327. chip->step_chg_config->param.iio_prop = STEP_QG_VOLTAGE_AVG;
  328. chip->step_chg_config->param.prop_name = "VBAT_AVG";
  329. chip->step_chg_config->param.rise_hys = 0;
  330. chip->step_chg_config->param.fall_hys = 0;
  331. chip->step_chg_config->param.use_bms = true;
  332. }
  333. chip->step_chg_cfg_valid = true;
  334. rc = read_range_data_from_node(profile_node,
  335. "qcom,step-chg-ranges",
  336. chip->step_chg_config->fcc_cfg,
  337. chip->soc_based_step_chg ? 100 : max_fv_uv,
  338. max_fcc_ma * 1000);
  339. if (rc < 0) {
  340. pr_debug("Read qcom,step-chg-ranges failed from battery profile, rc=%d\n",
  341. rc);
  342. chip->step_chg_cfg_valid = false;
  343. }
  344. chip->sw_jeita_cfg_valid = true;
  345. rc = read_range_data_from_node(profile_node,
  346. "qcom,jeita-fcc-ranges",
  347. chip->jeita_fcc_config->fcc_cfg,
  348. BATT_HOT_DECIDEGREE_MAX, max_fcc_ma * 1000);
  349. if (rc < 0) {
  350. pr_debug("Read qcom,jeita-fcc-ranges failed from battery profile, rc=%d\n",
  351. rc);
  352. chip->sw_jeita_cfg_valid = false;
  353. }
  354. rc = of_property_read_u32_array(profile_node,
  355. "qcom,step-jeita-hysteresis", hysteresis, 2);
  356. if (!rc) {
  357. chip->jeita_fcc_config->param.rise_hys = hysteresis[0];
  358. chip->jeita_fcc_config->param.fall_hys = hysteresis[1];
  359. pr_debug("jeita-fcc-hys: rise_hys=%u, fall_hys=%u\n",
  360. hysteresis[0], hysteresis[1]);
  361. }
  362. rc = read_range_data_from_node(profile_node,
  363. "qcom,jeita-fv-ranges",
  364. chip->jeita_fv_config->fv_cfg,
  365. BATT_HOT_DECIDEGREE_MAX, max_fv_uv);
  366. if (rc < 0) {
  367. pr_debug("Read qcom,jeita-fv-ranges failed from battery profile, rc=%d\n",
  368. rc);
  369. chip->sw_jeita_cfg_valid = false;
  370. }
  371. if (of_property_read_bool(profile_node, "qcom,jeita-fcc-scaling")) {
  372. rc = of_property_read_u32_array(profile_node,
  373. "qcom,jeita-fcc-scaling-temp-threshold",
  374. chip->jeita_fcc_scaling_temp_threshold, 2);
  375. if (rc < 0)
  376. pr_debug("Read jeita-fcc-scaling-temp-threshold from battery profile, rc=%d\n",
  377. rc);
  378. rc = of_property_read_u32(profile_node,
  379. "qcom,jeita-scaling-min-fcc-ua",
  380. &jeita_scaling_min_fcc_ua);
  381. if (rc < 0)
  382. pr_debug("Read jeita-scaling-min-fcc-ua from battery profile, rc=%d\n",
  383. rc);
  384. if ((jeita_scaling_min_fcc_ua &&
  385. (jeita_scaling_min_fcc_ua < chip->jeita_max_fcc_ua)) &&
  386. (chip->jeita_fcc_scaling_temp_threshold[0] <
  387. chip->jeita_fcc_scaling_temp_threshold[1])) {
  388. /*
  389. * Calculate jeita-fcc-step-size =
  390. * (difference-in-fcc) / ( difference-in-temp)
  391. */
  392. chip->jeita_fcc_step_size = div_s64(
  393. (chip->jeita_max_fcc_ua - jeita_scaling_min_fcc_ua),
  394. (chip->jeita_fcc_scaling_temp_threshold[1] -
  395. chip->jeita_fcc_scaling_temp_threshold[0]));
  396. if (chip->jeita_fcc_step_size > 0)
  397. chip->jeita_fcc_scaling = true;
  398. }
  399. pr_debug("jeita-fcc-scaling: enabled = %d, jeita-fcc-scaling-temp-threshold = [%d, %d], jeita-scaling-min-fcc-ua = %ld, jeita-scaling-max_fcc_ua = %ld,jeita-fcc-step-size = %ld\n",
  400. chip->jeita_fcc_scaling,
  401. chip->jeita_fcc_scaling_temp_threshold[0],
  402. chip->jeita_fcc_scaling_temp_threshold[1],
  403. jeita_scaling_min_fcc_ua, chip->jeita_max_fcc_ua,
  404. chip->jeita_fcc_step_size
  405. );
  406. }
  407. return rc;
  408. }
  409. static void get_config_work(struct work_struct *work)
  410. {
  411. struct step_chg_info *chip = container_of(work,
  412. struct step_chg_info, get_config_work.work);
  413. int i, rc;
  414. chip->config_is_read = false;
  415. rc = get_step_chg_jeita_setting_from_profile(chip);
  416. if (rc < 0) {
  417. if (rc == -ENODEV || rc == -EBUSY) {
  418. if (chip->get_config_retry_count++
  419. < GET_CONFIG_RETRY_COUNT) {
  420. pr_debug("bms is not ready, retry: %d\n",
  421. chip->get_config_retry_count);
  422. goto reschedule;
  423. }
  424. }
  425. }
  426. chip->config_is_read = true;
  427. for (i = 0; i < MAX_STEP_CHG_ENTRIES; i++)
  428. pr_debug("step-chg-cfg: %duV(SoC) ~ %duV(SoC), %duA\n",
  429. chip->step_chg_config->fcc_cfg[i].low_threshold,
  430. chip->step_chg_config->fcc_cfg[i].high_threshold,
  431. chip->step_chg_config->fcc_cfg[i].value);
  432. for (i = 0; i < MAX_STEP_CHG_ENTRIES; i++)
  433. pr_debug("jeita-fcc-cfg: %ddecidegree ~ %ddecidegre, %duA\n",
  434. chip->jeita_fcc_config->fcc_cfg[i].low_threshold,
  435. chip->jeita_fcc_config->fcc_cfg[i].high_threshold,
  436. chip->jeita_fcc_config->fcc_cfg[i].value);
  437. for (i = 0; i < MAX_STEP_CHG_ENTRIES; i++)
  438. pr_debug("jeita-fv-cfg: %ddecidegree ~ %ddecidegre, %duV\n",
  439. chip->jeita_fv_config->fv_cfg[i].low_threshold,
  440. chip->jeita_fv_config->fv_cfg[i].high_threshold,
  441. chip->jeita_fv_config->fv_cfg[i].value);
  442. return;
  443. reschedule:
  444. schedule_delayed_work(&chip->get_config_work,
  445. msecs_to_jiffies(GET_CONFIG_DELAY_MS));
  446. }
  447. static int get_val(struct range_data *range, int rise_hys, int fall_hys,
  448. int current_index, int threshold, int *new_index, int *val)
  449. {
  450. int i;
  451. *new_index = -EINVAL;
  452. /*
  453. * If the threshold is lesser than the minimum allowed range,
  454. * return -ENODATA.
  455. */
  456. if (threshold < range[0].low_threshold)
  457. return -ENODATA;
  458. /* First try to find the matching index without hysteresis */
  459. for (i = 0; i < MAX_STEP_CHG_ENTRIES; i++) {
  460. if (!range[i].high_threshold && !range[i].low_threshold) {
  461. /* First invalid table entry; exit loop */
  462. break;
  463. }
  464. if (is_between(range[i].low_threshold,
  465. range[i].high_threshold, threshold)) {
  466. *new_index = i;
  467. *val = range[i].value;
  468. break;
  469. }
  470. }
  471. /*
  472. * If nothing was found, the threshold exceeds the max range for sure
  473. * as the other case where it is lesser than the min range is handled
  474. * at the very beginning of this function. Therefore, clip it to the
  475. * max allowed range value, which is the one corresponding to the last
  476. * valid entry in the battery profile data array.
  477. */
  478. if (*new_index == -EINVAL) {
  479. if (i == 0) {
  480. /* Battery profile data array is completely invalid */
  481. return -ENODATA;
  482. }
  483. *new_index = (i - 1);
  484. *val = range[*new_index].value;
  485. }
  486. /*
  487. * If we don't have a current_index return this
  488. * newfound value. There is no hysterisis from out of range
  489. * to in range transition
  490. */
  491. if (current_index == -EINVAL)
  492. return 0;
  493. /*
  494. * Check for hysteresis if it in the neighbourhood
  495. * of our current index.
  496. */
  497. if (*new_index == current_index + 1) {
  498. if (threshold <
  499. (range[*new_index].low_threshold + rise_hys)) {
  500. /*
  501. * Stay in the current index, threshold is not higher
  502. * by hysteresis amount
  503. */
  504. *new_index = current_index;
  505. *val = range[current_index].value;
  506. }
  507. } else if (*new_index == current_index - 1) {
  508. if (threshold >
  509. range[*new_index].high_threshold - fall_hys) {
  510. /*
  511. * stay in the current index, threshold is not lower
  512. * by hysteresis amount
  513. */
  514. *new_index = current_index;
  515. *val = range[current_index].value;
  516. }
  517. }
  518. return 0;
  519. }
  520. #define TAPERED_STEP_CHG_FCC_REDUCTION_STEP_MA 50000 /* 50 mA */
  521. static void taper_fcc_step_chg(struct step_chg_info *chip, int index,
  522. int current_voltage)
  523. {
  524. u32 current_fcc, target_fcc;
  525. if (index < 0) {
  526. pr_err("Invalid STEP CHG index\n");
  527. return;
  528. }
  529. current_fcc = get_effective_result(chip->fcc_votable);
  530. target_fcc = chip->step_chg_config->fcc_cfg[index].value;
  531. if (index == 0) {
  532. vote(chip->fcc_votable, STEP_CHG_VOTER, true, target_fcc);
  533. } else if (current_voltage >
  534. (chip->step_chg_config->fcc_cfg[index - 1].high_threshold +
  535. chip->step_chg_config->param.rise_hys)) {
  536. /*
  537. * Ramp down FCC in pre-configured steps till the current index
  538. * FCC configuration is reached, whenever the step charging
  539. * control parameter exceeds the high threshold of previous
  540. * step charging index configuration.
  541. */
  542. vote(chip->fcc_votable, STEP_CHG_VOTER, true, max(target_fcc,
  543. current_fcc - TAPERED_STEP_CHG_FCC_REDUCTION_STEP_MA));
  544. } else if ((current_fcc >
  545. chip->step_chg_config->fcc_cfg[index - 1].value) &&
  546. (current_voltage >
  547. chip->step_chg_config->fcc_cfg[index - 1].low_threshold +
  548. chip->step_chg_config->param.fall_hys)) {
  549. /*
  550. * In case the step charging index switch to the next higher
  551. * index without FCCs saturation for the previous index, ramp
  552. * down FCC till previous index FCC configuration is reached.
  553. */
  554. vote(chip->fcc_votable, STEP_CHG_VOTER, true,
  555. max(chip->step_chg_config->fcc_cfg[index - 1].value,
  556. current_fcc - TAPERED_STEP_CHG_FCC_REDUCTION_STEP_MA));
  557. }
  558. }
  559. static int handle_step_chg_config(struct step_chg_info *chip)
  560. {
  561. union power_supply_propval pval = {0, };
  562. int rc = 0, fcc_ua = 0, current_index;
  563. u64 elapsed_us;
  564. elapsed_us = ktime_us_delta(ktime_get(), chip->step_last_update_time);
  565. /* skip processing, event too early */
  566. if (elapsed_us < STEP_CHG_HYSTERISIS_DELAY_US)
  567. return 0;
  568. if (!chip->step_chg_enable || !chip->step_chg_cfg_valid) {
  569. if (chip->fcc_votable)
  570. vote(chip->fcc_votable, STEP_CHG_VOTER, false, 0);
  571. goto update_time;
  572. }
  573. if (chip->step_chg_config->param.use_bms) {
  574. rc = step_chg_read_iio_prop(chip, QG,
  575. chip->step_chg_config->param.iio_prop, &pval.intval);
  576. if (rc < 0)
  577. pr_err("Failed to read IIO prop %d rc=%d\n",
  578. chip->step_chg_config->param.iio_prop, rc);
  579. } else {
  580. rc = power_supply_get_property(chip->batt_psy,
  581. chip->step_chg_config->param.psy_prop, &pval);
  582. }
  583. if (rc < 0) {
  584. pr_err("Couldn't read %s property rc=%d\n",
  585. chip->step_chg_config->param.prop_name, rc);
  586. return rc;
  587. }
  588. current_index = chip->step_index;
  589. rc = get_val(chip->step_chg_config->fcc_cfg,
  590. chip->step_chg_config->param.rise_hys,
  591. chip->step_chg_config->param.fall_hys,
  592. chip->step_index,
  593. pval.intval,
  594. &chip->step_index,
  595. &fcc_ua);
  596. if (rc < 0) {
  597. /* remove the vote if no step-based fcc is found */
  598. if (chip->fcc_votable)
  599. vote(chip->fcc_votable, STEP_CHG_VOTER, false, 0);
  600. goto update_time;
  601. }
  602. /* Do not drop step-chg index, if input supply is present */
  603. if (is_input_present(chip)) {
  604. if (chip->step_index < current_index)
  605. chip->step_index = current_index;
  606. } else {
  607. chip->step_index = 0;
  608. }
  609. if (!chip->fcc_votable)
  610. chip->fcc_votable = find_votable("FCC");
  611. if (!chip->fcc_votable)
  612. return -EINVAL;
  613. if (chip->taper_fcc) {
  614. taper_fcc_step_chg(chip, chip->step_index, pval.intval);
  615. } else {
  616. fcc_ua = chip->step_chg_config->fcc_cfg[chip->step_index].value;
  617. vote(chip->fcc_votable, STEP_CHG_VOTER, true, fcc_ua);
  618. }
  619. pr_debug("%s = %d Step-FCC = %duA taper-fcc: %d\n",
  620. chip->step_chg_config->param.prop_name, pval.intval,
  621. get_client_vote(chip->fcc_votable, STEP_CHG_VOTER),
  622. chip->taper_fcc);
  623. update_time:
  624. chip->step_last_update_time = ktime_get();
  625. return 0;
  626. }
  627. static void handle_jeita_fcc_scaling(struct step_chg_info *chip)
  628. {
  629. union power_supply_propval pval = {0, };
  630. int fcc_ua = 0, temp_diff = 0, rc;
  631. bool first_time_entry;
  632. if (chip->jeita_fcc_config->param.use_bms) {
  633. rc = step_chg_read_iio_prop(chip, QG,
  634. chip->jeita_fcc_config->param.iio_prop, &pval.intval);
  635. if (rc < 0)
  636. pr_err("Failed to read IIO prop %d rc=%d\n",
  637. chip->jeita_fcc_config->param.iio_prop, rc);
  638. } else {
  639. rc = power_supply_get_property(chip->batt_psy,
  640. chip->jeita_fcc_config->param.psy_prop, &pval);
  641. }
  642. if (rc < 0) {
  643. pr_err("Couldn't read %s property rc=%d\n",
  644. chip->jeita_fcc_config->param.prop_name, rc);
  645. return;
  646. }
  647. /* Skip mitigation if temp is not within min-max thresholds */
  648. if (!is_between(chip->jeita_fcc_scaling_temp_threshold[0],
  649. chip->jeita_fcc_scaling_temp_threshold[1], pval.intval)) {
  650. pr_debug("jeita-fcc-scaling : Skip jeita scaling, temp out of range temp = %d\n",
  651. pval.intval);
  652. chip->jeita_last_update_temp = pval.intval;
  653. vote(chip->fcc_votable, JEITA_FCC_SCALE_VOTER, false, 0);
  654. return;
  655. }
  656. /*
  657. * We determine this is the first time entry to jeita-fcc-scaling if
  658. * jeita_last_update_temp is not within entry/exist thresholds.
  659. */
  660. first_time_entry = !is_between(chip->jeita_fcc_scaling_temp_threshold[0]
  661. , chip->jeita_fcc_scaling_temp_threshold[1],
  662. chip->jeita_last_update_temp);
  663. /*
  664. * VOTE on FCC only when temp is within hys or if this the very first
  665. * time we crossed the entry threshold.
  666. */
  667. if (first_time_entry ||
  668. ((pval.intval > (chip->jeita_last_update_temp +
  669. chip->jeita_fcc_config->param.rise_hys)) ||
  670. (pval.intval < (chip->jeita_last_update_temp -
  671. chip->jeita_fcc_config->param.fall_hys)))) {
  672. /*
  673. * New FCC step is calculated as :
  674. * fcc_ua = (max-fcc - ((current_temp - min-temp) *
  675. * jeita-step-size))
  676. */
  677. temp_diff = pval.intval -
  678. chip->jeita_fcc_scaling_temp_threshold[0];
  679. fcc_ua = div_s64((chip->jeita_max_fcc_ua -
  680. (chip->jeita_fcc_step_size * temp_diff)), 100) * 100;
  681. vote(chip->fcc_votable, JEITA_FCC_SCALE_VOTER, true, fcc_ua);
  682. pr_debug("jeita-fcc-scaling: first_time_entry = %d, max_fcc_ua = %ld, voted_fcc_ua = %d, temp_diff = %d, prev_temp = %d, current_temp = %d\n",
  683. first_time_entry, chip->jeita_max_fcc_ua, fcc_ua,
  684. temp_diff, chip->jeita_last_update_temp, pval.intval);
  685. chip->jeita_last_update_temp = pval.intval;
  686. } else {
  687. pr_debug("jeita-fcc-scaling: Skip jeita mitigation temp within first_time_entry = %d, hys temp = %d, last_updated_temp = %d\n",
  688. first_time_entry, pval.intval,
  689. chip->jeita_last_update_temp);
  690. }
  691. }
  692. #define JEITA_SUSPEND_HYST_UV 50000
  693. static int handle_jeita(struct step_chg_info *chip)
  694. {
  695. union power_supply_propval pval = {0, };
  696. int rc = 0, fcc_ua = 0, fv_uv = 0, data;
  697. u64 elapsed_us;
  698. rc = step_chg_read_iio_prop(chip, MAIN, PSY_IIO_SW_JEITA_ENABLED,
  699. &data);
  700. if (rc < 0) {
  701. chip->sw_jeita_enable = false;
  702. pr_err("Failed to read jeita_enabled rc=%d\n", rc);
  703. } else {
  704. chip->sw_jeita_enable = data;
  705. }
  706. /* Handle jeita-fcc-scaling if enabled */
  707. if (chip->jeita_fcc_scaling)
  708. handle_jeita_fcc_scaling(chip);
  709. if (!chip->sw_jeita_enable || !chip->sw_jeita_cfg_valid) {
  710. if (chip->fcc_votable)
  711. vote(chip->fcc_votable, JEITA_VOTER, false, 0);
  712. if (chip->fv_votable)
  713. vote(chip->fv_votable, JEITA_VOTER, false, 0);
  714. if (chip->usb_icl_votable)
  715. vote(chip->usb_icl_votable, JEITA_VOTER, false, 0);
  716. return 0;
  717. }
  718. elapsed_us = ktime_us_delta(ktime_get(), chip->jeita_last_update_time);
  719. /* skip processing, event too early */
  720. if (elapsed_us < STEP_CHG_HYSTERISIS_DELAY_US)
  721. return 0;
  722. if (chip->jeita_fcc_config->param.use_bms) {
  723. rc = step_chg_read_iio_prop(chip, QG,
  724. chip->jeita_fcc_config->param.iio_prop, &pval.intval);
  725. if (rc < 0)
  726. pr_err("Failed to read IIO prop %d rc=%d\n",
  727. chip->jeita_fcc_config->param.iio_prop, rc);
  728. } else {
  729. rc = power_supply_get_property(chip->batt_psy,
  730. chip->jeita_fcc_config->param.psy_prop, &pval);
  731. }
  732. if (rc < 0) {
  733. pr_err("Couldn't read %s property rc=%d\n",
  734. chip->jeita_fcc_config->param.prop_name, rc);
  735. return rc;
  736. }
  737. rc = get_val(chip->jeita_fcc_config->fcc_cfg,
  738. chip->jeita_fcc_config->param.rise_hys,
  739. chip->jeita_fcc_config->param.fall_hys,
  740. chip->jeita_fcc_index,
  741. pval.intval,
  742. &chip->jeita_fcc_index,
  743. &fcc_ua);
  744. if (rc < 0)
  745. fcc_ua = 0;
  746. if (!chip->fcc_votable)
  747. chip->fcc_votable = find_votable("FCC");
  748. if (!chip->fcc_votable)
  749. /* changing FCC is a must */
  750. return -EINVAL;
  751. vote(chip->fcc_votable, JEITA_VOTER, fcc_ua ? true : false, fcc_ua);
  752. rc = get_val(chip->jeita_fv_config->fv_cfg,
  753. chip->jeita_fv_config->param.rise_hys,
  754. chip->jeita_fv_config->param.fall_hys,
  755. chip->jeita_fv_index,
  756. pval.intval,
  757. &chip->jeita_fv_index,
  758. &fv_uv);
  759. if (rc < 0)
  760. fv_uv = 0;
  761. chip->fv_votable = find_votable("FV");
  762. if (!chip->fv_votable)
  763. goto update_time;
  764. if (!chip->usb_icl_votable)
  765. chip->usb_icl_votable = find_votable("USB_ICL");
  766. if (!chip->usb_icl_votable)
  767. goto set_jeita_fv;
  768. /*
  769. * If JEITA float voltage is same as max-vfloat of battery then
  770. * skip any further VBAT specific checks.
  771. */
  772. rc = power_supply_get_property(chip->batt_psy,
  773. POWER_SUPPLY_PROP_VOLTAGE_MAX, &pval);
  774. if (rc || (pval.intval == fv_uv)) {
  775. vote(chip->usb_icl_votable, JEITA_VOTER, false, 0);
  776. goto set_jeita_fv;
  777. }
  778. /*
  779. * Suspend USB input path if battery voltage is above
  780. * JEITA VFLOAT threshold.
  781. */
  782. if (chip->jeita_arb_en && fv_uv > 0) {
  783. rc = power_supply_get_property(chip->batt_psy,
  784. POWER_SUPPLY_PROP_VOLTAGE_NOW, &pval);
  785. if (!rc && (pval.intval > fv_uv))
  786. vote(chip->usb_icl_votable, JEITA_VOTER, true, 0);
  787. else if (pval.intval < (fv_uv - JEITA_SUSPEND_HYST_UV))
  788. vote(chip->usb_icl_votable, JEITA_VOTER, false, 0);
  789. }
  790. set_jeita_fv:
  791. vote(chip->fv_votable, JEITA_VOTER, fv_uv ? true : false, fv_uv);
  792. update_time:
  793. chip->jeita_last_update_time = ktime_get();
  794. return 0;
  795. }
  796. static int handle_battery_insertion(struct step_chg_info *chip)
  797. {
  798. int rc;
  799. union power_supply_propval pval = {0, };
  800. rc = power_supply_get_property(chip->batt_psy,
  801. POWER_SUPPLY_PROP_PRESENT, &pval);
  802. if (rc < 0) {
  803. pr_err("Get battery present status failed, rc=%d\n", rc);
  804. return rc;
  805. }
  806. if (chip->batt_missing != (!pval.intval)) {
  807. chip->batt_missing = !pval.intval;
  808. pr_debug("battery %s detected\n",
  809. chip->batt_missing ? "removal" : "insertion");
  810. if (chip->batt_missing) {
  811. chip->step_chg_cfg_valid = false;
  812. chip->sw_jeita_cfg_valid = false;
  813. chip->get_config_retry_count = 0;
  814. } else {
  815. /*
  816. * Get config for the new inserted battery, delay
  817. * to make sure BMS has read out the batt_id.
  818. */
  819. schedule_delayed_work(&chip->get_config_work,
  820. msecs_to_jiffies(WAIT_BATT_ID_READY_MS));
  821. }
  822. }
  823. return rc;
  824. }
  825. static void status_change_work(struct work_struct *work)
  826. {
  827. struct step_chg_info *chip = container_of(work,
  828. struct step_chg_info, status_change_work.work);
  829. int rc = 0;
  830. union power_supply_propval prop = {0, };
  831. if (!is_batt_available(chip) || !is_bms_available(chip))
  832. goto exit_work;
  833. handle_battery_insertion(chip);
  834. /* skip elapsed_us debounce for handling battery temperature */
  835. rc = handle_jeita(chip);
  836. if (rc < 0)
  837. pr_err("Couldn't handle sw jeita rc = %d\n", rc);
  838. rc = handle_step_chg_config(chip);
  839. if (rc < 0)
  840. pr_err("Couldn't handle step rc = %d\n", rc);
  841. /* Remove stale votes on USB removal */
  842. if (is_usb_available(chip)) {
  843. prop.intval = 0;
  844. power_supply_get_property(chip->usb_psy,
  845. POWER_SUPPLY_PROP_PRESENT, &prop);
  846. if (!prop.intval) {
  847. if (chip->usb_icl_votable)
  848. vote(chip->usb_icl_votable, JEITA_VOTER,
  849. false, 0);
  850. }
  851. }
  852. exit_work:
  853. __pm_relax(chip->step_chg_ws);
  854. }
  855. static int step_chg_notifier_call(struct notifier_block *nb,
  856. unsigned long ev, void *v)
  857. {
  858. struct power_supply *psy = v;
  859. struct step_chg_info *chip = container_of(nb, struct step_chg_info, nb);
  860. if (ev != PSY_EVENT_PROP_CHANGED)
  861. return NOTIFY_OK;
  862. if ((strcmp(psy->desc->name, "battery") == 0)
  863. || (strcmp(psy->desc->name, "usb") == 0)) {
  864. __pm_stay_awake(chip->step_chg_ws);
  865. schedule_delayed_work(&chip->status_change_work, 0);
  866. }
  867. if ((strcmp(psy->desc->name, "bms") == 0)) {
  868. if (!chip->config_is_read)
  869. schedule_delayed_work(&chip->get_config_work, 0);
  870. }
  871. return NOTIFY_OK;
  872. }
  873. static int step_chg_register_notifier(struct step_chg_info *chip)
  874. {
  875. int rc;
  876. chip->nb.notifier_call = step_chg_notifier_call;
  877. rc = power_supply_reg_notifier(&chip->nb);
  878. if (rc < 0) {
  879. pr_err("Couldn't register psy notifier rc = %d\n", rc);
  880. return rc;
  881. }
  882. return 0;
  883. }
  884. int qcom_step_chg_init(struct device *dev, bool step_chg_enable,
  885. bool sw_jeita_enable, bool jeita_arb_en, struct iio_channel *iio_chans)
  886. {
  887. int rc;
  888. struct step_chg_info *chip;
  889. if (the_chip) {
  890. pr_err("Already initialized\n");
  891. return -EINVAL;
  892. }
  893. chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
  894. if (!chip)
  895. return -ENOMEM;
  896. chip->step_chg_ws = wakeup_source_register(dev, "qcom-step-chg");
  897. if (!chip->step_chg_ws)
  898. return -EINVAL;
  899. chip->dev = dev;
  900. chip->step_chg_enable = step_chg_enable;
  901. chip->sw_jeita_enable = sw_jeita_enable;
  902. chip->jeita_arb_en = jeita_arb_en;
  903. chip->step_index = -EINVAL;
  904. chip->jeita_fcc_index = -EINVAL;
  905. chip->jeita_fv_index = -EINVAL;
  906. chip->iio_chans = iio_chans;
  907. chip->iio_chan_list_qg = NULL;
  908. chip->step_chg_config = devm_kzalloc(dev,
  909. sizeof(struct step_chg_cfg), GFP_KERNEL);
  910. if (!chip->step_chg_config)
  911. return -ENOMEM;
  912. chip->step_chg_config->param.psy_prop = POWER_SUPPLY_PROP_VOLTAGE_NOW;
  913. chip->step_chg_config->param.iio_prop = STEP_QG_VOLTAGE_NOW;
  914. chip->step_chg_config->param.prop_name = "VBATT";
  915. chip->step_chg_config->param.rise_hys = 100000;
  916. chip->step_chg_config->param.fall_hys = 100000;
  917. chip->jeita_fcc_config = devm_kzalloc(dev,
  918. sizeof(struct jeita_fcc_cfg), GFP_KERNEL);
  919. chip->jeita_fv_config = devm_kzalloc(dev,
  920. sizeof(struct jeita_fv_cfg), GFP_KERNEL);
  921. if (!chip->jeita_fcc_config || !chip->jeita_fv_config)
  922. return -ENOMEM;
  923. chip->jeita_fcc_config->param.psy_prop = POWER_SUPPLY_PROP_TEMP;
  924. chip->jeita_fcc_config->param.iio_prop = STEP_QG_TEMP;
  925. chip->jeita_fcc_config->param.prop_name = "BATT_TEMP";
  926. chip->jeita_fcc_config->param.rise_hys = 10;
  927. chip->jeita_fcc_config->param.fall_hys = 10;
  928. chip->jeita_fv_config->param.psy_prop = POWER_SUPPLY_PROP_TEMP;
  929. chip->jeita_fv_config->param.iio_prop = STEP_QG_TEMP;
  930. chip->jeita_fv_config->param.prop_name = "BATT_TEMP";
  931. chip->jeita_fv_config->param.rise_hys = 10;
  932. chip->jeita_fv_config->param.fall_hys = 10;
  933. INIT_DELAYED_WORK(&chip->status_change_work, status_change_work);
  934. INIT_DELAYED_WORK(&chip->get_config_work, get_config_work);
  935. rc = step_chg_register_notifier(chip);
  936. if (rc < 0) {
  937. pr_err("Couldn't register psy notifier rc = %d\n", rc);
  938. goto release_wakeup_source;
  939. }
  940. schedule_delayed_work(&chip->get_config_work,
  941. msecs_to_jiffies(GET_CONFIG_DELAY_MS));
  942. the_chip = chip;
  943. return 0;
  944. release_wakeup_source:
  945. wakeup_source_unregister(chip->step_chg_ws);
  946. return rc;
  947. }
  948. void qcom_step_chg_deinit(void)
  949. {
  950. struct step_chg_info *chip = the_chip;
  951. if (!chip)
  952. return;
  953. cancel_delayed_work_sync(&chip->status_change_work);
  954. cancel_delayed_work_sync(&chip->get_config_work);
  955. power_supply_unreg_notifier(&chip->nb);
  956. wakeup_source_unregister(chip->step_chg_ws);
  957. the_chip = NULL;
  958. }