pinctrl-meson.h 4.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Pin controller and GPIO driver for Amlogic Meson SoCs
  4. *
  5. * Copyright (C) 2014 Beniamino Galvani <[email protected]>
  6. */
  7. #include <linux/gpio/driver.h>
  8. #include <linux/pinctrl/pinctrl.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/regmap.h>
  11. #include <linux/types.h>
  12. #include <linux/module.h>
  13. struct fwnode_handle;
  14. struct meson_pinctrl;
  15. /**
  16. * struct meson_pmx_group - a pinmux group
  17. *
  18. * @name: group name
  19. * @pins: pins in the group
  20. * @num_pins: number of pins in the group
  21. * @is_gpio: whether the group is a single GPIO group
  22. * @reg: register offset for the group in the domain mux registers
  23. * @bit bit index enabling the group
  24. * @domain: index of the domain this group belongs to
  25. */
  26. struct meson_pmx_group {
  27. const char *name;
  28. const unsigned int *pins;
  29. unsigned int num_pins;
  30. const void *data;
  31. };
  32. /**
  33. * struct meson_pmx_func - a pinmux function
  34. *
  35. * @name: function name
  36. * @groups: groups in the function
  37. * @num_groups: number of groups in the function
  38. */
  39. struct meson_pmx_func {
  40. const char *name;
  41. const char * const *groups;
  42. unsigned int num_groups;
  43. };
  44. /**
  45. * struct meson_reg_desc - a register descriptor
  46. *
  47. * @reg: register offset in the regmap
  48. * @bit: bit index in register
  49. *
  50. * The structure describes the information needed to control pull,
  51. * pull-enable, direction, etc. for a single pin
  52. */
  53. struct meson_reg_desc {
  54. unsigned int reg;
  55. unsigned int bit;
  56. };
  57. /**
  58. * enum meson_reg_type - type of registers encoded in @meson_reg_desc
  59. */
  60. enum meson_reg_type {
  61. MESON_REG_PULLEN,
  62. MESON_REG_PULL,
  63. MESON_REG_DIR,
  64. MESON_REG_OUT,
  65. MESON_REG_IN,
  66. MESON_REG_DS,
  67. MESON_NUM_REG,
  68. };
  69. /**
  70. * enum meson_pinconf_drv - value of drive-strength supported
  71. */
  72. enum meson_pinconf_drv {
  73. MESON_PINCONF_DRV_500UA,
  74. MESON_PINCONF_DRV_2500UA,
  75. MESON_PINCONF_DRV_3000UA,
  76. MESON_PINCONF_DRV_4000UA,
  77. };
  78. /**
  79. * struct meson bank
  80. *
  81. * @name: bank name
  82. * @first: first pin of the bank
  83. * @last: last pin of the bank
  84. * @irq: hwirq base number of the bank
  85. * @regs: array of register descriptors
  86. *
  87. * A bank represents a set of pins controlled by a contiguous set of
  88. * bits in the domain registers. The structure specifies which bits in
  89. * the regmap control the different functionalities. Each member of
  90. * the @regs array refers to the first pin of the bank.
  91. */
  92. struct meson_bank {
  93. const char *name;
  94. unsigned int first;
  95. unsigned int last;
  96. int irq_first;
  97. int irq_last;
  98. struct meson_reg_desc regs[MESON_NUM_REG];
  99. };
  100. struct meson_pinctrl_data {
  101. const char *name;
  102. const struct pinctrl_pin_desc *pins;
  103. struct meson_pmx_group *groups;
  104. struct meson_pmx_func *funcs;
  105. unsigned int num_pins;
  106. unsigned int num_groups;
  107. unsigned int num_funcs;
  108. struct meson_bank *banks;
  109. unsigned int num_banks;
  110. const struct pinmux_ops *pmx_ops;
  111. void *pmx_data;
  112. int (*parse_dt)(struct meson_pinctrl *pc);
  113. };
  114. struct meson_pinctrl {
  115. struct device *dev;
  116. struct pinctrl_dev *pcdev;
  117. struct pinctrl_desc desc;
  118. struct meson_pinctrl_data *data;
  119. struct regmap *reg_mux;
  120. struct regmap *reg_pullen;
  121. struct regmap *reg_pull;
  122. struct regmap *reg_gpio;
  123. struct regmap *reg_ds;
  124. struct gpio_chip chip;
  125. struct fwnode_handle *fwnode;
  126. };
  127. #define FUNCTION(fn) \
  128. { \
  129. .name = #fn, \
  130. .groups = fn ## _groups, \
  131. .num_groups = ARRAY_SIZE(fn ## _groups), \
  132. }
  133. #define BANK_DS(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib, \
  134. dsr, dsb) \
  135. { \
  136. .name = n, \
  137. .first = f, \
  138. .last = l, \
  139. .irq_first = fi, \
  140. .irq_last = li, \
  141. .regs = { \
  142. [MESON_REG_PULLEN] = { per, peb }, \
  143. [MESON_REG_PULL] = { pr, pb }, \
  144. [MESON_REG_DIR] = { dr, db }, \
  145. [MESON_REG_OUT] = { or, ob }, \
  146. [MESON_REG_IN] = { ir, ib }, \
  147. [MESON_REG_DS] = { dsr, dsb }, \
  148. }, \
  149. }
  150. #define BANK(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib) \
  151. BANK_DS(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib, 0, 0)
  152. #define MESON_PIN(x) PINCTRL_PIN(x, #x)
  153. /* Common pmx functions */
  154. int meson_pmx_get_funcs_count(struct pinctrl_dev *pcdev);
  155. const char *meson_pmx_get_func_name(struct pinctrl_dev *pcdev,
  156. unsigned selector);
  157. int meson_pmx_get_groups(struct pinctrl_dev *pcdev,
  158. unsigned selector,
  159. const char * const **groups,
  160. unsigned * const num_groups);
  161. /* Common probe function */
  162. int meson_pinctrl_probe(struct platform_device *pdev);
  163. /* Common ao groups extra dt parse function for SoCs before g12a */
  164. int meson8_aobus_parse_dt_extra(struct meson_pinctrl *pc);
  165. /* Common extra dt parse function for SoCs like A1 */
  166. int meson_a1_parse_dt_extra(struct meson_pinctrl *pc);