pinctrl-mt6397.c 1.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015 MediaTek Inc.
  4. * Author: Hongzhou.Yang <[email protected]>
  5. */
  6. #include <linux/init.h>
  7. #include <linux/platform_device.h>
  8. #include <linux/of.h>
  9. #include <linux/of_device.h>
  10. #include <linux/pinctrl/pinctrl.h>
  11. #include <linux/pinctrl/pinconf-generic.h>
  12. #include <linux/mfd/mt6397/core.h>
  13. #include "pinctrl-mtk-common.h"
  14. #include "pinctrl-mtk-mt6397.h"
  15. #define MT6397_PIN_REG_BASE 0xc000
  16. static const struct mtk_pinctrl_devdata mt6397_pinctrl_data = {
  17. .pins = mtk_pins_mt6397,
  18. .npins = ARRAY_SIZE(mtk_pins_mt6397),
  19. .dir_offset = (MT6397_PIN_REG_BASE + 0x000),
  20. .ies_offset = MTK_PINCTRL_NOT_SUPPORT,
  21. .smt_offset = MTK_PINCTRL_NOT_SUPPORT,
  22. .pullen_offset = (MT6397_PIN_REG_BASE + 0x020),
  23. .pullsel_offset = (MT6397_PIN_REG_BASE + 0x040),
  24. .dout_offset = (MT6397_PIN_REG_BASE + 0x080),
  25. .din_offset = (MT6397_PIN_REG_BASE + 0x0a0),
  26. .pinmux_offset = (MT6397_PIN_REG_BASE + 0x0c0),
  27. .type1_start = 41,
  28. .type1_end = 41,
  29. .port_shf = 3,
  30. .port_mask = 0x3,
  31. .port_align = 2,
  32. .mode_mask = 0xf,
  33. .mode_per_reg = 5,
  34. .mode_shf = 4,
  35. };
  36. static int mt6397_pinctrl_probe(struct platform_device *pdev)
  37. {
  38. struct mt6397_chip *mt6397;
  39. mt6397 = dev_get_drvdata(pdev->dev.parent);
  40. return mtk_pctrl_init(pdev, &mt6397_pinctrl_data, mt6397->regmap);
  41. }
  42. static const struct of_device_id mt6397_pctrl_match[] = {
  43. { .compatible = "mediatek,mt6397-pinctrl", },
  44. { }
  45. };
  46. static struct platform_driver mtk_pinctrl_driver = {
  47. .probe = mt6397_pinctrl_probe,
  48. .driver = {
  49. .name = "mediatek-mt6397-pinctrl",
  50. .of_match_table = mt6397_pctrl_match,
  51. },
  52. };
  53. builtin_platform_driver(mtk_pinctrl_driver);