i2c.c 6.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283
  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * I2C Link Layer for Samsung S3FWRN5 NCI based Driver
  4. *
  5. * Copyright (C) 2015 Samsung Electrnoics
  6. * Robert Baldyga <[email protected]>
  7. */
  8. #include <linux/clk.h>
  9. #include <linux/i2c.h>
  10. #include <linux/gpio.h>
  11. #include <linux/delay.h>
  12. #include <linux/of_gpio.h>
  13. #include <linux/of_irq.h>
  14. #include <linux/module.h>
  15. #include <net/nfc/nfc.h>
  16. #include "phy_common.h"
  17. #define S3FWRN5_I2C_DRIVER_NAME "s3fwrn5_i2c"
  18. struct s3fwrn5_i2c_phy {
  19. struct phy_common common;
  20. struct i2c_client *i2c_dev;
  21. struct clk *clk;
  22. unsigned int irq_skip:1;
  23. };
  24. static void s3fwrn5_i2c_set_mode(void *phy_id, enum s3fwrn5_mode mode)
  25. {
  26. struct s3fwrn5_i2c_phy *phy = phy_id;
  27. mutex_lock(&phy->common.mutex);
  28. if (s3fwrn5_phy_power_ctrl(&phy->common, mode) == false)
  29. goto out;
  30. phy->irq_skip = true;
  31. out:
  32. mutex_unlock(&phy->common.mutex);
  33. }
  34. static int s3fwrn5_i2c_write(void *phy_id, struct sk_buff *skb)
  35. {
  36. struct s3fwrn5_i2c_phy *phy = phy_id;
  37. int ret;
  38. mutex_lock(&phy->common.mutex);
  39. phy->irq_skip = false;
  40. ret = i2c_master_send(phy->i2c_dev, skb->data, skb->len);
  41. if (ret == -EREMOTEIO) {
  42. /* Retry, chip was in standby */
  43. usleep_range(110000, 120000);
  44. ret = i2c_master_send(phy->i2c_dev, skb->data, skb->len);
  45. }
  46. mutex_unlock(&phy->common.mutex);
  47. if (ret < 0)
  48. return ret;
  49. if (ret != skb->len)
  50. return -EREMOTEIO;
  51. return 0;
  52. }
  53. static const struct s3fwrn5_phy_ops i2c_phy_ops = {
  54. .set_wake = s3fwrn5_phy_set_wake,
  55. .set_mode = s3fwrn5_i2c_set_mode,
  56. .get_mode = s3fwrn5_phy_get_mode,
  57. .write = s3fwrn5_i2c_write,
  58. };
  59. static int s3fwrn5_i2c_read(struct s3fwrn5_i2c_phy *phy)
  60. {
  61. struct sk_buff *skb;
  62. size_t hdr_size;
  63. size_t data_len;
  64. char hdr[4];
  65. int ret;
  66. hdr_size = (phy->common.mode == S3FWRN5_MODE_NCI) ?
  67. NCI_CTRL_HDR_SIZE : S3FWRN5_FW_HDR_SIZE;
  68. ret = i2c_master_recv(phy->i2c_dev, hdr, hdr_size);
  69. if (ret < 0)
  70. return ret;
  71. if (ret < hdr_size)
  72. return -EBADMSG;
  73. data_len = (phy->common.mode == S3FWRN5_MODE_NCI) ?
  74. ((struct nci_ctrl_hdr *)hdr)->plen :
  75. ((struct s3fwrn5_fw_header *)hdr)->len;
  76. skb = alloc_skb(hdr_size + data_len, GFP_KERNEL);
  77. if (!skb)
  78. return -ENOMEM;
  79. skb_put_data(skb, hdr, hdr_size);
  80. if (data_len == 0)
  81. goto out;
  82. ret = i2c_master_recv(phy->i2c_dev, skb_put(skb, data_len), data_len);
  83. if (ret != data_len) {
  84. kfree_skb(skb);
  85. return -EBADMSG;
  86. }
  87. out:
  88. return s3fwrn5_recv_frame(phy->common.ndev, skb, phy->common.mode);
  89. }
  90. static irqreturn_t s3fwrn5_i2c_irq_thread_fn(int irq, void *phy_id)
  91. {
  92. struct s3fwrn5_i2c_phy *phy = phy_id;
  93. if (!phy || !phy->common.ndev) {
  94. WARN_ON_ONCE(1);
  95. return IRQ_NONE;
  96. }
  97. mutex_lock(&phy->common.mutex);
  98. if (phy->irq_skip)
  99. goto out;
  100. switch (phy->common.mode) {
  101. case S3FWRN5_MODE_NCI:
  102. case S3FWRN5_MODE_FW:
  103. s3fwrn5_i2c_read(phy);
  104. break;
  105. case S3FWRN5_MODE_COLD:
  106. break;
  107. }
  108. out:
  109. mutex_unlock(&phy->common.mutex);
  110. return IRQ_HANDLED;
  111. }
  112. static int s3fwrn5_i2c_parse_dt(struct i2c_client *client)
  113. {
  114. struct s3fwrn5_i2c_phy *phy = i2c_get_clientdata(client);
  115. struct device_node *np = client->dev.of_node;
  116. if (!np)
  117. return -ENODEV;
  118. phy->common.gpio_en = of_get_named_gpio(np, "en-gpios", 0);
  119. if (!gpio_is_valid(phy->common.gpio_en)) {
  120. /* Support also deprecated property */
  121. phy->common.gpio_en = of_get_named_gpio(np,
  122. "s3fwrn5,en-gpios",
  123. 0);
  124. if (!gpio_is_valid(phy->common.gpio_en))
  125. return -ENODEV;
  126. }
  127. phy->common.gpio_fw_wake = of_get_named_gpio(np, "wake-gpios", 0);
  128. if (!gpio_is_valid(phy->common.gpio_fw_wake)) {
  129. /* Support also deprecated property */
  130. phy->common.gpio_fw_wake = of_get_named_gpio(np,
  131. "s3fwrn5,fw-gpios",
  132. 0);
  133. if (!gpio_is_valid(phy->common.gpio_fw_wake))
  134. return -ENODEV;
  135. }
  136. return 0;
  137. }
  138. static int s3fwrn5_i2c_probe(struct i2c_client *client,
  139. const struct i2c_device_id *id)
  140. {
  141. struct s3fwrn5_i2c_phy *phy;
  142. int ret;
  143. phy = devm_kzalloc(&client->dev, sizeof(*phy), GFP_KERNEL);
  144. if (!phy)
  145. return -ENOMEM;
  146. mutex_init(&phy->common.mutex);
  147. phy->common.mode = S3FWRN5_MODE_COLD;
  148. phy->irq_skip = true;
  149. phy->i2c_dev = client;
  150. i2c_set_clientdata(client, phy);
  151. ret = s3fwrn5_i2c_parse_dt(client);
  152. if (ret < 0)
  153. return ret;
  154. ret = devm_gpio_request_one(&phy->i2c_dev->dev, phy->common.gpio_en,
  155. GPIOF_OUT_INIT_HIGH, "s3fwrn5_en");
  156. if (ret < 0)
  157. return ret;
  158. ret = devm_gpio_request_one(&phy->i2c_dev->dev,
  159. phy->common.gpio_fw_wake,
  160. GPIOF_OUT_INIT_LOW, "s3fwrn5_fw_wake");
  161. if (ret < 0)
  162. return ret;
  163. phy->clk = devm_clk_get_optional(&client->dev, NULL);
  164. if (IS_ERR(phy->clk))
  165. return dev_err_probe(&client->dev, PTR_ERR(phy->clk),
  166. "failed to get clock\n");
  167. /*
  168. * S3FWRN5 depends on a clock input ("XI" pin) to function properly.
  169. * Depending on the hardware configuration this could be an always-on
  170. * oscillator or some external clock that must be explicitly enabled.
  171. * Make sure the clock is running before starting S3FWRN5.
  172. */
  173. ret = clk_prepare_enable(phy->clk);
  174. if (ret < 0) {
  175. dev_err(&client->dev, "failed to enable clock: %d\n", ret);
  176. return ret;
  177. }
  178. ret = s3fwrn5_probe(&phy->common.ndev, phy, &phy->i2c_dev->dev,
  179. &i2c_phy_ops);
  180. if (ret < 0)
  181. goto disable_clk;
  182. ret = devm_request_threaded_irq(&client->dev, phy->i2c_dev->irq, NULL,
  183. s3fwrn5_i2c_irq_thread_fn, IRQF_ONESHOT,
  184. S3FWRN5_I2C_DRIVER_NAME, phy);
  185. if (ret)
  186. goto s3fwrn5_remove;
  187. return 0;
  188. s3fwrn5_remove:
  189. s3fwrn5_remove(phy->common.ndev);
  190. disable_clk:
  191. clk_disable_unprepare(phy->clk);
  192. return ret;
  193. }
  194. static void s3fwrn5_i2c_remove(struct i2c_client *client)
  195. {
  196. struct s3fwrn5_i2c_phy *phy = i2c_get_clientdata(client);
  197. s3fwrn5_remove(phy->common.ndev);
  198. clk_disable_unprepare(phy->clk);
  199. }
  200. static const struct i2c_device_id s3fwrn5_i2c_id_table[] = {
  201. {S3FWRN5_I2C_DRIVER_NAME, 0},
  202. {}
  203. };
  204. MODULE_DEVICE_TABLE(i2c, s3fwrn5_i2c_id_table);
  205. static const struct of_device_id of_s3fwrn5_i2c_match[] __maybe_unused = {
  206. { .compatible = "samsung,s3fwrn5-i2c", },
  207. {}
  208. };
  209. MODULE_DEVICE_TABLE(of, of_s3fwrn5_i2c_match);
  210. static struct i2c_driver s3fwrn5_i2c_driver = {
  211. .driver = {
  212. .name = S3FWRN5_I2C_DRIVER_NAME,
  213. .of_match_table = of_match_ptr(of_s3fwrn5_i2c_match),
  214. },
  215. .probe = s3fwrn5_i2c_probe,
  216. .remove = s3fwrn5_i2c_remove,
  217. .id_table = s3fwrn5_i2c_id_table,
  218. };
  219. module_i2c_driver(s3fwrn5_i2c_driver);
  220. MODULE_LICENSE("GPL");
  221. MODULE_DESCRIPTION("I2C driver for Samsung S3FWRN5");
  222. MODULE_AUTHOR("Robert Baldyga <[email protected]>");