tx.h 6.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
  2. /* Copyright(c) 2018-2019 Realtek Corporation
  3. */
  4. #ifndef __RTW_TX_H_
  5. #define __RTW_TX_H_
  6. #define RTK_TX_MAX_AGG_NUM_MASK 0x1f
  7. #define RTW_TX_PROBE_TIMEOUT msecs_to_jiffies(500)
  8. #define SET_TX_DESC_TXPKTSIZE(txdesc, value) \
  9. le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, GENMASK(15, 0))
  10. #define SET_TX_DESC_OFFSET(txdesc, value) \
  11. le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, GENMASK(23, 16))
  12. #define SET_TX_DESC_PKT_OFFSET(txdesc, value) \
  13. le32p_replace_bits((__le32 *)(txdesc) + 0x01, value, GENMASK(28, 24))
  14. #define SET_TX_DESC_QSEL(txdesc, value) \
  15. le32p_replace_bits((__le32 *)(txdesc) + 0x01, value, GENMASK(12, 8))
  16. #define SET_TX_DESC_BMC(txdesc, value) \
  17. le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, BIT(24))
  18. #define SET_TX_DESC_RATE_ID(txdesc, value) \
  19. le32p_replace_bits((__le32 *)(txdesc) + 0x01, value, GENMASK(20, 16))
  20. #define SET_TX_DESC_DATARATE(txdesc, value) \
  21. le32p_replace_bits((__le32 *)(txdesc) + 0x04, value, GENMASK(6, 0))
  22. #define SET_TX_DESC_DISDATAFB(txdesc, value) \
  23. le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, BIT(10))
  24. #define SET_TX_DESC_USE_RATE(txdesc, value) \
  25. le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, BIT(8))
  26. #define SET_TX_DESC_SEC_TYPE(txdesc, value) \
  27. le32p_replace_bits((__le32 *)(txdesc) + 0x01, value, GENMASK(23, 22))
  28. #define SET_TX_DESC_DATA_BW(txdesc, value) \
  29. le32p_replace_bits((__le32 *)(txdesc) + 0x05, value, GENMASK(6, 5))
  30. #define SET_TX_DESC_SW_SEQ(txdesc, value) \
  31. le32p_replace_bits((__le32 *)(txdesc) + 0x09, value, GENMASK(23, 12))
  32. #define SET_TX_DESC_TIM_EN(txdesc, value) \
  33. le32p_replace_bits((__le32 *)(txdesc) + 0x09, value, BIT(7))
  34. #define SET_TX_DESC_TIM_OFFSET(txdesc, value) \
  35. le32p_replace_bits((__le32 *)(txdesc) + 0x09, value, GENMASK(6, 0))
  36. #define SET_TX_DESC_MAX_AGG_NUM(txdesc, value) \
  37. le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, GENMASK(21, 17))
  38. #define SET_TX_DESC_USE_RTS(tx_desc, value) \
  39. le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, BIT(12))
  40. #define SET_TX_DESC_RTSRATE(txdesc, value) \
  41. le32p_replace_bits((__le32 *)(txdesc) + 0x04, value, GENMASK(28, 24))
  42. #define SET_TX_DESC_DATA_RTS_SHORT(txdesc, value) \
  43. le32p_replace_bits((__le32 *)(txdesc) + 0x05, value, BIT(12))
  44. #define SET_TX_DESC_AMPDU_DENSITY(txdesc, value) \
  45. le32p_replace_bits((__le32 *)(txdesc) + 0x02, value, GENMASK(22, 20))
  46. #define SET_TX_DESC_DATA_STBC(txdesc, value) \
  47. le32p_replace_bits((__le32 *)(txdesc) + 0x05, value, GENMASK(9, 8))
  48. #define SET_TX_DESC_DATA_LDPC(txdesc, value) \
  49. le32p_replace_bits((__le32 *)(txdesc) + 0x05, value, BIT(7))
  50. #define SET_TX_DESC_AGG_EN(txdesc, value) \
  51. le32p_replace_bits((__le32 *)(txdesc) + 0x02, value, BIT(12))
  52. #define SET_TX_DESC_LS(txdesc, value) \
  53. le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, BIT(26))
  54. #define SET_TX_DESC_DATA_SHORT(txdesc, value) \
  55. le32p_replace_bits((__le32 *)(txdesc) + 0x05, value, BIT(4))
  56. #define SET_TX_DESC_SPE_RPT(tx_desc, value) \
  57. le32p_replace_bits((__le32 *)(txdesc) + 0x02, value, BIT(19))
  58. #define SET_TX_DESC_SW_DEFINE(tx_desc, value) \
  59. le32p_replace_bits((__le32 *)(txdesc) + 0x06, value, GENMASK(11, 0))
  60. #define SET_TX_DESC_DISQSELSEQ(txdesc, value) \
  61. le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, BIT(31))
  62. #define SET_TX_DESC_EN_HWSEQ(txdesc, value) \
  63. le32p_replace_bits((__le32 *)(txdesc) + 0x08, value, BIT(15))
  64. #define SET_TX_DESC_HW_SSN_SEL(txdesc, value) \
  65. le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, GENMASK(7, 6))
  66. #define SET_TX_DESC_NAVUSEHDR(txdesc, value) \
  67. le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, BIT(15))
  68. #define SET_TX_DESC_BT_NULL(txdesc, value) \
  69. le32p_replace_bits((__le32 *)(txdesc) + 0x02, value, BIT(23))
  70. enum rtw_tx_desc_queue_select {
  71. TX_DESC_QSEL_TID0 = 0,
  72. TX_DESC_QSEL_TID1 = 1,
  73. TX_DESC_QSEL_TID2 = 2,
  74. TX_DESC_QSEL_TID3 = 3,
  75. TX_DESC_QSEL_TID4 = 4,
  76. TX_DESC_QSEL_TID5 = 5,
  77. TX_DESC_QSEL_TID6 = 6,
  78. TX_DESC_QSEL_TID7 = 7,
  79. TX_DESC_QSEL_TID8 = 8,
  80. TX_DESC_QSEL_TID9 = 9,
  81. TX_DESC_QSEL_TID10 = 10,
  82. TX_DESC_QSEL_TID11 = 11,
  83. TX_DESC_QSEL_TID12 = 12,
  84. TX_DESC_QSEL_TID13 = 13,
  85. TX_DESC_QSEL_TID14 = 14,
  86. TX_DESC_QSEL_TID15 = 15,
  87. TX_DESC_QSEL_BEACON = 16,
  88. TX_DESC_QSEL_HIGH = 17,
  89. TX_DESC_QSEL_MGMT = 18,
  90. TX_DESC_QSEL_H2C = 19,
  91. };
  92. enum rtw_rsvd_packet_type;
  93. void rtw_tx(struct rtw_dev *rtwdev,
  94. struct ieee80211_tx_control *control,
  95. struct sk_buff *skb);
  96. void rtw_txq_init(struct rtw_dev *rtwdev, struct ieee80211_txq *txq);
  97. void rtw_txq_cleanup(struct rtw_dev *rtwdev, struct ieee80211_txq *txq);
  98. void rtw_tx_work(struct work_struct *w);
  99. void rtw_tx_pkt_info_update(struct rtw_dev *rtwdev,
  100. struct rtw_tx_pkt_info *pkt_info,
  101. struct ieee80211_sta *sta,
  102. struct sk_buff *skb);
  103. void rtw_tx_fill_tx_desc(struct rtw_tx_pkt_info *pkt_info, struct sk_buff *skb);
  104. void rtw_tx_report_enqueue(struct rtw_dev *rtwdev, struct sk_buff *skb, u8 sn);
  105. void rtw_tx_report_handle(struct rtw_dev *rtwdev, struct sk_buff *skb, int src);
  106. void rtw_tx_rsvd_page_pkt_info_update(struct rtw_dev *rtwdev,
  107. struct rtw_tx_pkt_info *pkt_info,
  108. struct sk_buff *skb,
  109. enum rtw_rsvd_packet_type type);
  110. struct sk_buff *
  111. rtw_tx_write_data_rsvd_page_get(struct rtw_dev *rtwdev,
  112. struct rtw_tx_pkt_info *pkt_info,
  113. u8 *buf, u32 size);
  114. struct sk_buff *
  115. rtw_tx_write_data_h2c_get(struct rtw_dev *rtwdev,
  116. struct rtw_tx_pkt_info *pkt_info,
  117. u8 *buf, u32 size);
  118. #endif