hci.h 6.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
  2. /* Copyright(c) 2018-2019 Realtek Corporation
  3. */
  4. #ifndef __RTW_HCI_H__
  5. #define __RTW_HCI_H__
  6. /* ops for PCI, USB and SDIO */
  7. struct rtw_hci_ops {
  8. int (*tx_write)(struct rtw_dev *rtwdev,
  9. struct rtw_tx_pkt_info *pkt_info,
  10. struct sk_buff *skb);
  11. void (*tx_kick_off)(struct rtw_dev *rtwdev);
  12. void (*flush_queues)(struct rtw_dev *rtwdev, u32 queues, bool drop);
  13. int (*setup)(struct rtw_dev *rtwdev);
  14. int (*start)(struct rtw_dev *rtwdev);
  15. void (*stop)(struct rtw_dev *rtwdev);
  16. void (*deep_ps)(struct rtw_dev *rtwdev, bool enter);
  17. void (*link_ps)(struct rtw_dev *rtwdev, bool enter);
  18. void (*interface_cfg)(struct rtw_dev *rtwdev);
  19. int (*write_data_rsvd_page)(struct rtw_dev *rtwdev, u8 *buf, u32 size);
  20. int (*write_data_h2c)(struct rtw_dev *rtwdev, u8 *buf, u32 size);
  21. u8 (*read8)(struct rtw_dev *rtwdev, u32 addr);
  22. u16 (*read16)(struct rtw_dev *rtwdev, u32 addr);
  23. u32 (*read32)(struct rtw_dev *rtwdev, u32 addr);
  24. void (*write8)(struct rtw_dev *rtwdev, u32 addr, u8 val);
  25. void (*write16)(struct rtw_dev *rtwdev, u32 addr, u16 val);
  26. void (*write32)(struct rtw_dev *rtwdev, u32 addr, u32 val);
  27. };
  28. static inline int rtw_hci_tx_write(struct rtw_dev *rtwdev,
  29. struct rtw_tx_pkt_info *pkt_info,
  30. struct sk_buff *skb)
  31. {
  32. return rtwdev->hci.ops->tx_write(rtwdev, pkt_info, skb);
  33. }
  34. static inline void rtw_hci_tx_kick_off(struct rtw_dev *rtwdev)
  35. {
  36. return rtwdev->hci.ops->tx_kick_off(rtwdev);
  37. }
  38. static inline int rtw_hci_setup(struct rtw_dev *rtwdev)
  39. {
  40. return rtwdev->hci.ops->setup(rtwdev);
  41. }
  42. static inline int rtw_hci_start(struct rtw_dev *rtwdev)
  43. {
  44. return rtwdev->hci.ops->start(rtwdev);
  45. }
  46. static inline void rtw_hci_stop(struct rtw_dev *rtwdev)
  47. {
  48. rtwdev->hci.ops->stop(rtwdev);
  49. }
  50. static inline void rtw_hci_deep_ps(struct rtw_dev *rtwdev, bool enter)
  51. {
  52. rtwdev->hci.ops->deep_ps(rtwdev, enter);
  53. }
  54. static inline void rtw_hci_link_ps(struct rtw_dev *rtwdev, bool enter)
  55. {
  56. rtwdev->hci.ops->link_ps(rtwdev, enter);
  57. }
  58. static inline void rtw_hci_interface_cfg(struct rtw_dev *rtwdev)
  59. {
  60. rtwdev->hci.ops->interface_cfg(rtwdev);
  61. }
  62. static inline int
  63. rtw_hci_write_data_rsvd_page(struct rtw_dev *rtwdev, u8 *buf, u32 size)
  64. {
  65. return rtwdev->hci.ops->write_data_rsvd_page(rtwdev, buf, size);
  66. }
  67. static inline int
  68. rtw_hci_write_data_h2c(struct rtw_dev *rtwdev, u8 *buf, u32 size)
  69. {
  70. return rtwdev->hci.ops->write_data_h2c(rtwdev, buf, size);
  71. }
  72. static inline u8 rtw_read8(struct rtw_dev *rtwdev, u32 addr)
  73. {
  74. return rtwdev->hci.ops->read8(rtwdev, addr);
  75. }
  76. static inline u16 rtw_read16(struct rtw_dev *rtwdev, u32 addr)
  77. {
  78. return rtwdev->hci.ops->read16(rtwdev, addr);
  79. }
  80. static inline u32 rtw_read32(struct rtw_dev *rtwdev, u32 addr)
  81. {
  82. return rtwdev->hci.ops->read32(rtwdev, addr);
  83. }
  84. static inline void rtw_write8(struct rtw_dev *rtwdev, u32 addr, u8 val)
  85. {
  86. rtwdev->hci.ops->write8(rtwdev, addr, val);
  87. }
  88. static inline void rtw_write16(struct rtw_dev *rtwdev, u32 addr, u16 val)
  89. {
  90. rtwdev->hci.ops->write16(rtwdev, addr, val);
  91. }
  92. static inline void rtw_write32(struct rtw_dev *rtwdev, u32 addr, u32 val)
  93. {
  94. rtwdev->hci.ops->write32(rtwdev, addr, val);
  95. }
  96. static inline void rtw_write8_set(struct rtw_dev *rtwdev, u32 addr, u8 bit)
  97. {
  98. u8 val;
  99. val = rtw_read8(rtwdev, addr);
  100. rtw_write8(rtwdev, addr, val | bit);
  101. }
  102. static inline void rtw_write16_set(struct rtw_dev *rtwdev, u32 addr, u16 bit)
  103. {
  104. u16 val;
  105. val = rtw_read16(rtwdev, addr);
  106. rtw_write16(rtwdev, addr, val | bit);
  107. }
  108. static inline void rtw_write32_set(struct rtw_dev *rtwdev, u32 addr, u32 bit)
  109. {
  110. u32 val;
  111. val = rtw_read32(rtwdev, addr);
  112. rtw_write32(rtwdev, addr, val | bit);
  113. }
  114. static inline void rtw_write8_clr(struct rtw_dev *rtwdev, u32 addr, u8 bit)
  115. {
  116. u8 val;
  117. val = rtw_read8(rtwdev, addr);
  118. rtw_write8(rtwdev, addr, val & ~bit);
  119. }
  120. static inline void rtw_write16_clr(struct rtw_dev *rtwdev, u32 addr, u16 bit)
  121. {
  122. u16 val;
  123. val = rtw_read16(rtwdev, addr);
  124. rtw_write16(rtwdev, addr, val & ~bit);
  125. }
  126. static inline void rtw_write32_clr(struct rtw_dev *rtwdev, u32 addr, u32 bit)
  127. {
  128. u32 val;
  129. val = rtw_read32(rtwdev, addr);
  130. rtw_write32(rtwdev, addr, val & ~bit);
  131. }
  132. static inline u32
  133. rtw_read_rf(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path,
  134. u32 addr, u32 mask)
  135. {
  136. unsigned long flags;
  137. u32 val;
  138. spin_lock_irqsave(&rtwdev->rf_lock, flags);
  139. val = rtwdev->chip->ops->read_rf(rtwdev, rf_path, addr, mask);
  140. spin_unlock_irqrestore(&rtwdev->rf_lock, flags);
  141. return val;
  142. }
  143. static inline void
  144. rtw_write_rf(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path,
  145. u32 addr, u32 mask, u32 data)
  146. {
  147. unsigned long flags;
  148. spin_lock_irqsave(&rtwdev->rf_lock, flags);
  149. rtwdev->chip->ops->write_rf(rtwdev, rf_path, addr, mask, data);
  150. spin_unlock_irqrestore(&rtwdev->rf_lock, flags);
  151. }
  152. static inline u32
  153. rtw_read32_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask)
  154. {
  155. u32 shift = __ffs(mask);
  156. u32 orig;
  157. u32 ret;
  158. orig = rtw_read32(rtwdev, addr);
  159. ret = (orig & mask) >> shift;
  160. return ret;
  161. }
  162. static inline u16
  163. rtw_read16_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask)
  164. {
  165. u32 shift = __ffs(mask);
  166. u32 orig;
  167. u32 ret;
  168. orig = rtw_read16(rtwdev, addr);
  169. ret = (orig & mask) >> shift;
  170. return ret;
  171. }
  172. static inline u8
  173. rtw_read8_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask)
  174. {
  175. u32 shift = __ffs(mask);
  176. u32 orig;
  177. u32 ret;
  178. orig = rtw_read8(rtwdev, addr);
  179. ret = (orig & mask) >> shift;
  180. return ret;
  181. }
  182. static inline void
  183. rtw_write32_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask, u32 data)
  184. {
  185. u32 shift = __ffs(mask);
  186. u32 orig;
  187. u32 set;
  188. WARN(addr & 0x3, "should be 4-byte aligned, addr = 0x%08x\n", addr);
  189. orig = rtw_read32(rtwdev, addr);
  190. set = (orig & ~mask) | ((data << shift) & mask);
  191. rtw_write32(rtwdev, addr, set);
  192. }
  193. static inline void
  194. rtw_write8_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask, u8 data)
  195. {
  196. u32 shift;
  197. u8 orig, set;
  198. mask &= 0xff;
  199. shift = __ffs(mask);
  200. orig = rtw_read8(rtwdev, addr);
  201. set = (orig & ~mask) | ((data << shift) & mask);
  202. rtw_write8(rtwdev, addr, set);
  203. }
  204. static inline enum rtw_hci_type rtw_hci_type(struct rtw_dev *rtwdev)
  205. {
  206. return rtwdev->hci.type;
  207. }
  208. static inline void rtw_hci_flush_queues(struct rtw_dev *rtwdev, u32 queues,
  209. bool drop)
  210. {
  211. if (rtwdev->hci.ops->flush_queues)
  212. rtwdev->hci.ops->flush_queues(rtwdev, queues, drop);
  213. }
  214. static inline void rtw_hci_flush_all_queues(struct rtw_dev *rtwdev, bool drop)
  215. {
  216. if (rtwdev->hci.ops->flush_queues)
  217. rtwdev->hci.ops->flush_queues(rtwdev,
  218. BIT(rtwdev->hw->queues) - 1,
  219. drop);
  220. }
  221. #endif