efuse.c 4.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
  2. /* Copyright(c) 2018-2019 Realtek Corporation
  3. */
  4. #include <linux/iopoll.h>
  5. #include "main.h"
  6. #include "efuse.h"
  7. #include "reg.h"
  8. #include "debug.h"
  9. #define RTW_EFUSE_BANK_WIFI 0x0
  10. static void switch_efuse_bank(struct rtw_dev *rtwdev)
  11. {
  12. rtw_write32_mask(rtwdev, REG_LDO_EFUSE_CTRL, BIT_MASK_EFUSE_BANK_SEL,
  13. RTW_EFUSE_BANK_WIFI);
  14. }
  15. #define invalid_efuse_header(hdr1, hdr2) \
  16. ((hdr1) == 0xff || (((hdr1) & 0x1f) == 0xf && (hdr2) == 0xff))
  17. #define invalid_efuse_content(word_en, i) \
  18. (((word_en) & BIT(i)) != 0x0)
  19. #define get_efuse_blk_idx_2_byte(hdr1, hdr2) \
  20. ((((hdr2) & 0xf0) >> 1) | (((hdr1) >> 5) & 0x07))
  21. #define get_efuse_blk_idx_1_byte(hdr1) \
  22. (((hdr1) & 0xf0) >> 4)
  23. #define block_idx_to_logical_idx(blk_idx, i) \
  24. (((blk_idx) << 3) + ((i) << 1))
  25. /* efuse header format
  26. *
  27. * | 7 5 4 0 | 7 4 3 0 | 15 8 7 0 |
  28. * block[2:0] 0 1111 block[6:3] word_en[3:0] byte0 byte1
  29. * | header 1 (optional) | header 2 | word N |
  30. *
  31. * word_en: 4 bits each word. 0 -> write; 1 -> not write
  32. * N: 1~4, depends on word_en
  33. */
  34. static int rtw_dump_logical_efuse_map(struct rtw_dev *rtwdev, u8 *phy_map,
  35. u8 *log_map)
  36. {
  37. u32 physical_size = rtwdev->efuse.physical_size;
  38. u32 protect_size = rtwdev->efuse.protect_size;
  39. u32 logical_size = rtwdev->efuse.logical_size;
  40. u32 phy_idx, log_idx;
  41. u8 hdr1, hdr2;
  42. u8 blk_idx;
  43. u8 word_en;
  44. int i;
  45. for (phy_idx = 0; phy_idx < physical_size - protect_size;) {
  46. hdr1 = phy_map[phy_idx];
  47. hdr2 = phy_map[phy_idx + 1];
  48. if (invalid_efuse_header(hdr1, hdr2))
  49. break;
  50. if ((hdr1 & 0x1f) == 0xf) {
  51. /* 2-byte header format */
  52. blk_idx = get_efuse_blk_idx_2_byte(hdr1, hdr2);
  53. word_en = hdr2 & 0xf;
  54. phy_idx += 2;
  55. } else {
  56. /* 1-byte header format */
  57. blk_idx = get_efuse_blk_idx_1_byte(hdr1);
  58. word_en = hdr1 & 0xf;
  59. phy_idx += 1;
  60. }
  61. for (i = 0; i < 4; i++) {
  62. if (invalid_efuse_content(word_en, i))
  63. continue;
  64. log_idx = block_idx_to_logical_idx(blk_idx, i);
  65. if (phy_idx + 1 > physical_size - protect_size ||
  66. log_idx + 1 > logical_size)
  67. return -EINVAL;
  68. log_map[log_idx] = phy_map[phy_idx];
  69. log_map[log_idx + 1] = phy_map[phy_idx + 1];
  70. phy_idx += 2;
  71. }
  72. }
  73. return 0;
  74. }
  75. static int rtw_dump_physical_efuse_map(struct rtw_dev *rtwdev, u8 *map)
  76. {
  77. const struct rtw_chip_info *chip = rtwdev->chip;
  78. u32 size = rtwdev->efuse.physical_size;
  79. u32 efuse_ctl;
  80. u32 addr;
  81. u32 cnt;
  82. rtw_chip_efuse_grant_on(rtwdev);
  83. switch_efuse_bank(rtwdev);
  84. /* disable 2.5V LDO */
  85. chip->ops->cfg_ldo25(rtwdev, false);
  86. efuse_ctl = rtw_read32(rtwdev, REG_EFUSE_CTRL);
  87. for (addr = 0; addr < size; addr++) {
  88. efuse_ctl &= ~(BIT_MASK_EF_DATA | BITS_EF_ADDR);
  89. efuse_ctl |= (addr & BIT_MASK_EF_ADDR) << BIT_SHIFT_EF_ADDR;
  90. rtw_write32(rtwdev, REG_EFUSE_CTRL, efuse_ctl & (~BIT_EF_FLAG));
  91. cnt = 1000000;
  92. do {
  93. udelay(1);
  94. efuse_ctl = rtw_read32(rtwdev, REG_EFUSE_CTRL);
  95. if (--cnt == 0)
  96. return -EBUSY;
  97. } while (!(efuse_ctl & BIT_EF_FLAG));
  98. *(map + addr) = (u8)(efuse_ctl & BIT_MASK_EF_DATA);
  99. }
  100. rtw_chip_efuse_grant_off(rtwdev);
  101. return 0;
  102. }
  103. int rtw_read8_physical_efuse(struct rtw_dev *rtwdev, u16 addr, u8 *data)
  104. {
  105. u32 efuse_ctl;
  106. int ret;
  107. rtw_write32_mask(rtwdev, REG_EFUSE_CTRL, 0x3ff00, addr);
  108. rtw_write32_clr(rtwdev, REG_EFUSE_CTRL, BIT_EF_FLAG);
  109. ret = read_poll_timeout(rtw_read32, efuse_ctl, efuse_ctl & BIT_EF_FLAG,
  110. 1000, 100000, false, rtwdev, REG_EFUSE_CTRL);
  111. if (ret) {
  112. *data = EFUSE_READ_FAIL;
  113. return ret;
  114. }
  115. *data = rtw_read8(rtwdev, REG_EFUSE_CTRL);
  116. return 0;
  117. }
  118. EXPORT_SYMBOL(rtw_read8_physical_efuse);
  119. int rtw_parse_efuse_map(struct rtw_dev *rtwdev)
  120. {
  121. const struct rtw_chip_info *chip = rtwdev->chip;
  122. struct rtw_efuse *efuse = &rtwdev->efuse;
  123. u32 phy_size = efuse->physical_size;
  124. u32 log_size = efuse->logical_size;
  125. u8 *phy_map = NULL;
  126. u8 *log_map = NULL;
  127. int ret = 0;
  128. phy_map = kmalloc(phy_size, GFP_KERNEL);
  129. log_map = kmalloc(log_size, GFP_KERNEL);
  130. if (!phy_map || !log_map) {
  131. ret = -ENOMEM;
  132. goto out_free;
  133. }
  134. ret = rtw_dump_physical_efuse_map(rtwdev, phy_map);
  135. if (ret) {
  136. rtw_err(rtwdev, "failed to dump efuse physical map\n");
  137. goto out_free;
  138. }
  139. memset(log_map, 0xff, log_size);
  140. ret = rtw_dump_logical_efuse_map(rtwdev, phy_map, log_map);
  141. if (ret) {
  142. rtw_err(rtwdev, "failed to dump efuse logical map\n");
  143. goto out_free;
  144. }
  145. ret = chip->ops->read_efuse(rtwdev, log_map);
  146. if (ret) {
  147. rtw_err(rtwdev, "failed to read efuse map\n");
  148. goto out_free;
  149. }
  150. out_free:
  151. kfree(log_map);
  152. kfree(phy_map);
  153. return ret;
  154. }