rt2x00queue.c 33 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290
  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. Copyright (C) 2010 Willow Garage <http://www.willowgarage.com>
  4. Copyright (C) 2004 - 2010 Ivo van Doorn <[email protected]>
  5. Copyright (C) 2004 - 2009 Gertjan van Wingerde <[email protected]>
  6. <http://rt2x00.serialmonkey.com>
  7. */
  8. /*
  9. Module: rt2x00lib
  10. Abstract: rt2x00 queue specific routines.
  11. */
  12. #include <linux/slab.h>
  13. #include <linux/kernel.h>
  14. #include <linux/module.h>
  15. #include <linux/dma-mapping.h>
  16. #include "rt2x00.h"
  17. #include "rt2x00lib.h"
  18. struct sk_buff *rt2x00queue_alloc_rxskb(struct queue_entry *entry, gfp_t gfp)
  19. {
  20. struct data_queue *queue = entry->queue;
  21. struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
  22. struct sk_buff *skb;
  23. struct skb_frame_desc *skbdesc;
  24. unsigned int frame_size;
  25. unsigned int head_size = 0;
  26. unsigned int tail_size = 0;
  27. /*
  28. * The frame size includes descriptor size, because the
  29. * hardware directly receive the frame into the skbuffer.
  30. */
  31. frame_size = queue->data_size + queue->desc_size + queue->winfo_size;
  32. /*
  33. * The payload should be aligned to a 4-byte boundary,
  34. * this means we need at least 3 bytes for moving the frame
  35. * into the correct offset.
  36. */
  37. head_size = 4;
  38. /*
  39. * For IV/EIV/ICV assembly we must make sure there is
  40. * at least 8 bytes bytes available in headroom for IV/EIV
  41. * and 8 bytes for ICV data as tailroon.
  42. */
  43. if (rt2x00_has_cap_hw_crypto(rt2x00dev)) {
  44. head_size += 8;
  45. tail_size += 8;
  46. }
  47. /*
  48. * Allocate skbuffer.
  49. */
  50. skb = __dev_alloc_skb(frame_size + head_size + tail_size, gfp);
  51. if (!skb)
  52. return NULL;
  53. /*
  54. * Make sure we not have a frame with the requested bytes
  55. * available in the head and tail.
  56. */
  57. skb_reserve(skb, head_size);
  58. skb_put(skb, frame_size);
  59. /*
  60. * Populate skbdesc.
  61. */
  62. skbdesc = get_skb_frame_desc(skb);
  63. memset(skbdesc, 0, sizeof(*skbdesc));
  64. if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_DMA)) {
  65. dma_addr_t skb_dma;
  66. skb_dma = dma_map_single(rt2x00dev->dev, skb->data, skb->len,
  67. DMA_FROM_DEVICE);
  68. if (unlikely(dma_mapping_error(rt2x00dev->dev, skb_dma))) {
  69. dev_kfree_skb_any(skb);
  70. return NULL;
  71. }
  72. skbdesc->skb_dma = skb_dma;
  73. skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
  74. }
  75. return skb;
  76. }
  77. int rt2x00queue_map_txskb(struct queue_entry *entry)
  78. {
  79. struct device *dev = entry->queue->rt2x00dev->dev;
  80. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  81. skbdesc->skb_dma =
  82. dma_map_single(dev, entry->skb->data, entry->skb->len, DMA_TO_DEVICE);
  83. if (unlikely(dma_mapping_error(dev, skbdesc->skb_dma)))
  84. return -ENOMEM;
  85. skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
  86. rt2x00lib_dmadone(entry);
  87. return 0;
  88. }
  89. EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
  90. void rt2x00queue_unmap_skb(struct queue_entry *entry)
  91. {
  92. struct device *dev = entry->queue->rt2x00dev->dev;
  93. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  94. if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
  95. dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
  96. DMA_FROM_DEVICE);
  97. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
  98. } else if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
  99. dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
  100. DMA_TO_DEVICE);
  101. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
  102. }
  103. }
  104. EXPORT_SYMBOL_GPL(rt2x00queue_unmap_skb);
  105. void rt2x00queue_free_skb(struct queue_entry *entry)
  106. {
  107. if (!entry->skb)
  108. return;
  109. rt2x00queue_unmap_skb(entry);
  110. dev_kfree_skb_any(entry->skb);
  111. entry->skb = NULL;
  112. }
  113. void rt2x00queue_align_frame(struct sk_buff *skb)
  114. {
  115. unsigned int frame_length = skb->len;
  116. unsigned int align = ALIGN_SIZE(skb, 0);
  117. if (!align)
  118. return;
  119. skb_push(skb, align);
  120. memmove(skb->data, skb->data + align, frame_length);
  121. skb_trim(skb, frame_length);
  122. }
  123. /*
  124. * H/W needs L2 padding between the header and the paylod if header size
  125. * is not 4 bytes aligned.
  126. */
  127. void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int hdr_len)
  128. {
  129. unsigned int l2pad = (skb->len > hdr_len) ? L2PAD_SIZE(hdr_len) : 0;
  130. if (!l2pad)
  131. return;
  132. skb_push(skb, l2pad);
  133. memmove(skb->data, skb->data + l2pad, hdr_len);
  134. }
  135. void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int hdr_len)
  136. {
  137. unsigned int l2pad = (skb->len > hdr_len) ? L2PAD_SIZE(hdr_len) : 0;
  138. if (!l2pad)
  139. return;
  140. memmove(skb->data + l2pad, skb->data, hdr_len);
  141. skb_pull(skb, l2pad);
  142. }
  143. static void rt2x00queue_create_tx_descriptor_seq(struct rt2x00_dev *rt2x00dev,
  144. struct sk_buff *skb,
  145. struct txentry_desc *txdesc)
  146. {
  147. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  148. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  149. struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
  150. u16 seqno;
  151. if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ))
  152. return;
  153. __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  154. if (!rt2x00_has_cap_flag(rt2x00dev, REQUIRE_SW_SEQNO)) {
  155. /*
  156. * rt2800 has a H/W (or F/W) bug, device incorrectly increase
  157. * seqno on retransmitted data (non-QOS) and management frames.
  158. * To workaround the problem let's generate seqno in software.
  159. * Except for beacons which are transmitted periodically by H/W
  160. * hence hardware has to assign seqno for them.
  161. */
  162. if (ieee80211_is_beacon(hdr->frame_control)) {
  163. __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  164. /* H/W will generate sequence number */
  165. return;
  166. }
  167. __clear_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  168. }
  169. /*
  170. * The hardware is not able to insert a sequence number. Assign a
  171. * software generated one here.
  172. *
  173. * This is wrong because beacons are not getting sequence
  174. * numbers assigned properly.
  175. *
  176. * A secondary problem exists for drivers that cannot toggle
  177. * sequence counting per-frame, since those will override the
  178. * sequence counter given by mac80211.
  179. */
  180. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  181. seqno = atomic_add_return(0x10, &intf->seqno);
  182. else
  183. seqno = atomic_read(&intf->seqno);
  184. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  185. hdr->seq_ctrl |= cpu_to_le16(seqno);
  186. }
  187. static void rt2x00queue_create_tx_descriptor_plcp(struct rt2x00_dev *rt2x00dev,
  188. struct sk_buff *skb,
  189. struct txentry_desc *txdesc,
  190. const struct rt2x00_rate *hwrate)
  191. {
  192. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  193. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  194. unsigned int data_length;
  195. unsigned int duration;
  196. unsigned int residual;
  197. /*
  198. * Determine with what IFS priority this frame should be send.
  199. * Set ifs to IFS_SIFS when the this is not the first fragment,
  200. * or this fragment came after RTS/CTS.
  201. */
  202. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  203. txdesc->u.plcp.ifs = IFS_BACKOFF;
  204. else
  205. txdesc->u.plcp.ifs = IFS_SIFS;
  206. /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
  207. data_length = skb->len + 4;
  208. data_length += rt2x00crypto_tx_overhead(rt2x00dev, skb);
  209. /*
  210. * PLCP setup
  211. * Length calculation depends on OFDM/CCK rate.
  212. */
  213. txdesc->u.plcp.signal = hwrate->plcp;
  214. txdesc->u.plcp.service = 0x04;
  215. if (hwrate->flags & DEV_RATE_OFDM) {
  216. txdesc->u.plcp.length_high = (data_length >> 6) & 0x3f;
  217. txdesc->u.plcp.length_low = data_length & 0x3f;
  218. } else {
  219. /*
  220. * Convert length to microseconds.
  221. */
  222. residual = GET_DURATION_RES(data_length, hwrate->bitrate);
  223. duration = GET_DURATION(data_length, hwrate->bitrate);
  224. if (residual != 0) {
  225. duration++;
  226. /*
  227. * Check if we need to set the Length Extension
  228. */
  229. if (hwrate->bitrate == 110 && residual <= 30)
  230. txdesc->u.plcp.service |= 0x80;
  231. }
  232. txdesc->u.plcp.length_high = (duration >> 8) & 0xff;
  233. txdesc->u.plcp.length_low = duration & 0xff;
  234. /*
  235. * When preamble is enabled we should set the
  236. * preamble bit for the signal.
  237. */
  238. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  239. txdesc->u.plcp.signal |= 0x08;
  240. }
  241. }
  242. static void rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev *rt2x00dev,
  243. struct sk_buff *skb,
  244. struct txentry_desc *txdesc,
  245. struct ieee80211_sta *sta,
  246. const struct rt2x00_rate *hwrate)
  247. {
  248. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  249. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  250. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  251. struct rt2x00_sta *sta_priv = NULL;
  252. u8 density = 0;
  253. if (sta) {
  254. sta_priv = sta_to_rt2x00_sta(sta);
  255. txdesc->u.ht.wcid = sta_priv->wcid;
  256. density = sta->deflink.ht_cap.ampdu_density;
  257. }
  258. /*
  259. * If IEEE80211_TX_RC_MCS is set txrate->idx just contains the
  260. * mcs rate to be used
  261. */
  262. if (txrate->flags & IEEE80211_TX_RC_MCS) {
  263. txdesc->u.ht.mcs = txrate->idx;
  264. /*
  265. * MIMO PS should be set to 1 for STA's using dynamic SM PS
  266. * when using more then one tx stream (>MCS7).
  267. */
  268. if (sta && txdesc->u.ht.mcs > 7 &&
  269. sta->deflink.smps_mode == IEEE80211_SMPS_DYNAMIC)
  270. __set_bit(ENTRY_TXD_HT_MIMO_PS, &txdesc->flags);
  271. } else {
  272. txdesc->u.ht.mcs = rt2x00_get_rate_mcs(hwrate->mcs);
  273. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  274. txdesc->u.ht.mcs |= 0x08;
  275. }
  276. if (test_bit(CONFIG_HT_DISABLED, &rt2x00dev->flags)) {
  277. if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT))
  278. txdesc->u.ht.txop = TXOP_SIFS;
  279. else
  280. txdesc->u.ht.txop = TXOP_BACKOFF;
  281. /* Left zero on all other settings. */
  282. return;
  283. }
  284. /*
  285. * Only one STBC stream is supported for now.
  286. */
  287. if (tx_info->flags & IEEE80211_TX_CTL_STBC)
  288. txdesc->u.ht.stbc = 1;
  289. /*
  290. * This frame is eligible for an AMPDU, however, don't aggregate
  291. * frames that are intended to probe a specific tx rate.
  292. */
  293. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU &&
  294. !(tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)) {
  295. __set_bit(ENTRY_TXD_HT_AMPDU, &txdesc->flags);
  296. txdesc->u.ht.mpdu_density = density;
  297. txdesc->u.ht.ba_size = 7; /* FIXME: What value is needed? */
  298. }
  299. /*
  300. * Set 40Mhz mode if necessary (for legacy rates this will
  301. * duplicate the frame to both channels).
  302. */
  303. if (txrate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH ||
  304. txrate->flags & IEEE80211_TX_RC_DUP_DATA)
  305. __set_bit(ENTRY_TXD_HT_BW_40, &txdesc->flags);
  306. if (txrate->flags & IEEE80211_TX_RC_SHORT_GI)
  307. __set_bit(ENTRY_TXD_HT_SHORT_GI, &txdesc->flags);
  308. /*
  309. * Determine IFS values
  310. * - Use TXOP_BACKOFF for management frames except beacons
  311. * - Use TXOP_SIFS for fragment bursts
  312. * - Use TXOP_HTTXOP for everything else
  313. *
  314. * Note: rt2800 devices won't use CTS protection (if used)
  315. * for frames not transmitted with TXOP_HTTXOP
  316. */
  317. if (ieee80211_is_mgmt(hdr->frame_control) &&
  318. !ieee80211_is_beacon(hdr->frame_control))
  319. txdesc->u.ht.txop = TXOP_BACKOFF;
  320. else if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT))
  321. txdesc->u.ht.txop = TXOP_SIFS;
  322. else
  323. txdesc->u.ht.txop = TXOP_HTTXOP;
  324. }
  325. static void rt2x00queue_create_tx_descriptor(struct rt2x00_dev *rt2x00dev,
  326. struct sk_buff *skb,
  327. struct txentry_desc *txdesc,
  328. struct ieee80211_sta *sta)
  329. {
  330. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  331. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  332. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  333. struct ieee80211_rate *rate;
  334. const struct rt2x00_rate *hwrate = NULL;
  335. memset(txdesc, 0, sizeof(*txdesc));
  336. /*
  337. * Header and frame information.
  338. */
  339. txdesc->length = skb->len;
  340. txdesc->header_length = ieee80211_get_hdrlen_from_skb(skb);
  341. /*
  342. * Check whether this frame is to be acked.
  343. */
  344. if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
  345. __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
  346. /*
  347. * Check if this is a RTS/CTS frame
  348. */
  349. if (ieee80211_is_rts(hdr->frame_control) ||
  350. ieee80211_is_cts(hdr->frame_control)) {
  351. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  352. if (ieee80211_is_rts(hdr->frame_control))
  353. __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
  354. else
  355. __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
  356. if (tx_info->control.rts_cts_rate_idx >= 0)
  357. rate =
  358. ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
  359. }
  360. /*
  361. * Determine retry information.
  362. */
  363. txdesc->retry_limit = tx_info->control.rates[0].count - 1;
  364. if (txdesc->retry_limit >= rt2x00dev->long_retry)
  365. __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
  366. /*
  367. * Check if more fragments are pending
  368. */
  369. if (ieee80211_has_morefrags(hdr->frame_control)) {
  370. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  371. __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
  372. }
  373. /*
  374. * Check if more frames (!= fragments) are pending
  375. */
  376. if (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)
  377. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  378. /*
  379. * Beacons and probe responses require the tsf timestamp
  380. * to be inserted into the frame.
  381. */
  382. if ((ieee80211_is_beacon(hdr->frame_control) ||
  383. ieee80211_is_probe_resp(hdr->frame_control)) &&
  384. !(tx_info->flags & IEEE80211_TX_CTL_INJECTED))
  385. __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
  386. if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
  387. !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags))
  388. __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
  389. /*
  390. * Determine rate modulation.
  391. */
  392. if (txrate->flags & IEEE80211_TX_RC_GREEN_FIELD)
  393. txdesc->rate_mode = RATE_MODE_HT_GREENFIELD;
  394. else if (txrate->flags & IEEE80211_TX_RC_MCS)
  395. txdesc->rate_mode = RATE_MODE_HT_MIX;
  396. else {
  397. rate = ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
  398. hwrate = rt2x00_get_rate(rate->hw_value);
  399. if (hwrate->flags & DEV_RATE_OFDM)
  400. txdesc->rate_mode = RATE_MODE_OFDM;
  401. else
  402. txdesc->rate_mode = RATE_MODE_CCK;
  403. }
  404. /*
  405. * Apply TX descriptor handling by components
  406. */
  407. rt2x00crypto_create_tx_descriptor(rt2x00dev, skb, txdesc);
  408. rt2x00queue_create_tx_descriptor_seq(rt2x00dev, skb, txdesc);
  409. if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_HT_TX_DESC))
  410. rt2x00queue_create_tx_descriptor_ht(rt2x00dev, skb, txdesc,
  411. sta, hwrate);
  412. else
  413. rt2x00queue_create_tx_descriptor_plcp(rt2x00dev, skb, txdesc,
  414. hwrate);
  415. }
  416. static int rt2x00queue_write_tx_data(struct queue_entry *entry,
  417. struct txentry_desc *txdesc)
  418. {
  419. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  420. /*
  421. * This should not happen, we already checked the entry
  422. * was ours. When the hardware disagrees there has been
  423. * a queue corruption!
  424. */
  425. if (unlikely(rt2x00dev->ops->lib->get_entry_state &&
  426. rt2x00dev->ops->lib->get_entry_state(entry))) {
  427. rt2x00_err(rt2x00dev,
  428. "Corrupt queue %d, accessing entry which is not ours\n"
  429. "Please file bug report to %s\n",
  430. entry->queue->qid, DRV_PROJECT);
  431. return -EINVAL;
  432. }
  433. /*
  434. * Add the requested extra tx headroom in front of the skb.
  435. */
  436. skb_push(entry->skb, rt2x00dev->extra_tx_headroom);
  437. memset(entry->skb->data, 0, rt2x00dev->extra_tx_headroom);
  438. /*
  439. * Call the driver's write_tx_data function, if it exists.
  440. */
  441. if (rt2x00dev->ops->lib->write_tx_data)
  442. rt2x00dev->ops->lib->write_tx_data(entry, txdesc);
  443. /*
  444. * Map the skb to DMA.
  445. */
  446. if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_DMA) &&
  447. rt2x00queue_map_txskb(entry))
  448. return -ENOMEM;
  449. return 0;
  450. }
  451. static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
  452. struct txentry_desc *txdesc)
  453. {
  454. struct data_queue *queue = entry->queue;
  455. queue->rt2x00dev->ops->lib->write_tx_desc(entry, txdesc);
  456. /*
  457. * All processing on the frame has been completed, this means
  458. * it is now ready to be dumped to userspace through debugfs.
  459. */
  460. rt2x00debug_dump_frame(queue->rt2x00dev, DUMP_FRAME_TX, entry);
  461. }
  462. static void rt2x00queue_kick_tx_queue(struct data_queue *queue,
  463. struct txentry_desc *txdesc)
  464. {
  465. /*
  466. * Check if we need to kick the queue, there are however a few rules
  467. * 1) Don't kick unless this is the last in frame in a burst.
  468. * When the burst flag is set, this frame is always followed
  469. * by another frame which in some way are related to eachother.
  470. * This is true for fragments, RTS or CTS-to-self frames.
  471. * 2) Rule 1 can be broken when the available entries
  472. * in the queue are less then a certain threshold.
  473. */
  474. if (rt2x00queue_threshold(queue) ||
  475. !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
  476. queue->rt2x00dev->ops->lib->kick_queue(queue);
  477. }
  478. static void rt2x00queue_bar_check(struct queue_entry *entry)
  479. {
  480. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  481. struct ieee80211_bar *bar = (void *) (entry->skb->data +
  482. rt2x00dev->extra_tx_headroom);
  483. struct rt2x00_bar_list_entry *bar_entry;
  484. if (likely(!ieee80211_is_back_req(bar->frame_control)))
  485. return;
  486. bar_entry = kmalloc(sizeof(*bar_entry), GFP_ATOMIC);
  487. /*
  488. * If the alloc fails we still send the BAR out but just don't track
  489. * it in our bar list. And as a result we will report it to mac80211
  490. * back as failed.
  491. */
  492. if (!bar_entry)
  493. return;
  494. bar_entry->entry = entry;
  495. bar_entry->block_acked = 0;
  496. /*
  497. * Copy the relevant parts of the 802.11 BAR into out check list
  498. * such that we can use RCU for less-overhead in the RX path since
  499. * sending BARs and processing the according BlockAck should be
  500. * the exception.
  501. */
  502. memcpy(bar_entry->ra, bar->ra, sizeof(bar->ra));
  503. memcpy(bar_entry->ta, bar->ta, sizeof(bar->ta));
  504. bar_entry->control = bar->control;
  505. bar_entry->start_seq_num = bar->start_seq_num;
  506. /*
  507. * Insert BAR into our BAR check list.
  508. */
  509. spin_lock_bh(&rt2x00dev->bar_list_lock);
  510. list_add_tail_rcu(&bar_entry->list, &rt2x00dev->bar_list);
  511. spin_unlock_bh(&rt2x00dev->bar_list_lock);
  512. }
  513. int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
  514. struct ieee80211_sta *sta, bool local)
  515. {
  516. struct ieee80211_tx_info *tx_info;
  517. struct queue_entry *entry;
  518. struct txentry_desc txdesc;
  519. struct skb_frame_desc *skbdesc;
  520. u8 rate_idx, rate_flags;
  521. int ret = 0;
  522. /*
  523. * Copy all TX descriptor information into txdesc,
  524. * after that we are free to use the skb->cb array
  525. * for our information.
  526. */
  527. rt2x00queue_create_tx_descriptor(queue->rt2x00dev, skb, &txdesc, sta);
  528. /*
  529. * All information is retrieved from the skb->cb array,
  530. * now we should claim ownership of the driver part of that
  531. * array, preserving the bitrate index and flags.
  532. */
  533. tx_info = IEEE80211_SKB_CB(skb);
  534. rate_idx = tx_info->control.rates[0].idx;
  535. rate_flags = tx_info->control.rates[0].flags;
  536. skbdesc = get_skb_frame_desc(skb);
  537. memset(skbdesc, 0, sizeof(*skbdesc));
  538. skbdesc->tx_rate_idx = rate_idx;
  539. skbdesc->tx_rate_flags = rate_flags;
  540. if (local)
  541. skbdesc->flags |= SKBDESC_NOT_MAC80211;
  542. /*
  543. * When hardware encryption is supported, and this frame
  544. * is to be encrypted, we should strip the IV/EIV data from
  545. * the frame so we can provide it to the driver separately.
  546. */
  547. if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
  548. !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
  549. if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_COPY_IV))
  550. rt2x00crypto_tx_copy_iv(skb, &txdesc);
  551. else
  552. rt2x00crypto_tx_remove_iv(skb, &txdesc);
  553. }
  554. /*
  555. * When DMA allocation is required we should guarantee to the
  556. * driver that the DMA is aligned to a 4-byte boundary.
  557. * However some drivers require L2 padding to pad the payload
  558. * rather then the header. This could be a requirement for
  559. * PCI and USB devices, while header alignment only is valid
  560. * for PCI devices.
  561. */
  562. if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_L2PAD))
  563. rt2x00queue_insert_l2pad(skb, txdesc.header_length);
  564. else if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_DMA))
  565. rt2x00queue_align_frame(skb);
  566. /*
  567. * That function must be called with bh disabled.
  568. */
  569. spin_lock(&queue->tx_lock);
  570. if (unlikely(rt2x00queue_full(queue))) {
  571. rt2x00_dbg(queue->rt2x00dev, "Dropping frame due to full tx queue %d\n",
  572. queue->qid);
  573. ret = -ENOBUFS;
  574. goto out;
  575. }
  576. entry = rt2x00queue_get_entry(queue, Q_INDEX);
  577. if (unlikely(test_and_set_bit(ENTRY_OWNER_DEVICE_DATA,
  578. &entry->flags))) {
  579. rt2x00_err(queue->rt2x00dev,
  580. "Arrived at non-free entry in the non-full queue %d\n"
  581. "Please file bug report to %s\n",
  582. queue->qid, DRV_PROJECT);
  583. ret = -EINVAL;
  584. goto out;
  585. }
  586. entry->skb = skb;
  587. /*
  588. * It could be possible that the queue was corrupted and this
  589. * call failed. Since we always return NETDEV_TX_OK to mac80211,
  590. * this frame will simply be dropped.
  591. */
  592. if (unlikely(rt2x00queue_write_tx_data(entry, &txdesc))) {
  593. clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
  594. entry->skb = NULL;
  595. ret = -EIO;
  596. goto out;
  597. }
  598. /*
  599. * Put BlockAckReqs into our check list for driver BA processing.
  600. */
  601. rt2x00queue_bar_check(entry);
  602. set_bit(ENTRY_DATA_PENDING, &entry->flags);
  603. rt2x00queue_index_inc(entry, Q_INDEX);
  604. rt2x00queue_write_tx_descriptor(entry, &txdesc);
  605. rt2x00queue_kick_tx_queue(queue, &txdesc);
  606. out:
  607. /*
  608. * Pausing queue has to be serialized with rt2x00lib_txdone(), so we
  609. * do this under queue->tx_lock. Bottom halve was already disabled
  610. * before ieee80211_xmit() call.
  611. */
  612. if (rt2x00queue_threshold(queue))
  613. rt2x00queue_pause_queue(queue);
  614. spin_unlock(&queue->tx_lock);
  615. return ret;
  616. }
  617. int rt2x00queue_clear_beacon(struct rt2x00_dev *rt2x00dev,
  618. struct ieee80211_vif *vif)
  619. {
  620. struct rt2x00_intf *intf = vif_to_intf(vif);
  621. if (unlikely(!intf->beacon))
  622. return -ENOBUFS;
  623. /*
  624. * Clean up the beacon skb.
  625. */
  626. rt2x00queue_free_skb(intf->beacon);
  627. /*
  628. * Clear beacon (single bssid devices don't need to clear the beacon
  629. * since the beacon queue will get stopped anyway).
  630. */
  631. if (rt2x00dev->ops->lib->clear_beacon)
  632. rt2x00dev->ops->lib->clear_beacon(intf->beacon);
  633. return 0;
  634. }
  635. int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
  636. struct ieee80211_vif *vif)
  637. {
  638. struct rt2x00_intf *intf = vif_to_intf(vif);
  639. struct skb_frame_desc *skbdesc;
  640. struct txentry_desc txdesc;
  641. if (unlikely(!intf->beacon))
  642. return -ENOBUFS;
  643. /*
  644. * Clean up the beacon skb.
  645. */
  646. rt2x00queue_free_skb(intf->beacon);
  647. intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif, 0);
  648. if (!intf->beacon->skb)
  649. return -ENOMEM;
  650. /*
  651. * Copy all TX descriptor information into txdesc,
  652. * after that we are free to use the skb->cb array
  653. * for our information.
  654. */
  655. rt2x00queue_create_tx_descriptor(rt2x00dev, intf->beacon->skb, &txdesc, NULL);
  656. /*
  657. * Fill in skb descriptor
  658. */
  659. skbdesc = get_skb_frame_desc(intf->beacon->skb);
  660. memset(skbdesc, 0, sizeof(*skbdesc));
  661. /*
  662. * Send beacon to hardware.
  663. */
  664. rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc);
  665. return 0;
  666. }
  667. bool rt2x00queue_for_each_entry(struct data_queue *queue,
  668. enum queue_index start,
  669. enum queue_index end,
  670. void *data,
  671. bool (*fn)(struct queue_entry *entry,
  672. void *data))
  673. {
  674. unsigned long irqflags;
  675. unsigned int index_start;
  676. unsigned int index_end;
  677. unsigned int i;
  678. if (unlikely(start >= Q_INDEX_MAX || end >= Q_INDEX_MAX)) {
  679. rt2x00_err(queue->rt2x00dev,
  680. "Entry requested from invalid index range (%d - %d)\n",
  681. start, end);
  682. return true;
  683. }
  684. /*
  685. * Only protect the range we are going to loop over,
  686. * if during our loop a extra entry is set to pending
  687. * it should not be kicked during this run, since it
  688. * is part of another TX operation.
  689. */
  690. spin_lock_irqsave(&queue->index_lock, irqflags);
  691. index_start = queue->index[start];
  692. index_end = queue->index[end];
  693. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  694. /*
  695. * Start from the TX done pointer, this guarantees that we will
  696. * send out all frames in the correct order.
  697. */
  698. if (index_start < index_end) {
  699. for (i = index_start; i < index_end; i++) {
  700. if (fn(&queue->entries[i], data))
  701. return true;
  702. }
  703. } else {
  704. for (i = index_start; i < queue->limit; i++) {
  705. if (fn(&queue->entries[i], data))
  706. return true;
  707. }
  708. for (i = 0; i < index_end; i++) {
  709. if (fn(&queue->entries[i], data))
  710. return true;
  711. }
  712. }
  713. return false;
  714. }
  715. EXPORT_SYMBOL_GPL(rt2x00queue_for_each_entry);
  716. struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
  717. enum queue_index index)
  718. {
  719. struct queue_entry *entry;
  720. unsigned long irqflags;
  721. if (unlikely(index >= Q_INDEX_MAX)) {
  722. rt2x00_err(queue->rt2x00dev, "Entry requested from invalid index type (%d)\n",
  723. index);
  724. return NULL;
  725. }
  726. spin_lock_irqsave(&queue->index_lock, irqflags);
  727. entry = &queue->entries[queue->index[index]];
  728. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  729. return entry;
  730. }
  731. EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
  732. void rt2x00queue_index_inc(struct queue_entry *entry, enum queue_index index)
  733. {
  734. struct data_queue *queue = entry->queue;
  735. unsigned long irqflags;
  736. if (unlikely(index >= Q_INDEX_MAX)) {
  737. rt2x00_err(queue->rt2x00dev,
  738. "Index change on invalid index type (%d)\n", index);
  739. return;
  740. }
  741. spin_lock_irqsave(&queue->index_lock, irqflags);
  742. queue->index[index]++;
  743. if (queue->index[index] >= queue->limit)
  744. queue->index[index] = 0;
  745. entry->last_action = jiffies;
  746. if (index == Q_INDEX) {
  747. queue->length++;
  748. } else if (index == Q_INDEX_DONE) {
  749. queue->length--;
  750. queue->count++;
  751. }
  752. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  753. }
  754. static void rt2x00queue_pause_queue_nocheck(struct data_queue *queue)
  755. {
  756. switch (queue->qid) {
  757. case QID_AC_VO:
  758. case QID_AC_VI:
  759. case QID_AC_BE:
  760. case QID_AC_BK:
  761. /*
  762. * For TX queues, we have to disable the queue
  763. * inside mac80211.
  764. */
  765. ieee80211_stop_queue(queue->rt2x00dev->hw, queue->qid);
  766. break;
  767. default:
  768. break;
  769. }
  770. }
  771. void rt2x00queue_pause_queue(struct data_queue *queue)
  772. {
  773. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  774. !test_bit(QUEUE_STARTED, &queue->flags) ||
  775. test_and_set_bit(QUEUE_PAUSED, &queue->flags))
  776. return;
  777. rt2x00queue_pause_queue_nocheck(queue);
  778. }
  779. EXPORT_SYMBOL_GPL(rt2x00queue_pause_queue);
  780. void rt2x00queue_unpause_queue(struct data_queue *queue)
  781. {
  782. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  783. !test_bit(QUEUE_STARTED, &queue->flags) ||
  784. !test_and_clear_bit(QUEUE_PAUSED, &queue->flags))
  785. return;
  786. switch (queue->qid) {
  787. case QID_AC_VO:
  788. case QID_AC_VI:
  789. case QID_AC_BE:
  790. case QID_AC_BK:
  791. /*
  792. * For TX queues, we have to enable the queue
  793. * inside mac80211.
  794. */
  795. ieee80211_wake_queue(queue->rt2x00dev->hw, queue->qid);
  796. break;
  797. case QID_RX:
  798. /*
  799. * For RX we need to kick the queue now in order to
  800. * receive frames.
  801. */
  802. queue->rt2x00dev->ops->lib->kick_queue(queue);
  803. break;
  804. default:
  805. break;
  806. }
  807. }
  808. EXPORT_SYMBOL_GPL(rt2x00queue_unpause_queue);
  809. void rt2x00queue_start_queue(struct data_queue *queue)
  810. {
  811. mutex_lock(&queue->status_lock);
  812. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  813. test_and_set_bit(QUEUE_STARTED, &queue->flags)) {
  814. mutex_unlock(&queue->status_lock);
  815. return;
  816. }
  817. set_bit(QUEUE_PAUSED, &queue->flags);
  818. queue->rt2x00dev->ops->lib->start_queue(queue);
  819. rt2x00queue_unpause_queue(queue);
  820. mutex_unlock(&queue->status_lock);
  821. }
  822. EXPORT_SYMBOL_GPL(rt2x00queue_start_queue);
  823. void rt2x00queue_stop_queue(struct data_queue *queue)
  824. {
  825. mutex_lock(&queue->status_lock);
  826. if (!test_and_clear_bit(QUEUE_STARTED, &queue->flags)) {
  827. mutex_unlock(&queue->status_lock);
  828. return;
  829. }
  830. rt2x00queue_pause_queue_nocheck(queue);
  831. queue->rt2x00dev->ops->lib->stop_queue(queue);
  832. mutex_unlock(&queue->status_lock);
  833. }
  834. EXPORT_SYMBOL_GPL(rt2x00queue_stop_queue);
  835. void rt2x00queue_flush_queue(struct data_queue *queue, bool drop)
  836. {
  837. bool tx_queue =
  838. (queue->qid == QID_AC_VO) ||
  839. (queue->qid == QID_AC_VI) ||
  840. (queue->qid == QID_AC_BE) ||
  841. (queue->qid == QID_AC_BK);
  842. if (rt2x00queue_empty(queue))
  843. return;
  844. /*
  845. * If we are not supposed to drop any pending
  846. * frames, this means we must force a start (=kick)
  847. * to the queue to make sure the hardware will
  848. * start transmitting.
  849. */
  850. if (!drop && tx_queue)
  851. queue->rt2x00dev->ops->lib->kick_queue(queue);
  852. /*
  853. * Check if driver supports flushing, if that is the case we can
  854. * defer the flushing to the driver. Otherwise we must use the
  855. * alternative which just waits for the queue to become empty.
  856. */
  857. if (likely(queue->rt2x00dev->ops->lib->flush_queue))
  858. queue->rt2x00dev->ops->lib->flush_queue(queue, drop);
  859. /*
  860. * The queue flush has failed...
  861. */
  862. if (unlikely(!rt2x00queue_empty(queue)))
  863. rt2x00_warn(queue->rt2x00dev, "Queue %d failed to flush\n",
  864. queue->qid);
  865. }
  866. EXPORT_SYMBOL_GPL(rt2x00queue_flush_queue);
  867. void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev)
  868. {
  869. struct data_queue *queue;
  870. /*
  871. * rt2x00queue_start_queue will call ieee80211_wake_queue
  872. * for each queue after is has been properly initialized.
  873. */
  874. tx_queue_for_each(rt2x00dev, queue)
  875. rt2x00queue_start_queue(queue);
  876. rt2x00queue_start_queue(rt2x00dev->rx);
  877. }
  878. EXPORT_SYMBOL_GPL(rt2x00queue_start_queues);
  879. void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
  880. {
  881. struct data_queue *queue;
  882. /*
  883. * rt2x00queue_stop_queue will call ieee80211_stop_queue
  884. * as well, but we are completely shutting doing everything
  885. * now, so it is much safer to stop all TX queues at once,
  886. * and use rt2x00queue_stop_queue for cleaning up.
  887. */
  888. ieee80211_stop_queues(rt2x00dev->hw);
  889. tx_queue_for_each(rt2x00dev, queue)
  890. rt2x00queue_stop_queue(queue);
  891. rt2x00queue_stop_queue(rt2x00dev->rx);
  892. }
  893. EXPORT_SYMBOL_GPL(rt2x00queue_stop_queues);
  894. void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop)
  895. {
  896. struct data_queue *queue;
  897. tx_queue_for_each(rt2x00dev, queue)
  898. rt2x00queue_flush_queue(queue, drop);
  899. rt2x00queue_flush_queue(rt2x00dev->rx, drop);
  900. }
  901. EXPORT_SYMBOL_GPL(rt2x00queue_flush_queues);
  902. static void rt2x00queue_reset(struct data_queue *queue)
  903. {
  904. unsigned long irqflags;
  905. unsigned int i;
  906. spin_lock_irqsave(&queue->index_lock, irqflags);
  907. queue->count = 0;
  908. queue->length = 0;
  909. for (i = 0; i < Q_INDEX_MAX; i++)
  910. queue->index[i] = 0;
  911. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  912. }
  913. void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
  914. {
  915. struct data_queue *queue;
  916. unsigned int i;
  917. queue_for_each(rt2x00dev, queue) {
  918. rt2x00queue_reset(queue);
  919. for (i = 0; i < queue->limit; i++)
  920. rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
  921. }
  922. }
  923. static int rt2x00queue_alloc_entries(struct data_queue *queue)
  924. {
  925. struct queue_entry *entries;
  926. unsigned int entry_size;
  927. unsigned int i;
  928. rt2x00queue_reset(queue);
  929. /*
  930. * Allocate all queue entries.
  931. */
  932. entry_size = sizeof(*entries) + queue->priv_size;
  933. entries = kcalloc(queue->limit, entry_size, GFP_KERNEL);
  934. if (!entries)
  935. return -ENOMEM;
  936. #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
  937. (((char *)(__base)) + ((__limit) * (__esize)) + \
  938. ((__index) * (__psize)))
  939. for (i = 0; i < queue->limit; i++) {
  940. entries[i].flags = 0;
  941. entries[i].queue = queue;
  942. entries[i].skb = NULL;
  943. entries[i].entry_idx = i;
  944. entries[i].priv_data =
  945. QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
  946. sizeof(*entries), queue->priv_size);
  947. }
  948. #undef QUEUE_ENTRY_PRIV_OFFSET
  949. queue->entries = entries;
  950. return 0;
  951. }
  952. static void rt2x00queue_free_skbs(struct data_queue *queue)
  953. {
  954. unsigned int i;
  955. if (!queue->entries)
  956. return;
  957. for (i = 0; i < queue->limit; i++) {
  958. rt2x00queue_free_skb(&queue->entries[i]);
  959. }
  960. }
  961. static int rt2x00queue_alloc_rxskbs(struct data_queue *queue)
  962. {
  963. unsigned int i;
  964. struct sk_buff *skb;
  965. for (i = 0; i < queue->limit; i++) {
  966. skb = rt2x00queue_alloc_rxskb(&queue->entries[i], GFP_KERNEL);
  967. if (!skb)
  968. return -ENOMEM;
  969. queue->entries[i].skb = skb;
  970. }
  971. return 0;
  972. }
  973. int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
  974. {
  975. struct data_queue *queue;
  976. int status;
  977. status = rt2x00queue_alloc_entries(rt2x00dev->rx);
  978. if (status)
  979. goto exit;
  980. tx_queue_for_each(rt2x00dev, queue) {
  981. status = rt2x00queue_alloc_entries(queue);
  982. if (status)
  983. goto exit;
  984. }
  985. status = rt2x00queue_alloc_entries(rt2x00dev->bcn);
  986. if (status)
  987. goto exit;
  988. if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_ATIM_QUEUE)) {
  989. status = rt2x00queue_alloc_entries(rt2x00dev->atim);
  990. if (status)
  991. goto exit;
  992. }
  993. status = rt2x00queue_alloc_rxskbs(rt2x00dev->rx);
  994. if (status)
  995. goto exit;
  996. return 0;
  997. exit:
  998. rt2x00_err(rt2x00dev, "Queue entries allocation failed\n");
  999. rt2x00queue_uninitialize(rt2x00dev);
  1000. return status;
  1001. }
  1002. void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
  1003. {
  1004. struct data_queue *queue;
  1005. rt2x00queue_free_skbs(rt2x00dev->rx);
  1006. queue_for_each(rt2x00dev, queue) {
  1007. kfree(queue->entries);
  1008. queue->entries = NULL;
  1009. }
  1010. }
  1011. static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
  1012. struct data_queue *queue, enum data_queue_qid qid)
  1013. {
  1014. mutex_init(&queue->status_lock);
  1015. spin_lock_init(&queue->tx_lock);
  1016. spin_lock_init(&queue->index_lock);
  1017. queue->rt2x00dev = rt2x00dev;
  1018. queue->qid = qid;
  1019. queue->txop = 0;
  1020. queue->aifs = 2;
  1021. queue->cw_min = 5;
  1022. queue->cw_max = 10;
  1023. rt2x00dev->ops->queue_init(queue);
  1024. queue->threshold = DIV_ROUND_UP(queue->limit, 10);
  1025. }
  1026. int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
  1027. {
  1028. struct data_queue *queue;
  1029. enum data_queue_qid qid;
  1030. unsigned int req_atim =
  1031. rt2x00_has_cap_flag(rt2x00dev, REQUIRE_ATIM_QUEUE);
  1032. /*
  1033. * We need the following queues:
  1034. * RX: 1
  1035. * TX: ops->tx_queues
  1036. * Beacon: 1
  1037. * Atim: 1 (if required)
  1038. */
  1039. rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
  1040. queue = kcalloc(rt2x00dev->data_queues, sizeof(*queue), GFP_KERNEL);
  1041. if (!queue)
  1042. return -ENOMEM;
  1043. /*
  1044. * Initialize pointers
  1045. */
  1046. rt2x00dev->rx = queue;
  1047. rt2x00dev->tx = &queue[1];
  1048. rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
  1049. rt2x00dev->atim = req_atim ? &queue[2 + rt2x00dev->ops->tx_queues] : NULL;
  1050. /*
  1051. * Initialize queue parameters.
  1052. * RX: qid = QID_RX
  1053. * TX: qid = QID_AC_VO + index
  1054. * TX: cw_min: 2^5 = 32.
  1055. * TX: cw_max: 2^10 = 1024.
  1056. * BCN: qid = QID_BEACON
  1057. * ATIM: qid = QID_ATIM
  1058. */
  1059. rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
  1060. qid = QID_AC_VO;
  1061. tx_queue_for_each(rt2x00dev, queue)
  1062. rt2x00queue_init(rt2x00dev, queue, qid++);
  1063. rt2x00queue_init(rt2x00dev, rt2x00dev->bcn, QID_BEACON);
  1064. if (req_atim)
  1065. rt2x00queue_init(rt2x00dev, rt2x00dev->atim, QID_ATIM);
  1066. return 0;
  1067. }
  1068. void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
  1069. {
  1070. kfree(rt2x00dev->rx);
  1071. rt2x00dev->rx = NULL;
  1072. rt2x00dev->tx = NULL;
  1073. rt2x00dev->bcn = NULL;
  1074. }