sdio.c 81 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * NXP Wireless LAN device driver: SDIO specific handling
  4. *
  5. * Copyright 2011-2020 NXP
  6. */
  7. #include <linux/firmware.h>
  8. #include "decl.h"
  9. #include "ioctl.h"
  10. #include "util.h"
  11. #include "fw.h"
  12. #include "main.h"
  13. #include "wmm.h"
  14. #include "11n.h"
  15. #include "sdio.h"
  16. #define SDIO_VERSION "1.0"
  17. static void mwifiex_sdio_work(struct work_struct *work);
  18. static struct mwifiex_if_ops sdio_ops;
  19. static const struct mwifiex_sdio_card_reg mwifiex_reg_sd87xx = {
  20. .start_rd_port = 1,
  21. .start_wr_port = 1,
  22. .base_0_reg = 0x0040,
  23. .base_1_reg = 0x0041,
  24. .poll_reg = 0x30,
  25. .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK,
  26. .host_int_rsr_reg = 0x1,
  27. .host_int_mask_reg = 0x02,
  28. .host_int_status_reg = 0x03,
  29. .status_reg_0 = 0x60,
  30. .status_reg_1 = 0x61,
  31. .sdio_int_mask = 0x3f,
  32. .data_port_mask = 0x0000fffe,
  33. .io_port_0_reg = 0x78,
  34. .io_port_1_reg = 0x79,
  35. .io_port_2_reg = 0x7A,
  36. .max_mp_regs = 64,
  37. .rd_bitmap_l = 0x04,
  38. .rd_bitmap_u = 0x05,
  39. .wr_bitmap_l = 0x06,
  40. .wr_bitmap_u = 0x07,
  41. .rd_len_p0_l = 0x08,
  42. .rd_len_p0_u = 0x09,
  43. .card_misc_cfg_reg = 0x6c,
  44. .func1_dump_reg_start = 0x0,
  45. .func1_dump_reg_end = 0x9,
  46. .func1_scratch_reg = 0x60,
  47. .func1_spec_reg_num = 5,
  48. .func1_spec_reg_table = {0x28, 0x30, 0x34, 0x38, 0x3c},
  49. };
  50. static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8897 = {
  51. .start_rd_port = 0,
  52. .start_wr_port = 0,
  53. .base_0_reg = 0x60,
  54. .base_1_reg = 0x61,
  55. .poll_reg = 0x50,
  56. .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK |
  57. CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK,
  58. .host_int_rsr_reg = 0x1,
  59. .host_int_status_reg = 0x03,
  60. .host_int_mask_reg = 0x02,
  61. .status_reg_0 = 0xc0,
  62. .status_reg_1 = 0xc1,
  63. .sdio_int_mask = 0xff,
  64. .data_port_mask = 0xffffffff,
  65. .io_port_0_reg = 0xD8,
  66. .io_port_1_reg = 0xD9,
  67. .io_port_2_reg = 0xDA,
  68. .max_mp_regs = 184,
  69. .rd_bitmap_l = 0x04,
  70. .rd_bitmap_u = 0x05,
  71. .rd_bitmap_1l = 0x06,
  72. .rd_bitmap_1u = 0x07,
  73. .wr_bitmap_l = 0x08,
  74. .wr_bitmap_u = 0x09,
  75. .wr_bitmap_1l = 0x0a,
  76. .wr_bitmap_1u = 0x0b,
  77. .rd_len_p0_l = 0x0c,
  78. .rd_len_p0_u = 0x0d,
  79. .card_misc_cfg_reg = 0xcc,
  80. .card_cfg_2_1_reg = 0xcd,
  81. .cmd_rd_len_0 = 0xb4,
  82. .cmd_rd_len_1 = 0xb5,
  83. .cmd_rd_len_2 = 0xb6,
  84. .cmd_rd_len_3 = 0xb7,
  85. .cmd_cfg_0 = 0xb8,
  86. .cmd_cfg_1 = 0xb9,
  87. .cmd_cfg_2 = 0xba,
  88. .cmd_cfg_3 = 0xbb,
  89. .fw_dump_host_ready = 0xee,
  90. .fw_dump_ctrl = 0xe2,
  91. .fw_dump_start = 0xe3,
  92. .fw_dump_end = 0xea,
  93. .func1_dump_reg_start = 0x0,
  94. .func1_dump_reg_end = 0xb,
  95. .func1_scratch_reg = 0xc0,
  96. .func1_spec_reg_num = 8,
  97. .func1_spec_reg_table = {0x4C, 0x50, 0x54, 0x55, 0x58,
  98. 0x59, 0x5c, 0x5d},
  99. };
  100. static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8977 = {
  101. .start_rd_port = 0,
  102. .start_wr_port = 0,
  103. .base_0_reg = 0xF8,
  104. .base_1_reg = 0xF9,
  105. .poll_reg = 0x5C,
  106. .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK |
  107. CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK,
  108. .host_int_rsr_reg = 0x4,
  109. .host_int_status_reg = 0x0C,
  110. .host_int_mask_reg = 0x08,
  111. .status_reg_0 = 0xE8,
  112. .status_reg_1 = 0xE9,
  113. .sdio_int_mask = 0xff,
  114. .data_port_mask = 0xffffffff,
  115. .io_port_0_reg = 0xE4,
  116. .io_port_1_reg = 0xE5,
  117. .io_port_2_reg = 0xE6,
  118. .max_mp_regs = 196,
  119. .rd_bitmap_l = 0x10,
  120. .rd_bitmap_u = 0x11,
  121. .rd_bitmap_1l = 0x12,
  122. .rd_bitmap_1u = 0x13,
  123. .wr_bitmap_l = 0x14,
  124. .wr_bitmap_u = 0x15,
  125. .wr_bitmap_1l = 0x16,
  126. .wr_bitmap_1u = 0x17,
  127. .rd_len_p0_l = 0x18,
  128. .rd_len_p0_u = 0x19,
  129. .card_misc_cfg_reg = 0xd8,
  130. .card_cfg_2_1_reg = 0xd9,
  131. .cmd_rd_len_0 = 0xc0,
  132. .cmd_rd_len_1 = 0xc1,
  133. .cmd_rd_len_2 = 0xc2,
  134. .cmd_rd_len_3 = 0xc3,
  135. .cmd_cfg_0 = 0xc4,
  136. .cmd_cfg_1 = 0xc5,
  137. .cmd_cfg_2 = 0xc6,
  138. .cmd_cfg_3 = 0xc7,
  139. .fw_dump_host_ready = 0xcc,
  140. .fw_dump_ctrl = 0xf0,
  141. .fw_dump_start = 0xf1,
  142. .fw_dump_end = 0xf8,
  143. .func1_dump_reg_start = 0x10,
  144. .func1_dump_reg_end = 0x17,
  145. .func1_scratch_reg = 0xe8,
  146. .func1_spec_reg_num = 13,
  147. .func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D,
  148. 0x60, 0x61, 0x62, 0x64,
  149. 0x65, 0x66, 0x68, 0x69,
  150. 0x6a},
  151. };
  152. static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8997 = {
  153. .start_rd_port = 0,
  154. .start_wr_port = 0,
  155. .base_0_reg = 0xF8,
  156. .base_1_reg = 0xF9,
  157. .poll_reg = 0x5C,
  158. .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK |
  159. CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK,
  160. .host_int_rsr_reg = 0x4,
  161. .host_int_status_reg = 0x0C,
  162. .host_int_mask_reg = 0x08,
  163. .host_strap_reg = 0xF4,
  164. .host_strap_mask = 0x01,
  165. .host_strap_value = 0x00,
  166. .status_reg_0 = 0xE8,
  167. .status_reg_1 = 0xE9,
  168. .sdio_int_mask = 0xff,
  169. .data_port_mask = 0xffffffff,
  170. .io_port_0_reg = 0xE4,
  171. .io_port_1_reg = 0xE5,
  172. .io_port_2_reg = 0xE6,
  173. .max_mp_regs = 196,
  174. .rd_bitmap_l = 0x10,
  175. .rd_bitmap_u = 0x11,
  176. .rd_bitmap_1l = 0x12,
  177. .rd_bitmap_1u = 0x13,
  178. .wr_bitmap_l = 0x14,
  179. .wr_bitmap_u = 0x15,
  180. .wr_bitmap_1l = 0x16,
  181. .wr_bitmap_1u = 0x17,
  182. .rd_len_p0_l = 0x18,
  183. .rd_len_p0_u = 0x19,
  184. .card_misc_cfg_reg = 0xd8,
  185. .card_cfg_2_1_reg = 0xd9,
  186. .cmd_rd_len_0 = 0xc0,
  187. .cmd_rd_len_1 = 0xc1,
  188. .cmd_rd_len_2 = 0xc2,
  189. .cmd_rd_len_3 = 0xc3,
  190. .cmd_cfg_0 = 0xc4,
  191. .cmd_cfg_1 = 0xc5,
  192. .cmd_cfg_2 = 0xc6,
  193. .cmd_cfg_3 = 0xc7,
  194. .fw_dump_host_ready = 0xcc,
  195. .fw_dump_ctrl = 0xf0,
  196. .fw_dump_start = 0xf1,
  197. .fw_dump_end = 0xf8,
  198. .func1_dump_reg_start = 0x10,
  199. .func1_dump_reg_end = 0x17,
  200. .func1_scratch_reg = 0xe8,
  201. .func1_spec_reg_num = 13,
  202. .func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D,
  203. 0x60, 0x61, 0x62, 0x64,
  204. 0x65, 0x66, 0x68, 0x69,
  205. 0x6a},
  206. };
  207. static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8887 = {
  208. .start_rd_port = 0,
  209. .start_wr_port = 0,
  210. .base_0_reg = 0x6C,
  211. .base_1_reg = 0x6D,
  212. .poll_reg = 0x5C,
  213. .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK |
  214. CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK,
  215. .host_int_rsr_reg = 0x4,
  216. .host_int_status_reg = 0x0C,
  217. .host_int_mask_reg = 0x08,
  218. .status_reg_0 = 0x90,
  219. .status_reg_1 = 0x91,
  220. .sdio_int_mask = 0xff,
  221. .data_port_mask = 0xffffffff,
  222. .io_port_0_reg = 0xE4,
  223. .io_port_1_reg = 0xE5,
  224. .io_port_2_reg = 0xE6,
  225. .max_mp_regs = 196,
  226. .rd_bitmap_l = 0x10,
  227. .rd_bitmap_u = 0x11,
  228. .rd_bitmap_1l = 0x12,
  229. .rd_bitmap_1u = 0x13,
  230. .wr_bitmap_l = 0x14,
  231. .wr_bitmap_u = 0x15,
  232. .wr_bitmap_1l = 0x16,
  233. .wr_bitmap_1u = 0x17,
  234. .rd_len_p0_l = 0x18,
  235. .rd_len_p0_u = 0x19,
  236. .card_misc_cfg_reg = 0xd8,
  237. .card_cfg_2_1_reg = 0xd9,
  238. .cmd_rd_len_0 = 0xc0,
  239. .cmd_rd_len_1 = 0xc1,
  240. .cmd_rd_len_2 = 0xc2,
  241. .cmd_rd_len_3 = 0xc3,
  242. .cmd_cfg_0 = 0xc4,
  243. .cmd_cfg_1 = 0xc5,
  244. .cmd_cfg_2 = 0xc6,
  245. .cmd_cfg_3 = 0xc7,
  246. .func1_dump_reg_start = 0x10,
  247. .func1_dump_reg_end = 0x17,
  248. .func1_scratch_reg = 0x90,
  249. .func1_spec_reg_num = 13,
  250. .func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D, 0x60,
  251. 0x61, 0x62, 0x64, 0x65, 0x66,
  252. 0x68, 0x69, 0x6a},
  253. };
  254. static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8987 = {
  255. .start_rd_port = 0,
  256. .start_wr_port = 0,
  257. .base_0_reg = 0xF8,
  258. .base_1_reg = 0xF9,
  259. .poll_reg = 0x5C,
  260. .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK |
  261. CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK,
  262. .host_int_rsr_reg = 0x4,
  263. .host_int_status_reg = 0x0C,
  264. .host_int_mask_reg = 0x08,
  265. .host_strap_reg = 0xF4,
  266. .host_strap_mask = 0x01,
  267. .host_strap_value = 0x00,
  268. .status_reg_0 = 0xE8,
  269. .status_reg_1 = 0xE9,
  270. .sdio_int_mask = 0xff,
  271. .data_port_mask = 0xffffffff,
  272. .io_port_0_reg = 0xE4,
  273. .io_port_1_reg = 0xE5,
  274. .io_port_2_reg = 0xE6,
  275. .max_mp_regs = 196,
  276. .rd_bitmap_l = 0x10,
  277. .rd_bitmap_u = 0x11,
  278. .rd_bitmap_1l = 0x12,
  279. .rd_bitmap_1u = 0x13,
  280. .wr_bitmap_l = 0x14,
  281. .wr_bitmap_u = 0x15,
  282. .wr_bitmap_1l = 0x16,
  283. .wr_bitmap_1u = 0x17,
  284. .rd_len_p0_l = 0x18,
  285. .rd_len_p0_u = 0x19,
  286. .card_misc_cfg_reg = 0xd8,
  287. .card_cfg_2_1_reg = 0xd9,
  288. .cmd_rd_len_0 = 0xc0,
  289. .cmd_rd_len_1 = 0xc1,
  290. .cmd_rd_len_2 = 0xc2,
  291. .cmd_rd_len_3 = 0xc3,
  292. .cmd_cfg_0 = 0xc4,
  293. .cmd_cfg_1 = 0xc5,
  294. .cmd_cfg_2 = 0xc6,
  295. .cmd_cfg_3 = 0xc7,
  296. .fw_dump_host_ready = 0xcc,
  297. .fw_dump_ctrl = 0xf9,
  298. .fw_dump_start = 0xf1,
  299. .fw_dump_end = 0xf8,
  300. .func1_dump_reg_start = 0x10,
  301. .func1_dump_reg_end = 0x17,
  302. .func1_scratch_reg = 0xE8,
  303. .func1_spec_reg_num = 13,
  304. .func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D, 0x60,
  305. 0x61, 0x62, 0x64, 0x65, 0x66,
  306. 0x68, 0x69, 0x6a},
  307. };
  308. static const struct mwifiex_sdio_device mwifiex_sdio_sd8786 = {
  309. .firmware = SD8786_DEFAULT_FW_NAME,
  310. .reg = &mwifiex_reg_sd87xx,
  311. .max_ports = 16,
  312. .mp_agg_pkt_limit = 8,
  313. .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
  314. .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
  315. .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
  316. .supports_sdio_new_mode = false,
  317. .has_control_mask = true,
  318. .can_dump_fw = false,
  319. .can_auto_tdls = false,
  320. .can_ext_scan = false,
  321. };
  322. static const struct mwifiex_sdio_device mwifiex_sdio_sd8787 = {
  323. .firmware = SD8787_DEFAULT_FW_NAME,
  324. .reg = &mwifiex_reg_sd87xx,
  325. .max_ports = 16,
  326. .mp_agg_pkt_limit = 8,
  327. .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
  328. .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
  329. .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
  330. .supports_sdio_new_mode = false,
  331. .has_control_mask = true,
  332. .can_dump_fw = false,
  333. .can_auto_tdls = false,
  334. .can_ext_scan = true,
  335. };
  336. static const struct mwifiex_sdio_device mwifiex_sdio_sd8797 = {
  337. .firmware = SD8797_DEFAULT_FW_NAME,
  338. .reg = &mwifiex_reg_sd87xx,
  339. .max_ports = 16,
  340. .mp_agg_pkt_limit = 8,
  341. .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
  342. .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
  343. .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
  344. .supports_sdio_new_mode = false,
  345. .has_control_mask = true,
  346. .can_dump_fw = false,
  347. .can_auto_tdls = false,
  348. .can_ext_scan = true,
  349. };
  350. static const struct mwifiex_sdio_device mwifiex_sdio_sd8897 = {
  351. .firmware = SD8897_DEFAULT_FW_NAME,
  352. .reg = &mwifiex_reg_sd8897,
  353. .max_ports = 32,
  354. .mp_agg_pkt_limit = 16,
  355. .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K,
  356. .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
  357. .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
  358. .supports_sdio_new_mode = true,
  359. .has_control_mask = false,
  360. .can_dump_fw = true,
  361. .can_auto_tdls = false,
  362. .can_ext_scan = true,
  363. };
  364. static const struct mwifiex_sdio_device mwifiex_sdio_sd8977 = {
  365. .firmware = SD8977_DEFAULT_FW_NAME,
  366. .reg = &mwifiex_reg_sd8977,
  367. .max_ports = 32,
  368. .mp_agg_pkt_limit = 16,
  369. .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K,
  370. .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
  371. .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
  372. .supports_sdio_new_mode = true,
  373. .has_control_mask = false,
  374. .can_dump_fw = true,
  375. .fw_dump_enh = true,
  376. .can_auto_tdls = false,
  377. .can_ext_scan = true,
  378. };
  379. static const struct mwifiex_sdio_device mwifiex_sdio_sd8997 = {
  380. .firmware = SD8997_DEFAULT_FW_NAME,
  381. .firmware_sdiouart = SD8997_SDIOUART_FW_NAME,
  382. .reg = &mwifiex_reg_sd8997,
  383. .max_ports = 32,
  384. .mp_agg_pkt_limit = 16,
  385. .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K,
  386. .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
  387. .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
  388. .supports_sdio_new_mode = true,
  389. .has_control_mask = false,
  390. .can_dump_fw = true,
  391. .fw_dump_enh = true,
  392. .can_auto_tdls = false,
  393. .can_ext_scan = true,
  394. };
  395. static const struct mwifiex_sdio_device mwifiex_sdio_sd8887 = {
  396. .firmware = SD8887_DEFAULT_FW_NAME,
  397. .reg = &mwifiex_reg_sd8887,
  398. .max_ports = 32,
  399. .mp_agg_pkt_limit = 16,
  400. .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
  401. .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_32K,
  402. .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_32K,
  403. .supports_sdio_new_mode = true,
  404. .has_control_mask = false,
  405. .can_dump_fw = false,
  406. .can_auto_tdls = true,
  407. .can_ext_scan = true,
  408. };
  409. static const struct mwifiex_sdio_device mwifiex_sdio_sd8987 = {
  410. .firmware = SD8987_DEFAULT_FW_NAME,
  411. .reg = &mwifiex_reg_sd8987,
  412. .max_ports = 32,
  413. .mp_agg_pkt_limit = 16,
  414. .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
  415. .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
  416. .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
  417. .supports_sdio_new_mode = true,
  418. .has_control_mask = false,
  419. .can_dump_fw = true,
  420. .fw_dump_enh = true,
  421. .can_auto_tdls = true,
  422. .can_ext_scan = true,
  423. };
  424. static const struct mwifiex_sdio_device mwifiex_sdio_sd8801 = {
  425. .firmware = SD8801_DEFAULT_FW_NAME,
  426. .reg = &mwifiex_reg_sd87xx,
  427. .max_ports = 16,
  428. .mp_agg_pkt_limit = 8,
  429. .supports_sdio_new_mode = false,
  430. .has_control_mask = true,
  431. .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
  432. .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
  433. .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
  434. .can_dump_fw = false,
  435. .can_auto_tdls = false,
  436. .can_ext_scan = true,
  437. };
  438. static struct memory_type_mapping generic_mem_type_map[] = {
  439. {"DUMP", NULL, 0, 0xDD},
  440. };
  441. static struct memory_type_mapping mem_type_mapping_tbl[] = {
  442. {"ITCM", NULL, 0, 0xF0},
  443. {"DTCM", NULL, 0, 0xF1},
  444. {"SQRAM", NULL, 0, 0xF2},
  445. {"APU", NULL, 0, 0xF3},
  446. {"CIU", NULL, 0, 0xF4},
  447. {"ICU", NULL, 0, 0xF5},
  448. {"MAC", NULL, 0, 0xF6},
  449. {"EXT7", NULL, 0, 0xF7},
  450. {"EXT8", NULL, 0, 0xF8},
  451. {"EXT9", NULL, 0, 0xF9},
  452. {"EXT10", NULL, 0, 0xFA},
  453. {"EXT11", NULL, 0, 0xFB},
  454. {"EXT12", NULL, 0, 0xFC},
  455. {"EXT13", NULL, 0, 0xFD},
  456. {"EXTLAST", NULL, 0, 0xFE},
  457. };
  458. static const struct of_device_id mwifiex_sdio_of_match_table[] __maybe_unused = {
  459. { .compatible = "marvell,sd8787" },
  460. { .compatible = "marvell,sd8897" },
  461. { .compatible = "marvell,sd8997" },
  462. { }
  463. };
  464. /* This function parse device tree node using mmc subnode devicetree API.
  465. * The device node is saved in card->plt_of_node.
  466. * if the device tree node exist and include interrupts attributes, this
  467. * function will also request platform specific wakeup interrupt.
  468. */
  469. static int mwifiex_sdio_probe_of(struct device *dev)
  470. {
  471. if (!of_match_node(mwifiex_sdio_of_match_table, dev->of_node)) {
  472. dev_err(dev, "required compatible string missing\n");
  473. return -EINVAL;
  474. }
  475. return 0;
  476. }
  477. /*
  478. * SDIO probe.
  479. *
  480. * This function probes an mwifiex device and registers it. It allocates
  481. * the card structure, enables SDIO function number and initiates the
  482. * device registration and initialization procedure by adding a logical
  483. * interface.
  484. */
  485. static int
  486. mwifiex_sdio_probe(struct sdio_func *func, const struct sdio_device_id *id)
  487. {
  488. int ret;
  489. struct sdio_mmc_card *card = NULL;
  490. pr_debug("info: vendor=0x%4.04X device=0x%4.04X class=%d function=%d\n",
  491. func->vendor, func->device, func->class, func->num);
  492. card = devm_kzalloc(&func->dev, sizeof(*card), GFP_KERNEL);
  493. if (!card)
  494. return -ENOMEM;
  495. init_completion(&card->fw_done);
  496. card->func = func;
  497. func->card->quirks |= MMC_QUIRK_BLKSZ_FOR_BYTE_MODE;
  498. if (id->driver_data) {
  499. struct mwifiex_sdio_device *data = (void *)id->driver_data;
  500. card->firmware = data->firmware;
  501. card->firmware_sdiouart = data->firmware_sdiouart;
  502. card->reg = data->reg;
  503. card->max_ports = data->max_ports;
  504. card->mp_agg_pkt_limit = data->mp_agg_pkt_limit;
  505. card->supports_sdio_new_mode = data->supports_sdio_new_mode;
  506. card->has_control_mask = data->has_control_mask;
  507. card->tx_buf_size = data->tx_buf_size;
  508. card->mp_tx_agg_buf_size = data->mp_tx_agg_buf_size;
  509. card->mp_rx_agg_buf_size = data->mp_rx_agg_buf_size;
  510. card->can_dump_fw = data->can_dump_fw;
  511. card->fw_dump_enh = data->fw_dump_enh;
  512. card->can_auto_tdls = data->can_auto_tdls;
  513. card->can_ext_scan = data->can_ext_scan;
  514. INIT_WORK(&card->work, mwifiex_sdio_work);
  515. }
  516. sdio_claim_host(func);
  517. ret = sdio_enable_func(func);
  518. sdio_release_host(func);
  519. if (ret) {
  520. dev_err(&func->dev, "failed to enable function\n");
  521. return ret;
  522. }
  523. /* device tree node parsing and platform specific configuration*/
  524. if (func->dev.of_node) {
  525. ret = mwifiex_sdio_probe_of(&func->dev);
  526. if (ret)
  527. goto err_disable;
  528. }
  529. ret = mwifiex_add_card(card, &card->fw_done, &sdio_ops,
  530. MWIFIEX_SDIO, &func->dev);
  531. if (ret) {
  532. dev_err(&func->dev, "add card failed\n");
  533. goto err_disable;
  534. }
  535. return 0;
  536. err_disable:
  537. sdio_claim_host(func);
  538. sdio_disable_func(func);
  539. sdio_release_host(func);
  540. return ret;
  541. }
  542. /*
  543. * SDIO resume.
  544. *
  545. * Kernel needs to suspend all functions separately. Therefore all
  546. * registered functions must have drivers with suspend and resume
  547. * methods. Failing that the kernel simply removes the whole card.
  548. *
  549. * If already not resumed, this function turns on the traffic and
  550. * sends a host sleep cancel request to the firmware.
  551. */
  552. static int mwifiex_sdio_resume(struct device *dev)
  553. {
  554. struct sdio_func *func = dev_to_sdio_func(dev);
  555. struct sdio_mmc_card *card;
  556. struct mwifiex_adapter *adapter;
  557. card = sdio_get_drvdata(func);
  558. if (!card || !card->adapter) {
  559. dev_err(dev, "resume: invalid card or adapter\n");
  560. return 0;
  561. }
  562. adapter = card->adapter;
  563. if (!test_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags)) {
  564. mwifiex_dbg(adapter, WARN,
  565. "device already resumed\n");
  566. return 0;
  567. }
  568. clear_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags);
  569. /* Disable Host Sleep */
  570. mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA),
  571. MWIFIEX_SYNC_CMD);
  572. mwifiex_disable_wake(adapter);
  573. return 0;
  574. }
  575. /* Write data into SDIO card register. Caller claims SDIO device. */
  576. static int
  577. mwifiex_write_reg_locked(struct sdio_func *func, u32 reg, u8 data)
  578. {
  579. int ret = -1;
  580. sdio_writeb(func, data, reg, &ret);
  581. return ret;
  582. }
  583. /* This function writes data into SDIO card register.
  584. */
  585. static int
  586. mwifiex_write_reg(struct mwifiex_adapter *adapter, u32 reg, u8 data)
  587. {
  588. struct sdio_mmc_card *card = adapter->card;
  589. int ret;
  590. sdio_claim_host(card->func);
  591. ret = mwifiex_write_reg_locked(card->func, reg, data);
  592. sdio_release_host(card->func);
  593. return ret;
  594. }
  595. /* This function reads data from SDIO card register.
  596. */
  597. static int
  598. mwifiex_read_reg(struct mwifiex_adapter *adapter, u32 reg, u8 *data)
  599. {
  600. struct sdio_mmc_card *card = adapter->card;
  601. int ret = -1;
  602. u8 val;
  603. sdio_claim_host(card->func);
  604. val = sdio_readb(card->func, reg, &ret);
  605. sdio_release_host(card->func);
  606. *data = val;
  607. return ret;
  608. }
  609. /* This function writes multiple data into SDIO card memory.
  610. *
  611. * This does not work in suspended mode.
  612. */
  613. static int
  614. mwifiex_write_data_sync(struct mwifiex_adapter *adapter,
  615. u8 *buffer, u32 pkt_len, u32 port)
  616. {
  617. struct sdio_mmc_card *card = adapter->card;
  618. int ret;
  619. u8 blk_mode =
  620. (port & MWIFIEX_SDIO_BYTE_MODE_MASK) ? BYTE_MODE : BLOCK_MODE;
  621. u32 blk_size = (blk_mode == BLOCK_MODE) ? MWIFIEX_SDIO_BLOCK_SIZE : 1;
  622. u32 blk_cnt =
  623. (blk_mode ==
  624. BLOCK_MODE) ? (pkt_len /
  625. MWIFIEX_SDIO_BLOCK_SIZE) : pkt_len;
  626. u32 ioport = (port & MWIFIEX_SDIO_IO_PORT_MASK);
  627. if (test_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags)) {
  628. mwifiex_dbg(adapter, ERROR,
  629. "%s: not allowed while suspended\n", __func__);
  630. return -1;
  631. }
  632. sdio_claim_host(card->func);
  633. ret = sdio_writesb(card->func, ioport, buffer, blk_cnt * blk_size);
  634. sdio_release_host(card->func);
  635. return ret;
  636. }
  637. /* This function reads multiple data from SDIO card memory.
  638. */
  639. static int mwifiex_read_data_sync(struct mwifiex_adapter *adapter, u8 *buffer,
  640. u32 len, u32 port, u8 claim)
  641. {
  642. struct sdio_mmc_card *card = adapter->card;
  643. int ret;
  644. u8 blk_mode = (port & MWIFIEX_SDIO_BYTE_MODE_MASK) ? BYTE_MODE
  645. : BLOCK_MODE;
  646. u32 blk_size = (blk_mode == BLOCK_MODE) ? MWIFIEX_SDIO_BLOCK_SIZE : 1;
  647. u32 blk_cnt = (blk_mode == BLOCK_MODE) ? (len / MWIFIEX_SDIO_BLOCK_SIZE)
  648. : len;
  649. u32 ioport = (port & MWIFIEX_SDIO_IO_PORT_MASK);
  650. if (claim)
  651. sdio_claim_host(card->func);
  652. ret = sdio_readsb(card->func, buffer, ioport, blk_cnt * blk_size);
  653. if (claim)
  654. sdio_release_host(card->func);
  655. return ret;
  656. }
  657. /* This function reads the firmware status.
  658. */
  659. static int
  660. mwifiex_sdio_read_fw_status(struct mwifiex_adapter *adapter, u16 *dat)
  661. {
  662. struct sdio_mmc_card *card = adapter->card;
  663. const struct mwifiex_sdio_card_reg *reg = card->reg;
  664. u8 fws0, fws1;
  665. if (mwifiex_read_reg(adapter, reg->status_reg_0, &fws0))
  666. return -1;
  667. if (mwifiex_read_reg(adapter, reg->status_reg_1, &fws1))
  668. return -1;
  669. *dat = (u16)((fws1 << 8) | fws0);
  670. return 0;
  671. }
  672. /* This function checks the firmware status in card.
  673. */
  674. static int mwifiex_check_fw_status(struct mwifiex_adapter *adapter,
  675. u32 poll_num)
  676. {
  677. int ret = 0;
  678. u16 firmware_stat;
  679. u32 tries;
  680. for (tries = 0; tries < poll_num; tries++) {
  681. ret = mwifiex_sdio_read_fw_status(adapter, &firmware_stat);
  682. if (ret)
  683. continue;
  684. if (firmware_stat == FIRMWARE_READY_SDIO) {
  685. ret = 0;
  686. break;
  687. }
  688. msleep(100);
  689. ret = -1;
  690. }
  691. return ret;
  692. }
  693. /* This function checks if WLAN is the winner.
  694. */
  695. static int mwifiex_check_winner_status(struct mwifiex_adapter *adapter)
  696. {
  697. int ret = 0;
  698. u8 winner = 0;
  699. struct sdio_mmc_card *card = adapter->card;
  700. if (mwifiex_read_reg(adapter, card->reg->status_reg_0, &winner))
  701. return -1;
  702. if (winner)
  703. adapter->winner = 0;
  704. else
  705. adapter->winner = 1;
  706. return ret;
  707. }
  708. /*
  709. * SDIO remove.
  710. *
  711. * This function removes the interface and frees up the card structure.
  712. */
  713. static void
  714. mwifiex_sdio_remove(struct sdio_func *func)
  715. {
  716. struct sdio_mmc_card *card;
  717. struct mwifiex_adapter *adapter;
  718. struct mwifiex_private *priv;
  719. int ret = 0;
  720. u16 firmware_stat;
  721. card = sdio_get_drvdata(func);
  722. if (!card)
  723. return;
  724. wait_for_completion(&card->fw_done);
  725. adapter = card->adapter;
  726. if (!adapter || !adapter->priv_num)
  727. return;
  728. mwifiex_dbg(adapter, INFO, "info: SDIO func num=%d\n", func->num);
  729. ret = mwifiex_sdio_read_fw_status(adapter, &firmware_stat);
  730. if (!ret && firmware_stat == FIRMWARE_READY_SDIO &&
  731. !adapter->mfg_mode) {
  732. mwifiex_deauthenticate_all(adapter);
  733. priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY);
  734. mwifiex_disable_auto_ds(priv);
  735. mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN);
  736. }
  737. mwifiex_remove_card(adapter);
  738. }
  739. /*
  740. * SDIO suspend.
  741. *
  742. * Kernel needs to suspend all functions separately. Therefore all
  743. * registered functions must have drivers with suspend and resume
  744. * methods. Failing that the kernel simply removes the whole card.
  745. *
  746. * If already not suspended, this function allocates and sends a host
  747. * sleep activate request to the firmware and turns off the traffic.
  748. */
  749. static int mwifiex_sdio_suspend(struct device *dev)
  750. {
  751. struct sdio_func *func = dev_to_sdio_func(dev);
  752. struct sdio_mmc_card *card;
  753. struct mwifiex_adapter *adapter;
  754. mmc_pm_flag_t pm_flag = 0;
  755. int ret = 0;
  756. pm_flag = sdio_get_host_pm_caps(func);
  757. pr_debug("cmd: %s: suspend: PM flag = 0x%x\n",
  758. sdio_func_id(func), pm_flag);
  759. if (!(pm_flag & MMC_PM_KEEP_POWER)) {
  760. dev_err(dev, "%s: cannot remain alive while host is"
  761. " suspended\n", sdio_func_id(func));
  762. return -ENOSYS;
  763. }
  764. card = sdio_get_drvdata(func);
  765. if (!card) {
  766. dev_err(dev, "suspend: invalid card\n");
  767. return 0;
  768. }
  769. /* Might still be loading firmware */
  770. wait_for_completion(&card->fw_done);
  771. adapter = card->adapter;
  772. if (!adapter) {
  773. dev_err(dev, "adapter is not valid\n");
  774. return 0;
  775. }
  776. if (!adapter->is_up)
  777. return -EBUSY;
  778. mwifiex_enable_wake(adapter);
  779. /* Enable the Host Sleep */
  780. if (!mwifiex_enable_hs(adapter)) {
  781. mwifiex_dbg(adapter, ERROR,
  782. "cmd: failed to suspend\n");
  783. clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags);
  784. mwifiex_disable_wake(adapter);
  785. return -EFAULT;
  786. }
  787. mwifiex_dbg(adapter, INFO,
  788. "cmd: suspend with MMC_PM_KEEP_POWER\n");
  789. ret = sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER);
  790. /* Indicate device suspended */
  791. set_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags);
  792. clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags);
  793. return ret;
  794. }
  795. static void mwifiex_sdio_coredump(struct device *dev)
  796. {
  797. struct sdio_func *func = dev_to_sdio_func(dev);
  798. struct sdio_mmc_card *card;
  799. card = sdio_get_drvdata(func);
  800. if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
  801. &card->work_flags))
  802. schedule_work(&card->work);
  803. }
  804. /* WLAN IDs */
  805. static const struct sdio_device_id mwifiex_ids[] = {
  806. {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8786_WLAN),
  807. .driver_data = (unsigned long) &mwifiex_sdio_sd8786},
  808. {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8787_WLAN),
  809. .driver_data = (unsigned long) &mwifiex_sdio_sd8787},
  810. {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8797_WLAN),
  811. .driver_data = (unsigned long) &mwifiex_sdio_sd8797},
  812. {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8897_WLAN),
  813. .driver_data = (unsigned long) &mwifiex_sdio_sd8897},
  814. {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8887_WLAN),
  815. .driver_data = (unsigned long)&mwifiex_sdio_sd8887},
  816. {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8801_WLAN),
  817. .driver_data = (unsigned long)&mwifiex_sdio_sd8801},
  818. {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8977_WLAN),
  819. .driver_data = (unsigned long)&mwifiex_sdio_sd8977},
  820. {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8987_WLAN),
  821. .driver_data = (unsigned long)&mwifiex_sdio_sd8987},
  822. {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8997_WLAN),
  823. .driver_data = (unsigned long)&mwifiex_sdio_sd8997},
  824. {},
  825. };
  826. MODULE_DEVICE_TABLE(sdio, mwifiex_ids);
  827. static const struct dev_pm_ops mwifiex_sdio_pm_ops = {
  828. .suspend = mwifiex_sdio_suspend,
  829. .resume = mwifiex_sdio_resume,
  830. };
  831. static struct sdio_driver mwifiex_sdio = {
  832. .name = "mwifiex_sdio",
  833. .id_table = mwifiex_ids,
  834. .probe = mwifiex_sdio_probe,
  835. .remove = mwifiex_sdio_remove,
  836. .drv = {
  837. .owner = THIS_MODULE,
  838. .coredump = mwifiex_sdio_coredump,
  839. .pm = &mwifiex_sdio_pm_ops,
  840. }
  841. };
  842. /*
  843. * This function wakes up the card.
  844. *
  845. * A host power up command is written to the card configuration
  846. * register to wake up the card.
  847. */
  848. static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter)
  849. {
  850. mwifiex_dbg(adapter, EVENT,
  851. "event: wakeup device...\n");
  852. return mwifiex_write_reg(adapter, CONFIGURATION_REG, HOST_POWER_UP);
  853. }
  854. /*
  855. * This function is called after the card has woken up.
  856. *
  857. * The card configuration register is reset.
  858. */
  859. static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
  860. {
  861. mwifiex_dbg(adapter, EVENT,
  862. "cmd: wakeup device completed\n");
  863. return mwifiex_write_reg(adapter, CONFIGURATION_REG, 0);
  864. }
  865. static int mwifiex_sdio_dnld_fw(struct mwifiex_adapter *adapter,
  866. struct mwifiex_fw_image *fw)
  867. {
  868. struct sdio_mmc_card *card = adapter->card;
  869. int ret;
  870. sdio_claim_host(card->func);
  871. ret = mwifiex_dnld_fw(adapter, fw);
  872. sdio_release_host(card->func);
  873. return ret;
  874. }
  875. /*
  876. * This function is used to initialize IO ports for the
  877. * chipsets supporting SDIO new mode eg SD8897.
  878. */
  879. static int mwifiex_init_sdio_new_mode(struct mwifiex_adapter *adapter)
  880. {
  881. u8 reg;
  882. struct sdio_mmc_card *card = adapter->card;
  883. adapter->ioport = MEM_PORT;
  884. /* enable sdio new mode */
  885. if (mwifiex_read_reg(adapter, card->reg->card_cfg_2_1_reg, &reg))
  886. return -1;
  887. if (mwifiex_write_reg(adapter, card->reg->card_cfg_2_1_reg,
  888. reg | CMD53_NEW_MODE))
  889. return -1;
  890. /* Configure cmd port and enable reading rx length from the register */
  891. if (mwifiex_read_reg(adapter, card->reg->cmd_cfg_0, &reg))
  892. return -1;
  893. if (mwifiex_write_reg(adapter, card->reg->cmd_cfg_0,
  894. reg | CMD_PORT_RD_LEN_EN))
  895. return -1;
  896. /* Enable Dnld/Upld ready auto reset for cmd port after cmd53 is
  897. * completed
  898. */
  899. if (mwifiex_read_reg(adapter, card->reg->cmd_cfg_1, &reg))
  900. return -1;
  901. if (mwifiex_write_reg(adapter, card->reg->cmd_cfg_1,
  902. reg | CMD_PORT_AUTO_EN))
  903. return -1;
  904. return 0;
  905. }
  906. /* This function initializes the IO ports.
  907. *
  908. * The following operations are performed -
  909. * - Read the IO ports (0, 1 and 2)
  910. * - Set host interrupt Reset-To-Read to clear
  911. * - Set auto re-enable interrupt
  912. */
  913. static int mwifiex_init_sdio_ioport(struct mwifiex_adapter *adapter)
  914. {
  915. u8 reg;
  916. struct sdio_mmc_card *card = adapter->card;
  917. adapter->ioport = 0;
  918. if (card->supports_sdio_new_mode) {
  919. if (mwifiex_init_sdio_new_mode(adapter))
  920. return -1;
  921. goto cont;
  922. }
  923. /* Read the IO port */
  924. if (!mwifiex_read_reg(adapter, card->reg->io_port_0_reg, &reg))
  925. adapter->ioport |= (reg & 0xff);
  926. else
  927. return -1;
  928. if (!mwifiex_read_reg(adapter, card->reg->io_port_1_reg, &reg))
  929. adapter->ioport |= ((reg & 0xff) << 8);
  930. else
  931. return -1;
  932. if (!mwifiex_read_reg(adapter, card->reg->io_port_2_reg, &reg))
  933. adapter->ioport |= ((reg & 0xff) << 16);
  934. else
  935. return -1;
  936. cont:
  937. mwifiex_dbg(adapter, INFO,
  938. "info: SDIO FUNC1 IO port: %#x\n", adapter->ioport);
  939. /* Set Host interrupt reset to read to clear */
  940. if (!mwifiex_read_reg(adapter, card->reg->host_int_rsr_reg, &reg))
  941. mwifiex_write_reg(adapter, card->reg->host_int_rsr_reg,
  942. reg | card->reg->sdio_int_mask);
  943. else
  944. return -1;
  945. /* Dnld/Upld ready set to auto reset */
  946. if (!mwifiex_read_reg(adapter, card->reg->card_misc_cfg_reg, &reg))
  947. mwifiex_write_reg(adapter, card->reg->card_misc_cfg_reg,
  948. reg | AUTO_RE_ENABLE_INT);
  949. else
  950. return -1;
  951. return 0;
  952. }
  953. /*
  954. * This function sends data to the card.
  955. */
  956. static int mwifiex_write_data_to_card(struct mwifiex_adapter *adapter,
  957. u8 *payload, u32 pkt_len, u32 port)
  958. {
  959. u32 i = 0;
  960. int ret;
  961. do {
  962. ret = mwifiex_write_data_sync(adapter, payload, pkt_len, port);
  963. if (ret) {
  964. i++;
  965. mwifiex_dbg(adapter, ERROR,
  966. "host_to_card, write iomem\t"
  967. "(%d) failed: %d\n", i, ret);
  968. if (mwifiex_write_reg(adapter, CONFIGURATION_REG, 0x04))
  969. mwifiex_dbg(adapter, ERROR,
  970. "write CFG reg failed\n");
  971. ret = -1;
  972. if (i > MAX_WRITE_IOMEM_RETRY)
  973. return ret;
  974. }
  975. } while (ret == -1);
  976. return ret;
  977. }
  978. /*
  979. * This function gets the read port.
  980. *
  981. * If control port bit is set in MP read bitmap, the control port
  982. * is returned, otherwise the current read port is returned and
  983. * the value is increased (provided it does not reach the maximum
  984. * limit, in which case it is reset to 1)
  985. */
  986. static int mwifiex_get_rd_port(struct mwifiex_adapter *adapter, u8 *port)
  987. {
  988. struct sdio_mmc_card *card = adapter->card;
  989. const struct mwifiex_sdio_card_reg *reg = card->reg;
  990. u32 rd_bitmap = card->mp_rd_bitmap;
  991. mwifiex_dbg(adapter, DATA,
  992. "data: mp_rd_bitmap=0x%08x\n", rd_bitmap);
  993. if (card->supports_sdio_new_mode) {
  994. if (!(rd_bitmap & reg->data_port_mask))
  995. return -1;
  996. } else {
  997. if (!(rd_bitmap & (CTRL_PORT_MASK | reg->data_port_mask)))
  998. return -1;
  999. }
  1000. if ((card->has_control_mask) &&
  1001. (card->mp_rd_bitmap & CTRL_PORT_MASK)) {
  1002. card->mp_rd_bitmap &= (u32) (~CTRL_PORT_MASK);
  1003. *port = CTRL_PORT;
  1004. mwifiex_dbg(adapter, DATA,
  1005. "data: port=%d mp_rd_bitmap=0x%08x\n",
  1006. *port, card->mp_rd_bitmap);
  1007. return 0;
  1008. }
  1009. if (!(card->mp_rd_bitmap & (1 << card->curr_rd_port)))
  1010. return -1;
  1011. /* We are now handling the SDIO data ports */
  1012. card->mp_rd_bitmap &= (u32)(~(1 << card->curr_rd_port));
  1013. *port = card->curr_rd_port;
  1014. if (++card->curr_rd_port == card->max_ports)
  1015. card->curr_rd_port = reg->start_rd_port;
  1016. mwifiex_dbg(adapter, DATA,
  1017. "data: port=%d mp_rd_bitmap=0x%08x -> 0x%08x\n",
  1018. *port, rd_bitmap, card->mp_rd_bitmap);
  1019. return 0;
  1020. }
  1021. /*
  1022. * This function gets the write port for data.
  1023. *
  1024. * The current write port is returned if available and the value is
  1025. * increased (provided it does not reach the maximum limit, in which
  1026. * case it is reset to 1)
  1027. */
  1028. static int mwifiex_get_wr_port_data(struct mwifiex_adapter *adapter, u32 *port)
  1029. {
  1030. struct sdio_mmc_card *card = adapter->card;
  1031. const struct mwifiex_sdio_card_reg *reg = card->reg;
  1032. u32 wr_bitmap = card->mp_wr_bitmap;
  1033. mwifiex_dbg(adapter, DATA,
  1034. "data: mp_wr_bitmap=0x%08x\n", wr_bitmap);
  1035. if (!(wr_bitmap & card->mp_data_port_mask)) {
  1036. adapter->data_sent = true;
  1037. return -EBUSY;
  1038. }
  1039. if (card->mp_wr_bitmap & (1 << card->curr_wr_port)) {
  1040. card->mp_wr_bitmap &= (u32) (~(1 << card->curr_wr_port));
  1041. *port = card->curr_wr_port;
  1042. if (++card->curr_wr_port == card->mp_end_port)
  1043. card->curr_wr_port = reg->start_wr_port;
  1044. } else {
  1045. adapter->data_sent = true;
  1046. return -EBUSY;
  1047. }
  1048. if ((card->has_control_mask) && (*port == CTRL_PORT)) {
  1049. mwifiex_dbg(adapter, ERROR,
  1050. "invalid data port=%d cur port=%d mp_wr_bitmap=0x%08x -> 0x%08x\n",
  1051. *port, card->curr_wr_port, wr_bitmap,
  1052. card->mp_wr_bitmap);
  1053. return -1;
  1054. }
  1055. mwifiex_dbg(adapter, DATA,
  1056. "data: port=%d mp_wr_bitmap=0x%08x -> 0x%08x\n",
  1057. *port, wr_bitmap, card->mp_wr_bitmap);
  1058. return 0;
  1059. }
  1060. /*
  1061. * This function polls the card status.
  1062. */
  1063. static int
  1064. mwifiex_sdio_poll_card_status(struct mwifiex_adapter *adapter, u8 bits)
  1065. {
  1066. struct sdio_mmc_card *card = adapter->card;
  1067. u32 tries;
  1068. u8 cs;
  1069. for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
  1070. if (mwifiex_read_reg(adapter, card->reg->poll_reg, &cs))
  1071. break;
  1072. else if ((cs & bits) == bits)
  1073. return 0;
  1074. usleep_range(10, 20);
  1075. }
  1076. mwifiex_dbg(adapter, ERROR,
  1077. "poll card status failed, tries = %d\n", tries);
  1078. return -1;
  1079. }
  1080. /*
  1081. * This function disables the host interrupt.
  1082. *
  1083. * The host interrupt mask is read, the disable bit is reset and
  1084. * written back to the card host interrupt mask register.
  1085. */
  1086. static void mwifiex_sdio_disable_host_int(struct mwifiex_adapter *adapter)
  1087. {
  1088. struct sdio_mmc_card *card = adapter->card;
  1089. struct sdio_func *func = card->func;
  1090. sdio_claim_host(func);
  1091. mwifiex_write_reg_locked(func, card->reg->host_int_mask_reg, 0);
  1092. sdio_release_irq(func);
  1093. sdio_release_host(func);
  1094. }
  1095. /*
  1096. * This function reads the interrupt status from card.
  1097. */
  1098. static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter)
  1099. {
  1100. struct sdio_mmc_card *card = adapter->card;
  1101. u8 sdio_ireg;
  1102. unsigned long flags;
  1103. if (mwifiex_read_data_sync(adapter, card->mp_regs,
  1104. card->reg->max_mp_regs,
  1105. REG_PORT | MWIFIEX_SDIO_BYTE_MODE_MASK, 0)) {
  1106. mwifiex_dbg(adapter, ERROR, "read mp_regs failed\n");
  1107. return;
  1108. }
  1109. sdio_ireg = card->mp_regs[card->reg->host_int_status_reg];
  1110. if (sdio_ireg) {
  1111. /*
  1112. * DN_LD_HOST_INT_STATUS and/or UP_LD_HOST_INT_STATUS
  1113. * For SDIO new mode CMD port interrupts
  1114. * DN_LD_CMD_PORT_HOST_INT_STATUS and/or
  1115. * UP_LD_CMD_PORT_HOST_INT_STATUS
  1116. * Clear the interrupt status register
  1117. */
  1118. mwifiex_dbg(adapter, INTR,
  1119. "int: sdio_ireg = %#x\n", sdio_ireg);
  1120. spin_lock_irqsave(&adapter->int_lock, flags);
  1121. adapter->int_status |= sdio_ireg;
  1122. spin_unlock_irqrestore(&adapter->int_lock, flags);
  1123. }
  1124. }
  1125. /*
  1126. * SDIO interrupt handler.
  1127. *
  1128. * This function reads the interrupt status from firmware and handles
  1129. * the interrupt in current thread (ksdioirqd) right away.
  1130. */
  1131. static void
  1132. mwifiex_sdio_interrupt(struct sdio_func *func)
  1133. {
  1134. struct mwifiex_adapter *adapter;
  1135. struct sdio_mmc_card *card;
  1136. card = sdio_get_drvdata(func);
  1137. if (!card || !card->adapter) {
  1138. pr_err("int: func=%p card=%p adapter=%p\n",
  1139. func, card, card ? card->adapter : NULL);
  1140. return;
  1141. }
  1142. adapter = card->adapter;
  1143. if (!adapter->pps_uapsd_mode && adapter->ps_state == PS_STATE_SLEEP)
  1144. adapter->ps_state = PS_STATE_AWAKE;
  1145. mwifiex_interrupt_status(adapter);
  1146. mwifiex_main_process(adapter);
  1147. }
  1148. /*
  1149. * This function enables the host interrupt.
  1150. *
  1151. * The host interrupt enable mask is written to the card
  1152. * host interrupt mask register.
  1153. */
  1154. static int mwifiex_sdio_enable_host_int(struct mwifiex_adapter *adapter)
  1155. {
  1156. struct sdio_mmc_card *card = adapter->card;
  1157. struct sdio_func *func = card->func;
  1158. int ret;
  1159. sdio_claim_host(func);
  1160. /* Request the SDIO IRQ */
  1161. ret = sdio_claim_irq(func, mwifiex_sdio_interrupt);
  1162. if (ret) {
  1163. mwifiex_dbg(adapter, ERROR,
  1164. "claim irq failed: ret=%d\n", ret);
  1165. goto out;
  1166. }
  1167. /* Simply write the mask to the register */
  1168. ret = mwifiex_write_reg_locked(func, card->reg->host_int_mask_reg,
  1169. card->reg->host_int_enable);
  1170. if (ret) {
  1171. mwifiex_dbg(adapter, ERROR,
  1172. "enable host interrupt failed\n");
  1173. sdio_release_irq(func);
  1174. }
  1175. out:
  1176. sdio_release_host(func);
  1177. return ret;
  1178. }
  1179. /*
  1180. * This function sends a data buffer to the card.
  1181. */
  1182. static int mwifiex_sdio_card_to_host(struct mwifiex_adapter *adapter,
  1183. u32 *type, u8 *buffer,
  1184. u32 npayload, u32 ioport)
  1185. {
  1186. int ret;
  1187. u32 nb;
  1188. if (!buffer) {
  1189. mwifiex_dbg(adapter, ERROR,
  1190. "%s: buffer is NULL\n", __func__);
  1191. return -1;
  1192. }
  1193. ret = mwifiex_read_data_sync(adapter, buffer, npayload, ioport, 1);
  1194. if (ret) {
  1195. mwifiex_dbg(adapter, ERROR,
  1196. "%s: read iomem failed: %d\n", __func__,
  1197. ret);
  1198. return -1;
  1199. }
  1200. nb = get_unaligned_le16((buffer));
  1201. if (nb > npayload) {
  1202. mwifiex_dbg(adapter, ERROR,
  1203. "%s: invalid packet, nb=%d npayload=%d\n",
  1204. __func__, nb, npayload);
  1205. return -1;
  1206. }
  1207. *type = get_unaligned_le16((buffer + 2));
  1208. return ret;
  1209. }
  1210. /*
  1211. * This function downloads the firmware to the card.
  1212. *
  1213. * Firmware is downloaded to the card in blocks. Every block download
  1214. * is tested for CRC errors, and retried a number of times before
  1215. * returning failure.
  1216. */
  1217. static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
  1218. struct mwifiex_fw_image *fw)
  1219. {
  1220. struct sdio_mmc_card *card = adapter->card;
  1221. const struct mwifiex_sdio_card_reg *reg = card->reg;
  1222. int ret;
  1223. u8 *firmware = fw->fw_buf;
  1224. u32 firmware_len = fw->fw_len;
  1225. u32 offset = 0;
  1226. u8 base0, base1;
  1227. u8 *fwbuf;
  1228. u16 len = 0;
  1229. u32 txlen, tx_blocks = 0, tries;
  1230. u32 i = 0;
  1231. if (!firmware_len) {
  1232. mwifiex_dbg(adapter, ERROR,
  1233. "firmware image not found! Terminating download\n");
  1234. return -1;
  1235. }
  1236. mwifiex_dbg(adapter, INFO,
  1237. "info: downloading FW image (%d bytes)\n",
  1238. firmware_len);
  1239. /* Assume that the allocated buffer is 8-byte aligned */
  1240. fwbuf = kzalloc(MWIFIEX_UPLD_SIZE, GFP_KERNEL);
  1241. if (!fwbuf)
  1242. return -ENOMEM;
  1243. sdio_claim_host(card->func);
  1244. /* Perform firmware data transfer */
  1245. do {
  1246. /* The host polls for the DN_LD_CARD_RDY and CARD_IO_READY
  1247. bits */
  1248. ret = mwifiex_sdio_poll_card_status(adapter, CARD_IO_READY |
  1249. DN_LD_CARD_RDY);
  1250. if (ret) {
  1251. mwifiex_dbg(adapter, ERROR,
  1252. "FW download with helper:\t"
  1253. "poll status timeout @ %d\n", offset);
  1254. goto done;
  1255. }
  1256. /* More data? */
  1257. if (offset >= firmware_len)
  1258. break;
  1259. for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
  1260. ret = mwifiex_read_reg(adapter, reg->base_0_reg,
  1261. &base0);
  1262. if (ret) {
  1263. mwifiex_dbg(adapter, ERROR,
  1264. "dev BASE0 register read failed:\t"
  1265. "base0=%#04X(%d). Terminating dnld\n",
  1266. base0, base0);
  1267. goto done;
  1268. }
  1269. ret = mwifiex_read_reg(adapter, reg->base_1_reg,
  1270. &base1);
  1271. if (ret) {
  1272. mwifiex_dbg(adapter, ERROR,
  1273. "dev BASE1 register read failed:\t"
  1274. "base1=%#04X(%d). Terminating dnld\n",
  1275. base1, base1);
  1276. goto done;
  1277. }
  1278. len = (u16) (((base1 & 0xff) << 8) | (base0 & 0xff));
  1279. if (len)
  1280. break;
  1281. usleep_range(10, 20);
  1282. }
  1283. if (!len) {
  1284. break;
  1285. } else if (len > MWIFIEX_UPLD_SIZE) {
  1286. mwifiex_dbg(adapter, ERROR,
  1287. "FW dnld failed @ %d, invalid length %d\n",
  1288. offset, len);
  1289. ret = -1;
  1290. goto done;
  1291. }
  1292. txlen = len;
  1293. if (len & BIT(0)) {
  1294. i++;
  1295. if (i > MAX_WRITE_IOMEM_RETRY) {
  1296. mwifiex_dbg(adapter, ERROR,
  1297. "FW dnld failed @ %d, over max retry\n",
  1298. offset);
  1299. ret = -1;
  1300. goto done;
  1301. }
  1302. mwifiex_dbg(adapter, ERROR,
  1303. "CRC indicated by the helper:\t"
  1304. "len = 0x%04X, txlen = %d\n", len, txlen);
  1305. len &= ~BIT(0);
  1306. /* Setting this to 0 to resend from same offset */
  1307. txlen = 0;
  1308. } else {
  1309. i = 0;
  1310. /* Set blocksize to transfer - checking for last
  1311. block */
  1312. if (firmware_len - offset < txlen)
  1313. txlen = firmware_len - offset;
  1314. tx_blocks = (txlen + MWIFIEX_SDIO_BLOCK_SIZE - 1)
  1315. / MWIFIEX_SDIO_BLOCK_SIZE;
  1316. /* Copy payload to buffer */
  1317. memmove(fwbuf, &firmware[offset], txlen);
  1318. }
  1319. ret = mwifiex_write_data_sync(adapter, fwbuf, tx_blocks *
  1320. MWIFIEX_SDIO_BLOCK_SIZE,
  1321. adapter->ioport);
  1322. if (ret) {
  1323. mwifiex_dbg(adapter, ERROR,
  1324. "FW download, write iomem (%d) failed @ %d\n",
  1325. i, offset);
  1326. if (mwifiex_write_reg(adapter, CONFIGURATION_REG, 0x04))
  1327. mwifiex_dbg(adapter, ERROR,
  1328. "write CFG reg failed\n");
  1329. ret = -1;
  1330. goto done;
  1331. }
  1332. offset += txlen;
  1333. } while (true);
  1334. mwifiex_dbg(adapter, MSG,
  1335. "info: FW download over, size %d bytes\n", offset);
  1336. ret = 0;
  1337. done:
  1338. sdio_release_host(card->func);
  1339. kfree(fwbuf);
  1340. return ret;
  1341. }
  1342. /*
  1343. * This function decode sdio aggreation pkt.
  1344. *
  1345. * Based on the data block size and pkt_len,
  1346. * skb data will be decoded to few packets.
  1347. */
  1348. static void mwifiex_deaggr_sdio_pkt(struct mwifiex_adapter *adapter,
  1349. struct sk_buff *skb)
  1350. {
  1351. u32 total_pkt_len, pkt_len;
  1352. struct sk_buff *skb_deaggr;
  1353. u16 blk_size;
  1354. u8 blk_num;
  1355. u8 *data;
  1356. data = skb->data;
  1357. total_pkt_len = skb->len;
  1358. while (total_pkt_len >= (SDIO_HEADER_OFFSET + adapter->intf_hdr_len)) {
  1359. if (total_pkt_len < adapter->sdio_rx_block_size)
  1360. break;
  1361. blk_num = *(data + BLOCK_NUMBER_OFFSET);
  1362. blk_size = adapter->sdio_rx_block_size * blk_num;
  1363. if (blk_size > total_pkt_len) {
  1364. mwifiex_dbg(adapter, ERROR,
  1365. "%s: error in blk_size,\t"
  1366. "blk_num=%d, blk_size=%d, total_pkt_len=%d\n",
  1367. __func__, blk_num, blk_size, total_pkt_len);
  1368. break;
  1369. }
  1370. pkt_len = get_unaligned_le16((data +
  1371. SDIO_HEADER_OFFSET));
  1372. if ((pkt_len + SDIO_HEADER_OFFSET) > blk_size) {
  1373. mwifiex_dbg(adapter, ERROR,
  1374. "%s: error in pkt_len,\t"
  1375. "pkt_len=%d, blk_size=%d\n",
  1376. __func__, pkt_len, blk_size);
  1377. break;
  1378. }
  1379. skb_deaggr = mwifiex_alloc_dma_align_buf(pkt_len, GFP_KERNEL);
  1380. if (!skb_deaggr)
  1381. break;
  1382. skb_put(skb_deaggr, pkt_len);
  1383. memcpy(skb_deaggr->data, data + SDIO_HEADER_OFFSET, pkt_len);
  1384. skb_pull(skb_deaggr, adapter->intf_hdr_len);
  1385. mwifiex_handle_rx_packet(adapter, skb_deaggr);
  1386. data += blk_size;
  1387. total_pkt_len -= blk_size;
  1388. }
  1389. }
  1390. /*
  1391. * This function decodes a received packet.
  1392. *
  1393. * Based on the type, the packet is treated as either a data, or
  1394. * a command response, or an event, and the correct handler
  1395. * function is invoked.
  1396. */
  1397. static int mwifiex_decode_rx_packet(struct mwifiex_adapter *adapter,
  1398. struct sk_buff *skb, u32 upld_typ)
  1399. {
  1400. u8 *cmd_buf;
  1401. u16 pkt_len;
  1402. struct mwifiex_rxinfo *rx_info;
  1403. pkt_len = get_unaligned_le16(skb->data);
  1404. if (upld_typ != MWIFIEX_TYPE_AGGR_DATA) {
  1405. skb_trim(skb, pkt_len);
  1406. skb_pull(skb, adapter->intf_hdr_len);
  1407. }
  1408. switch (upld_typ) {
  1409. case MWIFIEX_TYPE_AGGR_DATA:
  1410. mwifiex_dbg(adapter, INFO,
  1411. "info: --- Rx: Aggr Data packet ---\n");
  1412. rx_info = MWIFIEX_SKB_RXCB(skb);
  1413. rx_info->buf_type = MWIFIEX_TYPE_AGGR_DATA;
  1414. if (adapter->rx_work_enabled) {
  1415. skb_queue_tail(&adapter->rx_data_q, skb);
  1416. atomic_inc(&adapter->rx_pending);
  1417. adapter->data_received = true;
  1418. } else {
  1419. mwifiex_deaggr_sdio_pkt(adapter, skb);
  1420. dev_kfree_skb_any(skb);
  1421. }
  1422. break;
  1423. case MWIFIEX_TYPE_DATA:
  1424. mwifiex_dbg(adapter, DATA,
  1425. "info: --- Rx: Data packet ---\n");
  1426. if (adapter->rx_work_enabled) {
  1427. skb_queue_tail(&adapter->rx_data_q, skb);
  1428. adapter->data_received = true;
  1429. atomic_inc(&adapter->rx_pending);
  1430. } else {
  1431. mwifiex_handle_rx_packet(adapter, skb);
  1432. }
  1433. break;
  1434. case MWIFIEX_TYPE_CMD:
  1435. mwifiex_dbg(adapter, CMD,
  1436. "info: --- Rx: Cmd Response ---\n");
  1437. /* take care of curr_cmd = NULL case */
  1438. if (!adapter->curr_cmd) {
  1439. cmd_buf = adapter->upld_buf;
  1440. if (adapter->ps_state == PS_STATE_SLEEP_CFM)
  1441. mwifiex_process_sleep_confirm_resp(adapter,
  1442. skb->data,
  1443. skb->len);
  1444. memcpy(cmd_buf, skb->data,
  1445. min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER,
  1446. skb->len));
  1447. dev_kfree_skb_any(skb);
  1448. } else {
  1449. adapter->cmd_resp_received = true;
  1450. adapter->curr_cmd->resp_skb = skb;
  1451. }
  1452. break;
  1453. case MWIFIEX_TYPE_EVENT:
  1454. mwifiex_dbg(adapter, EVENT,
  1455. "info: --- Rx: Event ---\n");
  1456. adapter->event_cause = get_unaligned_le32(skb->data);
  1457. if ((skb->len > 0) && (skb->len < MAX_EVENT_SIZE))
  1458. memcpy(adapter->event_body,
  1459. skb->data + MWIFIEX_EVENT_HEADER_LEN,
  1460. skb->len);
  1461. /* event cause has been saved to adapter->event_cause */
  1462. adapter->event_received = true;
  1463. adapter->event_skb = skb;
  1464. break;
  1465. default:
  1466. mwifiex_dbg(adapter, ERROR,
  1467. "unknown upload type %#x\n", upld_typ);
  1468. dev_kfree_skb_any(skb);
  1469. break;
  1470. }
  1471. return 0;
  1472. }
  1473. /*
  1474. * This function transfers received packets from card to driver, performing
  1475. * aggregation if required.
  1476. *
  1477. * For data received on control port, or if aggregation is disabled, the
  1478. * received buffers are uploaded as separate packets. However, if aggregation
  1479. * is enabled and required, the buffers are copied onto an aggregation buffer,
  1480. * provided there is space left, processed and finally uploaded.
  1481. */
  1482. static int mwifiex_sdio_card_to_host_mp_aggr(struct mwifiex_adapter *adapter,
  1483. u16 rx_len, u8 port)
  1484. {
  1485. struct sdio_mmc_card *card = adapter->card;
  1486. s32 f_do_rx_aggr = 0;
  1487. s32 f_do_rx_cur = 0;
  1488. s32 f_aggr_cur = 0;
  1489. s32 f_post_aggr_cur = 0;
  1490. struct sk_buff *skb_deaggr;
  1491. struct sk_buff *skb = NULL;
  1492. u32 pkt_len, pkt_type, mport, pind;
  1493. u8 *curr_ptr;
  1494. if ((card->has_control_mask) && (port == CTRL_PORT)) {
  1495. /* Read the command Resp without aggr */
  1496. mwifiex_dbg(adapter, CMD,
  1497. "info: %s: no aggregation for cmd\t"
  1498. "response\n", __func__);
  1499. f_do_rx_cur = 1;
  1500. goto rx_curr_single;
  1501. }
  1502. if (!card->mpa_rx.enabled) {
  1503. mwifiex_dbg(adapter, WARN,
  1504. "info: %s: rx aggregation disabled\n",
  1505. __func__);
  1506. f_do_rx_cur = 1;
  1507. goto rx_curr_single;
  1508. }
  1509. if ((!card->has_control_mask && (card->mp_rd_bitmap &
  1510. card->reg->data_port_mask)) ||
  1511. (card->has_control_mask && (card->mp_rd_bitmap &
  1512. (~((u32) CTRL_PORT_MASK))))) {
  1513. /* Some more data RX pending */
  1514. mwifiex_dbg(adapter, INFO,
  1515. "info: %s: not last packet\n", __func__);
  1516. if (MP_RX_AGGR_IN_PROGRESS(card)) {
  1517. if (MP_RX_AGGR_BUF_HAS_ROOM(card, rx_len)) {
  1518. f_aggr_cur = 1;
  1519. } else {
  1520. /* No room in Aggr buf, do rx aggr now */
  1521. f_do_rx_aggr = 1;
  1522. f_post_aggr_cur = 1;
  1523. }
  1524. } else {
  1525. /* Rx aggr not in progress */
  1526. f_aggr_cur = 1;
  1527. }
  1528. } else {
  1529. /* No more data RX pending */
  1530. mwifiex_dbg(adapter, INFO,
  1531. "info: %s: last packet\n", __func__);
  1532. if (MP_RX_AGGR_IN_PROGRESS(card)) {
  1533. f_do_rx_aggr = 1;
  1534. if (MP_RX_AGGR_BUF_HAS_ROOM(card, rx_len))
  1535. f_aggr_cur = 1;
  1536. else
  1537. /* No room in Aggr buf, do rx aggr now */
  1538. f_do_rx_cur = 1;
  1539. } else {
  1540. f_do_rx_cur = 1;
  1541. }
  1542. }
  1543. if (f_aggr_cur) {
  1544. mwifiex_dbg(adapter, INFO,
  1545. "info: current packet aggregation\n");
  1546. /* Curr pkt can be aggregated */
  1547. mp_rx_aggr_setup(card, rx_len, port);
  1548. if (MP_RX_AGGR_PKT_LIMIT_REACHED(card) ||
  1549. mp_rx_aggr_port_limit_reached(card)) {
  1550. mwifiex_dbg(adapter, INFO,
  1551. "info: %s: aggregated packet\t"
  1552. "limit reached\n", __func__);
  1553. /* No more pkts allowed in Aggr buf, rx it */
  1554. f_do_rx_aggr = 1;
  1555. }
  1556. }
  1557. if (f_do_rx_aggr) {
  1558. /* do aggr RX now */
  1559. mwifiex_dbg(adapter, DATA,
  1560. "info: do_rx_aggr: num of packets: %d\n",
  1561. card->mpa_rx.pkt_cnt);
  1562. if (card->supports_sdio_new_mode) {
  1563. int i;
  1564. u32 port_count;
  1565. for (i = 0, port_count = 0; i < card->max_ports; i++)
  1566. if (card->mpa_rx.ports & BIT(i))
  1567. port_count++;
  1568. /* Reading data from "start_port + 0" to "start_port +
  1569. * port_count -1", so decrease the count by 1
  1570. */
  1571. port_count--;
  1572. mport = (adapter->ioport | SDIO_MPA_ADDR_BASE |
  1573. (port_count << 8)) + card->mpa_rx.start_port;
  1574. } else {
  1575. mport = (adapter->ioport | SDIO_MPA_ADDR_BASE |
  1576. (card->mpa_rx.ports << 4)) +
  1577. card->mpa_rx.start_port;
  1578. }
  1579. if (card->mpa_rx.pkt_cnt == 1)
  1580. mport = adapter->ioport + card->mpa_rx.start_port;
  1581. if (mwifiex_read_data_sync(adapter, card->mpa_rx.buf,
  1582. card->mpa_rx.buf_len, mport, 1))
  1583. goto error;
  1584. curr_ptr = card->mpa_rx.buf;
  1585. for (pind = 0; pind < card->mpa_rx.pkt_cnt; pind++) {
  1586. u32 *len_arr = card->mpa_rx.len_arr;
  1587. /* get curr PKT len & type */
  1588. pkt_len = get_unaligned_le16(&curr_ptr[0]);
  1589. pkt_type = get_unaligned_le16(&curr_ptr[2]);
  1590. /* copy pkt to deaggr buf */
  1591. skb_deaggr = mwifiex_alloc_dma_align_buf(len_arr[pind],
  1592. GFP_KERNEL);
  1593. if (!skb_deaggr) {
  1594. mwifiex_dbg(adapter, ERROR, "skb allocation failure\t"
  1595. "drop pkt len=%d type=%d\n",
  1596. pkt_len, pkt_type);
  1597. curr_ptr += len_arr[pind];
  1598. continue;
  1599. }
  1600. skb_put(skb_deaggr, len_arr[pind]);
  1601. if ((pkt_type == MWIFIEX_TYPE_DATA ||
  1602. (pkt_type == MWIFIEX_TYPE_AGGR_DATA &&
  1603. adapter->sdio_rx_aggr_enable)) &&
  1604. (pkt_len <= len_arr[pind])) {
  1605. memcpy(skb_deaggr->data, curr_ptr, pkt_len);
  1606. skb_trim(skb_deaggr, pkt_len);
  1607. /* Process de-aggr packet */
  1608. mwifiex_decode_rx_packet(adapter, skb_deaggr,
  1609. pkt_type);
  1610. } else {
  1611. mwifiex_dbg(adapter, ERROR,
  1612. "drop wrong aggr pkt:\t"
  1613. "sdio_single_port_rx_aggr=%d\t"
  1614. "type=%d len=%d max_len=%d\n",
  1615. adapter->sdio_rx_aggr_enable,
  1616. pkt_type, pkt_len, len_arr[pind]);
  1617. dev_kfree_skb_any(skb_deaggr);
  1618. }
  1619. curr_ptr += len_arr[pind];
  1620. }
  1621. MP_RX_AGGR_BUF_RESET(card);
  1622. }
  1623. rx_curr_single:
  1624. if (f_do_rx_cur) {
  1625. mwifiex_dbg(adapter, INFO, "info: RX: port: %d, rx_len: %d\n",
  1626. port, rx_len);
  1627. skb = mwifiex_alloc_dma_align_buf(rx_len, GFP_KERNEL);
  1628. if (!skb) {
  1629. mwifiex_dbg(adapter, ERROR,
  1630. "single skb allocated fail,\t"
  1631. "drop pkt port=%d len=%d\n", port, rx_len);
  1632. if (mwifiex_sdio_card_to_host(adapter, &pkt_type,
  1633. card->mpa_rx.buf, rx_len,
  1634. adapter->ioport + port))
  1635. goto error;
  1636. return 0;
  1637. }
  1638. skb_put(skb, rx_len);
  1639. if (mwifiex_sdio_card_to_host(adapter, &pkt_type,
  1640. skb->data, skb->len,
  1641. adapter->ioport + port))
  1642. goto error;
  1643. if (!adapter->sdio_rx_aggr_enable &&
  1644. pkt_type == MWIFIEX_TYPE_AGGR_DATA) {
  1645. mwifiex_dbg(adapter, ERROR, "drop wrong pkt type %d\t"
  1646. "current SDIO RX Aggr not enabled\n",
  1647. pkt_type);
  1648. dev_kfree_skb_any(skb);
  1649. return 0;
  1650. }
  1651. mwifiex_decode_rx_packet(adapter, skb, pkt_type);
  1652. }
  1653. if (f_post_aggr_cur) {
  1654. mwifiex_dbg(adapter, INFO,
  1655. "info: current packet aggregation\n");
  1656. /* Curr pkt can be aggregated */
  1657. mp_rx_aggr_setup(card, rx_len, port);
  1658. }
  1659. return 0;
  1660. error:
  1661. if (MP_RX_AGGR_IN_PROGRESS(card))
  1662. MP_RX_AGGR_BUF_RESET(card);
  1663. if (f_do_rx_cur && skb)
  1664. /* Single transfer pending. Free curr buff also */
  1665. dev_kfree_skb_any(skb);
  1666. return -1;
  1667. }
  1668. /*
  1669. * This function checks the current interrupt status.
  1670. *
  1671. * The following interrupts are checked and handled by this function -
  1672. * - Data sent
  1673. * - Command sent
  1674. * - Packets received
  1675. *
  1676. * Since the firmware does not generate download ready interrupt if the
  1677. * port updated is command port only, command sent interrupt checking
  1678. * should be done manually, and for every SDIO interrupt.
  1679. *
  1680. * In case of Rx packets received, the packets are uploaded from card to
  1681. * host and processed accordingly.
  1682. */
  1683. static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
  1684. {
  1685. struct sdio_mmc_card *card = adapter->card;
  1686. const struct mwifiex_sdio_card_reg *reg = card->reg;
  1687. int ret = 0;
  1688. u8 sdio_ireg;
  1689. struct sk_buff *skb;
  1690. u8 port = CTRL_PORT;
  1691. u32 len_reg_l, len_reg_u;
  1692. u32 rx_blocks;
  1693. u16 rx_len;
  1694. unsigned long flags;
  1695. u32 bitmap;
  1696. u8 cr;
  1697. spin_lock_irqsave(&adapter->int_lock, flags);
  1698. sdio_ireg = adapter->int_status;
  1699. adapter->int_status = 0;
  1700. spin_unlock_irqrestore(&adapter->int_lock, flags);
  1701. if (!sdio_ireg)
  1702. return ret;
  1703. /* Following interrupt is only for SDIO new mode */
  1704. if (sdio_ireg & DN_LD_CMD_PORT_HOST_INT_STATUS && adapter->cmd_sent)
  1705. adapter->cmd_sent = false;
  1706. /* Following interrupt is only for SDIO new mode */
  1707. if (sdio_ireg & UP_LD_CMD_PORT_HOST_INT_STATUS) {
  1708. u32 pkt_type;
  1709. /* read the len of control packet */
  1710. rx_len = card->mp_regs[reg->cmd_rd_len_1] << 8;
  1711. rx_len |= (u16)card->mp_regs[reg->cmd_rd_len_0];
  1712. rx_blocks = DIV_ROUND_UP(rx_len, MWIFIEX_SDIO_BLOCK_SIZE);
  1713. if (rx_len <= adapter->intf_hdr_len ||
  1714. (rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE) >
  1715. MWIFIEX_RX_DATA_BUF_SIZE)
  1716. return -1;
  1717. rx_len = (u16) (rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE);
  1718. mwifiex_dbg(adapter, INFO, "info: rx_len = %d\n", rx_len);
  1719. skb = mwifiex_alloc_dma_align_buf(rx_len, GFP_KERNEL);
  1720. if (!skb)
  1721. return -1;
  1722. skb_put(skb, rx_len);
  1723. if (mwifiex_sdio_card_to_host(adapter, &pkt_type, skb->data,
  1724. skb->len, adapter->ioport |
  1725. CMD_PORT_SLCT)) {
  1726. mwifiex_dbg(adapter, ERROR,
  1727. "%s: failed to card_to_host", __func__);
  1728. dev_kfree_skb_any(skb);
  1729. goto term_cmd;
  1730. }
  1731. if ((pkt_type != MWIFIEX_TYPE_CMD) &&
  1732. (pkt_type != MWIFIEX_TYPE_EVENT))
  1733. mwifiex_dbg(adapter, ERROR,
  1734. "%s:Received wrong packet on cmd port",
  1735. __func__);
  1736. mwifiex_decode_rx_packet(adapter, skb, pkt_type);
  1737. }
  1738. if (sdio_ireg & DN_LD_HOST_INT_STATUS) {
  1739. bitmap = (u32) card->mp_regs[reg->wr_bitmap_l];
  1740. bitmap |= ((u32) card->mp_regs[reg->wr_bitmap_u]) << 8;
  1741. if (card->supports_sdio_new_mode) {
  1742. bitmap |=
  1743. ((u32) card->mp_regs[reg->wr_bitmap_1l]) << 16;
  1744. bitmap |=
  1745. ((u32) card->mp_regs[reg->wr_bitmap_1u]) << 24;
  1746. }
  1747. card->mp_wr_bitmap = bitmap;
  1748. mwifiex_dbg(adapter, INTR,
  1749. "int: DNLD: wr_bitmap=0x%x\n",
  1750. card->mp_wr_bitmap);
  1751. if (adapter->data_sent &&
  1752. (card->mp_wr_bitmap & card->mp_data_port_mask)) {
  1753. mwifiex_dbg(adapter, INTR,
  1754. "info: <--- Tx DONE Interrupt --->\n");
  1755. adapter->data_sent = false;
  1756. }
  1757. }
  1758. /* As firmware will not generate download ready interrupt if the port
  1759. updated is command port only, cmd_sent should be done for any SDIO
  1760. interrupt. */
  1761. if (card->has_control_mask && adapter->cmd_sent) {
  1762. /* Check if firmware has attach buffer at command port and
  1763. update just that in wr_bit_map. */
  1764. card->mp_wr_bitmap |=
  1765. (u32) card->mp_regs[reg->wr_bitmap_l] & CTRL_PORT_MASK;
  1766. if (card->mp_wr_bitmap & CTRL_PORT_MASK)
  1767. adapter->cmd_sent = false;
  1768. }
  1769. mwifiex_dbg(adapter, INTR, "info: cmd_sent=%d data_sent=%d\n",
  1770. adapter->cmd_sent, adapter->data_sent);
  1771. if (sdio_ireg & UP_LD_HOST_INT_STATUS) {
  1772. bitmap = (u32) card->mp_regs[reg->rd_bitmap_l];
  1773. bitmap |= ((u32) card->mp_regs[reg->rd_bitmap_u]) << 8;
  1774. if (card->supports_sdio_new_mode) {
  1775. bitmap |=
  1776. ((u32) card->mp_regs[reg->rd_bitmap_1l]) << 16;
  1777. bitmap |=
  1778. ((u32) card->mp_regs[reg->rd_bitmap_1u]) << 24;
  1779. }
  1780. card->mp_rd_bitmap = bitmap;
  1781. mwifiex_dbg(adapter, INTR,
  1782. "int: UPLD: rd_bitmap=0x%x\n",
  1783. card->mp_rd_bitmap);
  1784. while (true) {
  1785. ret = mwifiex_get_rd_port(adapter, &port);
  1786. if (ret) {
  1787. mwifiex_dbg(adapter, INFO,
  1788. "info: no more rd_port available\n");
  1789. break;
  1790. }
  1791. len_reg_l = reg->rd_len_p0_l + (port << 1);
  1792. len_reg_u = reg->rd_len_p0_u + (port << 1);
  1793. rx_len = ((u16) card->mp_regs[len_reg_u]) << 8;
  1794. rx_len |= (u16) card->mp_regs[len_reg_l];
  1795. mwifiex_dbg(adapter, INFO,
  1796. "info: RX: port=%d rx_len=%u\n",
  1797. port, rx_len);
  1798. rx_blocks =
  1799. (rx_len + MWIFIEX_SDIO_BLOCK_SIZE -
  1800. 1) / MWIFIEX_SDIO_BLOCK_SIZE;
  1801. if (rx_len <= adapter->intf_hdr_len ||
  1802. (card->mpa_rx.enabled &&
  1803. ((rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE) >
  1804. card->mpa_rx.buf_size))) {
  1805. mwifiex_dbg(adapter, ERROR,
  1806. "invalid rx_len=%d\n",
  1807. rx_len);
  1808. return -1;
  1809. }
  1810. rx_len = (u16) (rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE);
  1811. mwifiex_dbg(adapter, INFO, "info: rx_len = %d\n",
  1812. rx_len);
  1813. if (mwifiex_sdio_card_to_host_mp_aggr(adapter, rx_len,
  1814. port)) {
  1815. mwifiex_dbg(adapter, ERROR,
  1816. "card_to_host_mpa failed: int status=%#x\n",
  1817. sdio_ireg);
  1818. goto term_cmd;
  1819. }
  1820. }
  1821. }
  1822. return 0;
  1823. term_cmd:
  1824. /* terminate cmd */
  1825. if (mwifiex_read_reg(adapter, CONFIGURATION_REG, &cr))
  1826. mwifiex_dbg(adapter, ERROR, "read CFG reg failed\n");
  1827. else
  1828. mwifiex_dbg(adapter, INFO,
  1829. "info: CFG reg val = %d\n", cr);
  1830. if (mwifiex_write_reg(adapter, CONFIGURATION_REG, (cr | 0x04)))
  1831. mwifiex_dbg(adapter, ERROR,
  1832. "write CFG reg failed\n");
  1833. else
  1834. mwifiex_dbg(adapter, INFO, "info: write success\n");
  1835. if (mwifiex_read_reg(adapter, CONFIGURATION_REG, &cr))
  1836. mwifiex_dbg(adapter, ERROR,
  1837. "read CFG reg failed\n");
  1838. else
  1839. mwifiex_dbg(adapter, INFO,
  1840. "info: CFG reg val =%x\n", cr);
  1841. return -1;
  1842. }
  1843. /*
  1844. * This function aggregates transmission buffers in driver and downloads
  1845. * the aggregated packet to card.
  1846. *
  1847. * The individual packets are aggregated by copying into an aggregation
  1848. * buffer and then downloaded to the card. Previous unsent packets in the
  1849. * aggregation buffer are pre-copied first before new packets are added.
  1850. * Aggregation is done till there is space left in the aggregation buffer,
  1851. * or till new packets are available.
  1852. *
  1853. * The function will only download the packet to the card when aggregation
  1854. * stops, otherwise it will just aggregate the packet in aggregation buffer
  1855. * and return.
  1856. */
  1857. static int mwifiex_host_to_card_mp_aggr(struct mwifiex_adapter *adapter,
  1858. u8 *payload, u32 pkt_len, u32 port,
  1859. u32 next_pkt_len)
  1860. {
  1861. struct sdio_mmc_card *card = adapter->card;
  1862. int ret = 0;
  1863. s32 f_send_aggr_buf = 0;
  1864. s32 f_send_cur_buf = 0;
  1865. s32 f_precopy_cur_buf = 0;
  1866. s32 f_postcopy_cur_buf = 0;
  1867. u32 mport;
  1868. int index;
  1869. if (!card->mpa_tx.enabled ||
  1870. (card->has_control_mask && (port == CTRL_PORT)) ||
  1871. (card->supports_sdio_new_mode && (port == CMD_PORT_SLCT))) {
  1872. mwifiex_dbg(adapter, WARN,
  1873. "info: %s: tx aggregation disabled\n",
  1874. __func__);
  1875. f_send_cur_buf = 1;
  1876. goto tx_curr_single;
  1877. }
  1878. if (next_pkt_len) {
  1879. /* More pkt in TX queue */
  1880. mwifiex_dbg(adapter, INFO,
  1881. "info: %s: more packets in queue.\n",
  1882. __func__);
  1883. if (MP_TX_AGGR_IN_PROGRESS(card)) {
  1884. if (MP_TX_AGGR_BUF_HAS_ROOM(card, pkt_len)) {
  1885. f_precopy_cur_buf = 1;
  1886. if (!(card->mp_wr_bitmap &
  1887. (1 << card->curr_wr_port)) ||
  1888. !MP_TX_AGGR_BUF_HAS_ROOM(
  1889. card, pkt_len + next_pkt_len))
  1890. f_send_aggr_buf = 1;
  1891. } else {
  1892. /* No room in Aggr buf, send it */
  1893. f_send_aggr_buf = 1;
  1894. if (!(card->mp_wr_bitmap &
  1895. (1 << card->curr_wr_port)))
  1896. f_send_cur_buf = 1;
  1897. else
  1898. f_postcopy_cur_buf = 1;
  1899. }
  1900. } else {
  1901. if (MP_TX_AGGR_BUF_HAS_ROOM(card, pkt_len) &&
  1902. (card->mp_wr_bitmap & (1 << card->curr_wr_port)))
  1903. f_precopy_cur_buf = 1;
  1904. else
  1905. f_send_cur_buf = 1;
  1906. }
  1907. } else {
  1908. /* Last pkt in TX queue */
  1909. mwifiex_dbg(adapter, INFO,
  1910. "info: %s: Last packet in Tx Queue.\n",
  1911. __func__);
  1912. if (MP_TX_AGGR_IN_PROGRESS(card)) {
  1913. /* some packs in Aggr buf already */
  1914. f_send_aggr_buf = 1;
  1915. if (MP_TX_AGGR_BUF_HAS_ROOM(card, pkt_len))
  1916. f_precopy_cur_buf = 1;
  1917. else
  1918. /* No room in Aggr buf, send it */
  1919. f_send_cur_buf = 1;
  1920. } else {
  1921. f_send_cur_buf = 1;
  1922. }
  1923. }
  1924. if (f_precopy_cur_buf) {
  1925. mwifiex_dbg(adapter, DATA,
  1926. "data: %s: precopy current buffer\n",
  1927. __func__);
  1928. MP_TX_AGGR_BUF_PUT(card, payload, pkt_len, port);
  1929. if (MP_TX_AGGR_PKT_LIMIT_REACHED(card) ||
  1930. mp_tx_aggr_port_limit_reached(card))
  1931. /* No more pkts allowed in Aggr buf, send it */
  1932. f_send_aggr_buf = 1;
  1933. }
  1934. if (f_send_aggr_buf) {
  1935. mwifiex_dbg(adapter, DATA,
  1936. "data: %s: send aggr buffer: %d %d\n",
  1937. __func__, card->mpa_tx.start_port,
  1938. card->mpa_tx.ports);
  1939. if (card->supports_sdio_new_mode) {
  1940. u32 port_count;
  1941. int i;
  1942. for (i = 0, port_count = 0; i < card->max_ports; i++)
  1943. if (card->mpa_tx.ports & BIT(i))
  1944. port_count++;
  1945. /* Writing data from "start_port + 0" to "start_port +
  1946. * port_count -1", so decrease the count by 1
  1947. */
  1948. port_count--;
  1949. mport = (adapter->ioport | SDIO_MPA_ADDR_BASE |
  1950. (port_count << 8)) + card->mpa_tx.start_port;
  1951. } else {
  1952. mport = (adapter->ioport | SDIO_MPA_ADDR_BASE |
  1953. (card->mpa_tx.ports << 4)) +
  1954. card->mpa_tx.start_port;
  1955. }
  1956. if (card->mpa_tx.pkt_cnt == 1)
  1957. mport = adapter->ioport + card->mpa_tx.start_port;
  1958. ret = mwifiex_write_data_to_card(adapter, card->mpa_tx.buf,
  1959. card->mpa_tx.buf_len, mport);
  1960. /* Save the last multi port tx aggreagation info to debug log */
  1961. index = adapter->dbg.last_sdio_mp_index;
  1962. index = (index + 1) % MWIFIEX_DBG_SDIO_MP_NUM;
  1963. adapter->dbg.last_sdio_mp_index = index;
  1964. adapter->dbg.last_mp_wr_ports[index] = mport;
  1965. adapter->dbg.last_mp_wr_bitmap[index] = card->mp_wr_bitmap;
  1966. adapter->dbg.last_mp_wr_len[index] = card->mpa_tx.buf_len;
  1967. adapter->dbg.last_mp_curr_wr_port[index] = card->curr_wr_port;
  1968. MP_TX_AGGR_BUF_RESET(card);
  1969. }
  1970. tx_curr_single:
  1971. if (f_send_cur_buf) {
  1972. mwifiex_dbg(adapter, DATA,
  1973. "data: %s: send current buffer %d\n",
  1974. __func__, port);
  1975. ret = mwifiex_write_data_to_card(adapter, payload, pkt_len,
  1976. adapter->ioport + port);
  1977. }
  1978. if (f_postcopy_cur_buf) {
  1979. mwifiex_dbg(adapter, DATA,
  1980. "data: %s: postcopy current buffer\n",
  1981. __func__);
  1982. MP_TX_AGGR_BUF_PUT(card, payload, pkt_len, port);
  1983. }
  1984. return ret;
  1985. }
  1986. /*
  1987. * This function downloads data from driver to card.
  1988. *
  1989. * Both commands and data packets are transferred to the card by this
  1990. * function.
  1991. *
  1992. * This function adds the SDIO specific header to the front of the buffer
  1993. * before transferring. The header contains the length of the packet and
  1994. * the type. The firmware handles the packets based upon this set type.
  1995. */
  1996. static int mwifiex_sdio_host_to_card(struct mwifiex_adapter *adapter,
  1997. u8 type, struct sk_buff *skb,
  1998. struct mwifiex_tx_param *tx_param)
  1999. {
  2000. struct sdio_mmc_card *card = adapter->card;
  2001. int ret;
  2002. u32 buf_block_len;
  2003. u32 blk_size;
  2004. u32 port = CTRL_PORT;
  2005. u8 *payload = (u8 *)skb->data;
  2006. u32 pkt_len = skb->len;
  2007. /* Allocate buffer and copy payload */
  2008. blk_size = MWIFIEX_SDIO_BLOCK_SIZE;
  2009. buf_block_len = (pkt_len + blk_size - 1) / blk_size;
  2010. put_unaligned_le16((u16)pkt_len, payload + 0);
  2011. put_unaligned_le16((u32)type, payload + 2);
  2012. /*
  2013. * This is SDIO specific header
  2014. * u16 length,
  2015. * u16 type (MWIFIEX_TYPE_DATA = 0, MWIFIEX_TYPE_CMD = 1,
  2016. * MWIFIEX_TYPE_EVENT = 3)
  2017. */
  2018. if (type == MWIFIEX_TYPE_DATA) {
  2019. ret = mwifiex_get_wr_port_data(adapter, &port);
  2020. if (ret) {
  2021. mwifiex_dbg(adapter, ERROR,
  2022. "%s: no wr_port available\n",
  2023. __func__);
  2024. return ret;
  2025. }
  2026. } else {
  2027. adapter->cmd_sent = true;
  2028. /* Type must be MWIFIEX_TYPE_CMD */
  2029. if (pkt_len <= adapter->intf_hdr_len ||
  2030. pkt_len > MWIFIEX_UPLD_SIZE)
  2031. mwifiex_dbg(adapter, ERROR,
  2032. "%s: payload=%p, nb=%d\n",
  2033. __func__, payload, pkt_len);
  2034. if (card->supports_sdio_new_mode)
  2035. port = CMD_PORT_SLCT;
  2036. }
  2037. /* Transfer data to card */
  2038. pkt_len = buf_block_len * blk_size;
  2039. if (tx_param)
  2040. ret = mwifiex_host_to_card_mp_aggr(adapter, payload, pkt_len,
  2041. port, tx_param->next_pkt_len
  2042. );
  2043. else
  2044. ret = mwifiex_host_to_card_mp_aggr(adapter, payload, pkt_len,
  2045. port, 0);
  2046. if (ret) {
  2047. if (type == MWIFIEX_TYPE_CMD)
  2048. adapter->cmd_sent = false;
  2049. if (type == MWIFIEX_TYPE_DATA) {
  2050. adapter->data_sent = false;
  2051. /* restore curr_wr_port in error cases */
  2052. card->curr_wr_port = port;
  2053. card->mp_wr_bitmap |= (u32)(1 << card->curr_wr_port);
  2054. }
  2055. } else {
  2056. if (type == MWIFIEX_TYPE_DATA) {
  2057. if (!(card->mp_wr_bitmap & (1 << card->curr_wr_port)))
  2058. adapter->data_sent = true;
  2059. else
  2060. adapter->data_sent = false;
  2061. }
  2062. }
  2063. return ret;
  2064. }
  2065. /*
  2066. * This function allocates the MPA Tx and Rx buffers.
  2067. */
  2068. static int mwifiex_alloc_sdio_mpa_buffers(struct mwifiex_adapter *adapter,
  2069. u32 mpa_tx_buf_size, u32 mpa_rx_buf_size)
  2070. {
  2071. struct sdio_mmc_card *card = adapter->card;
  2072. u32 rx_buf_size;
  2073. int ret = 0;
  2074. card->mpa_tx.buf = kzalloc(mpa_tx_buf_size, GFP_KERNEL);
  2075. if (!card->mpa_tx.buf) {
  2076. ret = -1;
  2077. goto error;
  2078. }
  2079. card->mpa_tx.buf_size = mpa_tx_buf_size;
  2080. rx_buf_size = max_t(u32, mpa_rx_buf_size,
  2081. (u32)SDIO_MAX_AGGR_BUF_SIZE);
  2082. card->mpa_rx.buf = kzalloc(rx_buf_size, GFP_KERNEL);
  2083. if (!card->mpa_rx.buf) {
  2084. ret = -1;
  2085. goto error;
  2086. }
  2087. card->mpa_rx.buf_size = rx_buf_size;
  2088. error:
  2089. if (ret) {
  2090. kfree(card->mpa_tx.buf);
  2091. kfree(card->mpa_rx.buf);
  2092. card->mpa_tx.buf_size = 0;
  2093. card->mpa_rx.buf_size = 0;
  2094. card->mpa_tx.buf = NULL;
  2095. card->mpa_rx.buf = NULL;
  2096. }
  2097. return ret;
  2098. }
  2099. /*
  2100. * This function unregisters the SDIO device.
  2101. *
  2102. * The SDIO IRQ is released, the function is disabled and driver
  2103. * data is set to null.
  2104. */
  2105. static void
  2106. mwifiex_unregister_dev(struct mwifiex_adapter *adapter)
  2107. {
  2108. struct sdio_mmc_card *card = adapter->card;
  2109. if (adapter->card) {
  2110. card->adapter = NULL;
  2111. sdio_claim_host(card->func);
  2112. sdio_disable_func(card->func);
  2113. sdio_release_host(card->func);
  2114. }
  2115. }
  2116. /*
  2117. * This function registers the SDIO device.
  2118. *
  2119. * SDIO IRQ is claimed, block size is set and driver data is initialized.
  2120. */
  2121. static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
  2122. {
  2123. int ret;
  2124. struct sdio_mmc_card *card = adapter->card;
  2125. struct sdio_func *func = card->func;
  2126. const char *firmware = card->firmware;
  2127. /* save adapter pointer in card */
  2128. card->adapter = adapter;
  2129. adapter->tx_buf_size = card->tx_buf_size;
  2130. sdio_claim_host(func);
  2131. /* Set block size */
  2132. ret = sdio_set_block_size(card->func, MWIFIEX_SDIO_BLOCK_SIZE);
  2133. sdio_release_host(func);
  2134. if (ret) {
  2135. mwifiex_dbg(adapter, ERROR,
  2136. "cannot set SDIO block size\n");
  2137. return ret;
  2138. }
  2139. /* Select correct firmware (sdsd or sdiouart) firmware based on the strapping
  2140. * option
  2141. */
  2142. if (card->firmware_sdiouart) {
  2143. u8 val;
  2144. mwifiex_read_reg(adapter, card->reg->host_strap_reg, &val);
  2145. if ((val & card->reg->host_strap_mask) == card->reg->host_strap_value)
  2146. firmware = card->firmware_sdiouart;
  2147. }
  2148. strcpy(adapter->fw_name, firmware);
  2149. if (card->fw_dump_enh) {
  2150. adapter->mem_type_mapping_tbl = generic_mem_type_map;
  2151. adapter->num_mem_types = 1;
  2152. } else {
  2153. adapter->mem_type_mapping_tbl = mem_type_mapping_tbl;
  2154. adapter->num_mem_types = ARRAY_SIZE(mem_type_mapping_tbl);
  2155. }
  2156. return 0;
  2157. }
  2158. /*
  2159. * This function initializes the SDIO driver.
  2160. *
  2161. * The following initializations steps are followed -
  2162. * - Read the Host interrupt status register to acknowledge
  2163. * the first interrupt got from bootloader
  2164. * - Disable host interrupt mask register
  2165. * - Get SDIO port
  2166. * - Initialize SDIO variables in card
  2167. * - Allocate MP registers
  2168. * - Allocate MPA Tx and Rx buffers
  2169. */
  2170. static int mwifiex_init_sdio(struct mwifiex_adapter *adapter)
  2171. {
  2172. struct sdio_mmc_card *card = adapter->card;
  2173. const struct mwifiex_sdio_card_reg *reg = card->reg;
  2174. int ret;
  2175. u8 sdio_ireg;
  2176. sdio_set_drvdata(card->func, card);
  2177. /*
  2178. * Read the host_int_status_reg for ACK the first interrupt got
  2179. * from the bootloader. If we don't do this we get a interrupt
  2180. * as soon as we register the irq.
  2181. */
  2182. mwifiex_read_reg(adapter, card->reg->host_int_status_reg, &sdio_ireg);
  2183. /* Get SDIO ioport */
  2184. mwifiex_init_sdio_ioport(adapter);
  2185. /* Initialize SDIO variables in card */
  2186. card->mp_rd_bitmap = 0;
  2187. card->mp_wr_bitmap = 0;
  2188. card->curr_rd_port = reg->start_rd_port;
  2189. card->curr_wr_port = reg->start_wr_port;
  2190. card->mp_data_port_mask = reg->data_port_mask;
  2191. card->mpa_tx.buf_len = 0;
  2192. card->mpa_tx.pkt_cnt = 0;
  2193. card->mpa_tx.start_port = 0;
  2194. card->mpa_tx.enabled = 1;
  2195. card->mpa_tx.pkt_aggr_limit = card->mp_agg_pkt_limit;
  2196. card->mpa_rx.buf_len = 0;
  2197. card->mpa_rx.pkt_cnt = 0;
  2198. card->mpa_rx.start_port = 0;
  2199. card->mpa_rx.enabled = 1;
  2200. card->mpa_rx.pkt_aggr_limit = card->mp_agg_pkt_limit;
  2201. /* Allocate buffers for SDIO MP-A */
  2202. card->mp_regs = kzalloc(reg->max_mp_regs, GFP_KERNEL);
  2203. if (!card->mp_regs)
  2204. return -ENOMEM;
  2205. /* Allocate skb pointer buffers */
  2206. card->mpa_rx.skb_arr = kcalloc(card->mp_agg_pkt_limit, sizeof(void *),
  2207. GFP_KERNEL);
  2208. if (!card->mpa_rx.skb_arr) {
  2209. kfree(card->mp_regs);
  2210. return -ENOMEM;
  2211. }
  2212. card->mpa_rx.len_arr = kcalloc(card->mp_agg_pkt_limit,
  2213. sizeof(*card->mpa_rx.len_arr),
  2214. GFP_KERNEL);
  2215. if (!card->mpa_rx.len_arr) {
  2216. kfree(card->mp_regs);
  2217. kfree(card->mpa_rx.skb_arr);
  2218. return -ENOMEM;
  2219. }
  2220. ret = mwifiex_alloc_sdio_mpa_buffers(adapter,
  2221. card->mp_tx_agg_buf_size,
  2222. card->mp_rx_agg_buf_size);
  2223. /* Allocate 32k MPA Tx/Rx buffers if 64k memory allocation fails */
  2224. if (ret && (card->mp_tx_agg_buf_size == MWIFIEX_MP_AGGR_BUF_SIZE_MAX ||
  2225. card->mp_rx_agg_buf_size == MWIFIEX_MP_AGGR_BUF_SIZE_MAX)) {
  2226. /* Disable rx single port aggregation */
  2227. adapter->host_disable_sdio_rx_aggr = true;
  2228. ret = mwifiex_alloc_sdio_mpa_buffers
  2229. (adapter, MWIFIEX_MP_AGGR_BUF_SIZE_32K,
  2230. MWIFIEX_MP_AGGR_BUF_SIZE_32K);
  2231. if (ret) {
  2232. /* Disable multi port aggregation */
  2233. card->mpa_tx.enabled = 0;
  2234. card->mpa_rx.enabled = 0;
  2235. }
  2236. }
  2237. adapter->auto_tdls = card->can_auto_tdls;
  2238. adapter->ext_scan = card->can_ext_scan;
  2239. return 0;
  2240. }
  2241. /*
  2242. * This function resets the MPA Tx and Rx buffers.
  2243. */
  2244. static void mwifiex_cleanup_mpa_buf(struct mwifiex_adapter *adapter)
  2245. {
  2246. struct sdio_mmc_card *card = adapter->card;
  2247. MP_TX_AGGR_BUF_RESET(card);
  2248. MP_RX_AGGR_BUF_RESET(card);
  2249. }
  2250. /*
  2251. * This function cleans up the allocated card buffers.
  2252. *
  2253. * The following are freed by this function -
  2254. * - MP registers
  2255. * - MPA Tx buffer
  2256. * - MPA Rx buffer
  2257. */
  2258. static void mwifiex_cleanup_sdio(struct mwifiex_adapter *adapter)
  2259. {
  2260. struct sdio_mmc_card *card = adapter->card;
  2261. cancel_work_sync(&card->work);
  2262. kfree(card->mp_regs);
  2263. kfree(card->mpa_rx.skb_arr);
  2264. kfree(card->mpa_rx.len_arr);
  2265. kfree(card->mpa_tx.buf);
  2266. kfree(card->mpa_rx.buf);
  2267. }
  2268. /*
  2269. * This function updates the MP end port in card.
  2270. */
  2271. static void
  2272. mwifiex_update_mp_end_port(struct mwifiex_adapter *adapter, u16 port)
  2273. {
  2274. struct sdio_mmc_card *card = adapter->card;
  2275. const struct mwifiex_sdio_card_reg *reg = card->reg;
  2276. int i;
  2277. card->mp_end_port = port;
  2278. card->mp_data_port_mask = reg->data_port_mask;
  2279. if (reg->start_wr_port) {
  2280. for (i = 1; i <= card->max_ports - card->mp_end_port; i++)
  2281. card->mp_data_port_mask &=
  2282. ~(1 << (card->max_ports - i));
  2283. }
  2284. card->curr_wr_port = reg->start_wr_port;
  2285. mwifiex_dbg(adapter, CMD,
  2286. "cmd: mp_end_port %d, data port mask 0x%x\n",
  2287. port, card->mp_data_port_mask);
  2288. }
  2289. static void mwifiex_sdio_card_reset_work(struct mwifiex_adapter *adapter)
  2290. {
  2291. struct sdio_mmc_card *card = adapter->card;
  2292. struct sdio_func *func = card->func;
  2293. int ret;
  2294. /* Prepare the adapter for the reset. */
  2295. mwifiex_shutdown_sw(adapter);
  2296. clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags);
  2297. clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags);
  2298. /* Run a HW reset of the SDIO interface. */
  2299. sdio_claim_host(func);
  2300. ret = mmc_hw_reset(func->card);
  2301. sdio_release_host(func);
  2302. switch (ret) {
  2303. case 1:
  2304. dev_dbg(&func->dev, "SDIO HW reset asynchronous\n");
  2305. complete_all(adapter->fw_done);
  2306. break;
  2307. case 0:
  2308. ret = mwifiex_reinit_sw(adapter);
  2309. if (ret)
  2310. dev_err(&func->dev, "reinit failed: %d\n", ret);
  2311. break;
  2312. default:
  2313. dev_err(&func->dev, "SDIO HW reset failed: %d\n", ret);
  2314. break;
  2315. }
  2316. }
  2317. /* This function read/write firmware */
  2318. static enum
  2319. rdwr_status mwifiex_sdio_rdwr_firmware(struct mwifiex_adapter *adapter,
  2320. u8 doneflag)
  2321. {
  2322. struct sdio_mmc_card *card = adapter->card;
  2323. int ret, tries;
  2324. u8 ctrl_data = 0;
  2325. sdio_writeb(card->func, card->reg->fw_dump_host_ready,
  2326. card->reg->fw_dump_ctrl, &ret);
  2327. if (ret) {
  2328. mwifiex_dbg(adapter, ERROR, "SDIO Write ERR\n");
  2329. return RDWR_STATUS_FAILURE;
  2330. }
  2331. for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
  2332. ctrl_data = sdio_readb(card->func, card->reg->fw_dump_ctrl,
  2333. &ret);
  2334. if (ret) {
  2335. mwifiex_dbg(adapter, ERROR, "SDIO read err\n");
  2336. return RDWR_STATUS_FAILURE;
  2337. }
  2338. if (ctrl_data == FW_DUMP_DONE)
  2339. break;
  2340. if (doneflag && ctrl_data == doneflag)
  2341. return RDWR_STATUS_DONE;
  2342. if (ctrl_data != card->reg->fw_dump_host_ready) {
  2343. mwifiex_dbg(adapter, WARN,
  2344. "The ctrl reg was changed, re-try again\n");
  2345. sdio_writeb(card->func, card->reg->fw_dump_host_ready,
  2346. card->reg->fw_dump_ctrl, &ret);
  2347. if (ret) {
  2348. mwifiex_dbg(adapter, ERROR, "SDIO write err\n");
  2349. return RDWR_STATUS_FAILURE;
  2350. }
  2351. }
  2352. usleep_range(100, 200);
  2353. }
  2354. if (ctrl_data == card->reg->fw_dump_host_ready) {
  2355. mwifiex_dbg(adapter, ERROR,
  2356. "Fail to pull ctrl_data\n");
  2357. return RDWR_STATUS_FAILURE;
  2358. }
  2359. return RDWR_STATUS_SUCCESS;
  2360. }
  2361. /* This function dump firmware memory to file */
  2362. static void mwifiex_sdio_fw_dump(struct mwifiex_adapter *adapter)
  2363. {
  2364. struct sdio_mmc_card *card = adapter->card;
  2365. int ret = 0;
  2366. unsigned int reg, reg_start, reg_end;
  2367. u8 *dbg_ptr, *end_ptr, dump_num, idx, i, read_reg, doneflag = 0;
  2368. enum rdwr_status stat;
  2369. u32 memory_size;
  2370. if (!card->can_dump_fw)
  2371. return;
  2372. for (idx = 0; idx < ARRAY_SIZE(mem_type_mapping_tbl); idx++) {
  2373. struct memory_type_mapping *entry = &mem_type_mapping_tbl[idx];
  2374. if (entry->mem_ptr) {
  2375. vfree(entry->mem_ptr);
  2376. entry->mem_ptr = NULL;
  2377. }
  2378. entry->mem_size = 0;
  2379. }
  2380. mwifiex_pm_wakeup_card(adapter);
  2381. sdio_claim_host(card->func);
  2382. mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n");
  2383. stat = mwifiex_sdio_rdwr_firmware(adapter, doneflag);
  2384. if (stat == RDWR_STATUS_FAILURE)
  2385. goto done;
  2386. reg = card->reg->fw_dump_start;
  2387. /* Read the number of the memories which will dump */
  2388. dump_num = sdio_readb(card->func, reg, &ret);
  2389. if (ret) {
  2390. mwifiex_dbg(adapter, ERROR, "SDIO read memory length err\n");
  2391. goto done;
  2392. }
  2393. /* Read the length of every memory which will dump */
  2394. for (idx = 0; idx < dump_num; idx++) {
  2395. struct memory_type_mapping *entry = &mem_type_mapping_tbl[idx];
  2396. stat = mwifiex_sdio_rdwr_firmware(adapter, doneflag);
  2397. if (stat == RDWR_STATUS_FAILURE)
  2398. goto done;
  2399. memory_size = 0;
  2400. reg = card->reg->fw_dump_start;
  2401. for (i = 0; i < 4; i++) {
  2402. read_reg = sdio_readb(card->func, reg, &ret);
  2403. if (ret) {
  2404. mwifiex_dbg(adapter, ERROR, "SDIO read err\n");
  2405. goto done;
  2406. }
  2407. memory_size |= (read_reg << i*8);
  2408. reg++;
  2409. }
  2410. if (memory_size == 0) {
  2411. mwifiex_dbg(adapter, DUMP, "Firmware dump Finished!\n");
  2412. ret = mwifiex_write_reg(adapter,
  2413. card->reg->fw_dump_ctrl,
  2414. FW_DUMP_READ_DONE);
  2415. if (ret) {
  2416. mwifiex_dbg(adapter, ERROR, "SDIO write err\n");
  2417. return;
  2418. }
  2419. break;
  2420. }
  2421. mwifiex_dbg(adapter, DUMP,
  2422. "%s_SIZE=0x%x\n", entry->mem_name, memory_size);
  2423. entry->mem_ptr = vmalloc(memory_size + 1);
  2424. entry->mem_size = memory_size;
  2425. if (!entry->mem_ptr) {
  2426. mwifiex_dbg(adapter, ERROR, "Vmalloc %s failed\n",
  2427. entry->mem_name);
  2428. goto done;
  2429. }
  2430. dbg_ptr = entry->mem_ptr;
  2431. end_ptr = dbg_ptr + memory_size;
  2432. doneflag = entry->done_flag;
  2433. mwifiex_dbg(adapter, DUMP,
  2434. "Start %s output, please wait...\n",
  2435. entry->mem_name);
  2436. do {
  2437. stat = mwifiex_sdio_rdwr_firmware(adapter, doneflag);
  2438. if (stat == RDWR_STATUS_FAILURE)
  2439. goto done;
  2440. reg_start = card->reg->fw_dump_start;
  2441. reg_end = card->reg->fw_dump_end;
  2442. for (reg = reg_start; reg <= reg_end; reg++) {
  2443. *dbg_ptr = sdio_readb(card->func, reg, &ret);
  2444. if (ret) {
  2445. mwifiex_dbg(adapter, ERROR,
  2446. "SDIO read err\n");
  2447. goto done;
  2448. }
  2449. if (dbg_ptr < end_ptr)
  2450. dbg_ptr++;
  2451. else
  2452. mwifiex_dbg(adapter, ERROR,
  2453. "Allocated buf not enough\n");
  2454. }
  2455. if (stat != RDWR_STATUS_DONE)
  2456. continue;
  2457. mwifiex_dbg(adapter, DUMP, "%s done: size=0x%tx\n",
  2458. entry->mem_name, dbg_ptr - entry->mem_ptr);
  2459. break;
  2460. } while (1);
  2461. }
  2462. mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n");
  2463. done:
  2464. sdio_release_host(card->func);
  2465. }
  2466. static void mwifiex_sdio_generic_fw_dump(struct mwifiex_adapter *adapter)
  2467. {
  2468. struct sdio_mmc_card *card = adapter->card;
  2469. struct memory_type_mapping *entry = &generic_mem_type_map[0];
  2470. unsigned int reg, reg_start, reg_end;
  2471. u8 start_flag = 0, done_flag = 0;
  2472. u8 *dbg_ptr, *end_ptr;
  2473. enum rdwr_status stat;
  2474. int ret = -1, tries;
  2475. if (!card->fw_dump_enh)
  2476. return;
  2477. if (entry->mem_ptr) {
  2478. vfree(entry->mem_ptr);
  2479. entry->mem_ptr = NULL;
  2480. }
  2481. entry->mem_size = 0;
  2482. mwifiex_pm_wakeup_card(adapter);
  2483. sdio_claim_host(card->func);
  2484. mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n");
  2485. stat = mwifiex_sdio_rdwr_firmware(adapter, done_flag);
  2486. if (stat == RDWR_STATUS_FAILURE)
  2487. goto done;
  2488. reg_start = card->reg->fw_dump_start;
  2489. reg_end = card->reg->fw_dump_end;
  2490. for (reg = reg_start; reg <= reg_end; reg++) {
  2491. for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
  2492. start_flag = sdio_readb(card->func, reg, &ret);
  2493. if (ret) {
  2494. mwifiex_dbg(adapter, ERROR,
  2495. "SDIO read err\n");
  2496. goto done;
  2497. }
  2498. if (start_flag == 0)
  2499. break;
  2500. if (tries == MAX_POLL_TRIES) {
  2501. mwifiex_dbg(adapter, ERROR,
  2502. "FW not ready to dump\n");
  2503. ret = -1;
  2504. goto done;
  2505. }
  2506. }
  2507. usleep_range(100, 200);
  2508. }
  2509. entry->mem_ptr = vmalloc(0xf0000 + 1);
  2510. if (!entry->mem_ptr) {
  2511. ret = -1;
  2512. goto done;
  2513. }
  2514. dbg_ptr = entry->mem_ptr;
  2515. entry->mem_size = 0xf0000;
  2516. end_ptr = dbg_ptr + entry->mem_size;
  2517. done_flag = entry->done_flag;
  2518. mwifiex_dbg(adapter, DUMP,
  2519. "Start %s output, please wait...\n", entry->mem_name);
  2520. while (true) {
  2521. stat = mwifiex_sdio_rdwr_firmware(adapter, done_flag);
  2522. if (stat == RDWR_STATUS_FAILURE)
  2523. goto done;
  2524. for (reg = reg_start; reg <= reg_end; reg++) {
  2525. *dbg_ptr = sdio_readb(card->func, reg, &ret);
  2526. if (ret) {
  2527. mwifiex_dbg(adapter, ERROR,
  2528. "SDIO read err\n");
  2529. goto done;
  2530. }
  2531. dbg_ptr++;
  2532. if (dbg_ptr >= end_ptr) {
  2533. u8 *tmp_ptr;
  2534. tmp_ptr = vmalloc(entry->mem_size + 0x4000 + 1);
  2535. if (!tmp_ptr)
  2536. goto done;
  2537. memcpy(tmp_ptr, entry->mem_ptr,
  2538. entry->mem_size);
  2539. vfree(entry->mem_ptr);
  2540. entry->mem_ptr = tmp_ptr;
  2541. tmp_ptr = NULL;
  2542. dbg_ptr = entry->mem_ptr + entry->mem_size;
  2543. entry->mem_size += 0x4000;
  2544. end_ptr = entry->mem_ptr + entry->mem_size;
  2545. }
  2546. }
  2547. if (stat == RDWR_STATUS_DONE) {
  2548. entry->mem_size = dbg_ptr - entry->mem_ptr;
  2549. mwifiex_dbg(adapter, DUMP, "dump %s done size=0x%x\n",
  2550. entry->mem_name, entry->mem_size);
  2551. ret = 0;
  2552. break;
  2553. }
  2554. }
  2555. mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n");
  2556. done:
  2557. if (ret) {
  2558. mwifiex_dbg(adapter, ERROR, "firmware dump failed\n");
  2559. if (entry->mem_ptr) {
  2560. vfree(entry->mem_ptr);
  2561. entry->mem_ptr = NULL;
  2562. }
  2563. entry->mem_size = 0;
  2564. }
  2565. sdio_release_host(card->func);
  2566. }
  2567. static void mwifiex_sdio_device_dump_work(struct mwifiex_adapter *adapter)
  2568. {
  2569. struct sdio_mmc_card *card = adapter->card;
  2570. adapter->devdump_data = vzalloc(MWIFIEX_FW_DUMP_SIZE);
  2571. if (!adapter->devdump_data) {
  2572. mwifiex_dbg(adapter, ERROR,
  2573. "vzalloc devdump data failure!\n");
  2574. return;
  2575. }
  2576. mwifiex_drv_info_dump(adapter);
  2577. if (card->fw_dump_enh)
  2578. mwifiex_sdio_generic_fw_dump(adapter);
  2579. else
  2580. mwifiex_sdio_fw_dump(adapter);
  2581. mwifiex_prepare_fw_dump_info(adapter);
  2582. mwifiex_upload_device_dump(adapter);
  2583. }
  2584. static void mwifiex_sdio_work(struct work_struct *work)
  2585. {
  2586. struct sdio_mmc_card *card =
  2587. container_of(work, struct sdio_mmc_card, work);
  2588. if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
  2589. &card->work_flags))
  2590. mwifiex_sdio_device_dump_work(card->adapter);
  2591. if (test_and_clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET,
  2592. &card->work_flags))
  2593. mwifiex_sdio_card_reset_work(card->adapter);
  2594. }
  2595. /* This function resets the card */
  2596. static void mwifiex_sdio_card_reset(struct mwifiex_adapter *adapter)
  2597. {
  2598. struct sdio_mmc_card *card = adapter->card;
  2599. if (!test_and_set_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags))
  2600. schedule_work(&card->work);
  2601. }
  2602. /* This function dumps FW information */
  2603. static void mwifiex_sdio_device_dump(struct mwifiex_adapter *adapter)
  2604. {
  2605. struct sdio_mmc_card *card = adapter->card;
  2606. if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
  2607. &card->work_flags))
  2608. schedule_work(&card->work);
  2609. }
  2610. /* Function to dump SDIO function registers and SDIO scratch registers in case
  2611. * of FW crash
  2612. */
  2613. static int
  2614. mwifiex_sdio_reg_dump(struct mwifiex_adapter *adapter, char *drv_buf)
  2615. {
  2616. char *p = drv_buf;
  2617. struct sdio_mmc_card *cardp = adapter->card;
  2618. int ret = 0;
  2619. u8 count, func, data, index = 0, size = 0;
  2620. u8 reg, reg_start, reg_end;
  2621. char buf[256], *ptr;
  2622. if (!p)
  2623. return 0;
  2624. mwifiex_dbg(adapter, MSG, "SDIO register dump start\n");
  2625. mwifiex_pm_wakeup_card(adapter);
  2626. sdio_claim_host(cardp->func);
  2627. for (count = 0; count < 5; count++) {
  2628. memset(buf, 0, sizeof(buf));
  2629. ptr = buf;
  2630. switch (count) {
  2631. case 0:
  2632. /* Read the registers of SDIO function0 */
  2633. func = count;
  2634. reg_start = 0;
  2635. reg_end = 9;
  2636. break;
  2637. case 1:
  2638. /* Read the registers of SDIO function1 */
  2639. func = count;
  2640. reg_start = cardp->reg->func1_dump_reg_start;
  2641. reg_end = cardp->reg->func1_dump_reg_end;
  2642. break;
  2643. case 2:
  2644. index = 0;
  2645. func = 1;
  2646. reg_start = cardp->reg->func1_spec_reg_table[index++];
  2647. size = cardp->reg->func1_spec_reg_num;
  2648. reg_end = cardp->reg->func1_spec_reg_table[size-1];
  2649. break;
  2650. default:
  2651. /* Read the scratch registers of SDIO function1 */
  2652. if (count == 4)
  2653. mdelay(100);
  2654. func = 1;
  2655. reg_start = cardp->reg->func1_scratch_reg;
  2656. reg_end = reg_start + MWIFIEX_SDIO_SCRATCH_SIZE;
  2657. }
  2658. if (count != 2)
  2659. ptr += sprintf(ptr, "SDIO Func%d (%#x-%#x): ",
  2660. func, reg_start, reg_end);
  2661. else
  2662. ptr += sprintf(ptr, "SDIO Func%d: ", func);
  2663. for (reg = reg_start; reg <= reg_end;) {
  2664. if (func == 0)
  2665. data = sdio_f0_readb(cardp->func, reg, &ret);
  2666. else
  2667. data = sdio_readb(cardp->func, reg, &ret);
  2668. if (count == 2)
  2669. ptr += sprintf(ptr, "(%#x) ", reg);
  2670. if (!ret) {
  2671. ptr += sprintf(ptr, "%02x ", data);
  2672. } else {
  2673. ptr += sprintf(ptr, "ERR");
  2674. break;
  2675. }
  2676. if (count == 2 && reg < reg_end)
  2677. reg = cardp->reg->func1_spec_reg_table[index++];
  2678. else
  2679. reg++;
  2680. }
  2681. mwifiex_dbg(adapter, MSG, "%s\n", buf);
  2682. p += sprintf(p, "%s\n", buf);
  2683. }
  2684. sdio_release_host(cardp->func);
  2685. mwifiex_dbg(adapter, MSG, "SDIO register dump end\n");
  2686. return p - drv_buf;
  2687. }
  2688. /* sdio device/function initialization, code is extracted
  2689. * from init_if handler and register_dev handler.
  2690. */
  2691. static void mwifiex_sdio_up_dev(struct mwifiex_adapter *adapter)
  2692. {
  2693. struct sdio_mmc_card *card = adapter->card;
  2694. u8 sdio_ireg;
  2695. sdio_claim_host(card->func);
  2696. sdio_enable_func(card->func);
  2697. sdio_set_block_size(card->func, MWIFIEX_SDIO_BLOCK_SIZE);
  2698. sdio_release_host(card->func);
  2699. /* tx_buf_size might be changed to 3584 by firmware during
  2700. * data transfer, we will reset to default size.
  2701. */
  2702. adapter->tx_buf_size = card->tx_buf_size;
  2703. /* Read the host_int_status_reg for ACK the first interrupt got
  2704. * from the bootloader. If we don't do this we get a interrupt
  2705. * as soon as we register the irq.
  2706. */
  2707. mwifiex_read_reg(adapter, card->reg->host_int_status_reg, &sdio_ireg);
  2708. mwifiex_init_sdio_ioport(adapter);
  2709. }
  2710. static struct mwifiex_if_ops sdio_ops = {
  2711. .init_if = mwifiex_init_sdio,
  2712. .cleanup_if = mwifiex_cleanup_sdio,
  2713. .check_fw_status = mwifiex_check_fw_status,
  2714. .check_winner_status = mwifiex_check_winner_status,
  2715. .prog_fw = mwifiex_prog_fw_w_helper,
  2716. .register_dev = mwifiex_register_dev,
  2717. .unregister_dev = mwifiex_unregister_dev,
  2718. .enable_int = mwifiex_sdio_enable_host_int,
  2719. .disable_int = mwifiex_sdio_disable_host_int,
  2720. .process_int_status = mwifiex_process_int_status,
  2721. .host_to_card = mwifiex_sdio_host_to_card,
  2722. .wakeup = mwifiex_pm_wakeup_card,
  2723. .wakeup_complete = mwifiex_pm_wakeup_card_complete,
  2724. /* SDIO specific */
  2725. .update_mp_end_port = mwifiex_update_mp_end_port,
  2726. .cleanup_mpa_buf = mwifiex_cleanup_mpa_buf,
  2727. .cmdrsp_complete = mwifiex_sdio_cmdrsp_complete,
  2728. .event_complete = mwifiex_sdio_event_complete,
  2729. .dnld_fw = mwifiex_sdio_dnld_fw,
  2730. .card_reset = mwifiex_sdio_card_reset,
  2731. .reg_dump = mwifiex_sdio_reg_dump,
  2732. .device_dump = mwifiex_sdio_device_dump,
  2733. .deaggr_pkt = mwifiex_deaggr_sdio_pkt,
  2734. .up_dev = mwifiex_sdio_up_dev,
  2735. };
  2736. module_driver(mwifiex_sdio, sdio_register_driver, sdio_unregister_driver);
  2737. MODULE_AUTHOR("Marvell International Ltd.");
  2738. MODULE_DESCRIPTION("Marvell WiFi-Ex SDIO Driver version " SDIO_VERSION);
  2739. MODULE_VERSION(SDIO_VERSION);
  2740. MODULE_LICENSE("GPL v2");
  2741. MODULE_FIRMWARE(SD8786_DEFAULT_FW_NAME);
  2742. MODULE_FIRMWARE(SD8787_DEFAULT_FW_NAME);
  2743. MODULE_FIRMWARE(SD8797_DEFAULT_FW_NAME);
  2744. MODULE_FIRMWARE(SD8897_DEFAULT_FW_NAME);
  2745. MODULE_FIRMWARE(SD8887_DEFAULT_FW_NAME);
  2746. MODULE_FIRMWARE(SD8977_DEFAULT_FW_NAME);
  2747. MODULE_FIRMWARE(SD8987_DEFAULT_FW_NAME);
  2748. MODULE_FIRMWARE(SD8997_DEFAULT_FW_NAME);
  2749. MODULE_FIRMWARE(SD8997_SDIOUART_FW_NAME);