3945-mac.c 104 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /******************************************************************************
  3. *
  4. * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
  5. *
  6. * Portions of this file are derived from the ipw3945 project, as well
  7. * as portions of the ieee80211 subsystem header files.
  8. *
  9. * Contact Information:
  10. * Intel Linux Wireless <[email protected]>
  11. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  12. *
  13. *****************************************************************************/
  14. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/init.h>
  18. #include <linux/pci.h>
  19. #include <linux/slab.h>
  20. #include <linux/dma-mapping.h>
  21. #include <linux/delay.h>
  22. #include <linux/sched.h>
  23. #include <linux/skbuff.h>
  24. #include <linux/netdevice.h>
  25. #include <linux/firmware.h>
  26. #include <linux/etherdevice.h>
  27. #include <linux/if_arp.h>
  28. #include <net/ieee80211_radiotap.h>
  29. #include <net/mac80211.h>
  30. #include <asm/div64.h>
  31. #define DRV_NAME "iwl3945"
  32. #include "commands.h"
  33. #include "common.h"
  34. #include "3945.h"
  35. #include "iwl-spectrum.h"
  36. /*
  37. * module name, copyright, version, etc.
  38. */
  39. #define DRV_DESCRIPTION \
  40. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  41. #ifdef CONFIG_IWLEGACY_DEBUG
  42. #define VD "d"
  43. #else
  44. #define VD
  45. #endif
  46. /*
  47. * add "s" to indicate spectrum measurement included.
  48. * we add it here to be consistent with previous releases in which
  49. * this was configurable.
  50. */
  51. #define DRV_VERSION IWLWIFI_VERSION VD "s"
  52. #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation"
  53. #define DRV_AUTHOR "<[email protected]>"
  54. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  55. MODULE_VERSION(DRV_VERSION);
  56. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  57. MODULE_LICENSE("GPL");
  58. /* module parameters */
  59. struct il_mod_params il3945_mod_params = {
  60. .sw_crypto = 1,
  61. .restart_fw = 1,
  62. .disable_hw_scan = 1,
  63. /* the rest are 0 by default */
  64. };
  65. /**
  66. * il3945_get_antenna_flags - Get antenna flags for RXON command
  67. * @il: eeprom and antenna fields are used to determine antenna flags
  68. *
  69. * il->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  70. * il3945_mod_params.antenna specifies the antenna diversity mode:
  71. *
  72. * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  73. * IL_ANTENNA_MAIN - Force MAIN antenna
  74. * IL_ANTENNA_AUX - Force AUX antenna
  75. */
  76. __le32
  77. il3945_get_antenna_flags(const struct il_priv *il)
  78. {
  79. struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
  80. switch (il3945_mod_params.antenna) {
  81. case IL_ANTENNA_DIVERSITY:
  82. return 0;
  83. case IL_ANTENNA_MAIN:
  84. if (eeprom->antenna_switch_type)
  85. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  86. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  87. case IL_ANTENNA_AUX:
  88. if (eeprom->antenna_switch_type)
  89. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  90. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  91. }
  92. /* bad antenna selector value */
  93. IL_ERR("Bad antenna selector value (0x%x)\n",
  94. il3945_mod_params.antenna);
  95. return 0; /* "diversity" is default if error */
  96. }
  97. static int
  98. il3945_set_ccmp_dynamic_key_info(struct il_priv *il,
  99. struct ieee80211_key_conf *keyconf, u8 sta_id)
  100. {
  101. unsigned long flags;
  102. __le16 key_flags = 0;
  103. int ret;
  104. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  105. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  106. if (sta_id == il->hw_params.bcast_id)
  107. key_flags |= STA_KEY_MULTICAST_MSK;
  108. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  109. keyconf->hw_key_idx = keyconf->keyidx;
  110. key_flags &= ~STA_KEY_FLG_INVALID;
  111. spin_lock_irqsave(&il->sta_lock, flags);
  112. il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
  113. il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  114. memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen);
  115. memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen);
  116. if ((il->stations[sta_id].sta.key.
  117. key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
  118. il->stations[sta_id].sta.key.key_offset =
  119. il_get_free_ucode_key_idx(il);
  120. /* else, we are overriding an existing key => no need to allocated room
  121. * in uCode. */
  122. WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  123. "no space for a new key");
  124. il->stations[sta_id].sta.key.key_flags = key_flags;
  125. il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  126. il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  127. D_INFO("hwcrypto: modify ucode station key info\n");
  128. ret = il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC);
  129. spin_unlock_irqrestore(&il->sta_lock, flags);
  130. return ret;
  131. }
  132. static int
  133. il3945_set_tkip_dynamic_key_info(struct il_priv *il,
  134. struct ieee80211_key_conf *keyconf, u8 sta_id)
  135. {
  136. return -EOPNOTSUPP;
  137. }
  138. static int
  139. il3945_set_wep_dynamic_key_info(struct il_priv *il,
  140. struct ieee80211_key_conf *keyconf, u8 sta_id)
  141. {
  142. return -EOPNOTSUPP;
  143. }
  144. static int
  145. il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id)
  146. {
  147. unsigned long flags;
  148. struct il_addsta_cmd sta_cmd;
  149. spin_lock_irqsave(&il->sta_lock, flags);
  150. memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key));
  151. memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo));
  152. il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  153. il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  154. il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  155. memcpy(&sta_cmd, &il->stations[sta_id].sta,
  156. sizeof(struct il_addsta_cmd));
  157. spin_unlock_irqrestore(&il->sta_lock, flags);
  158. D_INFO("hwcrypto: clear ucode station key info\n");
  159. return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
  160. }
  161. static int
  162. il3945_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf,
  163. u8 sta_id)
  164. {
  165. int ret = 0;
  166. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  167. switch (keyconf->cipher) {
  168. case WLAN_CIPHER_SUITE_CCMP:
  169. ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id);
  170. break;
  171. case WLAN_CIPHER_SUITE_TKIP:
  172. ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id);
  173. break;
  174. case WLAN_CIPHER_SUITE_WEP40:
  175. case WLAN_CIPHER_SUITE_WEP104:
  176. ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id);
  177. break;
  178. default:
  179. IL_ERR("Unknown alg: %s alg=%x\n", __func__, keyconf->cipher);
  180. ret = -EINVAL;
  181. }
  182. D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
  183. keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret);
  184. return ret;
  185. }
  186. static int
  187. il3945_remove_static_key(struct il_priv *il)
  188. {
  189. return -EOPNOTSUPP;
  190. }
  191. static int
  192. il3945_set_static_key(struct il_priv *il, struct ieee80211_key_conf *key)
  193. {
  194. if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
  195. key->cipher == WLAN_CIPHER_SUITE_WEP104)
  196. return -EOPNOTSUPP;
  197. IL_ERR("Static key invalid: cipher %x\n", key->cipher);
  198. return -EINVAL;
  199. }
  200. static void
  201. il3945_clear_free_frames(struct il_priv *il)
  202. {
  203. struct list_head *element;
  204. D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count);
  205. while (!list_empty(&il->free_frames)) {
  206. element = il->free_frames.next;
  207. list_del(element);
  208. kfree(list_entry(element, struct il3945_frame, list));
  209. il->frames_count--;
  210. }
  211. if (il->frames_count) {
  212. IL_WARN("%d frames still in use. Did we lose one?\n",
  213. il->frames_count);
  214. il->frames_count = 0;
  215. }
  216. }
  217. static struct il3945_frame *
  218. il3945_get_free_frame(struct il_priv *il)
  219. {
  220. struct il3945_frame *frame;
  221. struct list_head *element;
  222. if (list_empty(&il->free_frames)) {
  223. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  224. if (!frame) {
  225. IL_ERR("Could not allocate frame!\n");
  226. return NULL;
  227. }
  228. il->frames_count++;
  229. return frame;
  230. }
  231. element = il->free_frames.next;
  232. list_del(element);
  233. return list_entry(element, struct il3945_frame, list);
  234. }
  235. static void
  236. il3945_free_frame(struct il_priv *il, struct il3945_frame *frame)
  237. {
  238. memset(frame, 0, sizeof(*frame));
  239. list_add(&frame->list, &il->free_frames);
  240. }
  241. unsigned int
  242. il3945_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr,
  243. int left)
  244. {
  245. if (!il_is_associated(il) || !il->beacon_skb)
  246. return 0;
  247. if (il->beacon_skb->len > left)
  248. return 0;
  249. memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len);
  250. return il->beacon_skb->len;
  251. }
  252. static int
  253. il3945_send_beacon_cmd(struct il_priv *il)
  254. {
  255. struct il3945_frame *frame;
  256. unsigned int frame_size;
  257. int rc;
  258. u8 rate;
  259. frame = il3945_get_free_frame(il);
  260. if (!frame) {
  261. IL_ERR("Could not obtain free frame buffer for beacon "
  262. "command.\n");
  263. return -ENOMEM;
  264. }
  265. rate = il_get_lowest_plcp(il);
  266. frame_size = il3945_hw_get_beacon_cmd(il, frame, rate);
  267. rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]);
  268. il3945_free_frame(il, frame);
  269. return rc;
  270. }
  271. static void
  272. il3945_unset_hw_params(struct il_priv *il)
  273. {
  274. if (il->_3945.shared_virt)
  275. dma_free_coherent(&il->pci_dev->dev,
  276. sizeof(struct il3945_shared),
  277. il->_3945.shared_virt, il->_3945.shared_phys);
  278. }
  279. static void
  280. il3945_build_tx_cmd_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info,
  281. struct il_device_cmd *cmd,
  282. struct sk_buff *skb_frag, int sta_id)
  283. {
  284. struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
  285. struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo;
  286. tx_cmd->sec_ctl = 0;
  287. switch (keyinfo->cipher) {
  288. case WLAN_CIPHER_SUITE_CCMP:
  289. tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
  290. memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
  291. D_TX("tx_cmd with AES hwcrypto\n");
  292. break;
  293. case WLAN_CIPHER_SUITE_TKIP:
  294. break;
  295. case WLAN_CIPHER_SUITE_WEP104:
  296. tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
  297. fallthrough;
  298. case WLAN_CIPHER_SUITE_WEP40:
  299. tx_cmd->sec_ctl |=
  300. TX_CMD_SEC_WEP | (info->control.hw_key->
  301. hw_key_idx & TX_CMD_SEC_MSK) <<
  302. TX_CMD_SEC_SHIFT;
  303. memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
  304. D_TX("Configuring packet for WEP encryption " "with key %d\n",
  305. info->control.hw_key->hw_key_idx);
  306. break;
  307. default:
  308. IL_ERR("Unknown encode cipher %x\n", keyinfo->cipher);
  309. break;
  310. }
  311. }
  312. /*
  313. * handle build C_TX command notification.
  314. */
  315. static void
  316. il3945_build_tx_cmd_basic(struct il_priv *il, struct il_device_cmd *cmd,
  317. struct ieee80211_tx_info *info,
  318. struct ieee80211_hdr *hdr, u8 std_id)
  319. {
  320. struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
  321. __le32 tx_flags = tx_cmd->tx_flags;
  322. __le16 fc = hdr->frame_control;
  323. tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  324. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  325. tx_flags |= TX_CMD_FLG_ACK_MSK;
  326. if (ieee80211_is_mgmt(fc))
  327. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  328. if (ieee80211_is_probe_resp(fc) &&
  329. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  330. tx_flags |= TX_CMD_FLG_TSF_MSK;
  331. } else {
  332. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  333. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  334. }
  335. tx_cmd->sta_id = std_id;
  336. if (ieee80211_has_morefrags(fc))
  337. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  338. if (ieee80211_is_data_qos(fc)) {
  339. u8 *qc = ieee80211_get_qos_ctl(hdr);
  340. tx_cmd->tid_tspec = qc[0] & 0xf;
  341. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  342. } else {
  343. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  344. }
  345. il_tx_cmd_protection(il, info, fc, &tx_flags);
  346. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  347. if (ieee80211_is_mgmt(fc)) {
  348. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  349. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
  350. else
  351. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
  352. } else {
  353. tx_cmd->timeout.pm_frame_timeout = 0;
  354. }
  355. tx_cmd->driver_txop = 0;
  356. tx_cmd->tx_flags = tx_flags;
  357. tx_cmd->next_frame_len = 0;
  358. }
  359. /*
  360. * start C_TX command process
  361. */
  362. static int
  363. il3945_tx_skb(struct il_priv *il,
  364. struct ieee80211_sta *sta,
  365. struct sk_buff *skb)
  366. {
  367. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  368. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  369. struct il3945_tx_cmd *tx_cmd;
  370. struct il_tx_queue *txq = NULL;
  371. struct il_queue *q = NULL;
  372. struct il_device_cmd *out_cmd;
  373. struct il_cmd_meta *out_meta;
  374. dma_addr_t phys_addr;
  375. dma_addr_t txcmd_phys;
  376. int txq_id = skb_get_queue_mapping(skb);
  377. u16 len, idx, hdr_len;
  378. u16 firstlen, secondlen;
  379. u8 sta_id;
  380. u8 tid = 0;
  381. __le16 fc;
  382. u8 wait_write_ptr = 0;
  383. unsigned long flags;
  384. spin_lock_irqsave(&il->lock, flags);
  385. if (il_is_rfkill(il)) {
  386. D_DROP("Dropping - RF KILL\n");
  387. goto drop_unlock;
  388. }
  389. if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) ==
  390. IL_INVALID_RATE) {
  391. IL_ERR("ERROR: No TX rate available.\n");
  392. goto drop_unlock;
  393. }
  394. fc = hdr->frame_control;
  395. #ifdef CONFIG_IWLEGACY_DEBUG
  396. if (ieee80211_is_auth(fc))
  397. D_TX("Sending AUTH frame\n");
  398. else if (ieee80211_is_assoc_req(fc))
  399. D_TX("Sending ASSOC frame\n");
  400. else if (ieee80211_is_reassoc_req(fc))
  401. D_TX("Sending REASSOC frame\n");
  402. #endif
  403. spin_unlock_irqrestore(&il->lock, flags);
  404. hdr_len = ieee80211_hdrlen(fc);
  405. /* Find idx into station table for destination station */
  406. sta_id = il_sta_id_or_broadcast(il, sta);
  407. if (sta_id == IL_INVALID_STATION) {
  408. D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1);
  409. goto drop;
  410. }
  411. D_RATE("station Id %d\n", sta_id);
  412. if (ieee80211_is_data_qos(fc)) {
  413. u8 *qc = ieee80211_get_qos_ctl(hdr);
  414. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  415. if (unlikely(tid >= MAX_TID_COUNT))
  416. goto drop;
  417. }
  418. /* Descriptor for chosen Tx queue */
  419. txq = &il->txq[txq_id];
  420. q = &txq->q;
  421. if ((il_queue_space(q) < q->high_mark))
  422. goto drop;
  423. spin_lock_irqsave(&il->lock, flags);
  424. idx = il_get_cmd_idx(q, q->write_ptr, 0);
  425. txq->skbs[q->write_ptr] = skb;
  426. /* Init first empty entry in queue's array of Tx/cmd buffers */
  427. out_cmd = txq->cmd[idx];
  428. out_meta = &txq->meta[idx];
  429. tx_cmd = (struct il3945_tx_cmd *)out_cmd->cmd.payload;
  430. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  431. memset(tx_cmd, 0, sizeof(*tx_cmd));
  432. /*
  433. * Set up the Tx-command (not MAC!) header.
  434. * Store the chosen Tx queue and TFD idx within the sequence field;
  435. * after Tx, uCode's Tx response will return this value so driver can
  436. * locate the frame within the tx queue and do post-tx processing.
  437. */
  438. out_cmd->hdr.cmd = C_TX;
  439. out_cmd->hdr.sequence =
  440. cpu_to_le16((u16)
  441. (QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr)));
  442. /* Copy MAC header from skb into command buffer */
  443. memcpy(tx_cmd->hdr, hdr, hdr_len);
  444. if (info->control.hw_key)
  445. il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id);
  446. /* TODO need this for burst mode later on */
  447. il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id);
  448. il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id);
  449. /* Total # bytes to be transmitted */
  450. tx_cmd->len = cpu_to_le16((u16) skb->len);
  451. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  452. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  453. /*
  454. * Use the first empty entry in this queue's command buffer array
  455. * to contain the Tx command and MAC header concatenated together
  456. * (payload data will be in another buffer).
  457. * Size of this varies, due to varying MAC header length.
  458. * If end is not dword aligned, we'll have 2 extra bytes at the end
  459. * of the MAC header (device reads on dword boundaries).
  460. * We'll tell device about this padding later.
  461. */
  462. len =
  463. sizeof(struct il3945_tx_cmd) + sizeof(struct il_cmd_header) +
  464. hdr_len;
  465. firstlen = (len + 3) & ~3;
  466. /* Physical address of this Tx command's header (not MAC header!),
  467. * within command buffer array. */
  468. txcmd_phys = dma_map_single(&il->pci_dev->dev, &out_cmd->hdr, firstlen,
  469. DMA_TO_DEVICE);
  470. if (unlikely(dma_mapping_error(&il->pci_dev->dev, txcmd_phys)))
  471. goto drop_unlock;
  472. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  473. * if any (802.11 null frames have no payload). */
  474. secondlen = skb->len - hdr_len;
  475. if (secondlen > 0) {
  476. phys_addr = dma_map_single(&il->pci_dev->dev, skb->data + hdr_len,
  477. secondlen, DMA_TO_DEVICE);
  478. if (unlikely(dma_mapping_error(&il->pci_dev->dev, phys_addr)))
  479. goto drop_unlock;
  480. }
  481. /* Add buffer containing Tx command and MAC(!) header to TFD's
  482. * first entry */
  483. il->ops->txq_attach_buf_to_tfd(il, txq, txcmd_phys, firstlen, 1, 0);
  484. dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
  485. dma_unmap_len_set(out_meta, len, firstlen);
  486. if (secondlen > 0)
  487. il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, secondlen, 0,
  488. U32_PAD(secondlen));
  489. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  490. txq->need_update = 1;
  491. } else {
  492. wait_write_ptr = 1;
  493. txq->need_update = 0;
  494. }
  495. il_update_stats(il, true, fc, skb->len);
  496. D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence));
  497. D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
  498. il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd));
  499. il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr,
  500. ieee80211_hdrlen(fc));
  501. /* Tell device the write idx *just past* this latest filled TFD */
  502. q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
  503. il_txq_update_write_ptr(il, txq);
  504. spin_unlock_irqrestore(&il->lock, flags);
  505. if (il_queue_space(q) < q->high_mark && il->mac80211_registered) {
  506. if (wait_write_ptr) {
  507. spin_lock_irqsave(&il->lock, flags);
  508. txq->need_update = 1;
  509. il_txq_update_write_ptr(il, txq);
  510. spin_unlock_irqrestore(&il->lock, flags);
  511. }
  512. il_stop_queue(il, txq);
  513. }
  514. return 0;
  515. drop_unlock:
  516. spin_unlock_irqrestore(&il->lock, flags);
  517. drop:
  518. return -1;
  519. }
  520. static int
  521. il3945_get_measurement(struct il_priv *il,
  522. struct ieee80211_measurement_params *params, u8 type)
  523. {
  524. struct il_spectrum_cmd spectrum;
  525. struct il_rx_pkt *pkt;
  526. struct il_host_cmd cmd = {
  527. .id = C_SPECTRUM_MEASUREMENT,
  528. .data = (void *)&spectrum,
  529. .flags = CMD_WANT_SKB,
  530. };
  531. u32 add_time = le64_to_cpu(params->start_time);
  532. int rc;
  533. int spectrum_resp_status;
  534. int duration = le16_to_cpu(params->duration);
  535. if (il_is_associated(il))
  536. add_time =
  537. il_usecs_to_beacons(il,
  538. le64_to_cpu(params->start_time) -
  539. il->_3945.last_tsf,
  540. le16_to_cpu(il->timing.beacon_interval));
  541. memset(&spectrum, 0, sizeof(spectrum));
  542. spectrum.channel_count = cpu_to_le16(1);
  543. spectrum.flags =
  544. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  545. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  546. cmd.len = sizeof(spectrum);
  547. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  548. if (il_is_associated(il))
  549. spectrum.start_time =
  550. il_add_beacon_time(il, il->_3945.last_beacon_time, add_time,
  551. le16_to_cpu(il->timing.beacon_interval));
  552. else
  553. spectrum.start_time = 0;
  554. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  555. spectrum.channels[0].channel = params->channel;
  556. spectrum.channels[0].type = type;
  557. if (il->active.flags & RXON_FLG_BAND_24G_MSK)
  558. spectrum.flags |=
  559. RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
  560. RXON_FLG_TGG_PROTECT_MSK;
  561. rc = il_send_cmd_sync(il, &cmd);
  562. if (rc)
  563. return rc;
  564. pkt = (struct il_rx_pkt *)cmd.reply_page;
  565. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  566. IL_ERR("Bad return from N_RX_ON_ASSOC command\n");
  567. rc = -EIO;
  568. }
  569. spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
  570. switch (spectrum_resp_status) {
  571. case 0: /* Command will be handled */
  572. if (pkt->u.spectrum.id != 0xff) {
  573. D_INFO("Replaced existing measurement: %d\n",
  574. pkt->u.spectrum.id);
  575. il->measurement_status &= ~MEASUREMENT_READY;
  576. }
  577. il->measurement_status |= MEASUREMENT_ACTIVE;
  578. rc = 0;
  579. break;
  580. case 1: /* Command will not be handled */
  581. rc = -EAGAIN;
  582. break;
  583. }
  584. il_free_pages(il, cmd.reply_page);
  585. return rc;
  586. }
  587. static void
  588. il3945_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb)
  589. {
  590. struct il_rx_pkt *pkt = rxb_addr(rxb);
  591. struct il_alive_resp *palive;
  592. struct delayed_work *pwork;
  593. palive = &pkt->u.alive_frame;
  594. D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n",
  595. palive->is_valid, palive->ver_type, palive->ver_subtype);
  596. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  597. D_INFO("Initialization Alive received.\n");
  598. memcpy(&il->card_alive_init, &pkt->u.alive_frame,
  599. sizeof(struct il_alive_resp));
  600. pwork = &il->init_alive_start;
  601. } else {
  602. D_INFO("Runtime Alive received.\n");
  603. memcpy(&il->card_alive, &pkt->u.alive_frame,
  604. sizeof(struct il_alive_resp));
  605. pwork = &il->alive_start;
  606. il3945_disable_events(il);
  607. }
  608. /* We delay the ALIVE response by 5ms to
  609. * give the HW RF Kill time to activate... */
  610. if (palive->is_valid == UCODE_VALID_OK)
  611. queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5));
  612. else
  613. IL_WARN("uCode did not respond OK.\n");
  614. }
  615. static void
  616. il3945_hdl_add_sta(struct il_priv *il, struct il_rx_buf *rxb)
  617. {
  618. struct il_rx_pkt *pkt = rxb_addr(rxb);
  619. D_RX("Received C_ADD_STA: 0x%02X\n", pkt->u.status);
  620. }
  621. static void
  622. il3945_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb)
  623. {
  624. struct il_rx_pkt *pkt = rxb_addr(rxb);
  625. struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  626. #ifdef CONFIG_IWLEGACY_DEBUG
  627. u8 rate = beacon->beacon_notify_hdr.rate;
  628. D_RX("beacon status %x retries %d iss %d " "tsf %d %d rate %d\n",
  629. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  630. beacon->beacon_notify_hdr.failure_frame,
  631. le32_to_cpu(beacon->ibss_mgr_status),
  632. le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate);
  633. #endif
  634. il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
  635. }
  636. /* Handle notification from uCode that card's power state is changing
  637. * due to software, hardware, or critical temperature RFKILL */
  638. static void
  639. il3945_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb)
  640. {
  641. struct il_rx_pkt *pkt = rxb_addr(rxb);
  642. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  643. unsigned long status = il->status;
  644. IL_WARN("Card state received: HW:%s SW:%s\n",
  645. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  646. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  647. _il_wr(il, CSR_UCODE_DRV_GP1_SET, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  648. if (flags & HW_CARD_DISABLED)
  649. set_bit(S_RFKILL, &il->status);
  650. else
  651. clear_bit(S_RFKILL, &il->status);
  652. il_scan_cancel(il);
  653. if ((test_bit(S_RFKILL, &status) !=
  654. test_bit(S_RFKILL, &il->status)))
  655. wiphy_rfkill_set_hw_state(il->hw->wiphy,
  656. test_bit(S_RFKILL, &il->status));
  657. else
  658. wake_up(&il->wait_command_queue);
  659. }
  660. /*
  661. * il3945_setup_handlers - Initialize Rx handler callbacks
  662. *
  663. * Setup the RX handlers for each of the reply types sent from the uCode
  664. * to the host.
  665. *
  666. * This function chains into the hardware specific files for them to setup
  667. * any hardware specific handlers as well.
  668. */
  669. static void
  670. il3945_setup_handlers(struct il_priv *il)
  671. {
  672. il->handlers[N_ALIVE] = il3945_hdl_alive;
  673. il->handlers[C_ADD_STA] = il3945_hdl_add_sta;
  674. il->handlers[N_ERROR] = il_hdl_error;
  675. il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa;
  676. il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement;
  677. il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep;
  678. il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats;
  679. il->handlers[N_BEACON] = il3945_hdl_beacon;
  680. /*
  681. * The same handler is used for both the REPLY to a discrete
  682. * stats request from the host as well as for the periodic
  683. * stats notifications (after received beacons) from the uCode.
  684. */
  685. il->handlers[C_STATS] = il3945_hdl_c_stats;
  686. il->handlers[N_STATS] = il3945_hdl_stats;
  687. il_setup_rx_scan_handlers(il);
  688. il->handlers[N_CARD_STATE] = il3945_hdl_card_state;
  689. /* Set up hardware specific Rx handlers */
  690. il3945_hw_handler_setup(il);
  691. }
  692. /************************** RX-FUNCTIONS ****************************/
  693. /*
  694. * Rx theory of operation
  695. *
  696. * The host allocates 32 DMA target addresses and passes the host address
  697. * to the firmware at register IL_RFDS_TBL_LOWER + N * RFD_SIZE where N is
  698. * 0 to 31
  699. *
  700. * Rx Queue Indexes
  701. * The host/firmware share two idx registers for managing the Rx buffers.
  702. *
  703. * The READ idx maps to the first position that the firmware may be writing
  704. * to -- the driver can read up to (but not including) this position and get
  705. * good data.
  706. * The READ idx is managed by the firmware once the card is enabled.
  707. *
  708. * The WRITE idx maps to the last position the driver has read from -- the
  709. * position preceding WRITE is the last slot the firmware can place a packet.
  710. *
  711. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  712. * WRITE = READ.
  713. *
  714. * During initialization, the host sets up the READ queue position to the first
  715. * IDX position, and WRITE to the last (READ - 1 wrapped)
  716. *
  717. * When the firmware places a packet in a buffer, it will advance the READ idx
  718. * and fire the RX interrupt. The driver can then query the READ idx and
  719. * process as many packets as possible, moving the WRITE idx forward as it
  720. * resets the Rx queue buffers with new memory.
  721. *
  722. * The management in the driver is as follows:
  723. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  724. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  725. * to replenish the iwl->rxq->rx_free.
  726. * + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  727. * iwl->rxq is replenished and the READ IDX is updated (updating the
  728. * 'processed' and 'read' driver idxes as well)
  729. * + A received packet is processed and handed to the kernel network stack,
  730. * detached from the iwl->rxq. The driver 'processed' idx is updated.
  731. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  732. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  733. * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
  734. * were enough free buffers and RX_STALLED is set it is cleared.
  735. *
  736. *
  737. * Driver sequence:
  738. *
  739. * il3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  740. * il3945_rx_queue_restock
  741. * il3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  742. * queue, updates firmware pointers, and updates
  743. * the WRITE idx. If insufficient rx_free buffers
  744. * are available, schedules il3945_rx_replenish
  745. *
  746. * -- enable interrupts --
  747. * ISR - il3945_rx() Detach il_rx_bufs from pool up to the
  748. * READ IDX, detaching the SKB from the pool.
  749. * Moves the packet buffer from queue to rx_used.
  750. * Calls il3945_rx_queue_restock to refill any empty
  751. * slots.
  752. * ...
  753. *
  754. */
  755. /*
  756. * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  757. */
  758. static inline __le32
  759. il3945_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr)
  760. {
  761. return cpu_to_le32((u32) dma_addr);
  762. }
  763. /*
  764. * il3945_rx_queue_restock - refill RX queue from pre-allocated pool
  765. *
  766. * If there are slots in the RX queue that need to be restocked,
  767. * and we have free pre-allocated buffers, fill the ranks as much
  768. * as we can, pulling from rx_free.
  769. *
  770. * This moves the 'write' idx forward to catch up with 'processed', and
  771. * also updates the memory address in the firmware to reference the new
  772. * target buffer.
  773. */
  774. static void
  775. il3945_rx_queue_restock(struct il_priv *il)
  776. {
  777. struct il_rx_queue *rxq = &il->rxq;
  778. struct list_head *element;
  779. struct il_rx_buf *rxb;
  780. unsigned long flags;
  781. spin_lock_irqsave(&rxq->lock, flags);
  782. while (il_rx_queue_space(rxq) > 0 && rxq->free_count) {
  783. /* Get next free Rx buffer, remove from free list */
  784. element = rxq->rx_free.next;
  785. rxb = list_entry(element, struct il_rx_buf, list);
  786. list_del(element);
  787. /* Point to Rx buffer via next RBD in circular buffer */
  788. rxq->bd[rxq->write] =
  789. il3945_dma_addr2rbd_ptr(il, rxb->page_dma);
  790. rxq->queue[rxq->write] = rxb;
  791. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  792. rxq->free_count--;
  793. }
  794. spin_unlock_irqrestore(&rxq->lock, flags);
  795. /* If the pre-allocated buffer pool is dropping low, schedule to
  796. * refill it */
  797. if (rxq->free_count <= RX_LOW_WATERMARK)
  798. queue_work(il->workqueue, &il->rx_replenish);
  799. /* If we've added more space for the firmware to place data, tell it.
  800. * Increment device's write pointer in multiples of 8. */
  801. if (rxq->write_actual != (rxq->write & ~0x7) ||
  802. abs(rxq->write - rxq->read) > 7) {
  803. spin_lock_irqsave(&rxq->lock, flags);
  804. rxq->need_update = 1;
  805. spin_unlock_irqrestore(&rxq->lock, flags);
  806. il_rx_queue_update_write_ptr(il, rxq);
  807. }
  808. }
  809. /*
  810. * il3945_rx_replenish - Move all used packet from rx_used to rx_free
  811. *
  812. * When moving to rx_free an SKB is allocated for the slot.
  813. *
  814. * Also restock the Rx queue via il3945_rx_queue_restock.
  815. * This is called as a scheduled work item (except for during initialization)
  816. */
  817. static void
  818. il3945_rx_allocate(struct il_priv *il, gfp_t priority)
  819. {
  820. struct il_rx_queue *rxq = &il->rxq;
  821. struct list_head *element;
  822. struct il_rx_buf *rxb;
  823. struct page *page;
  824. dma_addr_t page_dma;
  825. unsigned long flags;
  826. gfp_t gfp_mask = priority;
  827. while (1) {
  828. spin_lock_irqsave(&rxq->lock, flags);
  829. if (list_empty(&rxq->rx_used)) {
  830. spin_unlock_irqrestore(&rxq->lock, flags);
  831. return;
  832. }
  833. spin_unlock_irqrestore(&rxq->lock, flags);
  834. if (rxq->free_count > RX_LOW_WATERMARK)
  835. gfp_mask |= __GFP_NOWARN;
  836. if (il->hw_params.rx_page_order > 0)
  837. gfp_mask |= __GFP_COMP;
  838. /* Alloc a new receive buffer */
  839. page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
  840. if (!page) {
  841. if (net_ratelimit())
  842. D_INFO("Failed to allocate SKB buffer.\n");
  843. if (rxq->free_count <= RX_LOW_WATERMARK &&
  844. net_ratelimit())
  845. IL_ERR("Failed to allocate SKB buffer with %0x."
  846. "Only %u free buffers remaining.\n",
  847. priority, rxq->free_count);
  848. /* We don't reschedule replenish work here -- we will
  849. * call the restock method and if it still needs
  850. * more buffers it will schedule replenish */
  851. break;
  852. }
  853. /* Get physical address of RB/SKB */
  854. page_dma =
  855. dma_map_page(&il->pci_dev->dev, page, 0,
  856. PAGE_SIZE << il->hw_params.rx_page_order,
  857. DMA_FROM_DEVICE);
  858. if (unlikely(dma_mapping_error(&il->pci_dev->dev, page_dma))) {
  859. __free_pages(page, il->hw_params.rx_page_order);
  860. break;
  861. }
  862. spin_lock_irqsave(&rxq->lock, flags);
  863. if (list_empty(&rxq->rx_used)) {
  864. spin_unlock_irqrestore(&rxq->lock, flags);
  865. dma_unmap_page(&il->pci_dev->dev, page_dma,
  866. PAGE_SIZE << il->hw_params.rx_page_order,
  867. DMA_FROM_DEVICE);
  868. __free_pages(page, il->hw_params.rx_page_order);
  869. return;
  870. }
  871. element = rxq->rx_used.next;
  872. rxb = list_entry(element, struct il_rx_buf, list);
  873. list_del(element);
  874. rxb->page = page;
  875. rxb->page_dma = page_dma;
  876. list_add_tail(&rxb->list, &rxq->rx_free);
  877. rxq->free_count++;
  878. il->alloc_rxb_page++;
  879. spin_unlock_irqrestore(&rxq->lock, flags);
  880. }
  881. }
  882. void
  883. il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
  884. {
  885. unsigned long flags;
  886. int i;
  887. spin_lock_irqsave(&rxq->lock, flags);
  888. INIT_LIST_HEAD(&rxq->rx_free);
  889. INIT_LIST_HEAD(&rxq->rx_used);
  890. /* Fill the rx_used queue with _all_ of the Rx buffers */
  891. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  892. /* In the reset function, these buffers may have been allocated
  893. * to an SKB, so we need to unmap and free potential storage */
  894. if (rxq->pool[i].page != NULL) {
  895. dma_unmap_page(&il->pci_dev->dev,
  896. rxq->pool[i].page_dma,
  897. PAGE_SIZE << il->hw_params.rx_page_order,
  898. DMA_FROM_DEVICE);
  899. __il_free_pages(il, rxq->pool[i].page);
  900. rxq->pool[i].page = NULL;
  901. }
  902. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  903. }
  904. /* Set us so that we have processed and used all buffers, but have
  905. * not restocked the Rx queue with fresh buffers */
  906. rxq->read = rxq->write = 0;
  907. rxq->write_actual = 0;
  908. rxq->free_count = 0;
  909. spin_unlock_irqrestore(&rxq->lock, flags);
  910. }
  911. void
  912. il3945_rx_replenish(void *data)
  913. {
  914. struct il_priv *il = data;
  915. unsigned long flags;
  916. il3945_rx_allocate(il, GFP_KERNEL);
  917. spin_lock_irqsave(&il->lock, flags);
  918. il3945_rx_queue_restock(il);
  919. spin_unlock_irqrestore(&il->lock, flags);
  920. }
  921. static void
  922. il3945_rx_replenish_now(struct il_priv *il)
  923. {
  924. il3945_rx_allocate(il, GFP_ATOMIC);
  925. il3945_rx_queue_restock(il);
  926. }
  927. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  928. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  929. * This free routine walks the list of POOL entries and if SKB is set to
  930. * non NULL it is unmapped and freed
  931. */
  932. static void
  933. il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
  934. {
  935. int i;
  936. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  937. if (rxq->pool[i].page != NULL) {
  938. dma_unmap_page(&il->pci_dev->dev,
  939. rxq->pool[i].page_dma,
  940. PAGE_SIZE << il->hw_params.rx_page_order,
  941. DMA_FROM_DEVICE);
  942. __il_free_pages(il, rxq->pool[i].page);
  943. rxq->pool[i].page = NULL;
  944. }
  945. }
  946. dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  947. rxq->bd_dma);
  948. dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
  949. rxq->rb_stts, rxq->rb_stts_dma);
  950. rxq->bd = NULL;
  951. rxq->rb_stts = NULL;
  952. }
  953. /* Convert linear signal-to-noise ratio into dB */
  954. static u8 ratio2dB[100] = {
  955. /* 0 1 2 3 4 5 6 7 8 9 */
  956. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  957. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  958. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  959. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  960. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  961. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  962. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  963. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  964. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  965. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  966. };
  967. /* Calculates a relative dB value from a ratio of linear
  968. * (i.e. not dB) signal levels.
  969. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  970. int
  971. il3945_calc_db_from_ratio(int sig_ratio)
  972. {
  973. /* 1000:1 or higher just report as 60 dB */
  974. if (sig_ratio >= 1000)
  975. return 60;
  976. /* 100:1 or higher, divide by 10 and use table,
  977. * add 20 dB to make up for divide by 10 */
  978. if (sig_ratio >= 100)
  979. return 20 + (int)ratio2dB[sig_ratio / 10];
  980. /* We shouldn't see this */
  981. if (sig_ratio < 1)
  982. return 0;
  983. /* Use table for ratios 1:1 - 99:1 */
  984. return (int)ratio2dB[sig_ratio];
  985. }
  986. /*
  987. * il3945_rx_handle - Main entry function for receiving responses from uCode
  988. *
  989. * Uses the il->handlers callback function array to invoke
  990. * the appropriate handlers, including command responses,
  991. * frame-received notifications, and other notifications.
  992. */
  993. static void
  994. il3945_rx_handle(struct il_priv *il)
  995. {
  996. struct il_rx_buf *rxb;
  997. struct il_rx_pkt *pkt;
  998. struct il_rx_queue *rxq = &il->rxq;
  999. u32 r, i;
  1000. int reclaim;
  1001. unsigned long flags;
  1002. u8 fill_rx = 0;
  1003. u32 count = 8;
  1004. int total_empty = 0;
  1005. /* uCode's read idx (stored in shared DRAM) indicates the last Rx
  1006. * buffer that the driver may process (last buffer filled by ucode). */
  1007. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1008. i = rxq->read;
  1009. /* calculate total frames need to be restock after handling RX */
  1010. total_empty = r - rxq->write_actual;
  1011. if (total_empty < 0)
  1012. total_empty += RX_QUEUE_SIZE;
  1013. if (total_empty > (RX_QUEUE_SIZE / 2))
  1014. fill_rx = 1;
  1015. /* Rx interrupt, but nothing sent from uCode */
  1016. if (i == r)
  1017. D_RX("r = %d, i = %d\n", r, i);
  1018. while (i != r) {
  1019. int len;
  1020. rxb = rxq->queue[i];
  1021. /* If an RXB doesn't have a Rx queue slot associated with it,
  1022. * then a bug has been introduced in the queue refilling
  1023. * routines -- catch it here */
  1024. BUG_ON(rxb == NULL);
  1025. rxq->queue[i] = NULL;
  1026. dma_unmap_page(&il->pci_dev->dev, rxb->page_dma,
  1027. PAGE_SIZE << il->hw_params.rx_page_order,
  1028. DMA_FROM_DEVICE);
  1029. pkt = rxb_addr(rxb);
  1030. len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
  1031. len += sizeof(u32); /* account for status word */
  1032. reclaim = il_need_reclaim(il, pkt);
  1033. /* Based on type of command response or notification,
  1034. * handle those that need handling via function in
  1035. * handlers table. See il3945_setup_handlers() */
  1036. if (il->handlers[pkt->hdr.cmd]) {
  1037. D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i,
  1038. il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1039. il->isr_stats.handlers[pkt->hdr.cmd]++;
  1040. il->handlers[pkt->hdr.cmd] (il, rxb);
  1041. } else {
  1042. /* No handling needed */
  1043. D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r,
  1044. i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1045. }
  1046. /*
  1047. * XXX: After here, we should always check rxb->page
  1048. * against NULL before touching it or its virtual
  1049. * memory (pkt). Because some handler might have
  1050. * already taken or freed the pages.
  1051. */
  1052. if (reclaim) {
  1053. /* Invoke any callbacks, transfer the buffer to caller,
  1054. * and fire off the (possibly) blocking il_send_cmd()
  1055. * as we reclaim the driver command queue */
  1056. if (rxb->page)
  1057. il_tx_cmd_complete(il, rxb);
  1058. else
  1059. IL_WARN("Claim null rxb?\n");
  1060. }
  1061. /* Reuse the page if possible. For notification packets and
  1062. * SKBs that fail to Rx correctly, add them back into the
  1063. * rx_free list for reuse later. */
  1064. spin_lock_irqsave(&rxq->lock, flags);
  1065. if (rxb->page != NULL) {
  1066. rxb->page_dma =
  1067. dma_map_page(&il->pci_dev->dev, rxb->page, 0,
  1068. PAGE_SIZE << il->hw_params.rx_page_order,
  1069. DMA_FROM_DEVICE);
  1070. if (unlikely(dma_mapping_error(&il->pci_dev->dev,
  1071. rxb->page_dma))) {
  1072. __il_free_pages(il, rxb->page);
  1073. rxb->page = NULL;
  1074. list_add_tail(&rxb->list, &rxq->rx_used);
  1075. } else {
  1076. list_add_tail(&rxb->list, &rxq->rx_free);
  1077. rxq->free_count++;
  1078. }
  1079. } else
  1080. list_add_tail(&rxb->list, &rxq->rx_used);
  1081. spin_unlock_irqrestore(&rxq->lock, flags);
  1082. i = (i + 1) & RX_QUEUE_MASK;
  1083. /* If there are a lot of unused frames,
  1084. * restock the Rx queue so ucode won't assert. */
  1085. if (fill_rx) {
  1086. count++;
  1087. if (count >= 8) {
  1088. rxq->read = i;
  1089. il3945_rx_replenish_now(il);
  1090. count = 0;
  1091. }
  1092. }
  1093. }
  1094. /* Backtrack one entry */
  1095. rxq->read = i;
  1096. if (fill_rx)
  1097. il3945_rx_replenish_now(il);
  1098. else
  1099. il3945_rx_queue_restock(il);
  1100. }
  1101. /* call this function to flush any scheduled tasklet */
  1102. static inline void
  1103. il3945_synchronize_irq(struct il_priv *il)
  1104. {
  1105. /* wait to make sure we flush pending tasklet */
  1106. synchronize_irq(il->pci_dev->irq);
  1107. tasklet_kill(&il->irq_tasklet);
  1108. }
  1109. static const char *
  1110. il3945_desc_lookup(int i)
  1111. {
  1112. switch (i) {
  1113. case 1:
  1114. return "FAIL";
  1115. case 2:
  1116. return "BAD_PARAM";
  1117. case 3:
  1118. return "BAD_CHECKSUM";
  1119. case 4:
  1120. return "NMI_INTERRUPT";
  1121. case 5:
  1122. return "SYSASSERT";
  1123. case 6:
  1124. return "FATAL_ERROR";
  1125. }
  1126. return "UNKNOWN";
  1127. }
  1128. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1129. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1130. void
  1131. il3945_dump_nic_error_log(struct il_priv *il)
  1132. {
  1133. u32 i;
  1134. u32 desc, time, count, base, data1;
  1135. u32 blink1, blink2, ilink1, ilink2;
  1136. base = le32_to_cpu(il->card_alive.error_event_table_ptr);
  1137. if (!il3945_hw_valid_rtc_data_addr(base)) {
  1138. IL_ERR("Not valid error log pointer 0x%08X\n", base);
  1139. return;
  1140. }
  1141. count = il_read_targ_mem(il, base);
  1142. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1143. IL_ERR("Start IWL Error Log Dump:\n");
  1144. IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count);
  1145. }
  1146. IL_ERR("Desc Time asrtPC blink2 "
  1147. "ilink1 nmiPC Line\n");
  1148. for (i = ERROR_START_OFFSET;
  1149. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1150. i += ERROR_ELEM_SIZE) {
  1151. desc = il_read_targ_mem(il, base + i);
  1152. time = il_read_targ_mem(il, base + i + 1 * sizeof(u32));
  1153. blink1 = il_read_targ_mem(il, base + i + 2 * sizeof(u32));
  1154. blink2 = il_read_targ_mem(il, base + i + 3 * sizeof(u32));
  1155. ilink1 = il_read_targ_mem(il, base + i + 4 * sizeof(u32));
  1156. ilink2 = il_read_targ_mem(il, base + i + 5 * sizeof(u32));
  1157. data1 = il_read_targ_mem(il, base + i + 6 * sizeof(u32));
  1158. IL_ERR("%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1159. il3945_desc_lookup(desc), desc, time, blink1, blink2,
  1160. ilink1, ilink2, data1);
  1161. }
  1162. }
  1163. static void
  1164. il3945_irq_tasklet(struct tasklet_struct *t)
  1165. {
  1166. struct il_priv *il = from_tasklet(il, t, irq_tasklet);
  1167. u32 inta, handled = 0;
  1168. u32 inta_fh;
  1169. unsigned long flags;
  1170. #ifdef CONFIG_IWLEGACY_DEBUG
  1171. u32 inta_mask;
  1172. #endif
  1173. spin_lock_irqsave(&il->lock, flags);
  1174. /* Ack/clear/reset pending uCode interrupts.
  1175. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1176. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1177. inta = _il_rd(il, CSR_INT);
  1178. _il_wr(il, CSR_INT, inta);
  1179. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1180. * Any new interrupts that happen after this, either while we're
  1181. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1182. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  1183. _il_wr(il, CSR_FH_INT_STATUS, inta_fh);
  1184. #ifdef CONFIG_IWLEGACY_DEBUG
  1185. if (il_get_debug_level(il) & IL_DL_ISR) {
  1186. /* just for debug */
  1187. inta_mask = _il_rd(il, CSR_INT_MASK);
  1188. D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta,
  1189. inta_mask, inta_fh);
  1190. }
  1191. #endif
  1192. spin_unlock_irqrestore(&il->lock, flags);
  1193. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1194. * atomic, make sure that inta covers all the interrupts that
  1195. * we've discovered, even if FH interrupt came in just after
  1196. * reading CSR_INT. */
  1197. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1198. inta |= CSR_INT_BIT_FH_RX;
  1199. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1200. inta |= CSR_INT_BIT_FH_TX;
  1201. /* Now service all interrupt bits discovered above. */
  1202. if (inta & CSR_INT_BIT_HW_ERR) {
  1203. IL_ERR("Hardware error detected. Restarting.\n");
  1204. /* Tell the device to stop sending interrupts */
  1205. il_disable_interrupts(il);
  1206. il->isr_stats.hw++;
  1207. il_irq_handle_error(il);
  1208. handled |= CSR_INT_BIT_HW_ERR;
  1209. return;
  1210. }
  1211. #ifdef CONFIG_IWLEGACY_DEBUG
  1212. if (il_get_debug_level(il) & (IL_DL_ISR)) {
  1213. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1214. if (inta & CSR_INT_BIT_SCD) {
  1215. D_ISR("Scheduler finished to transmit "
  1216. "the frame/frames.\n");
  1217. il->isr_stats.sch++;
  1218. }
  1219. /* Alive notification via Rx interrupt will do the real work */
  1220. if (inta & CSR_INT_BIT_ALIVE) {
  1221. D_ISR("Alive interrupt\n");
  1222. il->isr_stats.alive++;
  1223. }
  1224. }
  1225. #endif
  1226. /* Safely ignore these bits for debug checks below */
  1227. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1228. /* Error detected by uCode */
  1229. if (inta & CSR_INT_BIT_SW_ERR) {
  1230. IL_ERR("Microcode SW error detected. " "Restarting 0x%X.\n",
  1231. inta);
  1232. il->isr_stats.sw++;
  1233. il_irq_handle_error(il);
  1234. handled |= CSR_INT_BIT_SW_ERR;
  1235. }
  1236. /* uCode wakes up after power-down sleep */
  1237. if (inta & CSR_INT_BIT_WAKEUP) {
  1238. D_ISR("Wakeup interrupt\n");
  1239. il_rx_queue_update_write_ptr(il, &il->rxq);
  1240. spin_lock_irqsave(&il->lock, flags);
  1241. il_txq_update_write_ptr(il, &il->txq[0]);
  1242. il_txq_update_write_ptr(il, &il->txq[1]);
  1243. il_txq_update_write_ptr(il, &il->txq[2]);
  1244. il_txq_update_write_ptr(il, &il->txq[3]);
  1245. il_txq_update_write_ptr(il, &il->txq[4]);
  1246. spin_unlock_irqrestore(&il->lock, flags);
  1247. il->isr_stats.wakeup++;
  1248. handled |= CSR_INT_BIT_WAKEUP;
  1249. }
  1250. /* All uCode command responses, including Tx command responses,
  1251. * Rx "responses" (frame-received notification), and other
  1252. * notifications from uCode come through here*/
  1253. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1254. il3945_rx_handle(il);
  1255. il->isr_stats.rx++;
  1256. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1257. }
  1258. if (inta & CSR_INT_BIT_FH_TX) {
  1259. D_ISR("Tx interrupt\n");
  1260. il->isr_stats.tx++;
  1261. _il_wr(il, CSR_FH_INT_STATUS, (1 << 6));
  1262. il_wr(il, FH39_TCSR_CREDIT(FH39_SRVC_CHNL), 0x0);
  1263. handled |= CSR_INT_BIT_FH_TX;
  1264. }
  1265. if (inta & ~handled) {
  1266. IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1267. il->isr_stats.unhandled++;
  1268. }
  1269. if (inta & ~il->inta_mask) {
  1270. IL_WARN("Disabled INTA bits 0x%08x were pending\n",
  1271. inta & ~il->inta_mask);
  1272. IL_WARN(" with inta_fh = 0x%08x\n", inta_fh);
  1273. }
  1274. /* Re-enable all interrupts */
  1275. /* only Re-enable if disabled by irq */
  1276. if (test_bit(S_INT_ENABLED, &il->status))
  1277. il_enable_interrupts(il);
  1278. #ifdef CONFIG_IWLEGACY_DEBUG
  1279. if (il_get_debug_level(il) & (IL_DL_ISR)) {
  1280. inta = _il_rd(il, CSR_INT);
  1281. inta_mask = _il_rd(il, CSR_INT_MASK);
  1282. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  1283. D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1284. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1285. }
  1286. #endif
  1287. }
  1288. static int
  1289. il3945_get_channels_for_scan(struct il_priv *il, enum nl80211_band band,
  1290. u8 is_active, u8 n_probes,
  1291. struct il3945_scan_channel *scan_ch,
  1292. struct ieee80211_vif *vif)
  1293. {
  1294. struct ieee80211_channel *chan;
  1295. const struct ieee80211_supported_band *sband;
  1296. const struct il_channel_info *ch_info;
  1297. u16 passive_dwell = 0;
  1298. u16 active_dwell = 0;
  1299. int added, i;
  1300. sband = il_get_hw_mode(il, band);
  1301. if (!sband)
  1302. return 0;
  1303. active_dwell = il_get_active_dwell_time(il, band, n_probes);
  1304. passive_dwell = il_get_passive_dwell_time(il, band, vif);
  1305. if (passive_dwell <= active_dwell)
  1306. passive_dwell = active_dwell + 1;
  1307. for (i = 0, added = 0; i < il->scan_request->n_channels; i++) {
  1308. chan = il->scan_request->channels[i];
  1309. if (chan->band != band)
  1310. continue;
  1311. scan_ch->channel = chan->hw_value;
  1312. ch_info = il_get_channel_info(il, band, scan_ch->channel);
  1313. if (!il_is_channel_valid(ch_info)) {
  1314. D_SCAN("Channel %d is INVALID for this band.\n",
  1315. scan_ch->channel);
  1316. continue;
  1317. }
  1318. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1319. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1320. /* If passive , set up for auto-switch
  1321. * and use long active_dwell time.
  1322. */
  1323. if (!is_active || il_is_channel_passive(ch_info) ||
  1324. (chan->flags & IEEE80211_CHAN_NO_IR)) {
  1325. scan_ch->type = 0; /* passive */
  1326. if (IL_UCODE_API(il->ucode_ver) == 1)
  1327. scan_ch->active_dwell =
  1328. cpu_to_le16(passive_dwell - 1);
  1329. } else {
  1330. scan_ch->type = 1; /* active */
  1331. }
  1332. /* Set direct probe bits. These may be used both for active
  1333. * scan channels (probes gets sent right away),
  1334. * or for passive channels (probes get se sent only after
  1335. * hearing clear Rx packet).*/
  1336. if (IL_UCODE_API(il->ucode_ver) >= 2) {
  1337. if (n_probes)
  1338. scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
  1339. } else {
  1340. /* uCode v1 does not allow setting direct probe bits on
  1341. * passive channel. */
  1342. if ((scan_ch->type & 1) && n_probes)
  1343. scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
  1344. }
  1345. /* Set txpower levels to defaults */
  1346. scan_ch->tpc.dsp_atten = 110;
  1347. /* scan_pwr_info->tpc.dsp_atten; */
  1348. /*scan_pwr_info->tpc.tx_gain; */
  1349. if (band == NL80211_BAND_5GHZ)
  1350. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1351. else {
  1352. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1353. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1354. * power level:
  1355. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1356. */
  1357. }
  1358. D_SCAN("Scanning %d [%s %d]\n", scan_ch->channel,
  1359. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1360. (scan_ch->type & 1) ? active_dwell : passive_dwell);
  1361. scan_ch++;
  1362. added++;
  1363. }
  1364. D_SCAN("total channels to scan %d\n", added);
  1365. return added;
  1366. }
  1367. static void
  1368. il3945_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates)
  1369. {
  1370. int i;
  1371. for (i = 0; i < RATE_COUNT_LEGACY; i++) {
  1372. rates[i].bitrate = il3945_rates[i].ieee * 5;
  1373. rates[i].hw_value = i; /* Rate scaling will work on idxes */
  1374. rates[i].hw_value_short = i;
  1375. rates[i].flags = 0;
  1376. if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) {
  1377. /*
  1378. * If CCK != 1M then set short preamble rate flag.
  1379. */
  1380. rates[i].flags |=
  1381. (il3945_rates[i].plcp ==
  1382. 10) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1383. }
  1384. }
  1385. }
  1386. /******************************************************************************
  1387. *
  1388. * uCode download functions
  1389. *
  1390. ******************************************************************************/
  1391. static void
  1392. il3945_dealloc_ucode_pci(struct il_priv *il)
  1393. {
  1394. il_free_fw_desc(il->pci_dev, &il->ucode_code);
  1395. il_free_fw_desc(il->pci_dev, &il->ucode_data);
  1396. il_free_fw_desc(il->pci_dev, &il->ucode_data_backup);
  1397. il_free_fw_desc(il->pci_dev, &il->ucode_init);
  1398. il_free_fw_desc(il->pci_dev, &il->ucode_init_data);
  1399. il_free_fw_desc(il->pci_dev, &il->ucode_boot);
  1400. }
  1401. /*
  1402. * il3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1403. * looking at all data.
  1404. */
  1405. static int
  1406. il3945_verify_inst_full(struct il_priv *il, __le32 * image, u32 len)
  1407. {
  1408. u32 val;
  1409. u32 save_len = len;
  1410. int rc = 0;
  1411. u32 errcnt;
  1412. D_INFO("ucode inst image size is %u\n", len);
  1413. il_wr(il, HBUS_TARG_MEM_RADDR, IL39_RTC_INST_LOWER_BOUND);
  1414. errcnt = 0;
  1415. for (; len > 0; len -= sizeof(u32), image++) {
  1416. /* read data comes through single port, auto-incr addr */
  1417. /* NOTE: Use the debugless read so we don't flood kernel log
  1418. * if IL_DL_IO is set */
  1419. val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  1420. if (val != le32_to_cpu(*image)) {
  1421. IL_ERR("uCode INST section is invalid at "
  1422. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1423. save_len - len, val, le32_to_cpu(*image));
  1424. rc = -EIO;
  1425. errcnt++;
  1426. if (errcnt >= 20)
  1427. break;
  1428. }
  1429. }
  1430. if (!errcnt)
  1431. D_INFO("ucode image in INSTRUCTION memory is good\n");
  1432. return rc;
  1433. }
  1434. /*
  1435. * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1436. * using sample data 100 bytes apart. If these sample points are good,
  1437. * it's a pretty good bet that everything between them is good, too.
  1438. */
  1439. static int
  1440. il3945_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len)
  1441. {
  1442. u32 val;
  1443. int rc = 0;
  1444. u32 errcnt = 0;
  1445. u32 i;
  1446. D_INFO("ucode inst image size is %u\n", len);
  1447. for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) {
  1448. /* read data comes through single port, auto-incr addr */
  1449. /* NOTE: Use the debugless read so we don't flood kernel log
  1450. * if IL_DL_IO is set */
  1451. il_wr(il, HBUS_TARG_MEM_RADDR, i + IL39_RTC_INST_LOWER_BOUND);
  1452. val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  1453. if (val != le32_to_cpu(*image)) {
  1454. #if 0 /* Enable this if you want to see details */
  1455. IL_ERR("uCode INST section is invalid at "
  1456. "offset 0x%x, is 0x%x, s/b 0x%x\n", i, val,
  1457. *image);
  1458. #endif
  1459. rc = -EIO;
  1460. errcnt++;
  1461. if (errcnt >= 3)
  1462. break;
  1463. }
  1464. }
  1465. return rc;
  1466. }
  1467. /*
  1468. * il3945_verify_ucode - determine which instruction image is in SRAM,
  1469. * and verify its contents
  1470. */
  1471. static int
  1472. il3945_verify_ucode(struct il_priv *il)
  1473. {
  1474. __le32 *image;
  1475. u32 len;
  1476. int rc = 0;
  1477. /* Try bootstrap */
  1478. image = (__le32 *) il->ucode_boot.v_addr;
  1479. len = il->ucode_boot.len;
  1480. rc = il3945_verify_inst_sparse(il, image, len);
  1481. if (rc == 0) {
  1482. D_INFO("Bootstrap uCode is good in inst SRAM\n");
  1483. return 0;
  1484. }
  1485. /* Try initialize */
  1486. image = (__le32 *) il->ucode_init.v_addr;
  1487. len = il->ucode_init.len;
  1488. rc = il3945_verify_inst_sparse(il, image, len);
  1489. if (rc == 0) {
  1490. D_INFO("Initialize uCode is good in inst SRAM\n");
  1491. return 0;
  1492. }
  1493. /* Try runtime/protocol */
  1494. image = (__le32 *) il->ucode_code.v_addr;
  1495. len = il->ucode_code.len;
  1496. rc = il3945_verify_inst_sparse(il, image, len);
  1497. if (rc == 0) {
  1498. D_INFO("Runtime uCode is good in inst SRAM\n");
  1499. return 0;
  1500. }
  1501. IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1502. /* Since nothing seems to match, show first several data entries in
  1503. * instruction SRAM, so maybe visual inspection will give a clue.
  1504. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1505. image = (__le32 *) il->ucode_boot.v_addr;
  1506. len = il->ucode_boot.len;
  1507. rc = il3945_verify_inst_full(il, image, len);
  1508. return rc;
  1509. }
  1510. static void
  1511. il3945_nic_start(struct il_priv *il)
  1512. {
  1513. /* Remove all resets to allow NIC to operate */
  1514. _il_wr(il, CSR_RESET, 0);
  1515. }
  1516. #define IL3945_UCODE_GET(item) \
  1517. static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\
  1518. { \
  1519. return le32_to_cpu(ucode->v1.item); \
  1520. }
  1521. static u32
  1522. il3945_ucode_get_header_size(u32 api_ver)
  1523. {
  1524. return 24;
  1525. }
  1526. static u8 *
  1527. il3945_ucode_get_data(const struct il_ucode_header *ucode)
  1528. {
  1529. return (u8 *) ucode->v1.data;
  1530. }
  1531. IL3945_UCODE_GET(inst_size);
  1532. IL3945_UCODE_GET(data_size);
  1533. IL3945_UCODE_GET(init_size);
  1534. IL3945_UCODE_GET(init_data_size);
  1535. IL3945_UCODE_GET(boot_size);
  1536. /*
  1537. * il3945_read_ucode - Read uCode images from disk file.
  1538. *
  1539. * Copy into buffers for card to fetch via bus-mastering
  1540. */
  1541. static int
  1542. il3945_read_ucode(struct il_priv *il)
  1543. {
  1544. const struct il_ucode_header *ucode;
  1545. int ret = -EINVAL, idx;
  1546. const struct firmware *ucode_raw;
  1547. /* firmware file name contains uCode/driver compatibility version */
  1548. const char *name_pre = il->cfg->fw_name_pre;
  1549. const unsigned int api_max = il->cfg->ucode_api_max;
  1550. const unsigned int api_min = il->cfg->ucode_api_min;
  1551. char buf[25];
  1552. u8 *src;
  1553. size_t len;
  1554. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1555. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1556. * request_firmware() is synchronous, file is in memory on return. */
  1557. for (idx = api_max; idx >= api_min; idx--) {
  1558. sprintf(buf, "%s%u%s", name_pre, idx, ".ucode");
  1559. ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev);
  1560. if (ret < 0) {
  1561. IL_ERR("%s firmware file req failed: %d\n", buf, ret);
  1562. if (ret == -ENOENT)
  1563. continue;
  1564. else
  1565. goto error;
  1566. } else {
  1567. if (idx < api_max)
  1568. IL_ERR("Loaded firmware %s, "
  1569. "which is deprecated. "
  1570. " Please use API v%u instead.\n", buf,
  1571. api_max);
  1572. D_INFO("Got firmware '%s' file "
  1573. "(%zd bytes) from disk\n", buf, ucode_raw->size);
  1574. break;
  1575. }
  1576. }
  1577. if (ret < 0)
  1578. goto error;
  1579. /* Make sure that we got at least our header! */
  1580. if (ucode_raw->size < il3945_ucode_get_header_size(1)) {
  1581. IL_ERR("File size way too small!\n");
  1582. ret = -EINVAL;
  1583. goto err_release;
  1584. }
  1585. /* Data from ucode file: header followed by uCode images */
  1586. ucode = (struct il_ucode_header *)ucode_raw->data;
  1587. il->ucode_ver = le32_to_cpu(ucode->ver);
  1588. api_ver = IL_UCODE_API(il->ucode_ver);
  1589. inst_size = il3945_ucode_get_inst_size(ucode);
  1590. data_size = il3945_ucode_get_data_size(ucode);
  1591. init_size = il3945_ucode_get_init_size(ucode);
  1592. init_data_size = il3945_ucode_get_init_data_size(ucode);
  1593. boot_size = il3945_ucode_get_boot_size(ucode);
  1594. src = il3945_ucode_get_data(ucode);
  1595. /* api_ver should match the api version forming part of the
  1596. * firmware filename ... but we don't check for that and only rely
  1597. * on the API version read from firmware header from here on forward */
  1598. if (api_ver < api_min || api_ver > api_max) {
  1599. IL_ERR("Driver unable to support your firmware API. "
  1600. "Driver supports v%u, firmware is v%u.\n", api_max,
  1601. api_ver);
  1602. il->ucode_ver = 0;
  1603. ret = -EINVAL;
  1604. goto err_release;
  1605. }
  1606. if (api_ver != api_max)
  1607. IL_ERR("Firmware has old API version. Expected %u, "
  1608. "got %u. New firmware can be obtained "
  1609. "from http://www.intellinuxwireless.org.\n", api_max,
  1610. api_ver);
  1611. IL_INFO("loaded firmware version %u.%u.%u.%u\n",
  1612. IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver),
  1613. IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver));
  1614. snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version),
  1615. "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver),
  1616. IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver),
  1617. IL_UCODE_SERIAL(il->ucode_ver));
  1618. D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver);
  1619. D_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
  1620. D_INFO("f/w package hdr runtime data size = %u\n", data_size);
  1621. D_INFO("f/w package hdr init inst size = %u\n", init_size);
  1622. D_INFO("f/w package hdr init data size = %u\n", init_data_size);
  1623. D_INFO("f/w package hdr boot inst size = %u\n", boot_size);
  1624. /* Verify size of file vs. image size info in file's header */
  1625. if (ucode_raw->size !=
  1626. il3945_ucode_get_header_size(api_ver) + inst_size + data_size +
  1627. init_size + init_data_size + boot_size) {
  1628. D_INFO("uCode file size %zd does not match expected size\n",
  1629. ucode_raw->size);
  1630. ret = -EINVAL;
  1631. goto err_release;
  1632. }
  1633. /* Verify that uCode images will fit in card's SRAM */
  1634. if (inst_size > IL39_MAX_INST_SIZE) {
  1635. D_INFO("uCode instr len %d too large to fit in\n", inst_size);
  1636. ret = -EINVAL;
  1637. goto err_release;
  1638. }
  1639. if (data_size > IL39_MAX_DATA_SIZE) {
  1640. D_INFO("uCode data len %d too large to fit in\n", data_size);
  1641. ret = -EINVAL;
  1642. goto err_release;
  1643. }
  1644. if (init_size > IL39_MAX_INST_SIZE) {
  1645. D_INFO("uCode init instr len %d too large to fit in\n",
  1646. init_size);
  1647. ret = -EINVAL;
  1648. goto err_release;
  1649. }
  1650. if (init_data_size > IL39_MAX_DATA_SIZE) {
  1651. D_INFO("uCode init data len %d too large to fit in\n",
  1652. init_data_size);
  1653. ret = -EINVAL;
  1654. goto err_release;
  1655. }
  1656. if (boot_size > IL39_MAX_BSM_SIZE) {
  1657. D_INFO("uCode boot instr len %d too large to fit in\n",
  1658. boot_size);
  1659. ret = -EINVAL;
  1660. goto err_release;
  1661. }
  1662. /* Allocate ucode buffers for card's bus-master loading ... */
  1663. /* Runtime instructions and 2 copies of data:
  1664. * 1) unmodified from disk
  1665. * 2) backup cache for save/restore during power-downs */
  1666. il->ucode_code.len = inst_size;
  1667. il_alloc_fw_desc(il->pci_dev, &il->ucode_code);
  1668. il->ucode_data.len = data_size;
  1669. il_alloc_fw_desc(il->pci_dev, &il->ucode_data);
  1670. il->ucode_data_backup.len = data_size;
  1671. il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup);
  1672. if (!il->ucode_code.v_addr || !il->ucode_data.v_addr ||
  1673. !il->ucode_data_backup.v_addr)
  1674. goto err_pci_alloc;
  1675. /* Initialization instructions and data */
  1676. if (init_size && init_data_size) {
  1677. il->ucode_init.len = init_size;
  1678. il_alloc_fw_desc(il->pci_dev, &il->ucode_init);
  1679. il->ucode_init_data.len = init_data_size;
  1680. il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data);
  1681. if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr)
  1682. goto err_pci_alloc;
  1683. }
  1684. /* Bootstrap (instructions only, no data) */
  1685. if (boot_size) {
  1686. il->ucode_boot.len = boot_size;
  1687. il_alloc_fw_desc(il->pci_dev, &il->ucode_boot);
  1688. if (!il->ucode_boot.v_addr)
  1689. goto err_pci_alloc;
  1690. }
  1691. /* Copy images into buffers for card's bus-master reads ... */
  1692. /* Runtime instructions (first block of data in file) */
  1693. len = inst_size;
  1694. D_INFO("Copying (but not loading) uCode instr len %zd\n", len);
  1695. memcpy(il->ucode_code.v_addr, src, len);
  1696. src += len;
  1697. D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1698. il->ucode_code.v_addr, (u32) il->ucode_code.p_addr);
  1699. /* Runtime data (2nd block)
  1700. * NOTE: Copy into backup buffer will be done in il3945_up() */
  1701. len = data_size;
  1702. D_INFO("Copying (but not loading) uCode data len %zd\n", len);
  1703. memcpy(il->ucode_data.v_addr, src, len);
  1704. memcpy(il->ucode_data_backup.v_addr, src, len);
  1705. src += len;
  1706. /* Initialization instructions (3rd block) */
  1707. if (init_size) {
  1708. len = init_size;
  1709. D_INFO("Copying (but not loading) init instr len %zd\n", len);
  1710. memcpy(il->ucode_init.v_addr, src, len);
  1711. src += len;
  1712. }
  1713. /* Initialization data (4th block) */
  1714. if (init_data_size) {
  1715. len = init_data_size;
  1716. D_INFO("Copying (but not loading) init data len %zd\n", len);
  1717. memcpy(il->ucode_init_data.v_addr, src, len);
  1718. src += len;
  1719. }
  1720. /* Bootstrap instructions (5th block) */
  1721. len = boot_size;
  1722. D_INFO("Copying (but not loading) boot instr len %zd\n", len);
  1723. memcpy(il->ucode_boot.v_addr, src, len);
  1724. /* We have our copies now, allow OS release its copies */
  1725. release_firmware(ucode_raw);
  1726. return 0;
  1727. err_pci_alloc:
  1728. IL_ERR("failed to allocate pci memory\n");
  1729. ret = -ENOMEM;
  1730. il3945_dealloc_ucode_pci(il);
  1731. err_release:
  1732. release_firmware(ucode_raw);
  1733. error:
  1734. return ret;
  1735. }
  1736. /*
  1737. * il3945_set_ucode_ptrs - Set uCode address location
  1738. *
  1739. * Tell initialization uCode where to find runtime uCode.
  1740. *
  1741. * BSM registers initially contain pointers to initialization uCode.
  1742. * We need to replace them to load runtime uCode inst and data,
  1743. * and to save runtime data when powering down.
  1744. */
  1745. static int
  1746. il3945_set_ucode_ptrs(struct il_priv *il)
  1747. {
  1748. dma_addr_t pinst;
  1749. dma_addr_t pdata;
  1750. /* bits 31:0 for 3945 */
  1751. pinst = il->ucode_code.p_addr;
  1752. pdata = il->ucode_data_backup.p_addr;
  1753. /* Tell bootstrap uCode where to find image to load */
  1754. il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
  1755. il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
  1756. il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len);
  1757. /* Inst byte count must be last to set up, bit 31 signals uCode
  1758. * that all new ptr/size info is in place */
  1759. il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
  1760. il->ucode_code.len | BSM_DRAM_INST_LOAD);
  1761. D_INFO("Runtime uCode pointers are set.\n");
  1762. return 0;
  1763. }
  1764. /*
  1765. * il3945_init_alive_start - Called after N_ALIVE notification received
  1766. *
  1767. * Called after N_ALIVE notification received from "initialize" uCode.
  1768. *
  1769. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  1770. */
  1771. static void
  1772. il3945_init_alive_start(struct il_priv *il)
  1773. {
  1774. /* Check alive response for "valid" sign from uCode */
  1775. if (il->card_alive_init.is_valid != UCODE_VALID_OK) {
  1776. /* We had an error bringing up the hardware, so take it
  1777. * all the way back down so we can try again */
  1778. D_INFO("Initialize Alive failed.\n");
  1779. goto restart;
  1780. }
  1781. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  1782. * This is a paranoid check, because we would not have gotten the
  1783. * "initialize" alive if code weren't properly loaded. */
  1784. if (il3945_verify_ucode(il)) {
  1785. /* Runtime instruction load was bad;
  1786. * take it all the way back down so we can try again */
  1787. D_INFO("Bad \"initialize\" uCode load.\n");
  1788. goto restart;
  1789. }
  1790. /* Send pointers to protocol/runtime uCode image ... init code will
  1791. * load and launch runtime uCode, which will send us another "Alive"
  1792. * notification. */
  1793. D_INFO("Initialization Alive received.\n");
  1794. if (il3945_set_ucode_ptrs(il)) {
  1795. /* Runtime instruction load won't happen;
  1796. * take it all the way back down so we can try again */
  1797. D_INFO("Couldn't set up uCode pointers.\n");
  1798. goto restart;
  1799. }
  1800. return;
  1801. restart:
  1802. queue_work(il->workqueue, &il->restart);
  1803. }
  1804. /*
  1805. * il3945_alive_start - called after N_ALIVE notification received
  1806. * from protocol/runtime uCode (initialization uCode's
  1807. * Alive gets handled by il3945_init_alive_start()).
  1808. */
  1809. static void
  1810. il3945_alive_start(struct il_priv *il)
  1811. {
  1812. int thermal_spin = 0;
  1813. u32 rfkill;
  1814. D_INFO("Runtime Alive received.\n");
  1815. if (il->card_alive.is_valid != UCODE_VALID_OK) {
  1816. /* We had an error bringing up the hardware, so take it
  1817. * all the way back down so we can try again */
  1818. D_INFO("Alive failed.\n");
  1819. goto restart;
  1820. }
  1821. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  1822. * This is a paranoid check, because we would not have gotten the
  1823. * "runtime" alive if code weren't properly loaded. */
  1824. if (il3945_verify_ucode(il)) {
  1825. /* Runtime instruction load was bad;
  1826. * take it all the way back down so we can try again */
  1827. D_INFO("Bad runtime uCode load.\n");
  1828. goto restart;
  1829. }
  1830. rfkill = il_rd_prph(il, APMG_RFKILL_REG);
  1831. D_INFO("RFKILL status: 0x%x\n", rfkill);
  1832. if (rfkill & 0x1) {
  1833. clear_bit(S_RFKILL, &il->status);
  1834. /* if RFKILL is not on, then wait for thermal
  1835. * sensor in adapter to kick in */
  1836. while (il3945_hw_get_temperature(il) == 0) {
  1837. thermal_spin++;
  1838. udelay(10);
  1839. }
  1840. if (thermal_spin)
  1841. D_INFO("Thermal calibration took %dus\n",
  1842. thermal_spin * 10);
  1843. } else
  1844. set_bit(S_RFKILL, &il->status);
  1845. /* After the ALIVE response, we can send commands to 3945 uCode */
  1846. set_bit(S_ALIVE, &il->status);
  1847. /* Enable watchdog to monitor the driver tx queues */
  1848. il_setup_watchdog(il);
  1849. if (il_is_rfkill(il))
  1850. return;
  1851. ieee80211_wake_queues(il->hw);
  1852. il->active_rate = RATES_MASK_3945;
  1853. il_power_update_mode(il, true);
  1854. if (il_is_associated(il)) {
  1855. struct il3945_rxon_cmd *active_rxon =
  1856. (struct il3945_rxon_cmd *)(&il->active);
  1857. il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  1858. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1859. } else {
  1860. /* Initialize our rx_config data */
  1861. il_connection_init_rx_config(il);
  1862. }
  1863. /* Configure Bluetooth device coexistence support */
  1864. il_send_bt_config(il);
  1865. set_bit(S_READY, &il->status);
  1866. /* Configure the adapter for unassociated operation */
  1867. il3945_commit_rxon(il);
  1868. il3945_reg_txpower_periodic(il);
  1869. D_INFO("ALIVE processing complete.\n");
  1870. wake_up(&il->wait_command_queue);
  1871. return;
  1872. restart:
  1873. queue_work(il->workqueue, &il->restart);
  1874. }
  1875. static void il3945_cancel_deferred_work(struct il_priv *il);
  1876. static void
  1877. __il3945_down(struct il_priv *il)
  1878. {
  1879. unsigned long flags;
  1880. int exit_pending;
  1881. D_INFO(DRV_NAME " is going down\n");
  1882. il_scan_cancel_timeout(il, 200);
  1883. exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status);
  1884. /* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set
  1885. * to prevent rearm timer */
  1886. del_timer_sync(&il->watchdog);
  1887. /* Station information will now be cleared in device */
  1888. il_clear_ucode_stations(il);
  1889. il_dealloc_bcast_stations(il);
  1890. il_clear_driver_stations(il);
  1891. /* Unblock any waiting calls */
  1892. wake_up_all(&il->wait_command_queue);
  1893. /* Wipe out the EXIT_PENDING status bit if we are not actually
  1894. * exiting the module */
  1895. if (!exit_pending)
  1896. clear_bit(S_EXIT_PENDING, &il->status);
  1897. /* stop and reset the on-board processor */
  1898. _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  1899. /* tell the device to stop sending interrupts */
  1900. spin_lock_irqsave(&il->lock, flags);
  1901. il_disable_interrupts(il);
  1902. spin_unlock_irqrestore(&il->lock, flags);
  1903. il3945_synchronize_irq(il);
  1904. if (il->mac80211_registered)
  1905. ieee80211_stop_queues(il->hw);
  1906. /* If we have not previously called il3945_init() then
  1907. * clear all bits but the RF Kill bits and return */
  1908. if (!il_is_init(il)) {
  1909. il->status =
  1910. test_bit(S_RFKILL, &il->status) << S_RFKILL |
  1911. test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
  1912. test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
  1913. goto exit;
  1914. }
  1915. /* ...otherwise clear out all the status bits but the RF Kill
  1916. * bit and continue taking the NIC down. */
  1917. il->status &=
  1918. test_bit(S_RFKILL, &il->status) << S_RFKILL |
  1919. test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
  1920. test_bit(S_FW_ERROR, &il->status) << S_FW_ERROR |
  1921. test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
  1922. /*
  1923. * We disabled and synchronized interrupt, and priv->mutex is taken, so
  1924. * here is the only thread which will program device registers, but
  1925. * still have lockdep assertions, so we are taking reg_lock.
  1926. */
  1927. spin_lock_irq(&il->reg_lock);
  1928. /* FIXME: il_grab_nic_access if rfkill is off ? */
  1929. il3945_hw_txq_ctx_stop(il);
  1930. il3945_hw_rxq_stop(il);
  1931. /* Power-down device's busmaster DMA clocks */
  1932. _il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  1933. udelay(5);
  1934. /* Stop the device, and put it in low power state */
  1935. _il_apm_stop(il);
  1936. spin_unlock_irq(&il->reg_lock);
  1937. il3945_hw_txq_ctx_free(il);
  1938. exit:
  1939. memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
  1940. dev_kfree_skb(il->beacon_skb);
  1941. il->beacon_skb = NULL;
  1942. /* clear out any free frames */
  1943. il3945_clear_free_frames(il);
  1944. }
  1945. static void
  1946. il3945_down(struct il_priv *il)
  1947. {
  1948. mutex_lock(&il->mutex);
  1949. __il3945_down(il);
  1950. mutex_unlock(&il->mutex);
  1951. il3945_cancel_deferred_work(il);
  1952. }
  1953. #define MAX_HW_RESTARTS 5
  1954. static int
  1955. il3945_alloc_bcast_station(struct il_priv *il)
  1956. {
  1957. unsigned long flags;
  1958. u8 sta_id;
  1959. spin_lock_irqsave(&il->sta_lock, flags);
  1960. sta_id = il_prep_station(il, il_bcast_addr, false, NULL);
  1961. if (sta_id == IL_INVALID_STATION) {
  1962. IL_ERR("Unable to prepare broadcast station\n");
  1963. spin_unlock_irqrestore(&il->sta_lock, flags);
  1964. return -EINVAL;
  1965. }
  1966. il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE;
  1967. il->stations[sta_id].used |= IL_STA_BCAST;
  1968. spin_unlock_irqrestore(&il->sta_lock, flags);
  1969. return 0;
  1970. }
  1971. static int
  1972. __il3945_up(struct il_priv *il)
  1973. {
  1974. int rc, i;
  1975. rc = il3945_alloc_bcast_station(il);
  1976. if (rc)
  1977. return rc;
  1978. if (test_bit(S_EXIT_PENDING, &il->status)) {
  1979. IL_WARN("Exit pending; will not bring the NIC up\n");
  1980. return -EIO;
  1981. }
  1982. if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) {
  1983. IL_ERR("ucode not available for device bring up\n");
  1984. return -EIO;
  1985. }
  1986. /* If platform's RF_KILL switch is NOT set to KILL */
  1987. if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  1988. clear_bit(S_RFKILL, &il->status);
  1989. else {
  1990. set_bit(S_RFKILL, &il->status);
  1991. return -ERFKILL;
  1992. }
  1993. _il_wr(il, CSR_INT, 0xFFFFFFFF);
  1994. rc = il3945_hw_nic_init(il);
  1995. if (rc) {
  1996. IL_ERR("Unable to int nic\n");
  1997. return rc;
  1998. }
  1999. /* make sure rfkill handshake bits are cleared */
  2000. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2001. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2002. /* clear (again), then enable host interrupts */
  2003. _il_wr(il, CSR_INT, 0xFFFFFFFF);
  2004. il_enable_interrupts(il);
  2005. /* really make sure rfkill handshake bits are cleared */
  2006. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2007. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2008. /* Copy original ucode data image from disk into backup cache.
  2009. * This will be used to initialize the on-board processor's
  2010. * data SRAM for a clean start when the runtime program first loads. */
  2011. memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr,
  2012. il->ucode_data.len);
  2013. /* We return success when we resume from suspend and rf_kill is on. */
  2014. if (test_bit(S_RFKILL, &il->status))
  2015. return 0;
  2016. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2017. /* load bootstrap state machine,
  2018. * load bootstrap program into processor's memory,
  2019. * prepare to load the "initialize" uCode */
  2020. rc = il->ops->load_ucode(il);
  2021. if (rc) {
  2022. IL_ERR("Unable to set up bootstrap uCode: %d\n", rc);
  2023. continue;
  2024. }
  2025. /* start card; "initialize" will load runtime ucode */
  2026. il3945_nic_start(il);
  2027. D_INFO(DRV_NAME " is coming up\n");
  2028. return 0;
  2029. }
  2030. set_bit(S_EXIT_PENDING, &il->status);
  2031. __il3945_down(il);
  2032. clear_bit(S_EXIT_PENDING, &il->status);
  2033. /* tried to restart and config the device for as long as our
  2034. * patience could withstand */
  2035. IL_ERR("Unable to initialize device after %d attempts.\n", i);
  2036. return -EIO;
  2037. }
  2038. /*****************************************************************************
  2039. *
  2040. * Workqueue callbacks
  2041. *
  2042. *****************************************************************************/
  2043. static void
  2044. il3945_bg_init_alive_start(struct work_struct *data)
  2045. {
  2046. struct il_priv *il =
  2047. container_of(data, struct il_priv, init_alive_start.work);
  2048. mutex_lock(&il->mutex);
  2049. if (test_bit(S_EXIT_PENDING, &il->status))
  2050. goto out;
  2051. il3945_init_alive_start(il);
  2052. out:
  2053. mutex_unlock(&il->mutex);
  2054. }
  2055. static void
  2056. il3945_bg_alive_start(struct work_struct *data)
  2057. {
  2058. struct il_priv *il =
  2059. container_of(data, struct il_priv, alive_start.work);
  2060. mutex_lock(&il->mutex);
  2061. if (test_bit(S_EXIT_PENDING, &il->status) || il->txq == NULL)
  2062. goto out;
  2063. il3945_alive_start(il);
  2064. out:
  2065. mutex_unlock(&il->mutex);
  2066. }
  2067. /*
  2068. * 3945 cannot interrupt driver when hardware rf kill switch toggles;
  2069. * driver must poll CSR_GP_CNTRL_REG register for change. This register
  2070. * *is* readable even when device has been SW_RESET into low power mode
  2071. * (e.g. during RF KILL).
  2072. */
  2073. static void
  2074. il3945_rfkill_poll(struct work_struct *data)
  2075. {
  2076. struct il_priv *il =
  2077. container_of(data, struct il_priv, _3945.rfkill_poll.work);
  2078. bool old_rfkill = test_bit(S_RFKILL, &il->status);
  2079. bool new_rfkill =
  2080. !(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
  2081. if (new_rfkill != old_rfkill) {
  2082. if (new_rfkill)
  2083. set_bit(S_RFKILL, &il->status);
  2084. else
  2085. clear_bit(S_RFKILL, &il->status);
  2086. wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill);
  2087. D_RF_KILL("RF_KILL bit toggled to %s.\n",
  2088. new_rfkill ? "disable radio" : "enable radio");
  2089. }
  2090. /* Keep this running, even if radio now enabled. This will be
  2091. * cancelled in mac_start() if system decides to start again */
  2092. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
  2093. round_jiffies_relative(2 * HZ));
  2094. }
  2095. int
  2096. il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
  2097. {
  2098. struct il_host_cmd cmd = {
  2099. .id = C_SCAN,
  2100. .len = sizeof(struct il3945_scan_cmd),
  2101. .flags = CMD_SIZE_HUGE,
  2102. };
  2103. struct il3945_scan_cmd *scan;
  2104. u8 n_probes = 0;
  2105. enum nl80211_band band;
  2106. bool is_active = false;
  2107. int ret;
  2108. u16 len;
  2109. lockdep_assert_held(&il->mutex);
  2110. if (!il->scan_cmd) {
  2111. il->scan_cmd =
  2112. kmalloc(sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE,
  2113. GFP_KERNEL);
  2114. if (!il->scan_cmd) {
  2115. D_SCAN("Fail to allocate scan memory\n");
  2116. return -ENOMEM;
  2117. }
  2118. }
  2119. scan = il->scan_cmd;
  2120. memset(scan, 0, sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE);
  2121. scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH;
  2122. scan->quiet_time = IL_ACTIVE_QUIET_TIME;
  2123. if (il_is_associated(il)) {
  2124. u16 interval;
  2125. u32 extra;
  2126. u32 suspend_time = 100;
  2127. u32 scan_suspend_time = 100;
  2128. D_INFO("Scanning while associated...\n");
  2129. interval = vif->bss_conf.beacon_int;
  2130. scan->suspend_time = 0;
  2131. scan->max_out_time = cpu_to_le32(200 * 1024);
  2132. if (!interval)
  2133. interval = suspend_time;
  2134. /*
  2135. * suspend time format:
  2136. * 0-19: beacon interval in usec (time before exec.)
  2137. * 20-23: 0
  2138. * 24-31: number of beacons (suspend between channels)
  2139. */
  2140. extra = (suspend_time / interval) << 24;
  2141. scan_suspend_time =
  2142. 0xFF0FFFFF & (extra | ((suspend_time % interval) * 1024));
  2143. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2144. D_SCAN("suspend_time 0x%X beacon interval %d\n",
  2145. scan_suspend_time, interval);
  2146. }
  2147. if (il->scan_request->n_ssids) {
  2148. int i, p = 0;
  2149. D_SCAN("Kicking off active scan\n");
  2150. for (i = 0; i < il->scan_request->n_ssids; i++) {
  2151. /* always does wildcard anyway */
  2152. if (!il->scan_request->ssids[i].ssid_len)
  2153. continue;
  2154. scan->direct_scan[p].id = WLAN_EID_SSID;
  2155. scan->direct_scan[p].len =
  2156. il->scan_request->ssids[i].ssid_len;
  2157. memcpy(scan->direct_scan[p].ssid,
  2158. il->scan_request->ssids[i].ssid,
  2159. il->scan_request->ssids[i].ssid_len);
  2160. n_probes++;
  2161. p++;
  2162. }
  2163. is_active = true;
  2164. } else
  2165. D_SCAN("Kicking off passive scan.\n");
  2166. /* We don't build a direct scan probe request; the uCode will do
  2167. * that based on the direct_mask added to each channel entry */
  2168. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2169. scan->tx_cmd.sta_id = il->hw_params.bcast_id;
  2170. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2171. /* flags + rate selection */
  2172. switch (il->scan_band) {
  2173. case NL80211_BAND_2GHZ:
  2174. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2175. scan->tx_cmd.rate = RATE_1M_PLCP;
  2176. band = NL80211_BAND_2GHZ;
  2177. break;
  2178. case NL80211_BAND_5GHZ:
  2179. scan->tx_cmd.rate = RATE_6M_PLCP;
  2180. band = NL80211_BAND_5GHZ;
  2181. break;
  2182. default:
  2183. IL_WARN("Invalid scan band\n");
  2184. return -EIO;
  2185. }
  2186. /*
  2187. * If active scaning is requested but a certain channel is marked
  2188. * passive, we can do active scanning if we detect transmissions. For
  2189. * passive only scanning disable switching to active on any channel.
  2190. */
  2191. scan->good_CRC_th =
  2192. is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_NEVER;
  2193. len =
  2194. il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data,
  2195. vif->addr, il->scan_request->ie,
  2196. il->scan_request->ie_len,
  2197. IL_MAX_SCAN_SIZE - sizeof(*scan));
  2198. scan->tx_cmd.len = cpu_to_le16(len);
  2199. /* select Rx antennas */
  2200. scan->flags |= il3945_get_antenna_flags(il);
  2201. scan->channel_count =
  2202. il3945_get_channels_for_scan(il, band, is_active, n_probes,
  2203. (void *)&scan->data[len], vif);
  2204. if (scan->channel_count == 0) {
  2205. D_SCAN("channel count %d\n", scan->channel_count);
  2206. return -EIO;
  2207. }
  2208. cmd.len +=
  2209. le16_to_cpu(scan->tx_cmd.len) +
  2210. scan->channel_count * sizeof(struct il3945_scan_channel);
  2211. cmd.data = scan;
  2212. scan->len = cpu_to_le16(cmd.len);
  2213. set_bit(S_SCAN_HW, &il->status);
  2214. ret = il_send_cmd_sync(il, &cmd);
  2215. if (ret)
  2216. clear_bit(S_SCAN_HW, &il->status);
  2217. return ret;
  2218. }
  2219. void
  2220. il3945_post_scan(struct il_priv *il)
  2221. {
  2222. /*
  2223. * Since setting the RXON may have been deferred while
  2224. * performing the scan, fire one off if needed
  2225. */
  2226. if (memcmp(&il->staging, &il->active, sizeof(il->staging)))
  2227. il3945_commit_rxon(il);
  2228. }
  2229. static void
  2230. il3945_bg_restart(struct work_struct *data)
  2231. {
  2232. struct il_priv *il = container_of(data, struct il_priv, restart);
  2233. if (test_bit(S_EXIT_PENDING, &il->status))
  2234. return;
  2235. if (test_and_clear_bit(S_FW_ERROR, &il->status)) {
  2236. mutex_lock(&il->mutex);
  2237. il->is_open = 0;
  2238. mutex_unlock(&il->mutex);
  2239. il3945_down(il);
  2240. ieee80211_restart_hw(il->hw);
  2241. } else {
  2242. il3945_down(il);
  2243. mutex_lock(&il->mutex);
  2244. if (test_bit(S_EXIT_PENDING, &il->status)) {
  2245. mutex_unlock(&il->mutex);
  2246. return;
  2247. }
  2248. __il3945_up(il);
  2249. mutex_unlock(&il->mutex);
  2250. }
  2251. }
  2252. static void
  2253. il3945_bg_rx_replenish(struct work_struct *data)
  2254. {
  2255. struct il_priv *il = container_of(data, struct il_priv, rx_replenish);
  2256. mutex_lock(&il->mutex);
  2257. if (test_bit(S_EXIT_PENDING, &il->status))
  2258. goto out;
  2259. il3945_rx_replenish(il);
  2260. out:
  2261. mutex_unlock(&il->mutex);
  2262. }
  2263. void
  2264. il3945_post_associate(struct il_priv *il)
  2265. {
  2266. int rc = 0;
  2267. if (!il->vif || !il->is_open)
  2268. return;
  2269. D_ASSOC("Associated as %d to: %pM\n", il->vif->cfg.aid,
  2270. il->active.bssid_addr);
  2271. if (test_bit(S_EXIT_PENDING, &il->status))
  2272. return;
  2273. il_scan_cancel_timeout(il, 200);
  2274. il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2275. il3945_commit_rxon(il);
  2276. rc = il_send_rxon_timing(il);
  2277. if (rc)
  2278. IL_WARN("C_RXON_TIMING failed - " "Attempting to continue.\n");
  2279. il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2280. il->staging.assoc_id = cpu_to_le16(il->vif->cfg.aid);
  2281. D_ASSOC("assoc id %d beacon interval %d\n", il->vif->cfg.aid,
  2282. il->vif->bss_conf.beacon_int);
  2283. if (il->vif->bss_conf.use_short_preamble)
  2284. il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2285. else
  2286. il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2287. if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
  2288. if (il->vif->bss_conf.use_short_slot)
  2289. il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2290. else
  2291. il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2292. }
  2293. il3945_commit_rxon(il);
  2294. switch (il->vif->type) {
  2295. case NL80211_IFTYPE_STATION:
  2296. il3945_rate_scale_init(il->hw, IL_AP_ID);
  2297. break;
  2298. case NL80211_IFTYPE_ADHOC:
  2299. il3945_send_beacon_cmd(il);
  2300. break;
  2301. default:
  2302. IL_ERR("%s Should not be called in %d mode\n", __func__,
  2303. il->vif->type);
  2304. break;
  2305. }
  2306. }
  2307. /*****************************************************************************
  2308. *
  2309. * mac80211 entry point functions
  2310. *
  2311. *****************************************************************************/
  2312. #define UCODE_READY_TIMEOUT (2 * HZ)
  2313. static int
  2314. il3945_mac_start(struct ieee80211_hw *hw)
  2315. {
  2316. struct il_priv *il = hw->priv;
  2317. int ret;
  2318. /* we should be verifying the device is ready to be opened */
  2319. mutex_lock(&il->mutex);
  2320. D_MAC80211("enter\n");
  2321. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2322. * ucode filename and max sizes are card-specific. */
  2323. if (!il->ucode_code.len) {
  2324. ret = il3945_read_ucode(il);
  2325. if (ret) {
  2326. IL_ERR("Could not read microcode: %d\n", ret);
  2327. mutex_unlock(&il->mutex);
  2328. goto out_release_irq;
  2329. }
  2330. }
  2331. ret = __il3945_up(il);
  2332. mutex_unlock(&il->mutex);
  2333. if (ret)
  2334. goto out_release_irq;
  2335. D_INFO("Start UP work.\n");
  2336. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2337. * mac80211 will not be run successfully. */
  2338. ret = wait_event_timeout(il->wait_command_queue,
  2339. test_bit(S_READY, &il->status),
  2340. UCODE_READY_TIMEOUT);
  2341. if (!ret) {
  2342. if (!test_bit(S_READY, &il->status)) {
  2343. IL_ERR("Wait for START_ALIVE timeout after %dms.\n",
  2344. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2345. ret = -ETIMEDOUT;
  2346. goto out_release_irq;
  2347. }
  2348. }
  2349. /* ucode is running and will send rfkill notifications,
  2350. * no need to poll the killswitch state anymore */
  2351. cancel_delayed_work(&il->_3945.rfkill_poll);
  2352. il->is_open = 1;
  2353. D_MAC80211("leave\n");
  2354. return 0;
  2355. out_release_irq:
  2356. il->is_open = 0;
  2357. D_MAC80211("leave - failed\n");
  2358. return ret;
  2359. }
  2360. static void
  2361. il3945_mac_stop(struct ieee80211_hw *hw)
  2362. {
  2363. struct il_priv *il = hw->priv;
  2364. D_MAC80211("enter\n");
  2365. if (!il->is_open) {
  2366. D_MAC80211("leave - skip\n");
  2367. return;
  2368. }
  2369. il->is_open = 0;
  2370. il3945_down(il);
  2371. flush_workqueue(il->workqueue);
  2372. /* start polling the killswitch state again */
  2373. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
  2374. round_jiffies_relative(2 * HZ));
  2375. D_MAC80211("leave\n");
  2376. }
  2377. static void
  2378. il3945_mac_tx(struct ieee80211_hw *hw,
  2379. struct ieee80211_tx_control *control,
  2380. struct sk_buff *skb)
  2381. {
  2382. struct il_priv *il = hw->priv;
  2383. D_MAC80211("enter\n");
  2384. D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2385. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2386. if (il3945_tx_skb(il, control->sta, skb))
  2387. dev_kfree_skb_any(skb);
  2388. D_MAC80211("leave\n");
  2389. }
  2390. void
  2391. il3945_config_ap(struct il_priv *il)
  2392. {
  2393. struct ieee80211_vif *vif = il->vif;
  2394. int rc = 0;
  2395. if (test_bit(S_EXIT_PENDING, &il->status))
  2396. return;
  2397. /* The following should be done only at AP bring up */
  2398. if (!(il_is_associated(il))) {
  2399. /* RXON - unassoc (to set timing command) */
  2400. il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2401. il3945_commit_rxon(il);
  2402. /* RXON Timing */
  2403. rc = il_send_rxon_timing(il);
  2404. if (rc)
  2405. IL_WARN("C_RXON_TIMING failed - "
  2406. "Attempting to continue.\n");
  2407. il->staging.assoc_id = 0;
  2408. if (vif->bss_conf.use_short_preamble)
  2409. il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2410. else
  2411. il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2412. if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
  2413. if (vif->bss_conf.use_short_slot)
  2414. il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2415. else
  2416. il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2417. }
  2418. /* restore RXON assoc */
  2419. il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2420. il3945_commit_rxon(il);
  2421. }
  2422. il3945_send_beacon_cmd(il);
  2423. }
  2424. static int
  2425. il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2426. struct ieee80211_vif *vif, struct ieee80211_sta *sta,
  2427. struct ieee80211_key_conf *key)
  2428. {
  2429. struct il_priv *il = hw->priv;
  2430. int ret = 0;
  2431. u8 sta_id = IL_INVALID_STATION;
  2432. u8 static_key;
  2433. D_MAC80211("enter\n");
  2434. if (il3945_mod_params.sw_crypto) {
  2435. D_MAC80211("leave - hwcrypto disabled\n");
  2436. return -EOPNOTSUPP;
  2437. }
  2438. /*
  2439. * To support IBSS RSN, don't program group keys in IBSS, the
  2440. * hardware will then not attempt to decrypt the frames.
  2441. */
  2442. if (vif->type == NL80211_IFTYPE_ADHOC &&
  2443. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
  2444. D_MAC80211("leave - IBSS RSN\n");
  2445. return -EOPNOTSUPP;
  2446. }
  2447. static_key = !il_is_associated(il);
  2448. if (!static_key) {
  2449. sta_id = il_sta_id_or_broadcast(il, sta);
  2450. if (sta_id == IL_INVALID_STATION) {
  2451. D_MAC80211("leave - station not found\n");
  2452. return -EINVAL;
  2453. }
  2454. }
  2455. mutex_lock(&il->mutex);
  2456. il_scan_cancel_timeout(il, 100);
  2457. switch (cmd) {
  2458. case SET_KEY:
  2459. if (static_key)
  2460. ret = il3945_set_static_key(il, key);
  2461. else
  2462. ret = il3945_set_dynamic_key(il, key, sta_id);
  2463. D_MAC80211("enable hwcrypto key\n");
  2464. break;
  2465. case DISABLE_KEY:
  2466. if (static_key)
  2467. ret = il3945_remove_static_key(il);
  2468. else
  2469. ret = il3945_clear_sta_key_info(il, sta_id);
  2470. D_MAC80211("disable hwcrypto key\n");
  2471. break;
  2472. default:
  2473. ret = -EINVAL;
  2474. }
  2475. D_MAC80211("leave ret %d\n", ret);
  2476. mutex_unlock(&il->mutex);
  2477. return ret;
  2478. }
  2479. static int
  2480. il3945_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2481. struct ieee80211_sta *sta)
  2482. {
  2483. struct il_priv *il = hw->priv;
  2484. struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv;
  2485. int ret;
  2486. bool is_ap = vif->type == NL80211_IFTYPE_STATION;
  2487. u8 sta_id;
  2488. mutex_lock(&il->mutex);
  2489. D_INFO("station %pM\n", sta->addr);
  2490. sta_priv->common.sta_id = IL_INVALID_STATION;
  2491. ret = il_add_station_common(il, sta->addr, is_ap, sta, &sta_id);
  2492. if (ret) {
  2493. IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret);
  2494. /* Should we return success if return code is EEXIST ? */
  2495. mutex_unlock(&il->mutex);
  2496. return ret;
  2497. }
  2498. sta_priv->common.sta_id = sta_id;
  2499. /* Initialize rate scaling */
  2500. D_INFO("Initializing rate scaling for station %pM\n", sta->addr);
  2501. il3945_rs_rate_init(il, sta, sta_id);
  2502. mutex_unlock(&il->mutex);
  2503. return 0;
  2504. }
  2505. static void
  2506. il3945_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
  2507. unsigned int *total_flags, u64 multicast)
  2508. {
  2509. struct il_priv *il = hw->priv;
  2510. __le32 filter_or = 0, filter_nand = 0;
  2511. #define CHK(test, flag) do { \
  2512. if (*total_flags & (test)) \
  2513. filter_or |= (flag); \
  2514. else \
  2515. filter_nand |= (flag); \
  2516. } while (0)
  2517. D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags,
  2518. *total_flags);
  2519. CHK(FIF_OTHER_BSS, RXON_FILTER_PROMISC_MSK);
  2520. CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
  2521. CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
  2522. #undef CHK
  2523. mutex_lock(&il->mutex);
  2524. il->staging.filter_flags &= ~filter_nand;
  2525. il->staging.filter_flags |= filter_or;
  2526. /*
  2527. * Not committing directly because hardware can perform a scan,
  2528. * but even if hw is ready, committing here breaks for some reason,
  2529. * we'll eventually commit the filter flags change anyway.
  2530. */
  2531. mutex_unlock(&il->mutex);
  2532. /*
  2533. * Receiving all multicast frames is always enabled by the
  2534. * default flags setup in il_connection_init_rx_config()
  2535. * since we currently do not support programming multicast
  2536. * filters into the device.
  2537. */
  2538. *total_flags &=
  2539. FIF_OTHER_BSS | FIF_ALLMULTI |
  2540. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  2541. }
  2542. /*****************************************************************************
  2543. *
  2544. * sysfs attributes
  2545. *
  2546. *****************************************************************************/
  2547. #ifdef CONFIG_IWLEGACY_DEBUG
  2548. /*
  2549. * The following adds a new attribute to the sysfs representation
  2550. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2551. * used for controlling the debug level.
  2552. *
  2553. * See the level definitions in iwl for details.
  2554. *
  2555. * The debug_level being managed using sysfs below is a per device debug
  2556. * level that is used instead of the global debug level if it (the per
  2557. * device debug level) is set.
  2558. */
  2559. static ssize_t
  2560. il3945_show_debug_level(struct device *d, struct device_attribute *attr,
  2561. char *buf)
  2562. {
  2563. struct il_priv *il = dev_get_drvdata(d);
  2564. return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
  2565. }
  2566. static ssize_t
  2567. il3945_store_debug_level(struct device *d, struct device_attribute *attr,
  2568. const char *buf, size_t count)
  2569. {
  2570. struct il_priv *il = dev_get_drvdata(d);
  2571. unsigned long val;
  2572. int ret;
  2573. ret = kstrtoul(buf, 0, &val);
  2574. if (ret)
  2575. IL_INFO("%s is not in hex or decimal form.\n", buf);
  2576. else
  2577. il->debug_level = val;
  2578. return strnlen(buf, count);
  2579. }
  2580. static DEVICE_ATTR(debug_level, 0644, il3945_show_debug_level,
  2581. il3945_store_debug_level);
  2582. #endif /* CONFIG_IWLEGACY_DEBUG */
  2583. static ssize_t
  2584. il3945_show_temperature(struct device *d, struct device_attribute *attr,
  2585. char *buf)
  2586. {
  2587. struct il_priv *il = dev_get_drvdata(d);
  2588. if (!il_is_alive(il))
  2589. return -EAGAIN;
  2590. return sprintf(buf, "%d\n", il3945_hw_get_temperature(il));
  2591. }
  2592. static DEVICE_ATTR(temperature, 0444, il3945_show_temperature, NULL);
  2593. static ssize_t
  2594. il3945_show_tx_power(struct device *d, struct device_attribute *attr, char *buf)
  2595. {
  2596. struct il_priv *il = dev_get_drvdata(d);
  2597. return sprintf(buf, "%d\n", il->tx_power_user_lmt);
  2598. }
  2599. static ssize_t
  2600. il3945_store_tx_power(struct device *d, struct device_attribute *attr,
  2601. const char *buf, size_t count)
  2602. {
  2603. struct il_priv *il = dev_get_drvdata(d);
  2604. char *p = (char *)buf;
  2605. u32 val;
  2606. val = simple_strtoul(p, &p, 10);
  2607. if (p == buf)
  2608. IL_INFO(": %s is not in decimal form.\n", buf);
  2609. else
  2610. il3945_hw_reg_set_txpower(il, val);
  2611. return count;
  2612. }
  2613. static DEVICE_ATTR(tx_power, 0644, il3945_show_tx_power, il3945_store_tx_power);
  2614. static ssize_t
  2615. il3945_show_flags(struct device *d, struct device_attribute *attr, char *buf)
  2616. {
  2617. struct il_priv *il = dev_get_drvdata(d);
  2618. return sprintf(buf, "0x%04X\n", il->active.flags);
  2619. }
  2620. static ssize_t
  2621. il3945_store_flags(struct device *d, struct device_attribute *attr,
  2622. const char *buf, size_t count)
  2623. {
  2624. struct il_priv *il = dev_get_drvdata(d);
  2625. u32 flags = simple_strtoul(buf, NULL, 0);
  2626. mutex_lock(&il->mutex);
  2627. if (le32_to_cpu(il->staging.flags) != flags) {
  2628. /* Cancel any currently running scans... */
  2629. if (il_scan_cancel_timeout(il, 100))
  2630. IL_WARN("Could not cancel scan.\n");
  2631. else {
  2632. D_INFO("Committing rxon.flags = 0x%04X\n", flags);
  2633. il->staging.flags = cpu_to_le32(flags);
  2634. il3945_commit_rxon(il);
  2635. }
  2636. }
  2637. mutex_unlock(&il->mutex);
  2638. return count;
  2639. }
  2640. static DEVICE_ATTR(flags, 0644, il3945_show_flags, il3945_store_flags);
  2641. static ssize_t
  2642. il3945_show_filter_flags(struct device *d, struct device_attribute *attr,
  2643. char *buf)
  2644. {
  2645. struct il_priv *il = dev_get_drvdata(d);
  2646. return sprintf(buf, "0x%04X\n", le32_to_cpu(il->active.filter_flags));
  2647. }
  2648. static ssize_t
  2649. il3945_store_filter_flags(struct device *d, struct device_attribute *attr,
  2650. const char *buf, size_t count)
  2651. {
  2652. struct il_priv *il = dev_get_drvdata(d);
  2653. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2654. mutex_lock(&il->mutex);
  2655. if (le32_to_cpu(il->staging.filter_flags) != filter_flags) {
  2656. /* Cancel any currently running scans... */
  2657. if (il_scan_cancel_timeout(il, 100))
  2658. IL_WARN("Could not cancel scan.\n");
  2659. else {
  2660. D_INFO("Committing rxon.filter_flags = " "0x%04X\n",
  2661. filter_flags);
  2662. il->staging.filter_flags = cpu_to_le32(filter_flags);
  2663. il3945_commit_rxon(il);
  2664. }
  2665. }
  2666. mutex_unlock(&il->mutex);
  2667. return count;
  2668. }
  2669. static DEVICE_ATTR(filter_flags, 0644, il3945_show_filter_flags,
  2670. il3945_store_filter_flags);
  2671. static ssize_t
  2672. il3945_show_measurement(struct device *d, struct device_attribute *attr,
  2673. char *buf)
  2674. {
  2675. struct il_priv *il = dev_get_drvdata(d);
  2676. struct il_spectrum_notification measure_report;
  2677. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2678. u8 *data = (u8 *) &measure_report;
  2679. unsigned long flags;
  2680. spin_lock_irqsave(&il->lock, flags);
  2681. if (!(il->measurement_status & MEASUREMENT_READY)) {
  2682. spin_unlock_irqrestore(&il->lock, flags);
  2683. return 0;
  2684. }
  2685. memcpy(&measure_report, &il->measure_report, size);
  2686. il->measurement_status = 0;
  2687. spin_unlock_irqrestore(&il->lock, flags);
  2688. while (size && PAGE_SIZE - len) {
  2689. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2690. PAGE_SIZE - len, true);
  2691. len = strlen(buf);
  2692. if (PAGE_SIZE - len)
  2693. buf[len++] = '\n';
  2694. ofs += 16;
  2695. size -= min(size, 16U);
  2696. }
  2697. return len;
  2698. }
  2699. static ssize_t
  2700. il3945_store_measurement(struct device *d, struct device_attribute *attr,
  2701. const char *buf, size_t count)
  2702. {
  2703. struct il_priv *il = dev_get_drvdata(d);
  2704. struct ieee80211_measurement_params params = {
  2705. .channel = le16_to_cpu(il->active.channel),
  2706. .start_time = cpu_to_le64(il->_3945.last_tsf),
  2707. .duration = cpu_to_le16(1),
  2708. };
  2709. u8 type = IL_MEASURE_BASIC;
  2710. u8 buffer[32];
  2711. u8 channel;
  2712. if (count) {
  2713. char *p = buffer;
  2714. strscpy(buffer, buf, sizeof(buffer));
  2715. channel = simple_strtoul(p, NULL, 0);
  2716. if (channel)
  2717. params.channel = channel;
  2718. p = buffer;
  2719. while (*p && *p != ' ')
  2720. p++;
  2721. if (*p)
  2722. type = simple_strtoul(p + 1, NULL, 0);
  2723. }
  2724. D_INFO("Invoking measurement of type %d on " "channel %d (for '%s')\n",
  2725. type, params.channel, buf);
  2726. il3945_get_measurement(il, &params, type);
  2727. return count;
  2728. }
  2729. static DEVICE_ATTR(measurement, 0600, il3945_show_measurement,
  2730. il3945_store_measurement);
  2731. static ssize_t
  2732. il3945_store_retry_rate(struct device *d, struct device_attribute *attr,
  2733. const char *buf, size_t count)
  2734. {
  2735. struct il_priv *il = dev_get_drvdata(d);
  2736. il->retry_rate = simple_strtoul(buf, NULL, 0);
  2737. if (il->retry_rate <= 0)
  2738. il->retry_rate = 1;
  2739. return count;
  2740. }
  2741. static ssize_t
  2742. il3945_show_retry_rate(struct device *d, struct device_attribute *attr,
  2743. char *buf)
  2744. {
  2745. struct il_priv *il = dev_get_drvdata(d);
  2746. return sprintf(buf, "%d", il->retry_rate);
  2747. }
  2748. static DEVICE_ATTR(retry_rate, 0600, il3945_show_retry_rate,
  2749. il3945_store_retry_rate);
  2750. static ssize_t
  2751. il3945_show_channels(struct device *d, struct device_attribute *attr, char *buf)
  2752. {
  2753. /* all this shit doesn't belong into sysfs anyway */
  2754. return 0;
  2755. }
  2756. static DEVICE_ATTR(channels, 0400, il3945_show_channels, NULL);
  2757. static ssize_t
  2758. il3945_show_antenna(struct device *d, struct device_attribute *attr, char *buf)
  2759. {
  2760. struct il_priv *il = dev_get_drvdata(d);
  2761. if (!il_is_alive(il))
  2762. return -EAGAIN;
  2763. return sprintf(buf, "%d\n", il3945_mod_params.antenna);
  2764. }
  2765. static ssize_t
  2766. il3945_store_antenna(struct device *d, struct device_attribute *attr,
  2767. const char *buf, size_t count)
  2768. {
  2769. struct il_priv *il __maybe_unused = dev_get_drvdata(d);
  2770. int ant;
  2771. if (count == 0)
  2772. return 0;
  2773. if (sscanf(buf, "%1i", &ant) != 1) {
  2774. D_INFO("not in hex or decimal form.\n");
  2775. return count;
  2776. }
  2777. if (ant >= 0 && ant <= 2) {
  2778. D_INFO("Setting antenna select to %d.\n", ant);
  2779. il3945_mod_params.antenna = (enum il3945_antenna)ant;
  2780. } else
  2781. D_INFO("Bad antenna select value %d.\n", ant);
  2782. return count;
  2783. }
  2784. static DEVICE_ATTR(antenna, 0644, il3945_show_antenna, il3945_store_antenna);
  2785. static ssize_t
  2786. il3945_show_status(struct device *d, struct device_attribute *attr, char *buf)
  2787. {
  2788. struct il_priv *il = dev_get_drvdata(d);
  2789. if (!il_is_alive(il))
  2790. return -EAGAIN;
  2791. return sprintf(buf, "0x%08x\n", (int)il->status);
  2792. }
  2793. static DEVICE_ATTR(status, 0444, il3945_show_status, NULL);
  2794. static ssize_t
  2795. il3945_dump_error_log(struct device *d, struct device_attribute *attr,
  2796. const char *buf, size_t count)
  2797. {
  2798. struct il_priv *il = dev_get_drvdata(d);
  2799. char *p = (char *)buf;
  2800. if (p[0] == '1')
  2801. il3945_dump_nic_error_log(il);
  2802. return strnlen(buf, count);
  2803. }
  2804. static DEVICE_ATTR(dump_errors, 0200, NULL, il3945_dump_error_log);
  2805. /*****************************************************************************
  2806. *
  2807. * driver setup and tear down
  2808. *
  2809. *****************************************************************************/
  2810. static int
  2811. il3945_setup_deferred_work(struct il_priv *il)
  2812. {
  2813. il->workqueue = create_singlethread_workqueue(DRV_NAME);
  2814. if (!il->workqueue)
  2815. return -ENOMEM;
  2816. init_waitqueue_head(&il->wait_command_queue);
  2817. INIT_WORK(&il->restart, il3945_bg_restart);
  2818. INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish);
  2819. INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start);
  2820. INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start);
  2821. INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll);
  2822. il_setup_scan_deferred_work(il);
  2823. il3945_hw_setup_deferred_work(il);
  2824. timer_setup(&il->watchdog, il_bg_watchdog, 0);
  2825. tasklet_setup(&il->irq_tasklet, il3945_irq_tasklet);
  2826. return 0;
  2827. }
  2828. static void
  2829. il3945_cancel_deferred_work(struct il_priv *il)
  2830. {
  2831. il3945_hw_cancel_deferred_work(il);
  2832. cancel_delayed_work_sync(&il->init_alive_start);
  2833. cancel_delayed_work(&il->alive_start);
  2834. il_cancel_scan_deferred_work(il);
  2835. }
  2836. static struct attribute *il3945_sysfs_entries[] = {
  2837. &dev_attr_antenna.attr,
  2838. &dev_attr_channels.attr,
  2839. &dev_attr_dump_errors.attr,
  2840. &dev_attr_flags.attr,
  2841. &dev_attr_filter_flags.attr,
  2842. &dev_attr_measurement.attr,
  2843. &dev_attr_retry_rate.attr,
  2844. &dev_attr_status.attr,
  2845. &dev_attr_temperature.attr,
  2846. &dev_attr_tx_power.attr,
  2847. #ifdef CONFIG_IWLEGACY_DEBUG
  2848. &dev_attr_debug_level.attr,
  2849. #endif
  2850. NULL
  2851. };
  2852. static const struct attribute_group il3945_attribute_group = {
  2853. .name = NULL, /* put in device directory */
  2854. .attrs = il3945_sysfs_entries,
  2855. };
  2856. static struct ieee80211_ops il3945_mac_ops __ro_after_init = {
  2857. .tx = il3945_mac_tx,
  2858. .start = il3945_mac_start,
  2859. .stop = il3945_mac_stop,
  2860. .add_interface = il_mac_add_interface,
  2861. .remove_interface = il_mac_remove_interface,
  2862. .change_interface = il_mac_change_interface,
  2863. .config = il_mac_config,
  2864. .configure_filter = il3945_configure_filter,
  2865. .set_key = il3945_mac_set_key,
  2866. .conf_tx = il_mac_conf_tx,
  2867. .reset_tsf = il_mac_reset_tsf,
  2868. .bss_info_changed = il_mac_bss_info_changed,
  2869. .hw_scan = il_mac_hw_scan,
  2870. .sta_add = il3945_mac_sta_add,
  2871. .sta_remove = il_mac_sta_remove,
  2872. .tx_last_beacon = il_mac_tx_last_beacon,
  2873. .flush = il_mac_flush,
  2874. };
  2875. static int
  2876. il3945_init_drv(struct il_priv *il)
  2877. {
  2878. int ret;
  2879. struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
  2880. il->retry_rate = 1;
  2881. il->beacon_skb = NULL;
  2882. spin_lock_init(&il->sta_lock);
  2883. spin_lock_init(&il->hcmd_lock);
  2884. INIT_LIST_HEAD(&il->free_frames);
  2885. mutex_init(&il->mutex);
  2886. il->ieee_channels = NULL;
  2887. il->ieee_rates = NULL;
  2888. il->band = NL80211_BAND_2GHZ;
  2889. il->iw_mode = NL80211_IFTYPE_STATION;
  2890. il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF;
  2891. /* initialize force reset */
  2892. il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD;
  2893. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  2894. IL_WARN("Unsupported EEPROM version: 0x%04X\n",
  2895. eeprom->version);
  2896. ret = -EINVAL;
  2897. goto err;
  2898. }
  2899. ret = il_init_channel_map(il);
  2900. if (ret) {
  2901. IL_ERR("initializing regulatory failed: %d\n", ret);
  2902. goto err;
  2903. }
  2904. /* Set up txpower settings in driver for all channels */
  2905. if (il3945_txpower_set_from_eeprom(il)) {
  2906. ret = -EIO;
  2907. goto err_free_channel_map;
  2908. }
  2909. ret = il_init_geos(il);
  2910. if (ret) {
  2911. IL_ERR("initializing geos failed: %d\n", ret);
  2912. goto err_free_channel_map;
  2913. }
  2914. il3945_init_hw_rates(il, il->ieee_rates);
  2915. return 0;
  2916. err_free_channel_map:
  2917. il_free_channel_map(il);
  2918. err:
  2919. return ret;
  2920. }
  2921. #define IL3945_MAX_PROBE_REQUEST 200
  2922. static int
  2923. il3945_setup_mac(struct il_priv *il)
  2924. {
  2925. int ret;
  2926. struct ieee80211_hw *hw = il->hw;
  2927. hw->rate_control_algorithm = "iwl-3945-rs";
  2928. hw->sta_data_size = sizeof(struct il3945_sta_priv);
  2929. hw->vif_data_size = sizeof(struct il_vif_priv);
  2930. /* Tell mac80211 our characteristics */
  2931. ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
  2932. ieee80211_hw_set(hw, SUPPORTS_PS);
  2933. ieee80211_hw_set(hw, SIGNAL_DBM);
  2934. ieee80211_hw_set(hw, SPECTRUM_MGMT);
  2935. hw->wiphy->interface_modes =
  2936. BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC);
  2937. hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN;
  2938. hw->wiphy->regulatory_flags |= REGULATORY_CUSTOM_REG |
  2939. REGULATORY_DISABLE_BEACON_HINTS;
  2940. hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
  2941. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  2942. /* we create the 802.11 header and a zero-length SSID element */
  2943. hw->wiphy->max_scan_ie_len = IL3945_MAX_PROBE_REQUEST - 24 - 2;
  2944. /* Default value; 4 EDCA QOS priorities */
  2945. hw->queues = 4;
  2946. if (il->bands[NL80211_BAND_2GHZ].n_channels)
  2947. il->hw->wiphy->bands[NL80211_BAND_2GHZ] =
  2948. &il->bands[NL80211_BAND_2GHZ];
  2949. if (il->bands[NL80211_BAND_5GHZ].n_channels)
  2950. il->hw->wiphy->bands[NL80211_BAND_5GHZ] =
  2951. &il->bands[NL80211_BAND_5GHZ];
  2952. il_leds_init(il);
  2953. wiphy_ext_feature_set(il->hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
  2954. ret = ieee80211_register_hw(il->hw);
  2955. if (ret) {
  2956. IL_ERR("Failed to register hw (error %d)\n", ret);
  2957. return ret;
  2958. }
  2959. il->mac80211_registered = 1;
  2960. return 0;
  2961. }
  2962. static int
  2963. il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  2964. {
  2965. int err = 0;
  2966. struct il_priv *il;
  2967. struct ieee80211_hw *hw;
  2968. struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data);
  2969. struct il3945_eeprom *eeprom;
  2970. unsigned long flags;
  2971. /***********************
  2972. * 1. Allocating HW data
  2973. * ********************/
  2974. hw = ieee80211_alloc_hw(sizeof(struct il_priv), &il3945_mac_ops);
  2975. if (!hw) {
  2976. err = -ENOMEM;
  2977. goto out;
  2978. }
  2979. il = hw->priv;
  2980. il->hw = hw;
  2981. SET_IEEE80211_DEV(hw, &pdev->dev);
  2982. il->cmd_queue = IL39_CMD_QUEUE_NUM;
  2983. D_INFO("*** LOAD DRIVER ***\n");
  2984. il->cfg = cfg;
  2985. il->ops = &il3945_ops;
  2986. #ifdef CONFIG_IWLEGACY_DEBUGFS
  2987. il->debugfs_ops = &il3945_debugfs_ops;
  2988. #endif
  2989. il->pci_dev = pdev;
  2990. il->inta_mask = CSR_INI_SET_MASK;
  2991. /***************************
  2992. * 2. Initializing PCI bus
  2993. * *************************/
  2994. pci_disable_link_state(pdev,
  2995. PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
  2996. PCIE_LINK_STATE_CLKPM);
  2997. if (pci_enable_device(pdev)) {
  2998. err = -ENODEV;
  2999. goto out_ieee80211_free_hw;
  3000. }
  3001. pci_set_master(pdev);
  3002. err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
  3003. if (err) {
  3004. IL_WARN("No suitable DMA available.\n");
  3005. goto out_pci_disable_device;
  3006. }
  3007. pci_set_drvdata(pdev, il);
  3008. err = pci_request_regions(pdev, DRV_NAME);
  3009. if (err)
  3010. goto out_pci_disable_device;
  3011. /***********************
  3012. * 3. Read REV Register
  3013. * ********************/
  3014. il->hw_base = pci_ioremap_bar(pdev, 0);
  3015. if (!il->hw_base) {
  3016. err = -ENODEV;
  3017. goto out_pci_release_regions;
  3018. }
  3019. D_INFO("pci_resource_len = 0x%08llx\n",
  3020. (unsigned long long)pci_resource_len(pdev, 0));
  3021. D_INFO("pci_resource_base = %p\n", il->hw_base);
  3022. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3023. * PCI Tx retries from interfering with C3 CPU state */
  3024. pci_write_config_byte(pdev, 0x41, 0x00);
  3025. /* these spin locks will be used in apm_init and EEPROM access
  3026. * we should init now
  3027. */
  3028. spin_lock_init(&il->reg_lock);
  3029. spin_lock_init(&il->lock);
  3030. /*
  3031. * stop and reset the on-board processor just in case it is in a
  3032. * strange state ... like being left stranded by a primary kernel
  3033. * and this is now the kdump kernel trying to start up
  3034. */
  3035. _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  3036. /***********************
  3037. * 4. Read EEPROM
  3038. * ********************/
  3039. /* Read the EEPROM */
  3040. err = il_eeprom_init(il);
  3041. if (err) {
  3042. IL_ERR("Unable to init EEPROM\n");
  3043. goto out_iounmap;
  3044. }
  3045. /* MAC Address location in EEPROM same for 3945/4965 */
  3046. eeprom = (struct il3945_eeprom *)il->eeprom;
  3047. D_INFO("MAC address: %pM\n", eeprom->mac_address);
  3048. SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address);
  3049. /***********************
  3050. * 5. Setup HW Constants
  3051. * ********************/
  3052. /* Device-specific setup */
  3053. err = il3945_hw_set_hw_params(il);
  3054. if (err) {
  3055. IL_ERR("failed to set hw settings\n");
  3056. goto out_eeprom_free;
  3057. }
  3058. /***********************
  3059. * 6. Setup il
  3060. * ********************/
  3061. err = il3945_init_drv(il);
  3062. if (err) {
  3063. IL_ERR("initializing driver failed\n");
  3064. goto out_unset_hw_params;
  3065. }
  3066. IL_INFO("Detected Intel Wireless WiFi Link %s\n", il->cfg->name);
  3067. /***********************
  3068. * 7. Setup Services
  3069. * ********************/
  3070. spin_lock_irqsave(&il->lock, flags);
  3071. il_disable_interrupts(il);
  3072. spin_unlock_irqrestore(&il->lock, flags);
  3073. pci_enable_msi(il->pci_dev);
  3074. err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il);
  3075. if (err) {
  3076. IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq);
  3077. goto out_disable_msi;
  3078. }
  3079. err = sysfs_create_group(&pdev->dev.kobj, &il3945_attribute_group);
  3080. if (err) {
  3081. IL_ERR("failed to create sysfs device attributes\n");
  3082. goto out_release_irq;
  3083. }
  3084. il_set_rxon_channel(il, &il->bands[NL80211_BAND_2GHZ].channels[5]);
  3085. err = il3945_setup_deferred_work(il);
  3086. if (err)
  3087. goto out_remove_sysfs;
  3088. il3945_setup_handlers(il);
  3089. il_power_initialize(il);
  3090. /*********************************
  3091. * 8. Setup and Register mac80211
  3092. * *******************************/
  3093. il_enable_interrupts(il);
  3094. err = il3945_setup_mac(il);
  3095. if (err)
  3096. goto out_destroy_workqueue;
  3097. il_dbgfs_register(il, DRV_NAME);
  3098. /* Start monitoring the killswitch */
  3099. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2 * HZ);
  3100. return 0;
  3101. out_destroy_workqueue:
  3102. destroy_workqueue(il->workqueue);
  3103. il->workqueue = NULL;
  3104. out_remove_sysfs:
  3105. sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
  3106. out_release_irq:
  3107. free_irq(il->pci_dev->irq, il);
  3108. out_disable_msi:
  3109. pci_disable_msi(il->pci_dev);
  3110. il_free_geos(il);
  3111. il_free_channel_map(il);
  3112. out_unset_hw_params:
  3113. il3945_unset_hw_params(il);
  3114. out_eeprom_free:
  3115. il_eeprom_free(il);
  3116. out_iounmap:
  3117. iounmap(il->hw_base);
  3118. out_pci_release_regions:
  3119. pci_release_regions(pdev);
  3120. out_pci_disable_device:
  3121. pci_disable_device(pdev);
  3122. out_ieee80211_free_hw:
  3123. ieee80211_free_hw(il->hw);
  3124. out:
  3125. return err;
  3126. }
  3127. static void
  3128. il3945_pci_remove(struct pci_dev *pdev)
  3129. {
  3130. struct il_priv *il = pci_get_drvdata(pdev);
  3131. unsigned long flags;
  3132. if (!il)
  3133. return;
  3134. D_INFO("*** UNLOAD DRIVER ***\n");
  3135. il_dbgfs_unregister(il);
  3136. set_bit(S_EXIT_PENDING, &il->status);
  3137. il_leds_exit(il);
  3138. if (il->mac80211_registered) {
  3139. ieee80211_unregister_hw(il->hw);
  3140. il->mac80211_registered = 0;
  3141. } else {
  3142. il3945_down(il);
  3143. }
  3144. /*
  3145. * Make sure device is reset to low power before unloading driver.
  3146. * This may be redundant with il_down(), but there are paths to
  3147. * run il_down() without calling apm_ops.stop(), and there are
  3148. * paths to avoid running il_down() at all before leaving driver.
  3149. * This (inexpensive) call *makes sure* device is reset.
  3150. */
  3151. il_apm_stop(il);
  3152. /* make sure we flush any pending irq or
  3153. * tasklet for the driver
  3154. */
  3155. spin_lock_irqsave(&il->lock, flags);
  3156. il_disable_interrupts(il);
  3157. spin_unlock_irqrestore(&il->lock, flags);
  3158. il3945_synchronize_irq(il);
  3159. sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
  3160. cancel_delayed_work_sync(&il->_3945.rfkill_poll);
  3161. il3945_dealloc_ucode_pci(il);
  3162. if (il->rxq.bd)
  3163. il3945_rx_queue_free(il, &il->rxq);
  3164. il3945_hw_txq_ctx_free(il);
  3165. il3945_unset_hw_params(il);
  3166. /*netif_stop_queue(dev); */
  3167. /* ieee80211_unregister_hw calls il3945_mac_stop, which flushes
  3168. * il->workqueue... so we can't take down the workqueue
  3169. * until now... */
  3170. destroy_workqueue(il->workqueue);
  3171. il->workqueue = NULL;
  3172. free_irq(pdev->irq, il);
  3173. pci_disable_msi(pdev);
  3174. iounmap(il->hw_base);
  3175. pci_release_regions(pdev);
  3176. pci_disable_device(pdev);
  3177. il_free_channel_map(il);
  3178. il_free_geos(il);
  3179. kfree(il->scan_cmd);
  3180. dev_kfree_skb(il->beacon_skb);
  3181. ieee80211_free_hw(il->hw);
  3182. }
  3183. /*****************************************************************************
  3184. *
  3185. * driver and module entry point
  3186. *
  3187. *****************************************************************************/
  3188. static struct pci_driver il3945_driver = {
  3189. .name = DRV_NAME,
  3190. .id_table = il3945_hw_card_ids,
  3191. .probe = il3945_pci_probe,
  3192. .remove = il3945_pci_remove,
  3193. .driver.pm = IL_LEGACY_PM_OPS,
  3194. };
  3195. static int __init
  3196. il3945_init(void)
  3197. {
  3198. int ret;
  3199. pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3200. pr_info(DRV_COPYRIGHT "\n");
  3201. /*
  3202. * Disabling hardware scan means that mac80211 will perform scans
  3203. * "the hard way", rather than using device's scan.
  3204. */
  3205. if (il3945_mod_params.disable_hw_scan) {
  3206. pr_info("hw_scan is disabled\n");
  3207. il3945_mac_ops.hw_scan = NULL;
  3208. }
  3209. ret = il3945_rate_control_register();
  3210. if (ret) {
  3211. pr_err("Unable to register rate control algorithm: %d\n", ret);
  3212. return ret;
  3213. }
  3214. ret = pci_register_driver(&il3945_driver);
  3215. if (ret) {
  3216. pr_err("Unable to initialize PCI module\n");
  3217. goto error_register;
  3218. }
  3219. return ret;
  3220. error_register:
  3221. il3945_rate_control_unregister();
  3222. return ret;
  3223. }
  3224. static void __exit
  3225. il3945_exit(void)
  3226. {
  3227. pci_unregister_driver(&il3945_driver);
  3228. il3945_rate_control_unregister();
  3229. }
  3230. MODULE_FIRMWARE(IL3945_MODULE_FIRMWARE(IL3945_UCODE_API_MAX));
  3231. module_param_named(antenna, il3945_mod_params.antenna, int, 0444);
  3232. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3233. module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, 0444);
  3234. MODULE_PARM_DESC(swcrypto, "using software crypto (default 1 [software])");
  3235. module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan, int,
  3236. 0444);
  3237. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)");
  3238. #ifdef CONFIG_IWLEGACY_DEBUG
  3239. module_param_named(debug, il_debug_level, uint, 0644);
  3240. MODULE_PARM_DESC(debug, "debug output mask");
  3241. #endif
  3242. module_param_named(fw_restart, il3945_mod_params.restart_fw, int, 0444);
  3243. MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
  3244. module_exit(il3945_exit);
  3245. module_init(il3945_init);