wa.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. Broadcom B43 wireless driver
  4. PHY workarounds.
  5. Copyright (c) 2005-2007 Stefano Brivio <[email protected]>
  6. Copyright (c) 2005-2007 Michael Buesch <[email protected]>
  7. */
  8. #include "b43.h"
  9. #include "main.h"
  10. #include "tables.h"
  11. #include "phy_common.h"
  12. #include "wa.h"
  13. void b43_wa_initgains(struct b43_wldev *dev)
  14. {
  15. struct b43_phy *phy = &dev->phy;
  16. b43_phy_write(dev, B43_PHY_LNAHPFCTL, 0x1FF9);
  17. b43_phy_mask(dev, B43_PHY_LPFGAINCTL, 0xFF0F);
  18. if (phy->rev <= 2)
  19. b43_ofdmtab_write16(dev, B43_OFDMTAB_LPFGAIN, 0, 0x1FBF);
  20. b43_radio_write16(dev, 0x0002, 0x1FBF);
  21. b43_phy_write(dev, 0x0024, 0x4680);
  22. b43_phy_write(dev, 0x0020, 0x0003);
  23. b43_phy_write(dev, 0x001D, 0x0F40);
  24. b43_phy_write(dev, 0x001F, 0x1C00);
  25. if (phy->rev <= 3)
  26. b43_phy_maskset(dev, 0x002A, 0x00FF, 0x0400);
  27. else if (phy->rev == 5) {
  28. b43_phy_maskset(dev, 0x002A, 0x00FF, 0x1A00);
  29. b43_phy_write(dev, 0x00CC, 0x2121);
  30. }
  31. if (phy->rev >= 3)
  32. b43_phy_write(dev, 0x00BA, 0x3ED5);
  33. }
  34. static void b43_wa_rssi_lt(struct b43_wldev *dev) /* RSSI lookup table */
  35. {
  36. int i;
  37. if (0 /* FIXME: For APHY.rev=2 this might be needed */) {
  38. for (i = 0; i < 8; i++)
  39. b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i + 8);
  40. for (i = 8; i < 16; i++)
  41. b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i - 8);
  42. } else {
  43. for (i = 0; i < 64; i++)
  44. b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i);
  45. }
  46. }
  47. static void b43_wa_analog(struct b43_wldev *dev)
  48. {
  49. u16 ofdmrev;
  50. ofdmrev = b43_phy_read(dev, B43_PHY_VERSION_OFDM) & B43_PHYVER_VERSION;
  51. if (ofdmrev > 2) {
  52. b43_phy_write(dev, B43_PHY_PWRDOWN, 0x1000);
  53. } else {
  54. b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 3, 0x1044);
  55. b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 4, 0x7201);
  56. b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 6, 0x0040);
  57. }
  58. }
  59. static void b43_wa_fft(struct b43_wldev *dev) /* Fine frequency table */
  60. {
  61. int i;
  62. for (i = 0; i < B43_TAB_FINEFREQG_SIZE; i++)
  63. b43_ofdmtab_write16(dev, B43_OFDMTAB_DACRFPABB, i,
  64. b43_tab_finefreqg[i]);
  65. }
  66. static void b43_wa_nft(struct b43_wldev *dev) /* Noise figure table */
  67. {
  68. struct b43_phy *phy = &dev->phy;
  69. int i;
  70. if (phy->rev == 1)
  71. for (i = 0; i < B43_TAB_NOISEG1_SIZE; i++)
  72. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, i,
  73. b43_tab_noiseg1[i]);
  74. else
  75. for (i = 0; i < B43_TAB_NOISEG2_SIZE; i++)
  76. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, i,
  77. b43_tab_noiseg2[i]);
  78. }
  79. static void b43_wa_rt(struct b43_wldev *dev) /* Rotor table */
  80. {
  81. int i;
  82. for (i = 0; i < B43_TAB_ROTOR_SIZE; i++)
  83. b43_ofdmtab_write32(dev, B43_OFDMTAB_ROTOR, i, b43_tab_rotor[i]);
  84. }
  85. static void b43_write_nst(struct b43_wldev *dev, const u16 *nst)
  86. {
  87. int i;
  88. for (i = 0; i < B43_TAB_NOISESCALE_SIZE; i++)
  89. b43_ofdmtab_write16(dev, B43_OFDMTAB_NOISESCALE, i, nst[i]);
  90. }
  91. static void b43_wa_nst(struct b43_wldev *dev) /* Noise scale table */
  92. {
  93. struct b43_phy *phy = &dev->phy;
  94. if (phy->rev >= 6) {
  95. if (b43_phy_read(dev, B43_PHY_ENCORE) & B43_PHY_ENCORE_EN)
  96. b43_write_nst(dev, b43_tab_noisescaleg3);
  97. else
  98. b43_write_nst(dev, b43_tab_noisescaleg2);
  99. } else {
  100. b43_write_nst(dev, b43_tab_noisescaleg1);
  101. }
  102. }
  103. static void b43_wa_art(struct b43_wldev *dev) /* ADV retard table */
  104. {
  105. int i;
  106. for (i = 0; i < B43_TAB_RETARD_SIZE; i++)
  107. b43_ofdmtab_write32(dev, B43_OFDMTAB_ADVRETARD,
  108. i, b43_tab_retard[i]);
  109. }
  110. static void b43_wa_msst(struct b43_wldev *dev) /* Min sigma square table */
  111. {
  112. struct b43_phy *phy = &dev->phy;
  113. int i;
  114. const u16 *tab;
  115. if (phy->type == B43_PHYTYPE_G) {
  116. tab = b43_tab_sigmasqr2;
  117. } else {
  118. B43_WARN_ON(1);
  119. return;
  120. }
  121. for (i = 0; i < B43_TAB_SIGMASQR_SIZE; i++) {
  122. b43_ofdmtab_write16(dev, B43_OFDMTAB_MINSIGSQ,
  123. i, tab[i]);
  124. }
  125. }
  126. static void b43_wa_crs_ed(struct b43_wldev *dev)
  127. {
  128. struct b43_phy *phy = &dev->phy;
  129. if (phy->rev == 1) {
  130. b43_phy_write(dev, B43_PHY_CRSTHRES1_R1, 0x4F19);
  131. } else if (phy->rev == 2) {
  132. b43_phy_write(dev, B43_PHY_CRSTHRES1, 0x1861);
  133. b43_phy_write(dev, B43_PHY_CRSTHRES2, 0x0271);
  134. b43_phy_set(dev, B43_PHY_ANTDWELL, 0x0800);
  135. } else {
  136. b43_phy_write(dev, B43_PHY_CRSTHRES1, 0x0098);
  137. b43_phy_write(dev, B43_PHY_CRSTHRES2, 0x0070);
  138. b43_phy_write(dev, B43_PHY_OFDM(0xC9), 0x0080);
  139. b43_phy_set(dev, B43_PHY_ANTDWELL, 0x0800);
  140. }
  141. }
  142. static void b43_wa_crs_thr(struct b43_wldev *dev)
  143. {
  144. b43_phy_maskset(dev, B43_PHY_CRS0, ~0x03C0, 0xD000);
  145. }
  146. static void b43_wa_crs_blank(struct b43_wldev *dev)
  147. {
  148. b43_phy_write(dev, B43_PHY_OFDM(0x2C), 0x005A);
  149. }
  150. static void b43_wa_cck_shiftbits(struct b43_wldev *dev)
  151. {
  152. b43_phy_write(dev, B43_PHY_CCKSHIFTBITS, 0x0026);
  153. }
  154. static void b43_wa_wrssi_offset(struct b43_wldev *dev)
  155. {
  156. int i;
  157. if (dev->phy.rev == 1) {
  158. for (i = 0; i < 16; i++) {
  159. b43_ofdmtab_write16(dev, B43_OFDMTAB_WRSSI_R1,
  160. i, 0x0020);
  161. }
  162. } else {
  163. for (i = 0; i < 32; i++) {
  164. b43_ofdmtab_write16(dev, B43_OFDMTAB_WRSSI,
  165. i, 0x0820);
  166. }
  167. }
  168. }
  169. static void b43_wa_txpuoff_rxpuon(struct b43_wldev *dev)
  170. {
  171. b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_0F, 2, 15);
  172. b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_0F, 3, 20);
  173. }
  174. static void b43_wa_altagc(struct b43_wldev *dev)
  175. {
  176. struct b43_phy *phy = &dev->phy;
  177. if (phy->rev == 1) {
  178. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 0, 254);
  179. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 1, 13);
  180. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 2, 19);
  181. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 3, 25);
  182. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 0, 0x2710);
  183. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 1, 0x9B83);
  184. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 2, 0x9B83);
  185. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 3, 0x0F8D);
  186. b43_phy_write(dev, B43_PHY_LMS, 4);
  187. } else {
  188. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 0, 254);
  189. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 1, 13);
  190. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 2, 19);
  191. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 3, 25);
  192. }
  193. b43_phy_maskset(dev, B43_PHY_CCKSHIFTBITS_WA, 0x00FF, 0x5700);
  194. b43_phy_maskset(dev, B43_PHY_OFDM(0x1A), ~0x007F, 0x000F);
  195. b43_phy_maskset(dev, B43_PHY_OFDM(0x1A), ~0x3F80, 0x2B80);
  196. b43_phy_maskset(dev, B43_PHY_ANTWRSETT, 0xF0FF, 0x0300);
  197. b43_radio_set(dev, 0x7A, 0x0008);
  198. b43_phy_maskset(dev, B43_PHY_N1P1GAIN, ~0x000F, 0x0008);
  199. b43_phy_maskset(dev, B43_PHY_P1P2GAIN, ~0x0F00, 0x0600);
  200. b43_phy_maskset(dev, B43_PHY_N1N2GAIN, ~0x0F00, 0x0700);
  201. b43_phy_maskset(dev, B43_PHY_N1P1GAIN, ~0x0F00, 0x0100);
  202. if (phy->rev == 1) {
  203. b43_phy_maskset(dev, B43_PHY_N1N2GAIN, ~0x000F, 0x0007);
  204. }
  205. b43_phy_maskset(dev, B43_PHY_OFDM(0x88), ~0x00FF, 0x001C);
  206. b43_phy_maskset(dev, B43_PHY_OFDM(0x88), ~0x3F00, 0x0200);
  207. b43_phy_maskset(dev, B43_PHY_OFDM(0x96), ~0x00FF, 0x001C);
  208. b43_phy_maskset(dev, B43_PHY_OFDM(0x89), ~0x00FF, 0x0020);
  209. b43_phy_maskset(dev, B43_PHY_OFDM(0x89), ~0x3F00, 0x0200);
  210. b43_phy_maskset(dev, B43_PHY_OFDM(0x82), ~0x00FF, 0x002E);
  211. b43_phy_maskset(dev, B43_PHY_OFDM(0x96), 0x00FF, 0x1A00);
  212. b43_phy_maskset(dev, B43_PHY_OFDM(0x81), ~0x00FF, 0x0028);
  213. b43_phy_maskset(dev, B43_PHY_OFDM(0x81), 0x00FF, 0x2C00);
  214. if (phy->rev == 1) {
  215. b43_phy_write(dev, B43_PHY_PEAK_COUNT, 0x092B);
  216. b43_phy_maskset(dev, B43_PHY_OFDM(0x1B), ~0x001E, 0x0002);
  217. } else {
  218. b43_phy_mask(dev, B43_PHY_OFDM(0x1B), ~0x001E);
  219. b43_phy_write(dev, B43_PHY_OFDM(0x1F), 0x287A);
  220. b43_phy_maskset(dev, B43_PHY_LPFGAINCTL, ~0x000F, 0x0004);
  221. if (phy->rev >= 6) {
  222. b43_phy_write(dev, B43_PHY_OFDM(0x22), 0x287A);
  223. b43_phy_maskset(dev, B43_PHY_LPFGAINCTL, 0x0FFF, 0x3000);
  224. }
  225. }
  226. b43_phy_maskset(dev, B43_PHY_DIVSRCHIDX, 0x8080, 0x7874);
  227. b43_phy_write(dev, B43_PHY_OFDM(0x8E), 0x1C00);
  228. if (phy->rev == 1) {
  229. b43_phy_maskset(dev, B43_PHY_DIVP1P2GAIN, ~0x0F00, 0x0600);
  230. b43_phy_write(dev, B43_PHY_OFDM(0x8B), 0x005E);
  231. b43_phy_maskset(dev, B43_PHY_ANTWRSETT, ~0x00FF, 0x001E);
  232. b43_phy_write(dev, B43_PHY_OFDM(0x8D), 0x0002);
  233. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 0, 0);
  234. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 1, 7);
  235. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 2, 16);
  236. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 3, 28);
  237. } else {
  238. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 0, 0);
  239. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 1, 7);
  240. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 2, 16);
  241. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 3, 28);
  242. }
  243. if (phy->rev >= 6) {
  244. b43_phy_mask(dev, B43_PHY_OFDM(0x26), ~0x0003);
  245. b43_phy_mask(dev, B43_PHY_OFDM(0x26), ~0x1000);
  246. }
  247. b43_phy_read(dev, B43_PHY_VERSION_OFDM); /* Dummy read */
  248. }
  249. static void b43_wa_tr_ltov(struct b43_wldev *dev) /* TR Lookup Table Original Values */
  250. {
  251. b43_gtab_write(dev, B43_GTAB_ORIGTR, 0, 0x7654);
  252. }
  253. static void b43_wa_cpll_nonpilot(struct b43_wldev *dev)
  254. {
  255. b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_11, 0, 0);
  256. b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_11, 1, 0);
  257. }
  258. static void b43_wa_boards_g(struct b43_wldev *dev)
  259. {
  260. struct ssb_sprom *sprom = dev->dev->bus_sprom;
  261. struct b43_phy *phy = &dev->phy;
  262. if (dev->dev->board_vendor != SSB_BOARDVENDOR_BCM ||
  263. dev->dev->board_type != SSB_BOARD_BU4306 ||
  264. dev->dev->board_rev != 0x17) {
  265. if (phy->rev < 2) {
  266. b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX_R1, 1, 0x0002);
  267. b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX_R1, 2, 0x0001);
  268. } else {
  269. b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 1, 0x0002);
  270. b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 2, 0x0001);
  271. if ((sprom->boardflags_lo & B43_BFL_EXTLNA) &&
  272. (phy->rev >= 7)) {
  273. b43_phy_mask(dev, B43_PHY_EXTG(0x11), 0xF7FF);
  274. b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0020, 0x0001);
  275. b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0021, 0x0001);
  276. b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0022, 0x0001);
  277. b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0023, 0x0000);
  278. b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0000, 0x0000);
  279. b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0003, 0x0002);
  280. }
  281. }
  282. }
  283. if (sprom->boardflags_lo & B43_BFL_FEM) {
  284. b43_phy_write(dev, B43_PHY_GTABCTL, 0x3120);
  285. b43_phy_write(dev, B43_PHY_GTABDATA, 0xC480);
  286. }
  287. }
  288. void b43_wa_all(struct b43_wldev *dev)
  289. {
  290. struct b43_phy *phy = &dev->phy;
  291. if (phy->type == B43_PHYTYPE_G) {
  292. switch (phy->rev) {
  293. case 1://XXX review rev1
  294. b43_wa_crs_ed(dev);
  295. b43_wa_crs_thr(dev);
  296. b43_wa_crs_blank(dev);
  297. b43_wa_cck_shiftbits(dev);
  298. b43_wa_fft(dev);
  299. b43_wa_nft(dev);
  300. b43_wa_rt(dev);
  301. b43_wa_nst(dev);
  302. b43_wa_art(dev);
  303. b43_wa_wrssi_offset(dev);
  304. b43_wa_altagc(dev);
  305. break;
  306. case 2:
  307. case 6:
  308. case 7:
  309. case 8:
  310. case 9:
  311. b43_wa_tr_ltov(dev);
  312. b43_wa_crs_ed(dev);
  313. b43_wa_rssi_lt(dev);
  314. b43_wa_nft(dev);
  315. b43_wa_nst(dev);
  316. b43_wa_msst(dev);
  317. b43_wa_wrssi_offset(dev);
  318. b43_wa_altagc(dev);
  319. b43_wa_analog(dev);
  320. b43_wa_txpuoff_rxpuon(dev);
  321. break;
  322. default:
  323. B43_WARN_ON(1);
  324. }
  325. b43_wa_boards_g(dev);
  326. } else { /* No N PHY support so far, LP PHY is in phy_lp.c */
  327. B43_WARN_ON(1);
  328. }
  329. b43_wa_cpll_nonpilot(dev);
  330. }