ca8210.c 82 KB

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  1. /*
  2. * http://www.cascoda.com/products/ca-821x/
  3. * Copyright (c) 2016, Cascoda, Ltd.
  4. * All rights reserved.
  5. *
  6. * This code is dual-licensed under both GPLv2 and 3-clause BSD. What follows is
  7. * the license notice for both respectively.
  8. *
  9. *******************************************************************************
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version 2
  14. * of the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. *******************************************************************************
  22. *
  23. * Redistribution and use in source and binary forms, with or without
  24. * modification, are permitted provided that the following conditions are met:
  25. *
  26. * 1. Redistributions of source code must retain the above copyright notice,
  27. * this list of conditions and the following disclaimer.
  28. *
  29. * 2. Redistributions in binary form must reproduce the above copyright notice,
  30. * this list of conditions and the following disclaimer in the documentation
  31. * and/or other materials provided with the distribution.
  32. *
  33. * 3. Neither the name of the copyright holder nor the names of its contributors
  34. * may be used to endorse or promote products derived from this software without
  35. * specific prior written permission.
  36. *
  37. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  38. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  39. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  40. * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
  41. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  42. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  43. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  44. * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  45. * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  46. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  47. * POSSIBILITY OF SUCH DAMAGE.
  48. */
  49. #include <linux/cdev.h>
  50. #include <linux/clk-provider.h>
  51. #include <linux/debugfs.h>
  52. #include <linux/delay.h>
  53. #include <linux/gpio.h>
  54. #include <linux/ieee802154.h>
  55. #include <linux/io.h>
  56. #include <linux/kfifo.h>
  57. #include <linux/of.h>
  58. #include <linux/of_device.h>
  59. #include <linux/of_gpio.h>
  60. #include <linux/module.h>
  61. #include <linux/mutex.h>
  62. #include <linux/poll.h>
  63. #include <linux/skbuff.h>
  64. #include <linux/slab.h>
  65. #include <linux/spi/spi.h>
  66. #include <linux/spinlock.h>
  67. #include <linux/string.h>
  68. #include <linux/workqueue.h>
  69. #include <linux/interrupt.h>
  70. #include <net/ieee802154_netdev.h>
  71. #include <net/mac802154.h>
  72. #define DRIVER_NAME "ca8210"
  73. /* external clock frequencies */
  74. #define ONE_MHZ 1000000
  75. #define TWO_MHZ (2 * ONE_MHZ)
  76. #define FOUR_MHZ (4 * ONE_MHZ)
  77. #define EIGHT_MHZ (8 * ONE_MHZ)
  78. #define SIXTEEN_MHZ (16 * ONE_MHZ)
  79. /* spi constants */
  80. #define CA8210_SPI_BUF_SIZE 256
  81. #define CA8210_SYNC_TIMEOUT 1000 /* Timeout for synchronous commands [ms] */
  82. /* test interface constants */
  83. #define CA8210_TEST_INT_FILE_NAME "ca8210_test"
  84. #define CA8210_TEST_INT_FIFO_SIZE 256
  85. /* HWME attribute IDs */
  86. #define HWME_EDTHRESHOLD (0x04)
  87. #define HWME_EDVALUE (0x06)
  88. #define HWME_SYSCLKOUT (0x0F)
  89. #define HWME_LQILIMIT (0x11)
  90. /* TDME attribute IDs */
  91. #define TDME_CHANNEL (0x00)
  92. #define TDME_ATM_CONFIG (0x06)
  93. #define MAX_HWME_ATTRIBUTE_SIZE 16
  94. #define MAX_TDME_ATTRIBUTE_SIZE 2
  95. /* PHY/MAC PIB Attribute Enumerations */
  96. #define PHY_CURRENT_CHANNEL (0x00)
  97. #define PHY_TRANSMIT_POWER (0x02)
  98. #define PHY_CCA_MODE (0x03)
  99. #define MAC_ASSOCIATION_PERMIT (0x41)
  100. #define MAC_AUTO_REQUEST (0x42)
  101. #define MAC_BATT_LIFE_EXT (0x43)
  102. #define MAC_BATT_LIFE_EXT_PERIODS (0x44)
  103. #define MAC_BEACON_PAYLOAD (0x45)
  104. #define MAC_BEACON_PAYLOAD_LENGTH (0x46)
  105. #define MAC_BEACON_ORDER (0x47)
  106. #define MAC_GTS_PERMIT (0x4d)
  107. #define MAC_MAX_CSMA_BACKOFFS (0x4e)
  108. #define MAC_MIN_BE (0x4f)
  109. #define MAC_PAN_ID (0x50)
  110. #define MAC_PROMISCUOUS_MODE (0x51)
  111. #define MAC_RX_ON_WHEN_IDLE (0x52)
  112. #define MAC_SHORT_ADDRESS (0x53)
  113. #define MAC_SUPERFRAME_ORDER (0x54)
  114. #define MAC_ASSOCIATED_PAN_COORD (0x56)
  115. #define MAC_MAX_BE (0x57)
  116. #define MAC_MAX_FRAME_RETRIES (0x59)
  117. #define MAC_RESPONSE_WAIT_TIME (0x5A)
  118. #define MAC_SECURITY_ENABLED (0x5D)
  119. #define MAC_AUTO_REQUEST_SECURITY_LEVEL (0x78)
  120. #define MAC_AUTO_REQUEST_KEY_ID_MODE (0x79)
  121. #define NS_IEEE_ADDRESS (0xFF) /* Non-standard IEEE address */
  122. /* MAC Address Mode Definitions */
  123. #define MAC_MODE_NO_ADDR (0x00)
  124. #define MAC_MODE_SHORT_ADDR (0x02)
  125. #define MAC_MODE_LONG_ADDR (0x03)
  126. /* MAC constants */
  127. #define MAX_BEACON_OVERHEAD (75)
  128. #define MAX_BEACON_PAYLOAD_LENGTH (IEEE802154_MTU - MAX_BEACON_OVERHEAD)
  129. #define MAX_ATTRIBUTE_SIZE (122)
  130. #define MAX_DATA_SIZE (114)
  131. #define CA8210_VALID_CHANNELS (0x07FFF800)
  132. /* MAC workarounds for V1.1 and MPW silicon (V0.x) */
  133. #define CA8210_MAC_WORKAROUNDS (0)
  134. #define CA8210_MAC_MPW (0)
  135. /* memory manipulation macros */
  136. #define LS_BYTE(x) ((u8)((x) & 0xFF))
  137. #define MS_BYTE(x) ((u8)(((x) >> 8) & 0xFF))
  138. /* message ID codes in SPI commands */
  139. /* downstream */
  140. #define MCPS_DATA_REQUEST (0x00)
  141. #define MLME_ASSOCIATE_REQUEST (0x02)
  142. #define MLME_ASSOCIATE_RESPONSE (0x03)
  143. #define MLME_DISASSOCIATE_REQUEST (0x04)
  144. #define MLME_GET_REQUEST (0x05)
  145. #define MLME_ORPHAN_RESPONSE (0x06)
  146. #define MLME_RESET_REQUEST (0x07)
  147. #define MLME_RX_ENABLE_REQUEST (0x08)
  148. #define MLME_SCAN_REQUEST (0x09)
  149. #define MLME_SET_REQUEST (0x0A)
  150. #define MLME_START_REQUEST (0x0B)
  151. #define MLME_POLL_REQUEST (0x0D)
  152. #define HWME_SET_REQUEST (0x0E)
  153. #define HWME_GET_REQUEST (0x0F)
  154. #define TDME_SETSFR_REQUEST (0x11)
  155. #define TDME_GETSFR_REQUEST (0x12)
  156. #define TDME_SET_REQUEST (0x14)
  157. /* upstream */
  158. #define MCPS_DATA_INDICATION (0x00)
  159. #define MCPS_DATA_CONFIRM (0x01)
  160. #define MLME_RESET_CONFIRM (0x0A)
  161. #define MLME_SET_CONFIRM (0x0E)
  162. #define MLME_START_CONFIRM (0x0F)
  163. #define HWME_SET_CONFIRM (0x12)
  164. #define HWME_GET_CONFIRM (0x13)
  165. #define HWME_WAKEUP_INDICATION (0x15)
  166. #define TDME_SETSFR_CONFIRM (0x17)
  167. /* SPI command IDs */
  168. /* bit indicating a confirm or indication from slave to master */
  169. #define SPI_S2M (0x20)
  170. /* bit indicating a synchronous message */
  171. #define SPI_SYN (0x40)
  172. /* SPI command definitions */
  173. #define SPI_IDLE (0xFF)
  174. #define SPI_NACK (0xF0)
  175. #define SPI_MCPS_DATA_REQUEST (MCPS_DATA_REQUEST)
  176. #define SPI_MCPS_DATA_INDICATION (MCPS_DATA_INDICATION + SPI_S2M)
  177. #define SPI_MCPS_DATA_CONFIRM (MCPS_DATA_CONFIRM + SPI_S2M)
  178. #define SPI_MLME_ASSOCIATE_REQUEST (MLME_ASSOCIATE_REQUEST)
  179. #define SPI_MLME_RESET_REQUEST (MLME_RESET_REQUEST + SPI_SYN)
  180. #define SPI_MLME_SET_REQUEST (MLME_SET_REQUEST + SPI_SYN)
  181. #define SPI_MLME_START_REQUEST (MLME_START_REQUEST + SPI_SYN)
  182. #define SPI_MLME_RESET_CONFIRM (MLME_RESET_CONFIRM + SPI_S2M + SPI_SYN)
  183. #define SPI_MLME_SET_CONFIRM (MLME_SET_CONFIRM + SPI_S2M + SPI_SYN)
  184. #define SPI_MLME_START_CONFIRM (MLME_START_CONFIRM + SPI_S2M + SPI_SYN)
  185. #define SPI_HWME_SET_REQUEST (HWME_SET_REQUEST + SPI_SYN)
  186. #define SPI_HWME_GET_REQUEST (HWME_GET_REQUEST + SPI_SYN)
  187. #define SPI_HWME_SET_CONFIRM (HWME_SET_CONFIRM + SPI_S2M + SPI_SYN)
  188. #define SPI_HWME_GET_CONFIRM (HWME_GET_CONFIRM + SPI_S2M + SPI_SYN)
  189. #define SPI_HWME_WAKEUP_INDICATION (HWME_WAKEUP_INDICATION + SPI_S2M)
  190. #define SPI_TDME_SETSFR_REQUEST (TDME_SETSFR_REQUEST + SPI_SYN)
  191. #define SPI_TDME_SET_REQUEST (TDME_SET_REQUEST + SPI_SYN)
  192. #define SPI_TDME_SETSFR_CONFIRM (TDME_SETSFR_CONFIRM + SPI_S2M + SPI_SYN)
  193. /* TDME SFR addresses */
  194. /* Page 0 */
  195. #define CA8210_SFR_PACFG (0xB1)
  196. #define CA8210_SFR_MACCON (0xD8)
  197. #define CA8210_SFR_PACFGIB (0xFE)
  198. /* Page 1 */
  199. #define CA8210_SFR_LOTXCAL (0xBF)
  200. #define CA8210_SFR_PTHRH (0xD1)
  201. #define CA8210_SFR_PRECFG (0xD3)
  202. #define CA8210_SFR_LNAGX40 (0xE1)
  203. #define CA8210_SFR_LNAGX41 (0xE2)
  204. #define CA8210_SFR_LNAGX42 (0xE3)
  205. #define CA8210_SFR_LNAGX43 (0xE4)
  206. #define CA8210_SFR_LNAGX44 (0xE5)
  207. #define CA8210_SFR_LNAGX45 (0xE6)
  208. #define CA8210_SFR_LNAGX46 (0xE7)
  209. #define CA8210_SFR_LNAGX47 (0xE9)
  210. #define PACFGIB_DEFAULT_CURRENT (0x3F)
  211. #define PTHRH_DEFAULT_THRESHOLD (0x5A)
  212. #define LNAGX40_DEFAULT_GAIN (0x29) /* 10dB */
  213. #define LNAGX41_DEFAULT_GAIN (0x54) /* 21dB */
  214. #define LNAGX42_DEFAULT_GAIN (0x6C) /* 27dB */
  215. #define LNAGX43_DEFAULT_GAIN (0x7A) /* 30dB */
  216. #define LNAGX44_DEFAULT_GAIN (0x84) /* 33dB */
  217. #define LNAGX45_DEFAULT_GAIN (0x8B) /* 34dB */
  218. #define LNAGX46_DEFAULT_GAIN (0x92) /* 36dB */
  219. #define LNAGX47_DEFAULT_GAIN (0x96) /* 37dB */
  220. #define CA8210_IOCTL_HARD_RESET (0x00)
  221. /* Structs/Enums */
  222. /**
  223. * struct cas_control - spi transfer structure
  224. * @msg: spi_message for each exchange
  225. * @transfer: spi_transfer for each exchange
  226. * @tx_buf: source array for transmission
  227. * @tx_in_buf: array storing bytes received during transmission
  228. * @priv: pointer to private data
  229. *
  230. * This structure stores all the necessary data passed around during a single
  231. * spi exchange.
  232. */
  233. struct cas_control {
  234. struct spi_message msg;
  235. struct spi_transfer transfer;
  236. u8 tx_buf[CA8210_SPI_BUF_SIZE];
  237. u8 tx_in_buf[CA8210_SPI_BUF_SIZE];
  238. struct ca8210_priv *priv;
  239. };
  240. /**
  241. * struct ca8210_test - ca8210 test interface structure
  242. * @ca8210_dfs_spi_int: pointer to the entry in the debug fs for this device
  243. * @up_fifo: fifo for upstream messages
  244. * @readq: read wait queue
  245. *
  246. * This structure stores all the data pertaining to the debug interface
  247. */
  248. struct ca8210_test {
  249. struct dentry *ca8210_dfs_spi_int;
  250. struct kfifo up_fifo;
  251. wait_queue_head_t readq;
  252. };
  253. /**
  254. * struct ca8210_priv - ca8210 private data structure
  255. * @spi: pointer to the ca8210 spi device object
  256. * @hw: pointer to the ca8210 ieee802154_hw object
  257. * @hw_registered: true if hw has been registered with ieee802154
  258. * @lock: spinlock protecting the private data area
  259. * @mlme_workqueue: workqueue for triggering MLME Reset
  260. * @irq_workqueue: workqueue for irq processing
  261. * @tx_skb: current socket buffer to transmit
  262. * @nextmsduhandle: msdu handle to pass to the 15.4 MAC layer for the
  263. * next transmission
  264. * @clk: external clock provided by the ca8210
  265. * @last_dsn: sequence number of last data packet received, for
  266. * resend detection
  267. * @test: test interface data section for this instance
  268. * @async_tx_pending: true if an asynchronous transmission was started and
  269. * is not complete
  270. * @sync_command_response: pointer to buffer to fill with sync response
  271. * @ca8210_is_awake: nonzero if ca8210 is initialised, ready for comms
  272. * @sync_down: counts number of downstream synchronous commands
  273. * @sync_up: counts number of upstream synchronous commands
  274. * @spi_transfer_complete: completion object for a single spi_transfer
  275. * @sync_exchange_complete: completion object for a complete synchronous API
  276. * exchange
  277. * @promiscuous: whether the ca8210 is in promiscuous mode or not
  278. * @retries: records how many times the current pending spi
  279. * transfer has been retried
  280. */
  281. struct ca8210_priv {
  282. struct spi_device *spi;
  283. struct ieee802154_hw *hw;
  284. bool hw_registered;
  285. spinlock_t lock;
  286. struct workqueue_struct *mlme_workqueue;
  287. struct workqueue_struct *irq_workqueue;
  288. struct sk_buff *tx_skb;
  289. u8 nextmsduhandle;
  290. struct clk *clk;
  291. int last_dsn;
  292. struct ca8210_test test;
  293. bool async_tx_pending;
  294. u8 *sync_command_response;
  295. struct completion ca8210_is_awake;
  296. int sync_down, sync_up;
  297. struct completion spi_transfer_complete, sync_exchange_complete;
  298. bool promiscuous;
  299. int retries;
  300. };
  301. /**
  302. * struct work_priv_container - link between a work object and the relevant
  303. * device's private data
  304. * @work: work object being executed
  305. * @priv: device's private data section
  306. *
  307. */
  308. struct work_priv_container {
  309. struct work_struct work;
  310. struct ca8210_priv *priv;
  311. };
  312. /**
  313. * struct ca8210_platform_data - ca8210 platform data structure
  314. * @extclockenable: true if the external clock is to be enabled
  315. * @extclockfreq: frequency of the external clock
  316. * @extclockgpio: ca8210 output gpio of the external clock
  317. * @gpio_reset: gpio number of ca8210 reset line
  318. * @gpio_irq: gpio number of ca8210 interrupt line
  319. * @irq_id: identifier for the ca8210 irq
  320. *
  321. */
  322. struct ca8210_platform_data {
  323. bool extclockenable;
  324. unsigned int extclockfreq;
  325. unsigned int extclockgpio;
  326. int gpio_reset;
  327. int gpio_irq;
  328. int irq_id;
  329. };
  330. /**
  331. * struct fulladdr - full MAC addressing information structure
  332. * @mode: address mode (none, short, extended)
  333. * @pan_id: 16-bit LE pan id
  334. * @address: LE address, variable length as specified by mode
  335. *
  336. */
  337. struct fulladdr {
  338. u8 mode;
  339. u8 pan_id[2];
  340. u8 address[8];
  341. };
  342. /**
  343. * union macaddr: generic MAC address container
  344. * @short_address: 16-bit short address
  345. * @ieee_address: 64-bit extended address as LE byte array
  346. *
  347. */
  348. union macaddr {
  349. u16 short_address;
  350. u8 ieee_address[8];
  351. };
  352. /**
  353. * struct secspec: security specification for SAP commands
  354. * @security_level: 0-7, controls level of authentication & encryption
  355. * @key_id_mode: 0-3, specifies how to obtain key
  356. * @key_source: extended key retrieval data
  357. * @key_index: single-byte key identifier
  358. *
  359. */
  360. struct secspec {
  361. u8 security_level;
  362. u8 key_id_mode;
  363. u8 key_source[8];
  364. u8 key_index;
  365. };
  366. /* downlink functions parameter set definitions */
  367. struct mcps_data_request_pset {
  368. u8 src_addr_mode;
  369. struct fulladdr dst;
  370. u8 msdu_length;
  371. u8 msdu_handle;
  372. u8 tx_options;
  373. u8 msdu[MAX_DATA_SIZE];
  374. };
  375. struct mlme_set_request_pset {
  376. u8 pib_attribute;
  377. u8 pib_attribute_index;
  378. u8 pib_attribute_length;
  379. u8 pib_attribute_value[MAX_ATTRIBUTE_SIZE];
  380. };
  381. struct hwme_set_request_pset {
  382. u8 hw_attribute;
  383. u8 hw_attribute_length;
  384. u8 hw_attribute_value[MAX_HWME_ATTRIBUTE_SIZE];
  385. };
  386. struct hwme_get_request_pset {
  387. u8 hw_attribute;
  388. };
  389. struct tdme_setsfr_request_pset {
  390. u8 sfr_page;
  391. u8 sfr_address;
  392. u8 sfr_value;
  393. };
  394. /* uplink functions parameter set definitions */
  395. struct hwme_set_confirm_pset {
  396. u8 status;
  397. u8 hw_attribute;
  398. };
  399. struct hwme_get_confirm_pset {
  400. u8 status;
  401. u8 hw_attribute;
  402. u8 hw_attribute_length;
  403. u8 hw_attribute_value[MAX_HWME_ATTRIBUTE_SIZE];
  404. };
  405. struct tdme_setsfr_confirm_pset {
  406. u8 status;
  407. u8 sfr_page;
  408. u8 sfr_address;
  409. };
  410. struct mac_message {
  411. u8 command_id;
  412. u8 length;
  413. union {
  414. struct mcps_data_request_pset data_req;
  415. struct mlme_set_request_pset set_req;
  416. struct hwme_set_request_pset hwme_set_req;
  417. struct hwme_get_request_pset hwme_get_req;
  418. struct tdme_setsfr_request_pset tdme_set_sfr_req;
  419. struct hwme_set_confirm_pset hwme_set_cnf;
  420. struct hwme_get_confirm_pset hwme_get_cnf;
  421. struct tdme_setsfr_confirm_pset tdme_set_sfr_cnf;
  422. u8 u8param;
  423. u8 status;
  424. u8 payload[148];
  425. } pdata;
  426. };
  427. union pa_cfg_sfr {
  428. struct {
  429. u8 bias_current_trim : 3;
  430. u8 /* reserved */ : 1;
  431. u8 buffer_capacitor_trim : 3;
  432. u8 boost : 1;
  433. };
  434. u8 paib;
  435. };
  436. struct preamble_cfg_sfr {
  437. u8 timeout_symbols : 3;
  438. u8 acquisition_symbols : 3;
  439. u8 search_symbols : 2;
  440. };
  441. static int (*cascoda_api_upstream)(
  442. const u8 *buf,
  443. size_t len,
  444. void *device_ref
  445. );
  446. /**
  447. * link_to_linux_err() - Translates an 802.15.4 return code into the closest
  448. * linux error
  449. * @link_status: 802.15.4 status code
  450. *
  451. * Return: 0 or Linux error code
  452. */
  453. static int link_to_linux_err(int link_status)
  454. {
  455. if (link_status < 0) {
  456. /* status is already a Linux code */
  457. return link_status;
  458. }
  459. switch (link_status) {
  460. case IEEE802154_SUCCESS:
  461. case IEEE802154_REALIGNMENT:
  462. return 0;
  463. case IEEE802154_IMPROPER_KEY_TYPE:
  464. return -EKEYREJECTED;
  465. case IEEE802154_IMPROPER_SECURITY_LEVEL:
  466. case IEEE802154_UNSUPPORTED_LEGACY:
  467. case IEEE802154_DENIED:
  468. return -EACCES;
  469. case IEEE802154_BEACON_LOST:
  470. case IEEE802154_NO_ACK:
  471. case IEEE802154_NO_BEACON:
  472. return -ENETUNREACH;
  473. case IEEE802154_CHANNEL_ACCESS_FAILURE:
  474. case IEEE802154_TX_ACTIVE:
  475. case IEEE802154_SCAN_IN_PROGRESS:
  476. return -EBUSY;
  477. case IEEE802154_DISABLE_TRX_FAILURE:
  478. case IEEE802154_OUT_OF_CAP:
  479. return -EAGAIN;
  480. case IEEE802154_FRAME_TOO_LONG:
  481. return -EMSGSIZE;
  482. case IEEE802154_INVALID_GTS:
  483. case IEEE802154_PAST_TIME:
  484. return -EBADSLT;
  485. case IEEE802154_INVALID_HANDLE:
  486. return -EBADMSG;
  487. case IEEE802154_INVALID_PARAMETER:
  488. case IEEE802154_UNSUPPORTED_ATTRIBUTE:
  489. case IEEE802154_ON_TIME_TOO_LONG:
  490. case IEEE802154_INVALID_INDEX:
  491. return -EINVAL;
  492. case IEEE802154_NO_DATA:
  493. return -ENODATA;
  494. case IEEE802154_NO_SHORT_ADDRESS:
  495. return -EFAULT;
  496. case IEEE802154_PAN_ID_CONFLICT:
  497. return -EADDRINUSE;
  498. case IEEE802154_TRANSACTION_EXPIRED:
  499. return -ETIME;
  500. case IEEE802154_TRANSACTION_OVERFLOW:
  501. return -ENOBUFS;
  502. case IEEE802154_UNAVAILABLE_KEY:
  503. return -ENOKEY;
  504. case IEEE802154_INVALID_ADDRESS:
  505. return -ENXIO;
  506. case IEEE802154_TRACKING_OFF:
  507. case IEEE802154_SUPERFRAME_OVERLAP:
  508. return -EREMOTEIO;
  509. case IEEE802154_LIMIT_REACHED:
  510. return -EDQUOT;
  511. case IEEE802154_READ_ONLY:
  512. return -EROFS;
  513. default:
  514. return -EPROTO;
  515. }
  516. }
  517. /**
  518. * ca8210_test_int_driver_write() - Writes a message to the test interface to be
  519. * read by the userspace
  520. * @buf: Buffer containing upstream message
  521. * @len: length of message to write
  522. * @spi: SPI device of message originator
  523. *
  524. * Return: 0 or linux error code
  525. */
  526. static int ca8210_test_int_driver_write(
  527. const u8 *buf,
  528. size_t len,
  529. void *spi
  530. )
  531. {
  532. struct ca8210_priv *priv = spi_get_drvdata(spi);
  533. struct ca8210_test *test = &priv->test;
  534. char *fifo_buffer;
  535. int i;
  536. dev_dbg(
  537. &priv->spi->dev,
  538. "test_interface: Buffering upstream message:\n"
  539. );
  540. for (i = 0; i < len; i++)
  541. dev_dbg(&priv->spi->dev, "%#03x\n", buf[i]);
  542. fifo_buffer = kmemdup(buf, len, GFP_KERNEL);
  543. if (!fifo_buffer)
  544. return -ENOMEM;
  545. kfifo_in(&test->up_fifo, &fifo_buffer, 4);
  546. wake_up_interruptible(&priv->test.readq);
  547. return 0;
  548. }
  549. /* SPI Operation */
  550. static int ca8210_net_rx(
  551. struct ieee802154_hw *hw,
  552. u8 *command,
  553. size_t len
  554. );
  555. static u8 mlme_reset_request_sync(
  556. u8 set_default_pib,
  557. void *device_ref
  558. );
  559. static int ca8210_spi_transfer(
  560. struct spi_device *spi,
  561. const u8 *buf,
  562. size_t len
  563. );
  564. /**
  565. * ca8210_reset_send() - Hard resets the ca8210 for a given time
  566. * @spi: Pointer to target ca8210 spi device
  567. * @ms: Milliseconds to hold the reset line low for
  568. */
  569. static void ca8210_reset_send(struct spi_device *spi, unsigned int ms)
  570. {
  571. struct ca8210_platform_data *pdata = spi->dev.platform_data;
  572. struct ca8210_priv *priv = spi_get_drvdata(spi);
  573. long status;
  574. gpio_set_value(pdata->gpio_reset, 0);
  575. reinit_completion(&priv->ca8210_is_awake);
  576. msleep(ms);
  577. gpio_set_value(pdata->gpio_reset, 1);
  578. priv->promiscuous = false;
  579. /* Wait until wakeup indication seen */
  580. status = wait_for_completion_interruptible_timeout(
  581. &priv->ca8210_is_awake,
  582. msecs_to_jiffies(CA8210_SYNC_TIMEOUT)
  583. );
  584. if (status == 0) {
  585. dev_crit(
  586. &spi->dev,
  587. "Fatal: No wakeup from ca8210 after reset!\n"
  588. );
  589. }
  590. dev_dbg(&spi->dev, "Reset the device\n");
  591. }
  592. /**
  593. * ca8210_mlme_reset_worker() - Resets the MLME, Called when the MAC OVERFLOW
  594. * condition happens.
  595. * @work: Pointer to work being executed
  596. */
  597. static void ca8210_mlme_reset_worker(struct work_struct *work)
  598. {
  599. struct work_priv_container *wpc = container_of(
  600. work,
  601. struct work_priv_container,
  602. work
  603. );
  604. struct ca8210_priv *priv = wpc->priv;
  605. mlme_reset_request_sync(0, priv->spi);
  606. kfree(wpc);
  607. }
  608. /**
  609. * ca8210_rx_done() - Calls various message dispatches responding to a received
  610. * command
  611. * @cas_ctl: Pointer to the cas_control object for the relevant spi transfer
  612. *
  613. * Presents a received SAP command from the ca8210 to the Cascoda EVBME, test
  614. * interface and network driver.
  615. */
  616. static void ca8210_rx_done(struct cas_control *cas_ctl)
  617. {
  618. u8 *buf;
  619. unsigned int len;
  620. struct work_priv_container *mlme_reset_wpc;
  621. struct ca8210_priv *priv = cas_ctl->priv;
  622. buf = cas_ctl->tx_in_buf;
  623. len = buf[1] + 2;
  624. if (len > CA8210_SPI_BUF_SIZE) {
  625. dev_crit(
  626. &priv->spi->dev,
  627. "Received packet len (%u) erroneously long\n",
  628. len
  629. );
  630. goto finish;
  631. }
  632. if (buf[0] & SPI_SYN) {
  633. if (priv->sync_command_response) {
  634. memcpy(priv->sync_command_response, buf, len);
  635. complete(&priv->sync_exchange_complete);
  636. } else {
  637. if (cascoda_api_upstream)
  638. cascoda_api_upstream(buf, len, priv->spi);
  639. priv->sync_up++;
  640. }
  641. } else {
  642. if (cascoda_api_upstream)
  643. cascoda_api_upstream(buf, len, priv->spi);
  644. }
  645. ca8210_net_rx(priv->hw, buf, len);
  646. if (buf[0] == SPI_MCPS_DATA_CONFIRM) {
  647. if (buf[3] == IEEE802154_TRANSACTION_OVERFLOW) {
  648. dev_info(
  649. &priv->spi->dev,
  650. "Waiting for transaction overflow to stabilise...\n");
  651. msleep(2000);
  652. dev_info(
  653. &priv->spi->dev,
  654. "Resetting MAC...\n");
  655. mlme_reset_wpc = kmalloc(sizeof(*mlme_reset_wpc),
  656. GFP_KERNEL);
  657. if (!mlme_reset_wpc)
  658. goto finish;
  659. INIT_WORK(
  660. &mlme_reset_wpc->work,
  661. ca8210_mlme_reset_worker
  662. );
  663. mlme_reset_wpc->priv = priv;
  664. queue_work(priv->mlme_workqueue, &mlme_reset_wpc->work);
  665. }
  666. } else if (buf[0] == SPI_HWME_WAKEUP_INDICATION) {
  667. dev_notice(
  668. &priv->spi->dev,
  669. "Wakeup indication received, reason:\n"
  670. );
  671. switch (buf[2]) {
  672. case 0:
  673. dev_notice(
  674. &priv->spi->dev,
  675. "Transceiver woken up from Power Up / System Reset\n"
  676. );
  677. break;
  678. case 1:
  679. dev_notice(
  680. &priv->spi->dev,
  681. "Watchdog Timer Time-Out\n"
  682. );
  683. break;
  684. case 2:
  685. dev_notice(
  686. &priv->spi->dev,
  687. "Transceiver woken up from Power-Off by Sleep Timer Time-Out\n");
  688. break;
  689. case 3:
  690. dev_notice(
  691. &priv->spi->dev,
  692. "Transceiver woken up from Power-Off by GPIO Activity\n"
  693. );
  694. break;
  695. case 4:
  696. dev_notice(
  697. &priv->spi->dev,
  698. "Transceiver woken up from Standby by Sleep Timer Time-Out\n"
  699. );
  700. break;
  701. case 5:
  702. dev_notice(
  703. &priv->spi->dev,
  704. "Transceiver woken up from Standby by GPIO Activity\n"
  705. );
  706. break;
  707. case 6:
  708. dev_notice(
  709. &priv->spi->dev,
  710. "Sleep-Timer Time-Out in Active Mode\n"
  711. );
  712. break;
  713. default:
  714. dev_warn(&priv->spi->dev, "Wakeup reason unknown\n");
  715. break;
  716. }
  717. complete(&priv->ca8210_is_awake);
  718. }
  719. finish:;
  720. }
  721. static void ca8210_remove(struct spi_device *spi_device);
  722. /**
  723. * ca8210_spi_transfer_complete() - Called when a single spi transfer has
  724. * completed
  725. * @context: Pointer to the cas_control object for the finished transfer
  726. */
  727. static void ca8210_spi_transfer_complete(void *context)
  728. {
  729. struct cas_control *cas_ctl = context;
  730. struct ca8210_priv *priv = cas_ctl->priv;
  731. bool duplex_rx = false;
  732. int i;
  733. u8 retry_buffer[CA8210_SPI_BUF_SIZE];
  734. if (
  735. cas_ctl->tx_in_buf[0] == SPI_NACK ||
  736. (cas_ctl->tx_in_buf[0] == SPI_IDLE &&
  737. cas_ctl->tx_in_buf[1] == SPI_NACK)
  738. ) {
  739. /* ca8210 is busy */
  740. dev_info(&priv->spi->dev, "ca8210 was busy during attempted write\n");
  741. if (cas_ctl->tx_buf[0] == SPI_IDLE) {
  742. dev_warn(
  743. &priv->spi->dev,
  744. "IRQ servicing NACKd, dropping transfer\n"
  745. );
  746. kfree(cas_ctl);
  747. return;
  748. }
  749. if (priv->retries > 3) {
  750. dev_err(&priv->spi->dev, "too many retries!\n");
  751. kfree(cas_ctl);
  752. ca8210_remove(priv->spi);
  753. return;
  754. }
  755. memcpy(retry_buffer, cas_ctl->tx_buf, CA8210_SPI_BUF_SIZE);
  756. kfree(cas_ctl);
  757. ca8210_spi_transfer(
  758. priv->spi,
  759. retry_buffer,
  760. CA8210_SPI_BUF_SIZE
  761. );
  762. priv->retries++;
  763. dev_info(&priv->spi->dev, "retried spi write\n");
  764. return;
  765. } else if (
  766. cas_ctl->tx_in_buf[0] != SPI_IDLE &&
  767. cas_ctl->tx_in_buf[0] != SPI_NACK
  768. ) {
  769. duplex_rx = true;
  770. }
  771. if (duplex_rx) {
  772. dev_dbg(&priv->spi->dev, "READ CMD DURING TX\n");
  773. for (i = 0; i < cas_ctl->tx_in_buf[1] + 2; i++)
  774. dev_dbg(
  775. &priv->spi->dev,
  776. "%#03x\n",
  777. cas_ctl->tx_in_buf[i]
  778. );
  779. ca8210_rx_done(cas_ctl);
  780. }
  781. complete(&priv->spi_transfer_complete);
  782. kfree(cas_ctl);
  783. priv->retries = 0;
  784. }
  785. /**
  786. * ca8210_spi_transfer() - Initiate duplex spi transfer with ca8210
  787. * @spi: Pointer to spi device for transfer
  788. * @buf: Octet array to send
  789. * @len: length of the buffer being sent
  790. *
  791. * Return: 0 or linux error code
  792. */
  793. static int ca8210_spi_transfer(
  794. struct spi_device *spi,
  795. const u8 *buf,
  796. size_t len
  797. )
  798. {
  799. int i, status = 0;
  800. struct ca8210_priv *priv;
  801. struct cas_control *cas_ctl;
  802. if (!spi) {
  803. pr_crit("NULL spi device passed to %s\n", __func__);
  804. return -ENODEV;
  805. }
  806. priv = spi_get_drvdata(spi);
  807. reinit_completion(&priv->spi_transfer_complete);
  808. dev_dbg(&spi->dev, "%s called\n", __func__);
  809. cas_ctl = kzalloc(sizeof(*cas_ctl), GFP_ATOMIC);
  810. if (!cas_ctl)
  811. return -ENOMEM;
  812. cas_ctl->priv = priv;
  813. memset(cas_ctl->tx_buf, SPI_IDLE, CA8210_SPI_BUF_SIZE);
  814. memset(cas_ctl->tx_in_buf, SPI_IDLE, CA8210_SPI_BUF_SIZE);
  815. memcpy(cas_ctl->tx_buf, buf, len);
  816. for (i = 0; i < len; i++)
  817. dev_dbg(&spi->dev, "%#03x\n", cas_ctl->tx_buf[i]);
  818. spi_message_init(&cas_ctl->msg);
  819. cas_ctl->transfer.tx_nbits = 1; /* 1 MOSI line */
  820. cas_ctl->transfer.rx_nbits = 1; /* 1 MISO line */
  821. cas_ctl->transfer.speed_hz = 0; /* Use device setting */
  822. cas_ctl->transfer.bits_per_word = 0; /* Use device setting */
  823. cas_ctl->transfer.tx_buf = cas_ctl->tx_buf;
  824. cas_ctl->transfer.rx_buf = cas_ctl->tx_in_buf;
  825. cas_ctl->transfer.delay.value = 0;
  826. cas_ctl->transfer.delay.unit = SPI_DELAY_UNIT_USECS;
  827. cas_ctl->transfer.cs_change = 0;
  828. cas_ctl->transfer.len = sizeof(struct mac_message);
  829. cas_ctl->msg.complete = ca8210_spi_transfer_complete;
  830. cas_ctl->msg.context = cas_ctl;
  831. spi_message_add_tail(
  832. &cas_ctl->transfer,
  833. &cas_ctl->msg
  834. );
  835. status = spi_async(spi, &cas_ctl->msg);
  836. if (status < 0) {
  837. dev_crit(
  838. &spi->dev,
  839. "status %d from spi_sync in write\n",
  840. status
  841. );
  842. }
  843. return status;
  844. }
  845. /**
  846. * ca8210_spi_exchange() - Exchange API/SAP commands with the radio
  847. * @buf: Octet array of command being sent downstream
  848. * @len: length of buf
  849. * @response: buffer for storing synchronous response
  850. * @device_ref: spi_device pointer for ca8210
  851. *
  852. * Effectively calls ca8210_spi_transfer to write buf[] to the spi, then for
  853. * synchronous commands waits for the corresponding response to be read from
  854. * the spi before returning. The response is written to the response parameter.
  855. *
  856. * Return: 0 or linux error code
  857. */
  858. static int ca8210_spi_exchange(
  859. const u8 *buf,
  860. size_t len,
  861. u8 *response,
  862. void *device_ref
  863. )
  864. {
  865. int status = 0;
  866. struct spi_device *spi = device_ref;
  867. struct ca8210_priv *priv = spi->dev.driver_data;
  868. long wait_remaining;
  869. if ((buf[0] & SPI_SYN) && response) { /* if sync wait for confirm */
  870. reinit_completion(&priv->sync_exchange_complete);
  871. priv->sync_command_response = response;
  872. }
  873. do {
  874. reinit_completion(&priv->spi_transfer_complete);
  875. status = ca8210_spi_transfer(priv->spi, buf, len);
  876. if (status) {
  877. dev_warn(
  878. &spi->dev,
  879. "spi write failed, returned %d\n",
  880. status
  881. );
  882. if (status == -EBUSY)
  883. continue;
  884. if (((buf[0] & SPI_SYN) && response))
  885. complete(&priv->sync_exchange_complete);
  886. goto cleanup;
  887. }
  888. wait_remaining = wait_for_completion_interruptible_timeout(
  889. &priv->spi_transfer_complete,
  890. msecs_to_jiffies(1000)
  891. );
  892. if (wait_remaining == -ERESTARTSYS) {
  893. status = -ERESTARTSYS;
  894. } else if (wait_remaining == 0) {
  895. dev_err(
  896. &spi->dev,
  897. "SPI downstream transfer timed out!\n"
  898. );
  899. status = -ETIME;
  900. goto cleanup;
  901. }
  902. } while (status < 0);
  903. if (!((buf[0] & SPI_SYN) && response))
  904. goto cleanup;
  905. wait_remaining = wait_for_completion_interruptible_timeout(
  906. &priv->sync_exchange_complete,
  907. msecs_to_jiffies(CA8210_SYNC_TIMEOUT)
  908. );
  909. if (wait_remaining == -ERESTARTSYS) {
  910. status = -ERESTARTSYS;
  911. } else if (wait_remaining == 0) {
  912. dev_err(
  913. &spi->dev,
  914. "Synchronous confirm timeout\n"
  915. );
  916. status = -ETIME;
  917. }
  918. cleanup:
  919. priv->sync_command_response = NULL;
  920. return status;
  921. }
  922. /**
  923. * ca8210_interrupt_handler() - Called when an irq is received from the ca8210
  924. * @irq: Id of the irq being handled
  925. * @dev_id: Pointer passed by the system, pointing to the ca8210's private data
  926. *
  927. * This function is called when the irq line from the ca8210 is asserted,
  928. * signifying that the ca8210 has a message to send upstream to us. Starts the
  929. * asynchronous spi read.
  930. *
  931. * Return: irq return code
  932. */
  933. static irqreturn_t ca8210_interrupt_handler(int irq, void *dev_id)
  934. {
  935. struct ca8210_priv *priv = dev_id;
  936. int status;
  937. dev_dbg(&priv->spi->dev, "irq: Interrupt occurred\n");
  938. do {
  939. status = ca8210_spi_transfer(priv->spi, NULL, 0);
  940. if (status && (status != -EBUSY)) {
  941. dev_warn(
  942. &priv->spi->dev,
  943. "spi read failed, returned %d\n",
  944. status
  945. );
  946. }
  947. } while (status == -EBUSY);
  948. return IRQ_HANDLED;
  949. }
  950. static int (*cascoda_api_downstream)(
  951. const u8 *buf,
  952. size_t len,
  953. u8 *response,
  954. void *device_ref
  955. ) = ca8210_spi_exchange;
  956. /* Cascoda API / 15.4 SAP Primitives */
  957. /**
  958. * tdme_setsfr_request_sync() - TDME_SETSFR_request/confirm according to API
  959. * @sfr_page: SFR Page
  960. * @sfr_address: SFR Address
  961. * @sfr_value: SFR Value
  962. * @device_ref: Nondescript pointer to target device
  963. *
  964. * Return: 802.15.4 status code of TDME-SETSFR.confirm
  965. */
  966. static u8 tdme_setsfr_request_sync(
  967. u8 sfr_page,
  968. u8 sfr_address,
  969. u8 sfr_value,
  970. void *device_ref
  971. )
  972. {
  973. int ret;
  974. struct mac_message command, response;
  975. struct spi_device *spi = device_ref;
  976. command.command_id = SPI_TDME_SETSFR_REQUEST;
  977. command.length = 3;
  978. command.pdata.tdme_set_sfr_req.sfr_page = sfr_page;
  979. command.pdata.tdme_set_sfr_req.sfr_address = sfr_address;
  980. command.pdata.tdme_set_sfr_req.sfr_value = sfr_value;
  981. response.command_id = SPI_IDLE;
  982. ret = cascoda_api_downstream(
  983. &command.command_id,
  984. command.length + 2,
  985. &response.command_id,
  986. device_ref
  987. );
  988. if (ret) {
  989. dev_crit(&spi->dev, "cascoda_api_downstream returned %d", ret);
  990. return IEEE802154_SYSTEM_ERROR;
  991. }
  992. if (response.command_id != SPI_TDME_SETSFR_CONFIRM) {
  993. dev_crit(
  994. &spi->dev,
  995. "sync response to SPI_TDME_SETSFR_REQUEST was not SPI_TDME_SETSFR_CONFIRM, it was %d\n",
  996. response.command_id
  997. );
  998. return IEEE802154_SYSTEM_ERROR;
  999. }
  1000. return response.pdata.tdme_set_sfr_cnf.status;
  1001. }
  1002. /**
  1003. * tdme_chipinit() - TDME Chip Register Default Initialisation Macro
  1004. * @device_ref: Nondescript pointer to target device
  1005. *
  1006. * Return: 802.15.4 status code of API calls
  1007. */
  1008. static u8 tdme_chipinit(void *device_ref)
  1009. {
  1010. u8 status = IEEE802154_SUCCESS;
  1011. u8 sfr_address;
  1012. struct spi_device *spi = device_ref;
  1013. struct preamble_cfg_sfr pre_cfg_value = {
  1014. .timeout_symbols = 3,
  1015. .acquisition_symbols = 3,
  1016. .search_symbols = 1,
  1017. };
  1018. /* LNA Gain Settings */
  1019. status = tdme_setsfr_request_sync(
  1020. 1, (sfr_address = CA8210_SFR_LNAGX40),
  1021. LNAGX40_DEFAULT_GAIN, device_ref);
  1022. if (status)
  1023. goto finish;
  1024. status = tdme_setsfr_request_sync(
  1025. 1, (sfr_address = CA8210_SFR_LNAGX41),
  1026. LNAGX41_DEFAULT_GAIN, device_ref);
  1027. if (status)
  1028. goto finish;
  1029. status = tdme_setsfr_request_sync(
  1030. 1, (sfr_address = CA8210_SFR_LNAGX42),
  1031. LNAGX42_DEFAULT_GAIN, device_ref);
  1032. if (status)
  1033. goto finish;
  1034. status = tdme_setsfr_request_sync(
  1035. 1, (sfr_address = CA8210_SFR_LNAGX43),
  1036. LNAGX43_DEFAULT_GAIN, device_ref);
  1037. if (status)
  1038. goto finish;
  1039. status = tdme_setsfr_request_sync(
  1040. 1, (sfr_address = CA8210_SFR_LNAGX44),
  1041. LNAGX44_DEFAULT_GAIN, device_ref);
  1042. if (status)
  1043. goto finish;
  1044. status = tdme_setsfr_request_sync(
  1045. 1, (sfr_address = CA8210_SFR_LNAGX45),
  1046. LNAGX45_DEFAULT_GAIN, device_ref);
  1047. if (status)
  1048. goto finish;
  1049. status = tdme_setsfr_request_sync(
  1050. 1, (sfr_address = CA8210_SFR_LNAGX46),
  1051. LNAGX46_DEFAULT_GAIN, device_ref);
  1052. if (status)
  1053. goto finish;
  1054. status = tdme_setsfr_request_sync(
  1055. 1, (sfr_address = CA8210_SFR_LNAGX47),
  1056. LNAGX47_DEFAULT_GAIN, device_ref);
  1057. if (status)
  1058. goto finish;
  1059. /* Preamble Timing Config */
  1060. status = tdme_setsfr_request_sync(
  1061. 1, (sfr_address = CA8210_SFR_PRECFG),
  1062. *((u8 *)&pre_cfg_value), device_ref);
  1063. if (status)
  1064. goto finish;
  1065. /* Preamble Threshold High */
  1066. status = tdme_setsfr_request_sync(
  1067. 1, (sfr_address = CA8210_SFR_PTHRH),
  1068. PTHRH_DEFAULT_THRESHOLD, device_ref);
  1069. if (status)
  1070. goto finish;
  1071. /* Tx Output Power 8 dBm */
  1072. status = tdme_setsfr_request_sync(
  1073. 0, (sfr_address = CA8210_SFR_PACFGIB),
  1074. PACFGIB_DEFAULT_CURRENT, device_ref);
  1075. if (status)
  1076. goto finish;
  1077. finish:
  1078. if (status != IEEE802154_SUCCESS) {
  1079. dev_err(
  1080. &spi->dev,
  1081. "failed to set sfr at %#03x, status = %#03x\n",
  1082. sfr_address,
  1083. status
  1084. );
  1085. }
  1086. return status;
  1087. }
  1088. /**
  1089. * tdme_channelinit() - TDME Channel Register Default Initialisation Macro (Tx)
  1090. * @channel: 802.15.4 channel to initialise chip for
  1091. * @device_ref: Nondescript pointer to target device
  1092. *
  1093. * Return: 802.15.4 status code of API calls
  1094. */
  1095. static u8 tdme_channelinit(u8 channel, void *device_ref)
  1096. {
  1097. /* Transceiver front-end local oscillator tx two-point calibration
  1098. * value. Tuned for the hardware.
  1099. */
  1100. u8 txcalval;
  1101. if (channel >= 25)
  1102. txcalval = 0xA7;
  1103. else if (channel >= 23)
  1104. txcalval = 0xA8;
  1105. else if (channel >= 22)
  1106. txcalval = 0xA9;
  1107. else if (channel >= 20)
  1108. txcalval = 0xAA;
  1109. else if (channel >= 17)
  1110. txcalval = 0xAB;
  1111. else if (channel >= 16)
  1112. txcalval = 0xAC;
  1113. else if (channel >= 14)
  1114. txcalval = 0xAD;
  1115. else if (channel >= 12)
  1116. txcalval = 0xAE;
  1117. else
  1118. txcalval = 0xAF;
  1119. return tdme_setsfr_request_sync(
  1120. 1,
  1121. CA8210_SFR_LOTXCAL,
  1122. txcalval,
  1123. device_ref
  1124. ); /* LO Tx Cal */
  1125. }
  1126. /**
  1127. * tdme_checkpibattribute() - Checks Attribute Values that are not checked in
  1128. * MAC
  1129. * @pib_attribute: Attribute Number
  1130. * @pib_attribute_length: Attribute length
  1131. * @pib_attribute_value: Pointer to Attribute Value
  1132. *
  1133. * Return: 802.15.4 status code of checks
  1134. */
  1135. static u8 tdme_checkpibattribute(
  1136. u8 pib_attribute,
  1137. u8 pib_attribute_length,
  1138. const void *pib_attribute_value
  1139. )
  1140. {
  1141. u8 status = IEEE802154_SUCCESS;
  1142. u8 value;
  1143. value = *((u8 *)pib_attribute_value);
  1144. switch (pib_attribute) {
  1145. /* PHY */
  1146. case PHY_TRANSMIT_POWER:
  1147. if (value > 0x3F)
  1148. status = IEEE802154_INVALID_PARAMETER;
  1149. break;
  1150. case PHY_CCA_MODE:
  1151. if (value > 0x03)
  1152. status = IEEE802154_INVALID_PARAMETER;
  1153. break;
  1154. /* MAC */
  1155. case MAC_BATT_LIFE_EXT_PERIODS:
  1156. if (value < 6 || value > 41)
  1157. status = IEEE802154_INVALID_PARAMETER;
  1158. break;
  1159. case MAC_BEACON_PAYLOAD:
  1160. if (pib_attribute_length > MAX_BEACON_PAYLOAD_LENGTH)
  1161. status = IEEE802154_INVALID_PARAMETER;
  1162. break;
  1163. case MAC_BEACON_PAYLOAD_LENGTH:
  1164. if (value > MAX_BEACON_PAYLOAD_LENGTH)
  1165. status = IEEE802154_INVALID_PARAMETER;
  1166. break;
  1167. case MAC_BEACON_ORDER:
  1168. if (value > 15)
  1169. status = IEEE802154_INVALID_PARAMETER;
  1170. break;
  1171. case MAC_MAX_BE:
  1172. if (value < 3 || value > 8)
  1173. status = IEEE802154_INVALID_PARAMETER;
  1174. break;
  1175. case MAC_MAX_CSMA_BACKOFFS:
  1176. if (value > 5)
  1177. status = IEEE802154_INVALID_PARAMETER;
  1178. break;
  1179. case MAC_MAX_FRAME_RETRIES:
  1180. if (value > 7)
  1181. status = IEEE802154_INVALID_PARAMETER;
  1182. break;
  1183. case MAC_MIN_BE:
  1184. if (value > 8)
  1185. status = IEEE802154_INVALID_PARAMETER;
  1186. break;
  1187. case MAC_RESPONSE_WAIT_TIME:
  1188. if (value < 2 || value > 64)
  1189. status = IEEE802154_INVALID_PARAMETER;
  1190. break;
  1191. case MAC_SUPERFRAME_ORDER:
  1192. if (value > 15)
  1193. status = IEEE802154_INVALID_PARAMETER;
  1194. break;
  1195. /* boolean */
  1196. case MAC_ASSOCIATED_PAN_COORD:
  1197. case MAC_ASSOCIATION_PERMIT:
  1198. case MAC_AUTO_REQUEST:
  1199. case MAC_BATT_LIFE_EXT:
  1200. case MAC_GTS_PERMIT:
  1201. case MAC_PROMISCUOUS_MODE:
  1202. case MAC_RX_ON_WHEN_IDLE:
  1203. case MAC_SECURITY_ENABLED:
  1204. if (value > 1)
  1205. status = IEEE802154_INVALID_PARAMETER;
  1206. break;
  1207. /* MAC SEC */
  1208. case MAC_AUTO_REQUEST_SECURITY_LEVEL:
  1209. if (value > 7)
  1210. status = IEEE802154_INVALID_PARAMETER;
  1211. break;
  1212. case MAC_AUTO_REQUEST_KEY_ID_MODE:
  1213. if (value > 3)
  1214. status = IEEE802154_INVALID_PARAMETER;
  1215. break;
  1216. default:
  1217. break;
  1218. }
  1219. return status;
  1220. }
  1221. /**
  1222. * tdme_settxpower() - Sets the tx power for MLME_SET phyTransmitPower
  1223. * @txp: Transmit Power
  1224. * @device_ref: Nondescript pointer to target device
  1225. *
  1226. * Normalised to 802.15.4 Definition (6-bit, signed):
  1227. * Bit 7-6: not used
  1228. * Bit 5-0: tx power (-32 - +31 dB)
  1229. *
  1230. * Return: 802.15.4 status code of api calls
  1231. */
  1232. static u8 tdme_settxpower(u8 txp, void *device_ref)
  1233. {
  1234. u8 status;
  1235. s8 txp_val;
  1236. u8 txp_ext;
  1237. union pa_cfg_sfr pa_cfg_val;
  1238. /* extend from 6 to 8 bit */
  1239. txp_ext = 0x3F & txp;
  1240. if (txp_ext & 0x20)
  1241. txp_ext += 0xC0;
  1242. txp_val = (s8)txp_ext;
  1243. if (CA8210_MAC_MPW) {
  1244. if (txp_val > 0) {
  1245. /* 8 dBm: ptrim = 5, itrim = +3 => +4 dBm */
  1246. pa_cfg_val.bias_current_trim = 3;
  1247. pa_cfg_val.buffer_capacitor_trim = 5;
  1248. pa_cfg_val.boost = 1;
  1249. } else {
  1250. /* 0 dBm: ptrim = 7, itrim = +3 => -6 dBm */
  1251. pa_cfg_val.bias_current_trim = 3;
  1252. pa_cfg_val.buffer_capacitor_trim = 7;
  1253. pa_cfg_val.boost = 0;
  1254. }
  1255. /* write PACFG */
  1256. status = tdme_setsfr_request_sync(
  1257. 0,
  1258. CA8210_SFR_PACFG,
  1259. pa_cfg_val.paib,
  1260. device_ref
  1261. );
  1262. } else {
  1263. /* Look-Up Table for Setting Current and Frequency Trim values
  1264. * for desired Output Power
  1265. */
  1266. if (txp_val > 8) {
  1267. pa_cfg_val.paib = 0x3F;
  1268. } else if (txp_val == 8) {
  1269. pa_cfg_val.paib = 0x32;
  1270. } else if (txp_val == 7) {
  1271. pa_cfg_val.paib = 0x22;
  1272. } else if (txp_val == 6) {
  1273. pa_cfg_val.paib = 0x18;
  1274. } else if (txp_val == 5) {
  1275. pa_cfg_val.paib = 0x10;
  1276. } else if (txp_val == 4) {
  1277. pa_cfg_val.paib = 0x0C;
  1278. } else if (txp_val == 3) {
  1279. pa_cfg_val.paib = 0x08;
  1280. } else if (txp_val == 2) {
  1281. pa_cfg_val.paib = 0x05;
  1282. } else if (txp_val == 1) {
  1283. pa_cfg_val.paib = 0x03;
  1284. } else if (txp_val == 0) {
  1285. pa_cfg_val.paib = 0x01;
  1286. } else { /* < 0 */
  1287. pa_cfg_val.paib = 0x00;
  1288. }
  1289. /* write PACFGIB */
  1290. status = tdme_setsfr_request_sync(
  1291. 0,
  1292. CA8210_SFR_PACFGIB,
  1293. pa_cfg_val.paib,
  1294. device_ref
  1295. );
  1296. }
  1297. return status;
  1298. }
  1299. /**
  1300. * mcps_data_request() - mcps_data_request (Send Data) according to API Spec
  1301. * @src_addr_mode: Source Addressing Mode
  1302. * @dst_address_mode: Destination Addressing Mode
  1303. * @dst_pan_id: Destination PAN ID
  1304. * @dst_addr: Pointer to Destination Address
  1305. * @msdu_length: length of Data
  1306. * @msdu: Pointer to Data
  1307. * @msdu_handle: Handle of Data
  1308. * @tx_options: Tx Options Bit Field
  1309. * @security: Pointer to Security Structure or NULL
  1310. * @device_ref: Nondescript pointer to target device
  1311. *
  1312. * Return: 802.15.4 status code of action
  1313. */
  1314. static u8 mcps_data_request(
  1315. u8 src_addr_mode,
  1316. u8 dst_address_mode,
  1317. u16 dst_pan_id,
  1318. union macaddr *dst_addr,
  1319. u8 msdu_length,
  1320. u8 *msdu,
  1321. u8 msdu_handle,
  1322. u8 tx_options,
  1323. struct secspec *security,
  1324. void *device_ref
  1325. )
  1326. {
  1327. struct secspec *psec;
  1328. struct mac_message command;
  1329. command.command_id = SPI_MCPS_DATA_REQUEST;
  1330. command.pdata.data_req.src_addr_mode = src_addr_mode;
  1331. command.pdata.data_req.dst.mode = dst_address_mode;
  1332. if (dst_address_mode != MAC_MODE_NO_ADDR) {
  1333. command.pdata.data_req.dst.pan_id[0] = LS_BYTE(dst_pan_id);
  1334. command.pdata.data_req.dst.pan_id[1] = MS_BYTE(dst_pan_id);
  1335. if (dst_address_mode == MAC_MODE_SHORT_ADDR) {
  1336. command.pdata.data_req.dst.address[0] = LS_BYTE(
  1337. dst_addr->short_address
  1338. );
  1339. command.pdata.data_req.dst.address[1] = MS_BYTE(
  1340. dst_addr->short_address
  1341. );
  1342. } else { /* MAC_MODE_LONG_ADDR*/
  1343. memcpy(
  1344. command.pdata.data_req.dst.address,
  1345. dst_addr->ieee_address,
  1346. 8
  1347. );
  1348. }
  1349. }
  1350. command.pdata.data_req.msdu_length = msdu_length;
  1351. command.pdata.data_req.msdu_handle = msdu_handle;
  1352. command.pdata.data_req.tx_options = tx_options;
  1353. memcpy(command.pdata.data_req.msdu, msdu, msdu_length);
  1354. psec = (struct secspec *)(command.pdata.data_req.msdu + msdu_length);
  1355. command.length = sizeof(struct mcps_data_request_pset) -
  1356. MAX_DATA_SIZE + msdu_length;
  1357. if (!security || security->security_level == 0) {
  1358. psec->security_level = 0;
  1359. command.length += 1;
  1360. } else {
  1361. *psec = *security;
  1362. command.length += sizeof(struct secspec);
  1363. }
  1364. if (ca8210_spi_transfer(device_ref, &command.command_id,
  1365. command.length + 2))
  1366. return IEEE802154_SYSTEM_ERROR;
  1367. return IEEE802154_SUCCESS;
  1368. }
  1369. /**
  1370. * mlme_reset_request_sync() - MLME_RESET_request/confirm according to API Spec
  1371. * @set_default_pib: Set defaults in PIB
  1372. * @device_ref: Nondescript pointer to target device
  1373. *
  1374. * Return: 802.15.4 status code of MLME-RESET.confirm
  1375. */
  1376. static u8 mlme_reset_request_sync(
  1377. u8 set_default_pib,
  1378. void *device_ref
  1379. )
  1380. {
  1381. u8 status;
  1382. struct mac_message command, response;
  1383. struct spi_device *spi = device_ref;
  1384. command.command_id = SPI_MLME_RESET_REQUEST;
  1385. command.length = 1;
  1386. command.pdata.u8param = set_default_pib;
  1387. if (cascoda_api_downstream(
  1388. &command.command_id,
  1389. command.length + 2,
  1390. &response.command_id,
  1391. device_ref)) {
  1392. dev_err(&spi->dev, "cascoda_api_downstream failed\n");
  1393. return IEEE802154_SYSTEM_ERROR;
  1394. }
  1395. if (response.command_id != SPI_MLME_RESET_CONFIRM)
  1396. return IEEE802154_SYSTEM_ERROR;
  1397. status = response.pdata.status;
  1398. /* reset COORD Bit for Channel Filtering as Coordinator */
  1399. if (CA8210_MAC_WORKAROUNDS && set_default_pib && !status) {
  1400. status = tdme_setsfr_request_sync(
  1401. 0,
  1402. CA8210_SFR_MACCON,
  1403. 0,
  1404. device_ref
  1405. );
  1406. }
  1407. return status;
  1408. }
  1409. /**
  1410. * mlme_set_request_sync() - MLME_SET_request/confirm according to API Spec
  1411. * @pib_attribute: Attribute Number
  1412. * @pib_attribute_index: Index within Attribute if an Array
  1413. * @pib_attribute_length: Attribute length
  1414. * @pib_attribute_value: Pointer to Attribute Value
  1415. * @device_ref: Nondescript pointer to target device
  1416. *
  1417. * Return: 802.15.4 status code of MLME-SET.confirm
  1418. */
  1419. static u8 mlme_set_request_sync(
  1420. u8 pib_attribute,
  1421. u8 pib_attribute_index,
  1422. u8 pib_attribute_length,
  1423. const void *pib_attribute_value,
  1424. void *device_ref
  1425. )
  1426. {
  1427. u8 status;
  1428. struct mac_message command, response;
  1429. /* pre-check the validity of pib_attribute values that are not checked
  1430. * in MAC
  1431. */
  1432. if (tdme_checkpibattribute(
  1433. pib_attribute, pib_attribute_length, pib_attribute_value)) {
  1434. return IEEE802154_INVALID_PARAMETER;
  1435. }
  1436. if (pib_attribute == PHY_CURRENT_CHANNEL) {
  1437. status = tdme_channelinit(
  1438. *((u8 *)pib_attribute_value),
  1439. device_ref
  1440. );
  1441. if (status)
  1442. return status;
  1443. }
  1444. if (pib_attribute == PHY_TRANSMIT_POWER) {
  1445. return tdme_settxpower(
  1446. *((u8 *)pib_attribute_value),
  1447. device_ref
  1448. );
  1449. }
  1450. command.command_id = SPI_MLME_SET_REQUEST;
  1451. command.length = sizeof(struct mlme_set_request_pset) -
  1452. MAX_ATTRIBUTE_SIZE + pib_attribute_length;
  1453. command.pdata.set_req.pib_attribute = pib_attribute;
  1454. command.pdata.set_req.pib_attribute_index = pib_attribute_index;
  1455. command.pdata.set_req.pib_attribute_length = pib_attribute_length;
  1456. memcpy(
  1457. command.pdata.set_req.pib_attribute_value,
  1458. pib_attribute_value,
  1459. pib_attribute_length
  1460. );
  1461. if (cascoda_api_downstream(
  1462. &command.command_id,
  1463. command.length + 2,
  1464. &response.command_id,
  1465. device_ref)) {
  1466. return IEEE802154_SYSTEM_ERROR;
  1467. }
  1468. if (response.command_id != SPI_MLME_SET_CONFIRM)
  1469. return IEEE802154_SYSTEM_ERROR;
  1470. return response.pdata.status;
  1471. }
  1472. /**
  1473. * hwme_set_request_sync() - HWME_SET_request/confirm according to API Spec
  1474. * @hw_attribute: Attribute Number
  1475. * @hw_attribute_length: Attribute length
  1476. * @hw_attribute_value: Pointer to Attribute Value
  1477. * @device_ref: Nondescript pointer to target device
  1478. *
  1479. * Return: 802.15.4 status code of HWME-SET.confirm
  1480. */
  1481. static u8 hwme_set_request_sync(
  1482. u8 hw_attribute,
  1483. u8 hw_attribute_length,
  1484. u8 *hw_attribute_value,
  1485. void *device_ref
  1486. )
  1487. {
  1488. struct mac_message command, response;
  1489. command.command_id = SPI_HWME_SET_REQUEST;
  1490. command.length = 2 + hw_attribute_length;
  1491. command.pdata.hwme_set_req.hw_attribute = hw_attribute;
  1492. command.pdata.hwme_set_req.hw_attribute_length = hw_attribute_length;
  1493. memcpy(
  1494. command.pdata.hwme_set_req.hw_attribute_value,
  1495. hw_attribute_value,
  1496. hw_attribute_length
  1497. );
  1498. if (cascoda_api_downstream(
  1499. &command.command_id,
  1500. command.length + 2,
  1501. &response.command_id,
  1502. device_ref)) {
  1503. return IEEE802154_SYSTEM_ERROR;
  1504. }
  1505. if (response.command_id != SPI_HWME_SET_CONFIRM)
  1506. return IEEE802154_SYSTEM_ERROR;
  1507. return response.pdata.hwme_set_cnf.status;
  1508. }
  1509. /**
  1510. * hwme_get_request_sync() - HWME_GET_request/confirm according to API Spec
  1511. * @hw_attribute: Attribute Number
  1512. * @hw_attribute_length: Attribute length
  1513. * @hw_attribute_value: Pointer to Attribute Value
  1514. * @device_ref: Nondescript pointer to target device
  1515. *
  1516. * Return: 802.15.4 status code of HWME-GET.confirm
  1517. */
  1518. static u8 hwme_get_request_sync(
  1519. u8 hw_attribute,
  1520. u8 *hw_attribute_length,
  1521. u8 *hw_attribute_value,
  1522. void *device_ref
  1523. )
  1524. {
  1525. struct mac_message command, response;
  1526. command.command_id = SPI_HWME_GET_REQUEST;
  1527. command.length = 1;
  1528. command.pdata.hwme_get_req.hw_attribute = hw_attribute;
  1529. if (cascoda_api_downstream(
  1530. &command.command_id,
  1531. command.length + 2,
  1532. &response.command_id,
  1533. device_ref)) {
  1534. return IEEE802154_SYSTEM_ERROR;
  1535. }
  1536. if (response.command_id != SPI_HWME_GET_CONFIRM)
  1537. return IEEE802154_SYSTEM_ERROR;
  1538. if (response.pdata.hwme_get_cnf.status == IEEE802154_SUCCESS) {
  1539. *hw_attribute_length =
  1540. response.pdata.hwme_get_cnf.hw_attribute_length;
  1541. memcpy(
  1542. hw_attribute_value,
  1543. response.pdata.hwme_get_cnf.hw_attribute_value,
  1544. *hw_attribute_length
  1545. );
  1546. }
  1547. return response.pdata.hwme_get_cnf.status;
  1548. }
  1549. /* Network driver operation */
  1550. /**
  1551. * ca8210_async_xmit_complete() - Called to announce that an asynchronous
  1552. * transmission has finished
  1553. * @hw: ieee802154_hw of ca8210 that has finished exchange
  1554. * @msduhandle: Identifier of transmission that has completed
  1555. * @status: Returned 802.15.4 status code of the transmission
  1556. *
  1557. * Return: 0 or linux error code
  1558. */
  1559. static int ca8210_async_xmit_complete(
  1560. struct ieee802154_hw *hw,
  1561. u8 msduhandle,
  1562. u8 status)
  1563. {
  1564. struct ca8210_priv *priv = hw->priv;
  1565. if (priv->nextmsduhandle != msduhandle) {
  1566. dev_err(
  1567. &priv->spi->dev,
  1568. "Unexpected msdu_handle on data confirm, Expected %d, got %d\n",
  1569. priv->nextmsduhandle,
  1570. msduhandle
  1571. );
  1572. return -EIO;
  1573. }
  1574. priv->async_tx_pending = false;
  1575. priv->nextmsduhandle++;
  1576. if (status) {
  1577. dev_err(
  1578. &priv->spi->dev,
  1579. "Link transmission unsuccessful, status = %d\n",
  1580. status
  1581. );
  1582. if (status != IEEE802154_TRANSACTION_OVERFLOW) {
  1583. ieee802154_xmit_error(priv->hw, priv->tx_skb, status);
  1584. return 0;
  1585. }
  1586. }
  1587. ieee802154_xmit_complete(priv->hw, priv->tx_skb, true);
  1588. return 0;
  1589. }
  1590. /**
  1591. * ca8210_skb_rx() - Contructs a properly framed socket buffer from a received
  1592. * MCPS_DATA_indication
  1593. * @hw: ieee802154_hw that MCPS_DATA_indication was received by
  1594. * @len: length of MCPS_DATA_indication
  1595. * @data_ind: Octet array of MCPS_DATA_indication
  1596. *
  1597. * Called by the spi driver whenever a SAP command is received, this function
  1598. * will ascertain whether the command is of interest to the network driver and
  1599. * take necessary action.
  1600. *
  1601. * Return: 0 or linux error code
  1602. */
  1603. static int ca8210_skb_rx(
  1604. struct ieee802154_hw *hw,
  1605. size_t len,
  1606. u8 *data_ind
  1607. )
  1608. {
  1609. struct ieee802154_hdr hdr;
  1610. int msdulen;
  1611. int hlen;
  1612. u8 mpdulinkquality = data_ind[23];
  1613. struct sk_buff *skb;
  1614. struct ca8210_priv *priv = hw->priv;
  1615. /* Allocate mtu size buffer for every rx packet */
  1616. skb = dev_alloc_skb(IEEE802154_MTU + sizeof(hdr));
  1617. if (!skb)
  1618. return -ENOMEM;
  1619. skb_reserve(skb, sizeof(hdr));
  1620. msdulen = data_ind[22]; /* msdu_length */
  1621. if (msdulen > IEEE802154_MTU) {
  1622. dev_err(
  1623. &priv->spi->dev,
  1624. "received erroneously large msdu length!\n"
  1625. );
  1626. kfree_skb(skb);
  1627. return -EMSGSIZE;
  1628. }
  1629. dev_dbg(&priv->spi->dev, "skb buffer length = %d\n", msdulen);
  1630. if (priv->promiscuous)
  1631. goto copy_payload;
  1632. /* Populate hdr */
  1633. hdr.sec.level = data_ind[29 + msdulen];
  1634. dev_dbg(&priv->spi->dev, "security level: %#03x\n", hdr.sec.level);
  1635. if (hdr.sec.level > 0) {
  1636. hdr.sec.key_id_mode = data_ind[30 + msdulen];
  1637. memcpy(&hdr.sec.extended_src, &data_ind[31 + msdulen], 8);
  1638. hdr.sec.key_id = data_ind[39 + msdulen];
  1639. }
  1640. hdr.source.mode = data_ind[0];
  1641. dev_dbg(&priv->spi->dev, "srcAddrMode: %#03x\n", hdr.source.mode);
  1642. hdr.source.pan_id = *(u16 *)&data_ind[1];
  1643. dev_dbg(&priv->spi->dev, "srcPanId: %#06x\n", hdr.source.pan_id);
  1644. memcpy(&hdr.source.extended_addr, &data_ind[3], 8);
  1645. hdr.dest.mode = data_ind[11];
  1646. dev_dbg(&priv->spi->dev, "dstAddrMode: %#03x\n", hdr.dest.mode);
  1647. hdr.dest.pan_id = *(u16 *)&data_ind[12];
  1648. dev_dbg(&priv->spi->dev, "dstPanId: %#06x\n", hdr.dest.pan_id);
  1649. memcpy(&hdr.dest.extended_addr, &data_ind[14], 8);
  1650. /* Fill in FC implicitly */
  1651. hdr.fc.type = 1; /* Data frame */
  1652. if (hdr.sec.level)
  1653. hdr.fc.security_enabled = 1;
  1654. else
  1655. hdr.fc.security_enabled = 0;
  1656. if (data_ind[1] != data_ind[12] || data_ind[2] != data_ind[13])
  1657. hdr.fc.intra_pan = 1;
  1658. else
  1659. hdr.fc.intra_pan = 0;
  1660. hdr.fc.dest_addr_mode = hdr.dest.mode;
  1661. hdr.fc.source_addr_mode = hdr.source.mode;
  1662. /* Add hdr to front of buffer */
  1663. hlen = ieee802154_hdr_push(skb, &hdr);
  1664. if (hlen < 0) {
  1665. dev_crit(&priv->spi->dev, "failed to push mac hdr onto skb!\n");
  1666. kfree_skb(skb);
  1667. return hlen;
  1668. }
  1669. skb_reset_mac_header(skb);
  1670. skb->mac_len = hlen;
  1671. copy_payload:
  1672. /* Add <msdulen> bytes of space to the back of the buffer */
  1673. /* Copy msdu to skb */
  1674. skb_put_data(skb, &data_ind[29], msdulen);
  1675. ieee802154_rx_irqsafe(hw, skb, mpdulinkquality);
  1676. return 0;
  1677. }
  1678. /**
  1679. * ca8210_net_rx() - Acts upon received SAP commands relevant to the network
  1680. * driver
  1681. * @hw: ieee802154_hw that command was received by
  1682. * @command: Octet array of received command
  1683. * @len: length of the received command
  1684. *
  1685. * Called by the spi driver whenever a SAP command is received, this function
  1686. * will ascertain whether the command is of interest to the network driver and
  1687. * take necessary action.
  1688. *
  1689. * Return: 0 or linux error code
  1690. */
  1691. static int ca8210_net_rx(struct ieee802154_hw *hw, u8 *command, size_t len)
  1692. {
  1693. struct ca8210_priv *priv = hw->priv;
  1694. unsigned long flags;
  1695. u8 status;
  1696. dev_dbg(&priv->spi->dev, "%s: CmdID = %d\n", __func__, command[0]);
  1697. if (command[0] == SPI_MCPS_DATA_INDICATION) {
  1698. /* Received data */
  1699. spin_lock_irqsave(&priv->lock, flags);
  1700. if (command[26] == priv->last_dsn) {
  1701. dev_dbg(
  1702. &priv->spi->dev,
  1703. "DSN %d resend received, ignoring...\n",
  1704. command[26]
  1705. );
  1706. spin_unlock_irqrestore(&priv->lock, flags);
  1707. return 0;
  1708. }
  1709. priv->last_dsn = command[26];
  1710. spin_unlock_irqrestore(&priv->lock, flags);
  1711. return ca8210_skb_rx(hw, len - 2, command + 2);
  1712. } else if (command[0] == SPI_MCPS_DATA_CONFIRM) {
  1713. status = command[3];
  1714. if (priv->async_tx_pending) {
  1715. return ca8210_async_xmit_complete(
  1716. hw,
  1717. command[2],
  1718. status
  1719. );
  1720. }
  1721. }
  1722. return 0;
  1723. }
  1724. /**
  1725. * ca8210_skb_tx() - Transmits a given socket buffer using the ca8210
  1726. * @skb: Socket buffer to transmit
  1727. * @msduhandle: Data identifier to pass to the 802.15.4 MAC
  1728. * @priv: Pointer to private data section of target ca8210
  1729. *
  1730. * Return: 0 or linux error code
  1731. */
  1732. static int ca8210_skb_tx(
  1733. struct sk_buff *skb,
  1734. u8 msduhandle,
  1735. struct ca8210_priv *priv
  1736. )
  1737. {
  1738. struct ieee802154_hdr header = { };
  1739. struct secspec secspec;
  1740. int mac_len, status;
  1741. dev_dbg(&priv->spi->dev, "%s called\n", __func__);
  1742. /* Get addressing info from skb - ieee802154 layer creates a full
  1743. * packet
  1744. */
  1745. mac_len = ieee802154_hdr_peek_addrs(skb, &header);
  1746. if (mac_len < 0)
  1747. return mac_len;
  1748. secspec.security_level = header.sec.level;
  1749. secspec.key_id_mode = header.sec.key_id_mode;
  1750. if (secspec.key_id_mode == 2)
  1751. memcpy(secspec.key_source, &header.sec.short_src, 4);
  1752. else if (secspec.key_id_mode == 3)
  1753. memcpy(secspec.key_source, &header.sec.extended_src, 8);
  1754. secspec.key_index = header.sec.key_id;
  1755. /* Pass to Cascoda API */
  1756. status = mcps_data_request(
  1757. header.source.mode,
  1758. header.dest.mode,
  1759. header.dest.pan_id,
  1760. (union macaddr *)&header.dest.extended_addr,
  1761. skb->len - mac_len,
  1762. &skb->data[mac_len],
  1763. msduhandle,
  1764. header.fc.ack_request,
  1765. &secspec,
  1766. priv->spi
  1767. );
  1768. return link_to_linux_err(status);
  1769. }
  1770. /**
  1771. * ca8210_start() - Starts the network driver
  1772. * @hw: ieee802154_hw of ca8210 being started
  1773. *
  1774. * Return: 0 or linux error code
  1775. */
  1776. static int ca8210_start(struct ieee802154_hw *hw)
  1777. {
  1778. int status;
  1779. u8 rx_on_when_idle;
  1780. u8 lqi_threshold = 0;
  1781. struct ca8210_priv *priv = hw->priv;
  1782. priv->last_dsn = -1;
  1783. /* Turn receiver on when idle for now just to test rx */
  1784. rx_on_when_idle = 1;
  1785. status = mlme_set_request_sync(
  1786. MAC_RX_ON_WHEN_IDLE,
  1787. 0,
  1788. 1,
  1789. &rx_on_when_idle,
  1790. priv->spi
  1791. );
  1792. if (status) {
  1793. dev_crit(
  1794. &priv->spi->dev,
  1795. "Setting rx_on_when_idle failed, status = %d\n",
  1796. status
  1797. );
  1798. return link_to_linux_err(status);
  1799. }
  1800. status = hwme_set_request_sync(
  1801. HWME_LQILIMIT,
  1802. 1,
  1803. &lqi_threshold,
  1804. priv->spi
  1805. );
  1806. if (status) {
  1807. dev_crit(
  1808. &priv->spi->dev,
  1809. "Setting lqilimit failed, status = %d\n",
  1810. status
  1811. );
  1812. return link_to_linux_err(status);
  1813. }
  1814. return 0;
  1815. }
  1816. /**
  1817. * ca8210_stop() - Stops the network driver
  1818. * @hw: ieee802154_hw of ca8210 being stopped
  1819. *
  1820. * Return: 0 or linux error code
  1821. */
  1822. static void ca8210_stop(struct ieee802154_hw *hw)
  1823. {
  1824. }
  1825. /**
  1826. * ca8210_xmit_async() - Asynchronously transmits a given socket buffer using
  1827. * the ca8210
  1828. * @hw: ieee802154_hw of ca8210 to transmit from
  1829. * @skb: Socket buffer to transmit
  1830. *
  1831. * Return: 0 or linux error code
  1832. */
  1833. static int ca8210_xmit_async(struct ieee802154_hw *hw, struct sk_buff *skb)
  1834. {
  1835. struct ca8210_priv *priv = hw->priv;
  1836. int status;
  1837. dev_dbg(&priv->spi->dev, "calling %s\n", __func__);
  1838. priv->tx_skb = skb;
  1839. priv->async_tx_pending = true;
  1840. status = ca8210_skb_tx(skb, priv->nextmsduhandle, priv);
  1841. return status;
  1842. }
  1843. /**
  1844. * ca8210_get_ed() - Returns the measured energy on the current channel at this
  1845. * instant in time
  1846. * @hw: ieee802154_hw of target ca8210
  1847. * @level: Measured Energy Detect level
  1848. *
  1849. * Return: 0 or linux error code
  1850. */
  1851. static int ca8210_get_ed(struct ieee802154_hw *hw, u8 *level)
  1852. {
  1853. u8 lenvar;
  1854. struct ca8210_priv *priv = hw->priv;
  1855. return link_to_linux_err(
  1856. hwme_get_request_sync(HWME_EDVALUE, &lenvar, level, priv->spi)
  1857. );
  1858. }
  1859. /**
  1860. * ca8210_set_channel() - Sets the current operating 802.15.4 channel of the
  1861. * ca8210
  1862. * @hw: ieee802154_hw of target ca8210
  1863. * @page: Channel page to set
  1864. * @channel: Channel number to set
  1865. *
  1866. * Return: 0 or linux error code
  1867. */
  1868. static int ca8210_set_channel(
  1869. struct ieee802154_hw *hw,
  1870. u8 page,
  1871. u8 channel
  1872. )
  1873. {
  1874. u8 status;
  1875. struct ca8210_priv *priv = hw->priv;
  1876. status = mlme_set_request_sync(
  1877. PHY_CURRENT_CHANNEL,
  1878. 0,
  1879. 1,
  1880. &channel,
  1881. priv->spi
  1882. );
  1883. if (status) {
  1884. dev_err(
  1885. &priv->spi->dev,
  1886. "error setting channel, MLME-SET.confirm status = %d\n",
  1887. status
  1888. );
  1889. }
  1890. return link_to_linux_err(status);
  1891. }
  1892. /**
  1893. * ca8210_set_hw_addr_filt() - Sets the address filtering parameters of the
  1894. * ca8210
  1895. * @hw: ieee802154_hw of target ca8210
  1896. * @filt: Filtering parameters
  1897. * @changed: Bitmap representing which parameters to change
  1898. *
  1899. * Effectively just sets the actual addressing information identifying this node
  1900. * as all filtering is performed by the ca8210 as detailed in the IEEE 802.15.4
  1901. * 2006 specification.
  1902. *
  1903. * Return: 0 or linux error code
  1904. */
  1905. static int ca8210_set_hw_addr_filt(
  1906. struct ieee802154_hw *hw,
  1907. struct ieee802154_hw_addr_filt *filt,
  1908. unsigned long changed
  1909. )
  1910. {
  1911. u8 status = 0;
  1912. struct ca8210_priv *priv = hw->priv;
  1913. if (changed & IEEE802154_AFILT_PANID_CHANGED) {
  1914. status = mlme_set_request_sync(
  1915. MAC_PAN_ID,
  1916. 0,
  1917. 2,
  1918. &filt->pan_id, priv->spi
  1919. );
  1920. if (status) {
  1921. dev_err(
  1922. &priv->spi->dev,
  1923. "error setting pan id, MLME-SET.confirm status = %d",
  1924. status
  1925. );
  1926. return link_to_linux_err(status);
  1927. }
  1928. }
  1929. if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
  1930. status = mlme_set_request_sync(
  1931. MAC_SHORT_ADDRESS,
  1932. 0,
  1933. 2,
  1934. &filt->short_addr, priv->spi
  1935. );
  1936. if (status) {
  1937. dev_err(
  1938. &priv->spi->dev,
  1939. "error setting short address, MLME-SET.confirm status = %d",
  1940. status
  1941. );
  1942. return link_to_linux_err(status);
  1943. }
  1944. }
  1945. if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {
  1946. status = mlme_set_request_sync(
  1947. NS_IEEE_ADDRESS,
  1948. 0,
  1949. 8,
  1950. &filt->ieee_addr,
  1951. priv->spi
  1952. );
  1953. if (status) {
  1954. dev_err(
  1955. &priv->spi->dev,
  1956. "error setting ieee address, MLME-SET.confirm status = %d",
  1957. status
  1958. );
  1959. return link_to_linux_err(status);
  1960. }
  1961. }
  1962. /* TODO: Should use MLME_START to set coord bit? */
  1963. return 0;
  1964. }
  1965. /**
  1966. * ca8210_set_tx_power() - Sets the transmit power of the ca8210
  1967. * @hw: ieee802154_hw of target ca8210
  1968. * @mbm: Transmit power in mBm (dBm*100)
  1969. *
  1970. * Return: 0 or linux error code
  1971. */
  1972. static int ca8210_set_tx_power(struct ieee802154_hw *hw, s32 mbm)
  1973. {
  1974. struct ca8210_priv *priv = hw->priv;
  1975. mbm /= 100;
  1976. return link_to_linux_err(
  1977. mlme_set_request_sync(PHY_TRANSMIT_POWER, 0, 1, &mbm, priv->spi)
  1978. );
  1979. }
  1980. /**
  1981. * ca8210_set_cca_mode() - Sets the clear channel assessment mode of the ca8210
  1982. * @hw: ieee802154_hw of target ca8210
  1983. * @cca: CCA mode to set
  1984. *
  1985. * Return: 0 or linux error code
  1986. */
  1987. static int ca8210_set_cca_mode(
  1988. struct ieee802154_hw *hw,
  1989. const struct wpan_phy_cca *cca
  1990. )
  1991. {
  1992. u8 status;
  1993. u8 cca_mode;
  1994. struct ca8210_priv *priv = hw->priv;
  1995. cca_mode = cca->mode & 3;
  1996. if (cca_mode == 3 && cca->opt == NL802154_CCA_OPT_ENERGY_CARRIER_OR) {
  1997. /* cca_mode 0 == CS OR ED, 3 == CS AND ED */
  1998. cca_mode = 0;
  1999. }
  2000. status = mlme_set_request_sync(
  2001. PHY_CCA_MODE,
  2002. 0,
  2003. 1,
  2004. &cca_mode,
  2005. priv->spi
  2006. );
  2007. if (status) {
  2008. dev_err(
  2009. &priv->spi->dev,
  2010. "error setting cca mode, MLME-SET.confirm status = %d",
  2011. status
  2012. );
  2013. }
  2014. return link_to_linux_err(status);
  2015. }
  2016. /**
  2017. * ca8210_set_cca_ed_level() - Sets the CCA ED level of the ca8210
  2018. * @hw: ieee802154_hw of target ca8210
  2019. * @level: ED level to set (in mbm)
  2020. *
  2021. * Sets the minimum threshold of measured energy above which the ca8210 will
  2022. * back off and retry a transmission.
  2023. *
  2024. * Return: 0 or linux error code
  2025. */
  2026. static int ca8210_set_cca_ed_level(struct ieee802154_hw *hw, s32 level)
  2027. {
  2028. u8 status;
  2029. u8 ed_threshold = (level / 100) * 2 + 256;
  2030. struct ca8210_priv *priv = hw->priv;
  2031. status = hwme_set_request_sync(
  2032. HWME_EDTHRESHOLD,
  2033. 1,
  2034. &ed_threshold,
  2035. priv->spi
  2036. );
  2037. if (status) {
  2038. dev_err(
  2039. &priv->spi->dev,
  2040. "error setting ed threshold, HWME-SET.confirm status = %d",
  2041. status
  2042. );
  2043. }
  2044. return link_to_linux_err(status);
  2045. }
  2046. /**
  2047. * ca8210_set_csma_params() - Sets the CSMA parameters of the ca8210
  2048. * @hw: ieee802154_hw of target ca8210
  2049. * @min_be: Minimum backoff exponent when backing off a transmission
  2050. * @max_be: Maximum backoff exponent when backing off a transmission
  2051. * @retries: Number of times to retry after backing off
  2052. *
  2053. * Return: 0 or linux error code
  2054. */
  2055. static int ca8210_set_csma_params(
  2056. struct ieee802154_hw *hw,
  2057. u8 min_be,
  2058. u8 max_be,
  2059. u8 retries
  2060. )
  2061. {
  2062. u8 status;
  2063. struct ca8210_priv *priv = hw->priv;
  2064. status = mlme_set_request_sync(MAC_MIN_BE, 0, 1, &min_be, priv->spi);
  2065. if (status) {
  2066. dev_err(
  2067. &priv->spi->dev,
  2068. "error setting min be, MLME-SET.confirm status = %d",
  2069. status
  2070. );
  2071. return link_to_linux_err(status);
  2072. }
  2073. status = mlme_set_request_sync(MAC_MAX_BE, 0, 1, &max_be, priv->spi);
  2074. if (status) {
  2075. dev_err(
  2076. &priv->spi->dev,
  2077. "error setting max be, MLME-SET.confirm status = %d",
  2078. status
  2079. );
  2080. return link_to_linux_err(status);
  2081. }
  2082. status = mlme_set_request_sync(
  2083. MAC_MAX_CSMA_BACKOFFS,
  2084. 0,
  2085. 1,
  2086. &retries,
  2087. priv->spi
  2088. );
  2089. if (status) {
  2090. dev_err(
  2091. &priv->spi->dev,
  2092. "error setting max csma backoffs, MLME-SET.confirm status = %d",
  2093. status
  2094. );
  2095. }
  2096. return link_to_linux_err(status);
  2097. }
  2098. /**
  2099. * ca8210_set_frame_retries() - Sets the maximum frame retries of the ca8210
  2100. * @hw: ieee802154_hw of target ca8210
  2101. * @retries: Number of retries
  2102. *
  2103. * Sets the number of times to retry a transmission if no acknowledgment was
  2104. * received from the other end when one was requested.
  2105. *
  2106. * Return: 0 or linux error code
  2107. */
  2108. static int ca8210_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
  2109. {
  2110. u8 status;
  2111. struct ca8210_priv *priv = hw->priv;
  2112. status = mlme_set_request_sync(
  2113. MAC_MAX_FRAME_RETRIES,
  2114. 0,
  2115. 1,
  2116. &retries,
  2117. priv->spi
  2118. );
  2119. if (status) {
  2120. dev_err(
  2121. &priv->spi->dev,
  2122. "error setting frame retries, MLME-SET.confirm status = %d",
  2123. status
  2124. );
  2125. }
  2126. return link_to_linux_err(status);
  2127. }
  2128. static int ca8210_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on)
  2129. {
  2130. u8 status;
  2131. struct ca8210_priv *priv = hw->priv;
  2132. status = mlme_set_request_sync(
  2133. MAC_PROMISCUOUS_MODE,
  2134. 0,
  2135. 1,
  2136. (const void *)&on,
  2137. priv->spi
  2138. );
  2139. if (status) {
  2140. dev_err(
  2141. &priv->spi->dev,
  2142. "error setting promiscuous mode, MLME-SET.confirm status = %d",
  2143. status
  2144. );
  2145. } else {
  2146. priv->promiscuous = on;
  2147. }
  2148. return link_to_linux_err(status);
  2149. }
  2150. static const struct ieee802154_ops ca8210_phy_ops = {
  2151. .start = ca8210_start,
  2152. .stop = ca8210_stop,
  2153. .xmit_async = ca8210_xmit_async,
  2154. .ed = ca8210_get_ed,
  2155. .set_channel = ca8210_set_channel,
  2156. .set_hw_addr_filt = ca8210_set_hw_addr_filt,
  2157. .set_txpower = ca8210_set_tx_power,
  2158. .set_cca_mode = ca8210_set_cca_mode,
  2159. .set_cca_ed_level = ca8210_set_cca_ed_level,
  2160. .set_csma_params = ca8210_set_csma_params,
  2161. .set_frame_retries = ca8210_set_frame_retries,
  2162. .set_promiscuous_mode = ca8210_set_promiscuous_mode
  2163. };
  2164. /* Test/EVBME Interface */
  2165. /**
  2166. * ca8210_test_int_open() - Opens the test interface to the userspace
  2167. * @inodp: inode representation of file interface
  2168. * @filp: file interface
  2169. *
  2170. * Return: 0 or linux error code
  2171. */
  2172. static int ca8210_test_int_open(struct inode *inodp, struct file *filp)
  2173. {
  2174. struct ca8210_priv *priv = inodp->i_private;
  2175. filp->private_data = priv;
  2176. return 0;
  2177. }
  2178. /**
  2179. * ca8210_test_check_upstream() - Checks a command received from the upstream
  2180. * testing interface for required action
  2181. * @buf: Buffer containing command to check
  2182. * @device_ref: Nondescript pointer to target device
  2183. *
  2184. * Return: 0 or linux error code
  2185. */
  2186. static int ca8210_test_check_upstream(u8 *buf, void *device_ref)
  2187. {
  2188. int ret;
  2189. u8 response[CA8210_SPI_BUF_SIZE];
  2190. if (buf[0] == SPI_MLME_SET_REQUEST) {
  2191. ret = tdme_checkpibattribute(buf[2], buf[4], buf + 5);
  2192. if (ret) {
  2193. response[0] = SPI_MLME_SET_CONFIRM;
  2194. response[1] = 3;
  2195. response[2] = IEEE802154_INVALID_PARAMETER;
  2196. response[3] = buf[2];
  2197. response[4] = buf[3];
  2198. if (cascoda_api_upstream)
  2199. cascoda_api_upstream(response, 5, device_ref);
  2200. return ret;
  2201. }
  2202. }
  2203. if (buf[0] == SPI_MLME_ASSOCIATE_REQUEST) {
  2204. return tdme_channelinit(buf[2], device_ref);
  2205. } else if (buf[0] == SPI_MLME_START_REQUEST) {
  2206. return tdme_channelinit(buf[4], device_ref);
  2207. } else if (
  2208. (buf[0] == SPI_MLME_SET_REQUEST) &&
  2209. (buf[2] == PHY_CURRENT_CHANNEL)
  2210. ) {
  2211. return tdme_channelinit(buf[5], device_ref);
  2212. } else if (
  2213. (buf[0] == SPI_TDME_SET_REQUEST) &&
  2214. (buf[2] == TDME_CHANNEL)
  2215. ) {
  2216. return tdme_channelinit(buf[4], device_ref);
  2217. } else if (
  2218. (CA8210_MAC_WORKAROUNDS) &&
  2219. (buf[0] == SPI_MLME_RESET_REQUEST) &&
  2220. (buf[2] == 1)
  2221. ) {
  2222. /* reset COORD Bit for Channel Filtering as Coordinator */
  2223. return tdme_setsfr_request_sync(
  2224. 0,
  2225. CA8210_SFR_MACCON,
  2226. 0,
  2227. device_ref
  2228. );
  2229. }
  2230. return 0;
  2231. } /* End of EVBMECheckSerialCommand() */
  2232. /**
  2233. * ca8210_test_int_user_write() - Called by a process in userspace to send a
  2234. * message to the ca8210 drivers
  2235. * @filp: file interface
  2236. * @in_buf: Buffer containing message to write
  2237. * @len: length of message
  2238. * @off: file offset
  2239. *
  2240. * Return: 0 or linux error code
  2241. */
  2242. static ssize_t ca8210_test_int_user_write(
  2243. struct file *filp,
  2244. const char __user *in_buf,
  2245. size_t len,
  2246. loff_t *off
  2247. )
  2248. {
  2249. int ret;
  2250. struct ca8210_priv *priv = filp->private_data;
  2251. u8 command[CA8210_SPI_BUF_SIZE];
  2252. memset(command, SPI_IDLE, 6);
  2253. if (len > CA8210_SPI_BUF_SIZE || len < 2) {
  2254. dev_warn(
  2255. &priv->spi->dev,
  2256. "userspace requested erroneous write length (%zu)\n",
  2257. len
  2258. );
  2259. return -EBADE;
  2260. }
  2261. ret = copy_from_user(command, in_buf, len);
  2262. if (ret) {
  2263. dev_err(
  2264. &priv->spi->dev,
  2265. "%d bytes could not be copied from userspace\n",
  2266. ret
  2267. );
  2268. return -EIO;
  2269. }
  2270. if (len != command[1] + 2) {
  2271. dev_err(
  2272. &priv->spi->dev,
  2273. "write len does not match packet length field\n"
  2274. );
  2275. return -EBADE;
  2276. }
  2277. ret = ca8210_test_check_upstream(command, priv->spi);
  2278. if (ret == 0) {
  2279. ret = ca8210_spi_exchange(
  2280. command,
  2281. command[1] + 2,
  2282. NULL,
  2283. priv->spi
  2284. );
  2285. if (ret < 0) {
  2286. /* effectively 0 bytes were written successfully */
  2287. dev_err(
  2288. &priv->spi->dev,
  2289. "spi exchange failed\n"
  2290. );
  2291. return ret;
  2292. }
  2293. if (command[0] & SPI_SYN)
  2294. priv->sync_down++;
  2295. }
  2296. return len;
  2297. }
  2298. /**
  2299. * ca8210_test_int_user_read() - Called by a process in userspace to read a
  2300. * message from the ca8210 drivers
  2301. * @filp: file interface
  2302. * @buf: Buffer to write message to
  2303. * @len: length of message to read (ignored)
  2304. * @offp: file offset
  2305. *
  2306. * If the O_NONBLOCK flag was set when opening the file then this function will
  2307. * not block, i.e. it will return if the fifo is empty. Otherwise the function
  2308. * will block, i.e. wait until new data arrives.
  2309. *
  2310. * Return: number of bytes read
  2311. */
  2312. static ssize_t ca8210_test_int_user_read(
  2313. struct file *filp,
  2314. char __user *buf,
  2315. size_t len,
  2316. loff_t *offp
  2317. )
  2318. {
  2319. int i, cmdlen;
  2320. struct ca8210_priv *priv = filp->private_data;
  2321. unsigned char *fifo_buffer;
  2322. unsigned long bytes_not_copied;
  2323. if (filp->f_flags & O_NONBLOCK) {
  2324. /* Non-blocking mode */
  2325. if (kfifo_is_empty(&priv->test.up_fifo))
  2326. return 0;
  2327. } else {
  2328. /* Blocking mode */
  2329. wait_event_interruptible(
  2330. priv->test.readq,
  2331. !kfifo_is_empty(&priv->test.up_fifo)
  2332. );
  2333. }
  2334. if (kfifo_out(&priv->test.up_fifo, &fifo_buffer, 4) != 4) {
  2335. dev_err(
  2336. &priv->spi->dev,
  2337. "test_interface: Wrong number of elements popped from upstream fifo\n"
  2338. );
  2339. return 0;
  2340. }
  2341. cmdlen = fifo_buffer[1];
  2342. bytes_not_copied = cmdlen + 2;
  2343. bytes_not_copied = copy_to_user(buf, fifo_buffer, bytes_not_copied);
  2344. if (bytes_not_copied > 0) {
  2345. dev_err(
  2346. &priv->spi->dev,
  2347. "%lu bytes could not be copied to user space!\n",
  2348. bytes_not_copied
  2349. );
  2350. }
  2351. dev_dbg(&priv->spi->dev, "test_interface: Cmd len = %d\n", cmdlen);
  2352. dev_dbg(&priv->spi->dev, "test_interface: Read\n");
  2353. for (i = 0; i < cmdlen + 2; i++)
  2354. dev_dbg(&priv->spi->dev, "%#03x\n", fifo_buffer[i]);
  2355. kfree(fifo_buffer);
  2356. return cmdlen + 2;
  2357. }
  2358. /**
  2359. * ca8210_test_int_ioctl() - Called by a process in userspace to enact an
  2360. * arbitrary action
  2361. * @filp: file interface
  2362. * @ioctl_num: which action to enact
  2363. * @ioctl_param: arbitrary parameter for the action
  2364. *
  2365. * Return: status
  2366. */
  2367. static long ca8210_test_int_ioctl(
  2368. struct file *filp,
  2369. unsigned int ioctl_num,
  2370. unsigned long ioctl_param
  2371. )
  2372. {
  2373. struct ca8210_priv *priv = filp->private_data;
  2374. switch (ioctl_num) {
  2375. case CA8210_IOCTL_HARD_RESET:
  2376. ca8210_reset_send(priv->spi, ioctl_param);
  2377. break;
  2378. default:
  2379. break;
  2380. }
  2381. return 0;
  2382. }
  2383. /**
  2384. * ca8210_test_int_poll() - Called by a process in userspace to determine which
  2385. * actions are currently possible for the file
  2386. * @filp: file interface
  2387. * @ptable: poll table
  2388. *
  2389. * Return: set of poll return flags
  2390. */
  2391. static __poll_t ca8210_test_int_poll(
  2392. struct file *filp,
  2393. struct poll_table_struct *ptable
  2394. )
  2395. {
  2396. __poll_t return_flags = 0;
  2397. struct ca8210_priv *priv = filp->private_data;
  2398. poll_wait(filp, &priv->test.readq, ptable);
  2399. if (!kfifo_is_empty(&priv->test.up_fifo))
  2400. return_flags |= (EPOLLIN | EPOLLRDNORM);
  2401. if (wait_event_interruptible(
  2402. priv->test.readq,
  2403. !kfifo_is_empty(&priv->test.up_fifo))) {
  2404. return EPOLLERR;
  2405. }
  2406. return return_flags;
  2407. }
  2408. static const struct file_operations test_int_fops = {
  2409. .read = ca8210_test_int_user_read,
  2410. .write = ca8210_test_int_user_write,
  2411. .open = ca8210_test_int_open,
  2412. .release = NULL,
  2413. .unlocked_ioctl = ca8210_test_int_ioctl,
  2414. .poll = ca8210_test_int_poll
  2415. };
  2416. /* Init/Deinit */
  2417. /**
  2418. * ca8210_get_platform_data() - Populate a ca8210_platform_data object
  2419. * @spi_device: Pointer to ca8210 spi device object to get data for
  2420. * @pdata: Pointer to ca8210_platform_data object to populate
  2421. *
  2422. * Return: 0 or linux error code
  2423. */
  2424. static int ca8210_get_platform_data(
  2425. struct spi_device *spi_device,
  2426. struct ca8210_platform_data *pdata
  2427. )
  2428. {
  2429. int ret = 0;
  2430. if (!spi_device->dev.of_node)
  2431. return -EINVAL;
  2432. pdata->extclockenable = of_property_read_bool(
  2433. spi_device->dev.of_node,
  2434. "extclock-enable"
  2435. );
  2436. if (pdata->extclockenable) {
  2437. ret = of_property_read_u32(
  2438. spi_device->dev.of_node,
  2439. "extclock-freq",
  2440. &pdata->extclockfreq
  2441. );
  2442. if (ret < 0)
  2443. return ret;
  2444. ret = of_property_read_u32(
  2445. spi_device->dev.of_node,
  2446. "extclock-gpio",
  2447. &pdata->extclockgpio
  2448. );
  2449. }
  2450. return ret;
  2451. }
  2452. /**
  2453. * ca8210_config_extern_clk() - Configure the external clock provided by the
  2454. * ca8210
  2455. * @pdata: Pointer to ca8210_platform_data containing clock parameters
  2456. * @spi: Pointer to target ca8210 spi device
  2457. * @on: True to turn the clock on, false to turn off
  2458. *
  2459. * The external clock is configured with a frequency and output pin taken from
  2460. * the platform data.
  2461. *
  2462. * Return: 0 or linux error code
  2463. */
  2464. static int ca8210_config_extern_clk(
  2465. struct ca8210_platform_data *pdata,
  2466. struct spi_device *spi,
  2467. bool on
  2468. )
  2469. {
  2470. u8 clkparam[2];
  2471. if (on) {
  2472. dev_info(&spi->dev, "Switching external clock on\n");
  2473. switch (pdata->extclockfreq) {
  2474. case SIXTEEN_MHZ:
  2475. clkparam[0] = 1;
  2476. break;
  2477. case EIGHT_MHZ:
  2478. clkparam[0] = 2;
  2479. break;
  2480. case FOUR_MHZ:
  2481. clkparam[0] = 3;
  2482. break;
  2483. case TWO_MHZ:
  2484. clkparam[0] = 4;
  2485. break;
  2486. case ONE_MHZ:
  2487. clkparam[0] = 5;
  2488. break;
  2489. default:
  2490. dev_crit(&spi->dev, "Invalid extclock-freq\n");
  2491. return -EINVAL;
  2492. }
  2493. clkparam[1] = pdata->extclockgpio;
  2494. } else {
  2495. dev_info(&spi->dev, "Switching external clock off\n");
  2496. clkparam[0] = 0; /* off */
  2497. clkparam[1] = 0;
  2498. }
  2499. return link_to_linux_err(
  2500. hwme_set_request_sync(HWME_SYSCLKOUT, 2, clkparam, spi)
  2501. );
  2502. }
  2503. /**
  2504. * ca8210_register_ext_clock() - Register ca8210's external clock with kernel
  2505. * @spi: Pointer to target ca8210 spi device
  2506. *
  2507. * Return: 0 or linux error code
  2508. */
  2509. static int ca8210_register_ext_clock(struct spi_device *spi)
  2510. {
  2511. struct device_node *np = spi->dev.of_node;
  2512. struct ca8210_priv *priv = spi_get_drvdata(spi);
  2513. struct ca8210_platform_data *pdata = spi->dev.platform_data;
  2514. if (!np)
  2515. return -EFAULT;
  2516. priv->clk = clk_register_fixed_rate(
  2517. &spi->dev,
  2518. np->name,
  2519. NULL,
  2520. 0,
  2521. pdata->extclockfreq
  2522. );
  2523. if (IS_ERR(priv->clk)) {
  2524. dev_crit(&spi->dev, "Failed to register external clk\n");
  2525. return PTR_ERR(priv->clk);
  2526. }
  2527. return of_clk_add_provider(np, of_clk_src_simple_get, priv->clk);
  2528. }
  2529. /**
  2530. * ca8210_unregister_ext_clock() - Unregister ca8210's external clock with
  2531. * kernel
  2532. * @spi: Pointer to target ca8210 spi device
  2533. */
  2534. static void ca8210_unregister_ext_clock(struct spi_device *spi)
  2535. {
  2536. struct ca8210_priv *priv = spi_get_drvdata(spi);
  2537. if (IS_ERR_OR_NULL(priv->clk))
  2538. return;
  2539. of_clk_del_provider(spi->dev.of_node);
  2540. clk_unregister(priv->clk);
  2541. dev_info(&spi->dev, "External clock unregistered\n");
  2542. }
  2543. /**
  2544. * ca8210_reset_init() - Initialise the reset input to the ca8210
  2545. * @spi: Pointer to target ca8210 spi device
  2546. *
  2547. * Return: 0 or linux error code
  2548. */
  2549. static int ca8210_reset_init(struct spi_device *spi)
  2550. {
  2551. int ret;
  2552. struct ca8210_platform_data *pdata = spi->dev.platform_data;
  2553. pdata->gpio_reset = of_get_named_gpio(
  2554. spi->dev.of_node,
  2555. "reset-gpio",
  2556. 0
  2557. );
  2558. ret = gpio_direction_output(pdata->gpio_reset, 1);
  2559. if (ret < 0) {
  2560. dev_crit(
  2561. &spi->dev,
  2562. "Reset GPIO %d did not set to output mode\n",
  2563. pdata->gpio_reset
  2564. );
  2565. }
  2566. return ret;
  2567. }
  2568. /**
  2569. * ca8210_interrupt_init() - Initialise the irq output from the ca8210
  2570. * @spi: Pointer to target ca8210 spi device
  2571. *
  2572. * Return: 0 or linux error code
  2573. */
  2574. static int ca8210_interrupt_init(struct spi_device *spi)
  2575. {
  2576. int ret;
  2577. struct ca8210_platform_data *pdata = spi->dev.platform_data;
  2578. pdata->gpio_irq = of_get_named_gpio(
  2579. spi->dev.of_node,
  2580. "irq-gpio",
  2581. 0
  2582. );
  2583. pdata->irq_id = gpio_to_irq(pdata->gpio_irq);
  2584. if (pdata->irq_id < 0) {
  2585. dev_crit(
  2586. &spi->dev,
  2587. "Could not get irq for gpio pin %d\n",
  2588. pdata->gpio_irq
  2589. );
  2590. gpio_free(pdata->gpio_irq);
  2591. return pdata->irq_id;
  2592. }
  2593. ret = request_irq(
  2594. pdata->irq_id,
  2595. ca8210_interrupt_handler,
  2596. IRQF_TRIGGER_FALLING,
  2597. "ca8210-irq",
  2598. spi_get_drvdata(spi)
  2599. );
  2600. if (ret) {
  2601. dev_crit(&spi->dev, "request_irq %d failed\n", pdata->irq_id);
  2602. gpio_unexport(pdata->gpio_irq);
  2603. gpio_free(pdata->gpio_irq);
  2604. }
  2605. return ret;
  2606. }
  2607. /**
  2608. * ca8210_dev_com_init() - Initialise the spi communication component
  2609. * @priv: Pointer to private data structure
  2610. *
  2611. * Return: 0 or linux error code
  2612. */
  2613. static int ca8210_dev_com_init(struct ca8210_priv *priv)
  2614. {
  2615. priv->mlme_workqueue = alloc_ordered_workqueue(
  2616. "MLME work queue",
  2617. WQ_UNBOUND
  2618. );
  2619. if (!priv->mlme_workqueue) {
  2620. dev_crit(&priv->spi->dev, "alloc of mlme_workqueue failed!\n");
  2621. return -ENOMEM;
  2622. }
  2623. priv->irq_workqueue = alloc_ordered_workqueue(
  2624. "ca8210 irq worker",
  2625. WQ_UNBOUND
  2626. );
  2627. if (!priv->irq_workqueue) {
  2628. dev_crit(&priv->spi->dev, "alloc of irq_workqueue failed!\n");
  2629. destroy_workqueue(priv->mlme_workqueue);
  2630. return -ENOMEM;
  2631. }
  2632. return 0;
  2633. }
  2634. /**
  2635. * ca8210_dev_com_clear() - Deinitialise the spi communication component
  2636. * @priv: Pointer to private data structure
  2637. */
  2638. static void ca8210_dev_com_clear(struct ca8210_priv *priv)
  2639. {
  2640. destroy_workqueue(priv->mlme_workqueue);
  2641. destroy_workqueue(priv->irq_workqueue);
  2642. }
  2643. #define CA8210_MAX_TX_POWERS (9)
  2644. static const s32 ca8210_tx_powers[CA8210_MAX_TX_POWERS] = {
  2645. 800, 700, 600, 500, 400, 300, 200, 100, 0
  2646. };
  2647. #define CA8210_MAX_ED_LEVELS (21)
  2648. static const s32 ca8210_ed_levels[CA8210_MAX_ED_LEVELS] = {
  2649. -10300, -10250, -10200, -10150, -10100, -10050, -10000, -9950, -9900,
  2650. -9850, -9800, -9750, -9700, -9650, -9600, -9550, -9500, -9450, -9400,
  2651. -9350, -9300
  2652. };
  2653. /**
  2654. * ca8210_hw_setup() - Populate the ieee802154_hw phy attributes with the
  2655. * ca8210's defaults
  2656. * @ca8210_hw: Pointer to ieee802154_hw to populate
  2657. */
  2658. static void ca8210_hw_setup(struct ieee802154_hw *ca8210_hw)
  2659. {
  2660. /* Support channels 11-26 */
  2661. ca8210_hw->phy->supported.channels[0] = CA8210_VALID_CHANNELS;
  2662. ca8210_hw->phy->supported.tx_powers_size = CA8210_MAX_TX_POWERS;
  2663. ca8210_hw->phy->supported.tx_powers = ca8210_tx_powers;
  2664. ca8210_hw->phy->supported.cca_ed_levels_size = CA8210_MAX_ED_LEVELS;
  2665. ca8210_hw->phy->supported.cca_ed_levels = ca8210_ed_levels;
  2666. ca8210_hw->phy->current_channel = 18;
  2667. ca8210_hw->phy->current_page = 0;
  2668. ca8210_hw->phy->transmit_power = 800;
  2669. ca8210_hw->phy->cca.mode = NL802154_CCA_ENERGY_CARRIER;
  2670. ca8210_hw->phy->cca.opt = NL802154_CCA_OPT_ENERGY_CARRIER_AND;
  2671. ca8210_hw->phy->cca_ed_level = -9800;
  2672. ca8210_hw->phy->symbol_duration = 16;
  2673. ca8210_hw->phy->lifs_period = 40 * ca8210_hw->phy->symbol_duration;
  2674. ca8210_hw->phy->sifs_period = 12 * ca8210_hw->phy->symbol_duration;
  2675. ca8210_hw->flags =
  2676. IEEE802154_HW_AFILT |
  2677. IEEE802154_HW_OMIT_CKSUM |
  2678. IEEE802154_HW_FRAME_RETRIES |
  2679. IEEE802154_HW_PROMISCUOUS |
  2680. IEEE802154_HW_CSMA_PARAMS;
  2681. ca8210_hw->phy->flags =
  2682. WPAN_PHY_FLAG_TXPOWER |
  2683. WPAN_PHY_FLAG_CCA_ED_LEVEL |
  2684. WPAN_PHY_FLAG_CCA_MODE;
  2685. }
  2686. /**
  2687. * ca8210_test_interface_init() - Initialise the test file interface
  2688. * @priv: Pointer to private data structure
  2689. *
  2690. * Provided as an alternative to the standard linux network interface, the test
  2691. * interface exposes a file in the filesystem (ca8210_test) that allows
  2692. * 802.15.4 SAP Commands and Cascoda EVBME commands to be sent directly to
  2693. * the stack.
  2694. *
  2695. * Return: 0 or linux error code
  2696. */
  2697. static int ca8210_test_interface_init(struct ca8210_priv *priv)
  2698. {
  2699. struct ca8210_test *test = &priv->test;
  2700. char node_name[32];
  2701. snprintf(
  2702. node_name,
  2703. sizeof(node_name),
  2704. "ca8210@%d_%d",
  2705. priv->spi->master->bus_num,
  2706. priv->spi->chip_select
  2707. );
  2708. test->ca8210_dfs_spi_int = debugfs_create_file(
  2709. node_name,
  2710. 0600, /* S_IRUSR | S_IWUSR */
  2711. NULL,
  2712. priv,
  2713. &test_int_fops
  2714. );
  2715. debugfs_create_symlink("ca8210", NULL, node_name);
  2716. init_waitqueue_head(&test->readq);
  2717. return kfifo_alloc(
  2718. &test->up_fifo,
  2719. CA8210_TEST_INT_FIFO_SIZE,
  2720. GFP_KERNEL
  2721. );
  2722. }
  2723. /**
  2724. * ca8210_test_interface_clear() - Deinitialise the test file interface
  2725. * @priv: Pointer to private data structure
  2726. */
  2727. static void ca8210_test_interface_clear(struct ca8210_priv *priv)
  2728. {
  2729. struct ca8210_test *test = &priv->test;
  2730. debugfs_remove(test->ca8210_dfs_spi_int);
  2731. kfifo_free(&test->up_fifo);
  2732. dev_info(&priv->spi->dev, "Test interface removed\n");
  2733. }
  2734. /**
  2735. * ca8210_remove() - Shut down a ca8210 upon being disconnected
  2736. * @spi_device: Pointer to spi device data structure
  2737. *
  2738. * Return: 0 or linux error code
  2739. */
  2740. static void ca8210_remove(struct spi_device *spi_device)
  2741. {
  2742. struct ca8210_priv *priv;
  2743. struct ca8210_platform_data *pdata;
  2744. dev_info(&spi_device->dev, "Removing ca8210\n");
  2745. pdata = spi_device->dev.platform_data;
  2746. if (pdata) {
  2747. if (pdata->extclockenable) {
  2748. ca8210_unregister_ext_clock(spi_device);
  2749. ca8210_config_extern_clk(pdata, spi_device, 0);
  2750. }
  2751. free_irq(pdata->irq_id, spi_device->dev.driver_data);
  2752. kfree(pdata);
  2753. spi_device->dev.platform_data = NULL;
  2754. }
  2755. /* get spi_device private data */
  2756. priv = spi_get_drvdata(spi_device);
  2757. if (priv) {
  2758. dev_info(
  2759. &spi_device->dev,
  2760. "sync_down = %d, sync_up = %d\n",
  2761. priv->sync_down,
  2762. priv->sync_up
  2763. );
  2764. ca8210_dev_com_clear(spi_device->dev.driver_data);
  2765. if (priv->hw) {
  2766. if (priv->hw_registered)
  2767. ieee802154_unregister_hw(priv->hw);
  2768. ieee802154_free_hw(priv->hw);
  2769. priv->hw = NULL;
  2770. dev_info(
  2771. &spi_device->dev,
  2772. "Unregistered & freed ieee802154_hw.\n"
  2773. );
  2774. }
  2775. if (IS_ENABLED(CONFIG_IEEE802154_CA8210_DEBUGFS))
  2776. ca8210_test_interface_clear(priv);
  2777. }
  2778. }
  2779. /**
  2780. * ca8210_probe() - Set up a connected ca8210 upon being detected by the system
  2781. * @spi_device: Pointer to spi device data structure
  2782. *
  2783. * Return: 0 or linux error code
  2784. */
  2785. static int ca8210_probe(struct spi_device *spi_device)
  2786. {
  2787. struct ca8210_priv *priv;
  2788. struct ieee802154_hw *hw;
  2789. struct ca8210_platform_data *pdata;
  2790. int ret;
  2791. dev_info(&spi_device->dev, "Inserting ca8210\n");
  2792. /* allocate ieee802154_hw and private data */
  2793. hw = ieee802154_alloc_hw(sizeof(struct ca8210_priv), &ca8210_phy_ops);
  2794. if (!hw) {
  2795. dev_crit(&spi_device->dev, "ieee802154_alloc_hw failed\n");
  2796. ret = -ENOMEM;
  2797. goto error;
  2798. }
  2799. priv = hw->priv;
  2800. priv->hw = hw;
  2801. priv->spi = spi_device;
  2802. hw->parent = &spi_device->dev;
  2803. spin_lock_init(&priv->lock);
  2804. priv->async_tx_pending = false;
  2805. priv->hw_registered = false;
  2806. priv->sync_up = 0;
  2807. priv->sync_down = 0;
  2808. priv->promiscuous = false;
  2809. priv->retries = 0;
  2810. init_completion(&priv->ca8210_is_awake);
  2811. init_completion(&priv->spi_transfer_complete);
  2812. init_completion(&priv->sync_exchange_complete);
  2813. spi_set_drvdata(priv->spi, priv);
  2814. if (IS_ENABLED(CONFIG_IEEE802154_CA8210_DEBUGFS)) {
  2815. cascoda_api_upstream = ca8210_test_int_driver_write;
  2816. ca8210_test_interface_init(priv);
  2817. } else {
  2818. cascoda_api_upstream = NULL;
  2819. }
  2820. ca8210_hw_setup(hw);
  2821. ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
  2822. pdata = kmalloc(sizeof(*pdata), GFP_KERNEL);
  2823. if (!pdata) {
  2824. ret = -ENOMEM;
  2825. goto error;
  2826. }
  2827. priv->spi->dev.platform_data = pdata;
  2828. ret = ca8210_get_platform_data(priv->spi, pdata);
  2829. if (ret) {
  2830. dev_crit(&spi_device->dev, "ca8210_get_platform_data failed\n");
  2831. goto error;
  2832. }
  2833. ret = ca8210_dev_com_init(priv);
  2834. if (ret) {
  2835. dev_crit(&spi_device->dev, "ca8210_dev_com_init failed\n");
  2836. goto error;
  2837. }
  2838. ret = ca8210_reset_init(priv->spi);
  2839. if (ret) {
  2840. dev_crit(&spi_device->dev, "ca8210_reset_init failed\n");
  2841. goto error;
  2842. }
  2843. ret = ca8210_interrupt_init(priv->spi);
  2844. if (ret) {
  2845. dev_crit(&spi_device->dev, "ca8210_interrupt_init failed\n");
  2846. goto error;
  2847. }
  2848. msleep(100);
  2849. ca8210_reset_send(priv->spi, 1);
  2850. ret = tdme_chipinit(priv->spi);
  2851. if (ret) {
  2852. dev_crit(&spi_device->dev, "tdme_chipinit failed\n");
  2853. goto error;
  2854. }
  2855. if (pdata->extclockenable) {
  2856. ret = ca8210_config_extern_clk(pdata, priv->spi, 1);
  2857. if (ret) {
  2858. dev_crit(
  2859. &spi_device->dev,
  2860. "ca8210_config_extern_clk failed\n"
  2861. );
  2862. goto error;
  2863. }
  2864. ret = ca8210_register_ext_clock(priv->spi);
  2865. if (ret) {
  2866. dev_crit(
  2867. &spi_device->dev,
  2868. "ca8210_register_ext_clock failed\n"
  2869. );
  2870. goto error;
  2871. }
  2872. }
  2873. ret = ieee802154_register_hw(hw);
  2874. if (ret) {
  2875. dev_crit(&spi_device->dev, "ieee802154_register_hw failed\n");
  2876. goto error;
  2877. }
  2878. priv->hw_registered = true;
  2879. return 0;
  2880. error:
  2881. msleep(100); /* wait for pending spi transfers to complete */
  2882. ca8210_remove(spi_device);
  2883. return link_to_linux_err(ret);
  2884. }
  2885. static const struct of_device_id ca8210_of_ids[] = {
  2886. {.compatible = "cascoda,ca8210", },
  2887. {},
  2888. };
  2889. MODULE_DEVICE_TABLE(of, ca8210_of_ids);
  2890. static struct spi_driver ca8210_spi_driver = {
  2891. .driver = {
  2892. .name = DRIVER_NAME,
  2893. .owner = THIS_MODULE,
  2894. .of_match_table = of_match_ptr(ca8210_of_ids),
  2895. },
  2896. .probe = ca8210_probe,
  2897. .remove = ca8210_remove
  2898. };
  2899. module_spi_driver(ca8210_spi_driver);
  2900. MODULE_AUTHOR("Harry Morris <[email protected]>");
  2901. MODULE_DESCRIPTION("CA-8210 SoftMAC driver");
  2902. MODULE_LICENSE("Dual BSD/GPL");
  2903. MODULE_VERSION("1.0");