am65-cpsw-ethtool.c 22 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* Texas Instruments K3 AM65 Ethernet Switch SubSystem Driver ethtool ops
  3. *
  4. * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. */
  7. #include <linux/net_tstamp.h>
  8. #include <linux/phylink.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/pm_runtime.h>
  11. #include "am65-cpsw-nuss.h"
  12. #include "cpsw_ale.h"
  13. #include "am65-cpts.h"
  14. #define AM65_CPSW_REGDUMP_VER 0x1
  15. enum {
  16. AM65_CPSW_REGDUMP_MOD_NUSS = 1,
  17. AM65_CPSW_REGDUMP_MOD_RGMII_STATUS = 2,
  18. AM65_CPSW_REGDUMP_MOD_MDIO = 3,
  19. AM65_CPSW_REGDUMP_MOD_CPSW = 4,
  20. AM65_CPSW_REGDUMP_MOD_CPSW_P0 = 5,
  21. AM65_CPSW_REGDUMP_MOD_CPSW_P1 = 6,
  22. AM65_CPSW_REGDUMP_MOD_CPSW_CPTS = 7,
  23. AM65_CPSW_REGDUMP_MOD_CPSW_ALE = 8,
  24. AM65_CPSW_REGDUMP_MOD_CPSW_ALE_TBL = 9,
  25. AM65_CPSW_REGDUMP_MOD_LAST,
  26. };
  27. /**
  28. * struct am65_cpsw_regdump_hdr - regdump record header
  29. *
  30. * @module_id: CPSW module ID
  31. * @len: CPSW module registers space length in u32
  32. */
  33. struct am65_cpsw_regdump_hdr {
  34. u32 module_id;
  35. u32 len;
  36. };
  37. /**
  38. * struct am65_cpsw_regdump_item - regdump module description
  39. *
  40. * @hdr: CPSW module header
  41. * @start_ofs: CPSW module registers start addr
  42. * @end_ofs: CPSW module registers end addr
  43. *
  44. * Registers dump provided in the format:
  45. * u32 : module ID
  46. * u32 : dump length
  47. * u32[..len]: registers values
  48. */
  49. struct am65_cpsw_regdump_item {
  50. struct am65_cpsw_regdump_hdr hdr;
  51. u32 start_ofs;
  52. u32 end_ofs;
  53. };
  54. #define AM65_CPSW_REGDUMP_REC(mod, start, end) { \
  55. .hdr.module_id = (mod), \
  56. .hdr.len = (end + 4 - start) * 2 + \
  57. sizeof(struct am65_cpsw_regdump_hdr), \
  58. .start_ofs = (start), \
  59. .end_ofs = end, \
  60. }
  61. static const struct am65_cpsw_regdump_item am65_cpsw_regdump[] = {
  62. AM65_CPSW_REGDUMP_REC(AM65_CPSW_REGDUMP_MOD_NUSS, 0x0, 0x1c),
  63. AM65_CPSW_REGDUMP_REC(AM65_CPSW_REGDUMP_MOD_RGMII_STATUS, 0x30, 0x4c),
  64. AM65_CPSW_REGDUMP_REC(AM65_CPSW_REGDUMP_MOD_MDIO, 0xf00, 0xffc),
  65. AM65_CPSW_REGDUMP_REC(AM65_CPSW_REGDUMP_MOD_CPSW, 0x20000, 0x2011c),
  66. AM65_CPSW_REGDUMP_REC(AM65_CPSW_REGDUMP_MOD_CPSW_P0, 0x21000, 0x21320),
  67. AM65_CPSW_REGDUMP_REC(AM65_CPSW_REGDUMP_MOD_CPSW_P1, 0x22000, 0x223a4),
  68. AM65_CPSW_REGDUMP_REC(AM65_CPSW_REGDUMP_MOD_CPSW_CPTS,
  69. 0x3d000, 0x3d048),
  70. AM65_CPSW_REGDUMP_REC(AM65_CPSW_REGDUMP_MOD_CPSW_ALE, 0x3e000, 0x3e13c),
  71. AM65_CPSW_REGDUMP_REC(AM65_CPSW_REGDUMP_MOD_CPSW_ALE_TBL, 0, 0),
  72. };
  73. struct am65_cpsw_stats_regs {
  74. u32 rx_good_frames;
  75. u32 rx_broadcast_frames;
  76. u32 rx_multicast_frames;
  77. u32 rx_pause_frames; /* slave */
  78. u32 rx_crc_errors;
  79. u32 rx_align_code_errors; /* slave */
  80. u32 rx_oversized_frames;
  81. u32 rx_jabber_frames; /* slave */
  82. u32 rx_undersized_frames;
  83. u32 rx_fragments; /* slave */
  84. u32 ale_drop;
  85. u32 ale_overrun_drop;
  86. u32 rx_octets;
  87. u32 tx_good_frames;
  88. u32 tx_broadcast_frames;
  89. u32 tx_multicast_frames;
  90. u32 tx_pause_frames; /* slave */
  91. u32 tx_deferred_frames; /* slave */
  92. u32 tx_collision_frames; /* slave */
  93. u32 tx_single_coll_frames; /* slave */
  94. u32 tx_mult_coll_frames; /* slave */
  95. u32 tx_excessive_collisions; /* slave */
  96. u32 tx_late_collisions; /* slave */
  97. u32 rx_ipg_error; /* slave 10G only */
  98. u32 tx_carrier_sense_errors; /* slave */
  99. u32 tx_octets;
  100. u32 tx_64B_frames;
  101. u32 tx_65_to_127B_frames;
  102. u32 tx_128_to_255B_frames;
  103. u32 tx_256_to_511B_frames;
  104. u32 tx_512_to_1023B_frames;
  105. u32 tx_1024B_frames;
  106. u32 net_octets;
  107. u32 rx_bottom_fifo_drop;
  108. u32 rx_port_mask_drop;
  109. u32 rx_top_fifo_drop;
  110. u32 ale_rate_limit_drop;
  111. u32 ale_vid_ingress_drop;
  112. u32 ale_da_eq_sa_drop;
  113. u32 ale_block_drop; /* K3 */
  114. u32 ale_secure_drop; /* K3 */
  115. u32 ale_auth_drop; /* K3 */
  116. u32 ale_unknown_ucast;
  117. u32 ale_unknown_ucast_bytes;
  118. u32 ale_unknown_mcast;
  119. u32 ale_unknown_mcast_bytes;
  120. u32 ale_unknown_bcast;
  121. u32 ale_unknown_bcast_bytes;
  122. u32 ale_pol_match;
  123. u32 ale_pol_match_red;
  124. u32 ale_pol_match_yellow;
  125. u32 ale_mcast_sa_drop; /* K3 */
  126. u32 ale_dual_vlan_drop; /* K3 */
  127. u32 ale_len_err_drop; /* K3 */
  128. u32 ale_ip_next_hdr_drop; /* K3 */
  129. u32 ale_ipv4_frag_drop; /* K3 */
  130. u32 __rsvd_1[24];
  131. u32 iet_rx_assembly_err; /* K3 slave */
  132. u32 iet_rx_assembly_ok; /* K3 slave */
  133. u32 iet_rx_smd_err; /* K3 slave */
  134. u32 iet_rx_frag; /* K3 slave */
  135. u32 iet_tx_hold; /* K3 slave */
  136. u32 iet_tx_frag; /* K3 slave */
  137. u32 __rsvd_2[9];
  138. u32 tx_mem_protect_err;
  139. /* following NU only */
  140. u32 tx_pri0;
  141. u32 tx_pri1;
  142. u32 tx_pri2;
  143. u32 tx_pri3;
  144. u32 tx_pri4;
  145. u32 tx_pri5;
  146. u32 tx_pri6;
  147. u32 tx_pri7;
  148. u32 tx_pri0_bcnt;
  149. u32 tx_pri1_bcnt;
  150. u32 tx_pri2_bcnt;
  151. u32 tx_pri3_bcnt;
  152. u32 tx_pri4_bcnt;
  153. u32 tx_pri5_bcnt;
  154. u32 tx_pri6_bcnt;
  155. u32 tx_pri7_bcnt;
  156. u32 tx_pri0_drop;
  157. u32 tx_pri1_drop;
  158. u32 tx_pri2_drop;
  159. u32 tx_pri3_drop;
  160. u32 tx_pri4_drop;
  161. u32 tx_pri5_drop;
  162. u32 tx_pri6_drop;
  163. u32 tx_pri7_drop;
  164. u32 tx_pri0_drop_bcnt;
  165. u32 tx_pri1_drop_bcnt;
  166. u32 tx_pri2_drop_bcnt;
  167. u32 tx_pri3_drop_bcnt;
  168. u32 tx_pri4_drop_bcnt;
  169. u32 tx_pri5_drop_bcnt;
  170. u32 tx_pri6_drop_bcnt;
  171. u32 tx_pri7_drop_bcnt;
  172. };
  173. struct am65_cpsw_ethtool_stat {
  174. char desc[ETH_GSTRING_LEN];
  175. int offset;
  176. };
  177. #define AM65_CPSW_STATS(prefix, field) \
  178. { \
  179. #prefix#field, \
  180. offsetof(struct am65_cpsw_stats_regs, field) \
  181. }
  182. static const struct am65_cpsw_ethtool_stat am65_host_stats[] = {
  183. AM65_CPSW_STATS(p0_, rx_good_frames),
  184. AM65_CPSW_STATS(p0_, rx_broadcast_frames),
  185. AM65_CPSW_STATS(p0_, rx_multicast_frames),
  186. AM65_CPSW_STATS(p0_, rx_crc_errors),
  187. AM65_CPSW_STATS(p0_, rx_oversized_frames),
  188. AM65_CPSW_STATS(p0_, rx_undersized_frames),
  189. AM65_CPSW_STATS(p0_, ale_drop),
  190. AM65_CPSW_STATS(p0_, ale_overrun_drop),
  191. AM65_CPSW_STATS(p0_, rx_octets),
  192. AM65_CPSW_STATS(p0_, tx_good_frames),
  193. AM65_CPSW_STATS(p0_, tx_broadcast_frames),
  194. AM65_CPSW_STATS(p0_, tx_multicast_frames),
  195. AM65_CPSW_STATS(p0_, tx_octets),
  196. AM65_CPSW_STATS(p0_, tx_64B_frames),
  197. AM65_CPSW_STATS(p0_, tx_65_to_127B_frames),
  198. AM65_CPSW_STATS(p0_, tx_128_to_255B_frames),
  199. AM65_CPSW_STATS(p0_, tx_256_to_511B_frames),
  200. AM65_CPSW_STATS(p0_, tx_512_to_1023B_frames),
  201. AM65_CPSW_STATS(p0_, tx_1024B_frames),
  202. AM65_CPSW_STATS(p0_, net_octets),
  203. AM65_CPSW_STATS(p0_, rx_bottom_fifo_drop),
  204. AM65_CPSW_STATS(p0_, rx_port_mask_drop),
  205. AM65_CPSW_STATS(p0_, rx_top_fifo_drop),
  206. AM65_CPSW_STATS(p0_, ale_rate_limit_drop),
  207. AM65_CPSW_STATS(p0_, ale_vid_ingress_drop),
  208. AM65_CPSW_STATS(p0_, ale_da_eq_sa_drop),
  209. AM65_CPSW_STATS(p0_, ale_block_drop),
  210. AM65_CPSW_STATS(p0_, ale_secure_drop),
  211. AM65_CPSW_STATS(p0_, ale_auth_drop),
  212. AM65_CPSW_STATS(p0_, ale_unknown_ucast),
  213. AM65_CPSW_STATS(p0_, ale_unknown_ucast_bytes),
  214. AM65_CPSW_STATS(p0_, ale_unknown_mcast),
  215. AM65_CPSW_STATS(p0_, ale_unknown_mcast_bytes),
  216. AM65_CPSW_STATS(p0_, ale_unknown_bcast),
  217. AM65_CPSW_STATS(p0_, ale_unknown_bcast_bytes),
  218. AM65_CPSW_STATS(p0_, ale_pol_match),
  219. AM65_CPSW_STATS(p0_, ale_pol_match_red),
  220. AM65_CPSW_STATS(p0_, ale_pol_match_yellow),
  221. AM65_CPSW_STATS(p0_, ale_mcast_sa_drop),
  222. AM65_CPSW_STATS(p0_, ale_dual_vlan_drop),
  223. AM65_CPSW_STATS(p0_, ale_len_err_drop),
  224. AM65_CPSW_STATS(p0_, ale_ip_next_hdr_drop),
  225. AM65_CPSW_STATS(p0_, ale_ipv4_frag_drop),
  226. AM65_CPSW_STATS(p0_, tx_mem_protect_err),
  227. AM65_CPSW_STATS(p0_, tx_pri0),
  228. AM65_CPSW_STATS(p0_, tx_pri1),
  229. AM65_CPSW_STATS(p0_, tx_pri2),
  230. AM65_CPSW_STATS(p0_, tx_pri3),
  231. AM65_CPSW_STATS(p0_, tx_pri4),
  232. AM65_CPSW_STATS(p0_, tx_pri5),
  233. AM65_CPSW_STATS(p0_, tx_pri6),
  234. AM65_CPSW_STATS(p0_, tx_pri7),
  235. AM65_CPSW_STATS(p0_, tx_pri0_bcnt),
  236. AM65_CPSW_STATS(p0_, tx_pri1_bcnt),
  237. AM65_CPSW_STATS(p0_, tx_pri2_bcnt),
  238. AM65_CPSW_STATS(p0_, tx_pri3_bcnt),
  239. AM65_CPSW_STATS(p0_, tx_pri4_bcnt),
  240. AM65_CPSW_STATS(p0_, tx_pri5_bcnt),
  241. AM65_CPSW_STATS(p0_, tx_pri6_bcnt),
  242. AM65_CPSW_STATS(p0_, tx_pri7_bcnt),
  243. AM65_CPSW_STATS(p0_, tx_pri0_drop),
  244. AM65_CPSW_STATS(p0_, tx_pri1_drop),
  245. AM65_CPSW_STATS(p0_, tx_pri2_drop),
  246. AM65_CPSW_STATS(p0_, tx_pri3_drop),
  247. AM65_CPSW_STATS(p0_, tx_pri4_drop),
  248. AM65_CPSW_STATS(p0_, tx_pri5_drop),
  249. AM65_CPSW_STATS(p0_, tx_pri6_drop),
  250. AM65_CPSW_STATS(p0_, tx_pri7_drop),
  251. AM65_CPSW_STATS(p0_, tx_pri0_drop_bcnt),
  252. AM65_CPSW_STATS(p0_, tx_pri1_drop_bcnt),
  253. AM65_CPSW_STATS(p0_, tx_pri2_drop_bcnt),
  254. AM65_CPSW_STATS(p0_, tx_pri3_drop_bcnt),
  255. AM65_CPSW_STATS(p0_, tx_pri4_drop_bcnt),
  256. AM65_CPSW_STATS(p0_, tx_pri5_drop_bcnt),
  257. AM65_CPSW_STATS(p0_, tx_pri6_drop_bcnt),
  258. AM65_CPSW_STATS(p0_, tx_pri7_drop_bcnt),
  259. };
  260. static const struct am65_cpsw_ethtool_stat am65_slave_stats[] = {
  261. AM65_CPSW_STATS(, rx_good_frames),
  262. AM65_CPSW_STATS(, rx_broadcast_frames),
  263. AM65_CPSW_STATS(, rx_multicast_frames),
  264. AM65_CPSW_STATS(, rx_pause_frames),
  265. AM65_CPSW_STATS(, rx_crc_errors),
  266. AM65_CPSW_STATS(, rx_align_code_errors),
  267. AM65_CPSW_STATS(, rx_oversized_frames),
  268. AM65_CPSW_STATS(, rx_jabber_frames),
  269. AM65_CPSW_STATS(, rx_undersized_frames),
  270. AM65_CPSW_STATS(, rx_fragments),
  271. AM65_CPSW_STATS(, ale_drop),
  272. AM65_CPSW_STATS(, ale_overrun_drop),
  273. AM65_CPSW_STATS(, rx_octets),
  274. AM65_CPSW_STATS(, tx_good_frames),
  275. AM65_CPSW_STATS(, tx_broadcast_frames),
  276. AM65_CPSW_STATS(, tx_multicast_frames),
  277. AM65_CPSW_STATS(, tx_pause_frames),
  278. AM65_CPSW_STATS(, tx_deferred_frames),
  279. AM65_CPSW_STATS(, tx_collision_frames),
  280. AM65_CPSW_STATS(, tx_single_coll_frames),
  281. AM65_CPSW_STATS(, tx_mult_coll_frames),
  282. AM65_CPSW_STATS(, tx_excessive_collisions),
  283. AM65_CPSW_STATS(, tx_late_collisions),
  284. AM65_CPSW_STATS(, rx_ipg_error),
  285. AM65_CPSW_STATS(, tx_carrier_sense_errors),
  286. AM65_CPSW_STATS(, tx_octets),
  287. AM65_CPSW_STATS(, tx_64B_frames),
  288. AM65_CPSW_STATS(, tx_65_to_127B_frames),
  289. AM65_CPSW_STATS(, tx_128_to_255B_frames),
  290. AM65_CPSW_STATS(, tx_256_to_511B_frames),
  291. AM65_CPSW_STATS(, tx_512_to_1023B_frames),
  292. AM65_CPSW_STATS(, tx_1024B_frames),
  293. AM65_CPSW_STATS(, net_octets),
  294. AM65_CPSW_STATS(, rx_bottom_fifo_drop),
  295. AM65_CPSW_STATS(, rx_port_mask_drop),
  296. AM65_CPSW_STATS(, rx_top_fifo_drop),
  297. AM65_CPSW_STATS(, ale_rate_limit_drop),
  298. AM65_CPSW_STATS(, ale_vid_ingress_drop),
  299. AM65_CPSW_STATS(, ale_da_eq_sa_drop),
  300. AM65_CPSW_STATS(, ale_block_drop),
  301. AM65_CPSW_STATS(, ale_secure_drop),
  302. AM65_CPSW_STATS(, ale_auth_drop),
  303. AM65_CPSW_STATS(, ale_unknown_ucast),
  304. AM65_CPSW_STATS(, ale_unknown_ucast_bytes),
  305. AM65_CPSW_STATS(, ale_unknown_mcast),
  306. AM65_CPSW_STATS(, ale_unknown_mcast_bytes),
  307. AM65_CPSW_STATS(, ale_unknown_bcast),
  308. AM65_CPSW_STATS(, ale_unknown_bcast_bytes),
  309. AM65_CPSW_STATS(, ale_pol_match),
  310. AM65_CPSW_STATS(, ale_pol_match_red),
  311. AM65_CPSW_STATS(, ale_pol_match_yellow),
  312. AM65_CPSW_STATS(, ale_mcast_sa_drop),
  313. AM65_CPSW_STATS(, ale_dual_vlan_drop),
  314. AM65_CPSW_STATS(, ale_len_err_drop),
  315. AM65_CPSW_STATS(, ale_ip_next_hdr_drop),
  316. AM65_CPSW_STATS(, ale_ipv4_frag_drop),
  317. AM65_CPSW_STATS(, iet_rx_assembly_err),
  318. AM65_CPSW_STATS(, iet_rx_assembly_ok),
  319. AM65_CPSW_STATS(, iet_rx_smd_err),
  320. AM65_CPSW_STATS(, iet_rx_frag),
  321. AM65_CPSW_STATS(, iet_tx_hold),
  322. AM65_CPSW_STATS(, iet_tx_frag),
  323. AM65_CPSW_STATS(, tx_mem_protect_err),
  324. AM65_CPSW_STATS(, tx_pri0),
  325. AM65_CPSW_STATS(, tx_pri1),
  326. AM65_CPSW_STATS(, tx_pri2),
  327. AM65_CPSW_STATS(, tx_pri3),
  328. AM65_CPSW_STATS(, tx_pri4),
  329. AM65_CPSW_STATS(, tx_pri5),
  330. AM65_CPSW_STATS(, tx_pri6),
  331. AM65_CPSW_STATS(, tx_pri7),
  332. AM65_CPSW_STATS(, tx_pri0_bcnt),
  333. AM65_CPSW_STATS(, tx_pri1_bcnt),
  334. AM65_CPSW_STATS(, tx_pri2_bcnt),
  335. AM65_CPSW_STATS(, tx_pri3_bcnt),
  336. AM65_CPSW_STATS(, tx_pri4_bcnt),
  337. AM65_CPSW_STATS(, tx_pri5_bcnt),
  338. AM65_CPSW_STATS(, tx_pri6_bcnt),
  339. AM65_CPSW_STATS(, tx_pri7_bcnt),
  340. AM65_CPSW_STATS(, tx_pri0_drop),
  341. AM65_CPSW_STATS(, tx_pri1_drop),
  342. AM65_CPSW_STATS(, tx_pri2_drop),
  343. AM65_CPSW_STATS(, tx_pri3_drop),
  344. AM65_CPSW_STATS(, tx_pri4_drop),
  345. AM65_CPSW_STATS(, tx_pri5_drop),
  346. AM65_CPSW_STATS(, tx_pri6_drop),
  347. AM65_CPSW_STATS(, tx_pri7_drop),
  348. AM65_CPSW_STATS(, tx_pri0_drop_bcnt),
  349. AM65_CPSW_STATS(, tx_pri1_drop_bcnt),
  350. AM65_CPSW_STATS(, tx_pri2_drop_bcnt),
  351. AM65_CPSW_STATS(, tx_pri3_drop_bcnt),
  352. AM65_CPSW_STATS(, tx_pri4_drop_bcnt),
  353. AM65_CPSW_STATS(, tx_pri5_drop_bcnt),
  354. AM65_CPSW_STATS(, tx_pri6_drop_bcnt),
  355. AM65_CPSW_STATS(, tx_pri7_drop_bcnt),
  356. };
  357. /* Ethtool priv_flags */
  358. static const char am65_cpsw_ethtool_priv_flags[][ETH_GSTRING_LEN] = {
  359. #define AM65_CPSW_PRIV_P0_RX_PTYPE_RROBIN BIT(0)
  360. "p0-rx-ptype-rrobin",
  361. };
  362. static int am65_cpsw_ethtool_op_begin(struct net_device *ndev)
  363. {
  364. struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
  365. int ret;
  366. ret = pm_runtime_resume_and_get(common->dev);
  367. if (ret < 0)
  368. dev_err(common->dev, "ethtool begin failed %d\n", ret);
  369. return ret;
  370. }
  371. static void am65_cpsw_ethtool_op_complete(struct net_device *ndev)
  372. {
  373. struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
  374. int ret;
  375. ret = pm_runtime_put(common->dev);
  376. if (ret < 0 && ret != -EBUSY)
  377. dev_err(common->dev, "ethtool complete failed %d\n", ret);
  378. }
  379. static void am65_cpsw_get_drvinfo(struct net_device *ndev,
  380. struct ethtool_drvinfo *info)
  381. {
  382. struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
  383. strscpy(info->driver, dev_driver_string(common->dev),
  384. sizeof(info->driver));
  385. strscpy(info->bus_info, dev_name(common->dev), sizeof(info->bus_info));
  386. }
  387. static u32 am65_cpsw_get_msglevel(struct net_device *ndev)
  388. {
  389. struct am65_cpsw_ndev_priv *priv = am65_ndev_to_priv(ndev);
  390. return priv->msg_enable;
  391. }
  392. static void am65_cpsw_set_msglevel(struct net_device *ndev, u32 value)
  393. {
  394. struct am65_cpsw_ndev_priv *priv = am65_ndev_to_priv(ndev);
  395. priv->msg_enable = value;
  396. }
  397. static void am65_cpsw_get_channels(struct net_device *ndev,
  398. struct ethtool_channels *ch)
  399. {
  400. struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
  401. ch->max_rx = AM65_CPSW_MAX_RX_QUEUES;
  402. ch->max_tx = AM65_CPSW_MAX_TX_QUEUES;
  403. ch->rx_count = AM65_CPSW_MAX_RX_QUEUES;
  404. ch->tx_count = common->tx_ch_num;
  405. }
  406. static int am65_cpsw_set_channels(struct net_device *ndev,
  407. struct ethtool_channels *chs)
  408. {
  409. struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
  410. if (!chs->rx_count || !chs->tx_count)
  411. return -EINVAL;
  412. /* Check if interface is up. Can change the num queues when
  413. * the interface is down.
  414. */
  415. if (common->usage_count)
  416. return -EBUSY;
  417. am65_cpsw_nuss_remove_tx_chns(common);
  418. return am65_cpsw_nuss_update_tx_chns(common, chs->tx_count);
  419. }
  420. static void
  421. am65_cpsw_get_ringparam(struct net_device *ndev,
  422. struct ethtool_ringparam *ering,
  423. struct kernel_ethtool_ringparam *kernel_ering,
  424. struct netlink_ext_ack *extack)
  425. {
  426. struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
  427. /* not supported */
  428. ering->tx_pending = common->tx_chns[0].descs_num;
  429. ering->rx_pending = common->rx_chns.descs_num;
  430. }
  431. static void am65_cpsw_get_pauseparam(struct net_device *ndev,
  432. struct ethtool_pauseparam *pause)
  433. {
  434. struct am65_cpsw_slave_data *salve = am65_ndev_to_slave(ndev);
  435. phylink_ethtool_get_pauseparam(salve->phylink, pause);
  436. }
  437. static int am65_cpsw_set_pauseparam(struct net_device *ndev,
  438. struct ethtool_pauseparam *pause)
  439. {
  440. struct am65_cpsw_slave_data *salve = am65_ndev_to_slave(ndev);
  441. return phylink_ethtool_set_pauseparam(salve->phylink, pause);
  442. }
  443. static void am65_cpsw_get_wol(struct net_device *ndev,
  444. struct ethtool_wolinfo *wol)
  445. {
  446. struct am65_cpsw_slave_data *salve = am65_ndev_to_slave(ndev);
  447. phylink_ethtool_get_wol(salve->phylink, wol);
  448. }
  449. static int am65_cpsw_set_wol(struct net_device *ndev,
  450. struct ethtool_wolinfo *wol)
  451. {
  452. struct am65_cpsw_slave_data *salve = am65_ndev_to_slave(ndev);
  453. return phylink_ethtool_set_wol(salve->phylink, wol);
  454. }
  455. static int am65_cpsw_get_link_ksettings(struct net_device *ndev,
  456. struct ethtool_link_ksettings *ecmd)
  457. {
  458. struct am65_cpsw_slave_data *salve = am65_ndev_to_slave(ndev);
  459. return phylink_ethtool_ksettings_get(salve->phylink, ecmd);
  460. }
  461. static int
  462. am65_cpsw_set_link_ksettings(struct net_device *ndev,
  463. const struct ethtool_link_ksettings *ecmd)
  464. {
  465. struct am65_cpsw_slave_data *salve = am65_ndev_to_slave(ndev);
  466. return phylink_ethtool_ksettings_set(salve->phylink, ecmd);
  467. }
  468. static int am65_cpsw_get_eee(struct net_device *ndev, struct ethtool_eee *edata)
  469. {
  470. struct am65_cpsw_slave_data *salve = am65_ndev_to_slave(ndev);
  471. return phylink_ethtool_get_eee(salve->phylink, edata);
  472. }
  473. static int am65_cpsw_set_eee(struct net_device *ndev, struct ethtool_eee *edata)
  474. {
  475. struct am65_cpsw_slave_data *salve = am65_ndev_to_slave(ndev);
  476. return phylink_ethtool_set_eee(salve->phylink, edata);
  477. }
  478. static int am65_cpsw_nway_reset(struct net_device *ndev)
  479. {
  480. struct am65_cpsw_slave_data *salve = am65_ndev_to_slave(ndev);
  481. return phylink_ethtool_nway_reset(salve->phylink);
  482. }
  483. static int am65_cpsw_get_regs_len(struct net_device *ndev)
  484. {
  485. struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
  486. u32 ale_entries, i, regdump_len = 0;
  487. ale_entries = cpsw_ale_get_num_entries(common->ale);
  488. for (i = 0; i < ARRAY_SIZE(am65_cpsw_regdump); i++) {
  489. if (am65_cpsw_regdump[i].hdr.module_id ==
  490. AM65_CPSW_REGDUMP_MOD_CPSW_ALE_TBL) {
  491. regdump_len += sizeof(struct am65_cpsw_regdump_hdr);
  492. regdump_len += ale_entries *
  493. ALE_ENTRY_WORDS * sizeof(u32);
  494. continue;
  495. }
  496. regdump_len += am65_cpsw_regdump[i].hdr.len;
  497. }
  498. return regdump_len;
  499. }
  500. static void am65_cpsw_get_regs(struct net_device *ndev,
  501. struct ethtool_regs *regs, void *p)
  502. {
  503. struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
  504. u32 ale_entries, i, j, pos, *reg = p;
  505. /* update CPSW IP version */
  506. regs->version = AM65_CPSW_REGDUMP_VER;
  507. ale_entries = cpsw_ale_get_num_entries(common->ale);
  508. pos = 0;
  509. for (i = 0; i < ARRAY_SIZE(am65_cpsw_regdump); i++) {
  510. reg[pos++] = am65_cpsw_regdump[i].hdr.module_id;
  511. if (am65_cpsw_regdump[i].hdr.module_id ==
  512. AM65_CPSW_REGDUMP_MOD_CPSW_ALE_TBL) {
  513. u32 ale_tbl_len = ale_entries *
  514. ALE_ENTRY_WORDS * sizeof(u32) +
  515. sizeof(struct am65_cpsw_regdump_hdr);
  516. reg[pos++] = ale_tbl_len;
  517. cpsw_ale_dump(common->ale, &reg[pos]);
  518. pos += ale_tbl_len;
  519. continue;
  520. }
  521. reg[pos++] = am65_cpsw_regdump[i].hdr.len;
  522. j = am65_cpsw_regdump[i].start_ofs;
  523. do {
  524. reg[pos++] = j;
  525. reg[pos++] = readl_relaxed(common->ss_base + j);
  526. j += sizeof(u32);
  527. } while (j <= am65_cpsw_regdump[i].end_ofs);
  528. }
  529. }
  530. static int am65_cpsw_get_sset_count(struct net_device *ndev, int sset)
  531. {
  532. switch (sset) {
  533. case ETH_SS_STATS:
  534. return ARRAY_SIZE(am65_host_stats) +
  535. ARRAY_SIZE(am65_slave_stats);
  536. case ETH_SS_PRIV_FLAGS:
  537. return ARRAY_SIZE(am65_cpsw_ethtool_priv_flags);
  538. default:
  539. return -EOPNOTSUPP;
  540. }
  541. }
  542. static void am65_cpsw_get_strings(struct net_device *ndev,
  543. u32 stringset, u8 *data)
  544. {
  545. const struct am65_cpsw_ethtool_stat *hw_stats;
  546. u32 i, num_stats;
  547. u8 *p = data;
  548. switch (stringset) {
  549. case ETH_SS_STATS:
  550. num_stats = ARRAY_SIZE(am65_host_stats);
  551. hw_stats = am65_host_stats;
  552. for (i = 0; i < num_stats; i++) {
  553. memcpy(p, hw_stats[i].desc, ETH_GSTRING_LEN);
  554. p += ETH_GSTRING_LEN;
  555. }
  556. num_stats = ARRAY_SIZE(am65_slave_stats);
  557. hw_stats = am65_slave_stats;
  558. for (i = 0; i < num_stats; i++) {
  559. memcpy(p, hw_stats[i].desc, ETH_GSTRING_LEN);
  560. p += ETH_GSTRING_LEN;
  561. }
  562. break;
  563. case ETH_SS_PRIV_FLAGS:
  564. num_stats = ARRAY_SIZE(am65_cpsw_ethtool_priv_flags);
  565. for (i = 0; i < num_stats; i++) {
  566. memcpy(p, am65_cpsw_ethtool_priv_flags[i],
  567. ETH_GSTRING_LEN);
  568. p += ETH_GSTRING_LEN;
  569. }
  570. break;
  571. }
  572. }
  573. static void am65_cpsw_get_ethtool_stats(struct net_device *ndev,
  574. struct ethtool_stats *stats, u64 *data)
  575. {
  576. struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
  577. const struct am65_cpsw_ethtool_stat *hw_stats;
  578. struct am65_cpsw_host *host_p;
  579. struct am65_cpsw_port *port;
  580. u32 i, num_stats;
  581. host_p = am65_common_get_host(common);
  582. port = am65_ndev_to_port(ndev);
  583. num_stats = ARRAY_SIZE(am65_host_stats);
  584. hw_stats = am65_host_stats;
  585. for (i = 0; i < num_stats; i++)
  586. *data++ = readl_relaxed(host_p->stat_base +
  587. hw_stats[i].offset);
  588. num_stats = ARRAY_SIZE(am65_slave_stats);
  589. hw_stats = am65_slave_stats;
  590. for (i = 0; i < num_stats; i++)
  591. *data++ = readl_relaxed(port->stat_base +
  592. hw_stats[i].offset);
  593. }
  594. static int am65_cpsw_get_ethtool_ts_info(struct net_device *ndev,
  595. struct ethtool_ts_info *info)
  596. {
  597. struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
  598. if (!IS_ENABLED(CONFIG_TI_K3_AM65_CPTS))
  599. return ethtool_op_get_ts_info(ndev, info);
  600. info->so_timestamping =
  601. SOF_TIMESTAMPING_TX_HARDWARE |
  602. SOF_TIMESTAMPING_TX_SOFTWARE |
  603. SOF_TIMESTAMPING_RX_HARDWARE |
  604. SOF_TIMESTAMPING_RX_SOFTWARE |
  605. SOF_TIMESTAMPING_SOFTWARE |
  606. SOF_TIMESTAMPING_RAW_HARDWARE;
  607. info->phc_index = am65_cpts_phc_index(common->cpts);
  608. info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
  609. info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | BIT(HWTSTAMP_FILTER_ALL);
  610. return 0;
  611. }
  612. static u32 am65_cpsw_get_ethtool_priv_flags(struct net_device *ndev)
  613. {
  614. struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
  615. u32 priv_flags = 0;
  616. if (common->pf_p0_rx_ptype_rrobin)
  617. priv_flags |= AM65_CPSW_PRIV_P0_RX_PTYPE_RROBIN;
  618. return priv_flags;
  619. }
  620. static int am65_cpsw_set_ethtool_priv_flags(struct net_device *ndev, u32 flags)
  621. {
  622. struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
  623. int rrobin;
  624. rrobin = !!(flags & AM65_CPSW_PRIV_P0_RX_PTYPE_RROBIN);
  625. if (common->usage_count)
  626. return -EBUSY;
  627. if (common->est_enabled && rrobin) {
  628. netdev_err(ndev,
  629. "p0-rx-ptype-rrobin flag conflicts with QOS\n");
  630. return -EINVAL;
  631. }
  632. common->pf_p0_rx_ptype_rrobin = rrobin;
  633. return 0;
  634. }
  635. const struct ethtool_ops am65_cpsw_ethtool_ops_slave = {
  636. .begin = am65_cpsw_ethtool_op_begin,
  637. .complete = am65_cpsw_ethtool_op_complete,
  638. .get_drvinfo = am65_cpsw_get_drvinfo,
  639. .get_msglevel = am65_cpsw_get_msglevel,
  640. .set_msglevel = am65_cpsw_set_msglevel,
  641. .get_channels = am65_cpsw_get_channels,
  642. .set_channels = am65_cpsw_set_channels,
  643. .get_ringparam = am65_cpsw_get_ringparam,
  644. .get_regs_len = am65_cpsw_get_regs_len,
  645. .get_regs = am65_cpsw_get_regs,
  646. .get_sset_count = am65_cpsw_get_sset_count,
  647. .get_strings = am65_cpsw_get_strings,
  648. .get_ethtool_stats = am65_cpsw_get_ethtool_stats,
  649. .get_ts_info = am65_cpsw_get_ethtool_ts_info,
  650. .get_priv_flags = am65_cpsw_get_ethtool_priv_flags,
  651. .set_priv_flags = am65_cpsw_set_ethtool_priv_flags,
  652. .get_link = ethtool_op_get_link,
  653. .get_link_ksettings = am65_cpsw_get_link_ksettings,
  654. .set_link_ksettings = am65_cpsw_set_link_ksettings,
  655. .get_pauseparam = am65_cpsw_get_pauseparam,
  656. .set_pauseparam = am65_cpsw_set_pauseparam,
  657. .get_wol = am65_cpsw_get_wol,
  658. .set_wol = am65_cpsw_set_wol,
  659. .get_eee = am65_cpsw_get_eee,
  660. .set_eee = am65_cpsw_set_eee,
  661. .nway_reset = am65_cpsw_nway_reset,
  662. };