qede.h 16 KB

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  1. /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
  2. /* QLogic qede NIC Driver
  3. * Copyright (c) 2015-2017 QLogic Corporation
  4. * Copyright (c) 2019-2020 Marvell International Ltd.
  5. */
  6. #ifndef _QEDE_H_
  7. #define _QEDE_H_
  8. #include <linux/compiler.h>
  9. #include <linux/version.h>
  10. #include <linux/workqueue.h>
  11. #include <linux/netdevice.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/bitmap.h>
  14. #include <linux/kernel.h>
  15. #include <linux/mutex.h>
  16. #include <linux/bpf.h>
  17. #include <net/xdp.h>
  18. #include <linux/qed/qede_rdma.h>
  19. #include <linux/io.h>
  20. #ifdef CONFIG_RFS_ACCEL
  21. #include <linux/cpu_rmap.h>
  22. #endif
  23. #include <linux/qed/common_hsi.h>
  24. #include <linux/qed/eth_common.h>
  25. #include <linux/qed/qed_if.h>
  26. #include <linux/qed/qed_chain.h>
  27. #include <linux/qed/qed_eth_if.h>
  28. #include <net/pkt_cls.h>
  29. #include <net/tc_act/tc_gact.h>
  30. #define DRV_MODULE_SYM qede
  31. struct qede_stats_common {
  32. u64 no_buff_discards;
  33. u64 packet_too_big_discard;
  34. u64 ttl0_discard;
  35. u64 rx_ucast_bytes;
  36. u64 rx_mcast_bytes;
  37. u64 rx_bcast_bytes;
  38. u64 rx_ucast_pkts;
  39. u64 rx_mcast_pkts;
  40. u64 rx_bcast_pkts;
  41. u64 mftag_filter_discards;
  42. u64 mac_filter_discards;
  43. u64 gft_filter_drop;
  44. u64 tx_ucast_bytes;
  45. u64 tx_mcast_bytes;
  46. u64 tx_bcast_bytes;
  47. u64 tx_ucast_pkts;
  48. u64 tx_mcast_pkts;
  49. u64 tx_bcast_pkts;
  50. u64 tx_err_drop_pkts;
  51. u64 coalesced_pkts;
  52. u64 coalesced_events;
  53. u64 coalesced_aborts_num;
  54. u64 non_coalesced_pkts;
  55. u64 coalesced_bytes;
  56. u64 link_change_count;
  57. u64 ptp_skip_txts;
  58. /* port */
  59. u64 rx_64_byte_packets;
  60. u64 rx_65_to_127_byte_packets;
  61. u64 rx_128_to_255_byte_packets;
  62. u64 rx_256_to_511_byte_packets;
  63. u64 rx_512_to_1023_byte_packets;
  64. u64 rx_1024_to_1518_byte_packets;
  65. u64 rx_crc_errors;
  66. u64 rx_mac_crtl_frames;
  67. u64 rx_pause_frames;
  68. u64 rx_pfc_frames;
  69. u64 rx_align_errors;
  70. u64 rx_carrier_errors;
  71. u64 rx_oversize_packets;
  72. u64 rx_jabbers;
  73. u64 rx_undersize_packets;
  74. u64 rx_fragments;
  75. u64 tx_64_byte_packets;
  76. u64 tx_65_to_127_byte_packets;
  77. u64 tx_128_to_255_byte_packets;
  78. u64 tx_256_to_511_byte_packets;
  79. u64 tx_512_to_1023_byte_packets;
  80. u64 tx_1024_to_1518_byte_packets;
  81. u64 tx_pause_frames;
  82. u64 tx_pfc_frames;
  83. u64 brb_truncates;
  84. u64 brb_discards;
  85. u64 tx_mac_ctrl_frames;
  86. };
  87. struct qede_stats_bb {
  88. u64 rx_1519_to_1522_byte_packets;
  89. u64 rx_1519_to_2047_byte_packets;
  90. u64 rx_2048_to_4095_byte_packets;
  91. u64 rx_4096_to_9216_byte_packets;
  92. u64 rx_9217_to_16383_byte_packets;
  93. u64 tx_1519_to_2047_byte_packets;
  94. u64 tx_2048_to_4095_byte_packets;
  95. u64 tx_4096_to_9216_byte_packets;
  96. u64 tx_9217_to_16383_byte_packets;
  97. u64 tx_lpi_entry_count;
  98. u64 tx_total_collisions;
  99. };
  100. struct qede_stats_ah {
  101. u64 rx_1519_to_max_byte_packets;
  102. u64 tx_1519_to_max_byte_packets;
  103. };
  104. struct qede_stats {
  105. struct qede_stats_common common;
  106. union {
  107. struct qede_stats_bb bb;
  108. struct qede_stats_ah ah;
  109. };
  110. };
  111. struct qede_vlan {
  112. struct list_head list;
  113. u16 vid;
  114. bool configured;
  115. };
  116. struct qede_rdma_dev {
  117. struct qedr_dev *qedr_dev;
  118. struct list_head entry;
  119. struct list_head rdma_event_list;
  120. struct workqueue_struct *rdma_wq;
  121. struct kref refcnt;
  122. struct completion event_comp;
  123. bool exp_recovery;
  124. };
  125. struct qede_ptp;
  126. #define QEDE_RFS_MAX_FLTR 256
  127. enum qede_flags_bit {
  128. QEDE_FLAGS_IS_VF = 0,
  129. QEDE_FLAGS_LINK_REQUESTED,
  130. QEDE_FLAGS_PTP_TX_IN_PRORGESS,
  131. QEDE_FLAGS_TX_TIMESTAMPING_EN
  132. };
  133. #define QEDE_DUMP_MAX_ARGS 4
  134. enum qede_dump_cmd {
  135. QEDE_DUMP_CMD_NONE = 0,
  136. QEDE_DUMP_CMD_NVM_CFG,
  137. QEDE_DUMP_CMD_GRCDUMP,
  138. QEDE_DUMP_CMD_MAX
  139. };
  140. struct qede_dump_info {
  141. enum qede_dump_cmd cmd;
  142. u8 num_args;
  143. u32 args[QEDE_DUMP_MAX_ARGS];
  144. };
  145. struct qede_coalesce {
  146. bool isvalid;
  147. u16 rxc;
  148. u16 txc;
  149. };
  150. struct qede_dev {
  151. struct qed_dev *cdev;
  152. struct net_device *ndev;
  153. struct pci_dev *pdev;
  154. struct devlink *devlink;
  155. u32 dp_module;
  156. u8 dp_level;
  157. unsigned long flags;
  158. #define IS_VF(edev) test_bit(QEDE_FLAGS_IS_VF, \
  159. &(edev)->flags)
  160. const struct qed_eth_ops *ops;
  161. struct qede_ptp *ptp;
  162. u64 ptp_skip_txts;
  163. struct qed_dev_eth_info dev_info;
  164. #define QEDE_MAX_RSS_CNT(edev) ((edev)->dev_info.num_queues)
  165. #define QEDE_MAX_TSS_CNT(edev) ((edev)->dev_info.num_queues)
  166. #define QEDE_IS_BB(edev) \
  167. ((edev)->dev_info.common.dev_type == QED_DEV_TYPE_BB)
  168. #define QEDE_IS_AH(edev) \
  169. ((edev)->dev_info.common.dev_type == QED_DEV_TYPE_AH)
  170. struct qede_fastpath *fp_array;
  171. struct qede_coalesce *coal_entry;
  172. u8 req_num_tx;
  173. u8 fp_num_tx;
  174. u8 req_num_rx;
  175. u8 fp_num_rx;
  176. u16 req_queues;
  177. u16 num_queues;
  178. u16 total_xdp_queues;
  179. #define QEDE_QUEUE_CNT(edev) ((edev)->num_queues)
  180. #define QEDE_RSS_COUNT(edev) ((edev)->num_queues - (edev)->fp_num_tx)
  181. #define QEDE_RX_QUEUE_IDX(edev, i) (i)
  182. #define QEDE_TSS_COUNT(edev) ((edev)->num_queues - (edev)->fp_num_rx)
  183. struct qed_int_info int_info;
  184. /* Smaller private variant of the RTNL lock */
  185. struct mutex qede_lock;
  186. u32 state; /* Protected by qede_lock */
  187. u16 rx_buf_size;
  188. u32 rx_copybreak;
  189. /* L2 header size + 2*VLANs (8 bytes) + LLC SNAP (8 bytes) */
  190. #define ETH_OVERHEAD (ETH_HLEN + 8 + 8)
  191. /* Max supported alignment is 256 (8 shift)
  192. * minimal alignment shift 6 is optimal for 57xxx HW performance
  193. */
  194. #define QEDE_RX_ALIGN_SHIFT max(6, min(8, L1_CACHE_SHIFT))
  195. /* We assume skb_build() uses sizeof(struct skb_shared_info) bytes
  196. * at the end of skb->data, to avoid wasting a full cache line.
  197. * This reduces memory use (skb->truesize).
  198. */
  199. #define QEDE_FW_RX_ALIGN_END \
  200. max_t(u64, 1UL << QEDE_RX_ALIGN_SHIFT, \
  201. SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
  202. struct qede_stats stats;
  203. /* Bitfield to track initialized RSS params */
  204. u32 rss_params_inited;
  205. #define QEDE_RSS_INDIR_INITED BIT(0)
  206. #define QEDE_RSS_KEY_INITED BIT(1)
  207. #define QEDE_RSS_CAPS_INITED BIT(2)
  208. u16 rss_ind_table[128];
  209. u32 rss_key[10];
  210. u8 rss_caps;
  211. /* Both must be a power of two */
  212. u16 q_num_rx_buffers;
  213. u16 q_num_tx_buffers;
  214. bool gro_disable;
  215. struct list_head vlan_list;
  216. u16 configured_vlans;
  217. u16 non_configured_vlans;
  218. bool accept_any_vlan;
  219. struct delayed_work sp_task;
  220. unsigned long sp_flags;
  221. u16 vxlan_dst_port;
  222. u16 geneve_dst_port;
  223. struct qede_arfs *arfs;
  224. bool wol_enabled;
  225. struct qede_rdma_dev rdma_info;
  226. struct bpf_prog *xdp_prog;
  227. enum qed_hw_err_type last_err_type;
  228. unsigned long err_flags;
  229. #define QEDE_ERR_IS_HANDLED 31
  230. #define QEDE_ERR_ATTN_CLR_EN 0
  231. #define QEDE_ERR_GET_DBG_INFO 1
  232. #define QEDE_ERR_IS_RECOVERABLE 2
  233. #define QEDE_ERR_WARN 3
  234. struct qede_dump_info dump_info;
  235. struct delayed_work periodic_task;
  236. unsigned long stats_coal_ticks;
  237. u32 stats_coal_usecs;
  238. spinlock_t stats_lock; /* lock for vport stats access */
  239. };
  240. enum QEDE_STATE {
  241. QEDE_STATE_CLOSED,
  242. QEDE_STATE_OPEN,
  243. QEDE_STATE_RECOVERY,
  244. };
  245. #define HILO_U64(hi, lo) ((((u64)(hi)) << 32) + (lo))
  246. #define MAX_NUM_TC 8
  247. #define MAX_NUM_PRI 8
  248. /* The driver supports the new build_skb() API:
  249. * RX ring buffer contains pointer to kmalloc() data only,
  250. * skb are built only after the frame was DMA-ed.
  251. */
  252. struct sw_rx_data {
  253. struct page *data;
  254. dma_addr_t mapping;
  255. unsigned int page_offset;
  256. };
  257. enum qede_agg_state {
  258. QEDE_AGG_STATE_NONE = 0,
  259. QEDE_AGG_STATE_START = 1,
  260. QEDE_AGG_STATE_ERROR = 2
  261. };
  262. struct qede_agg_info {
  263. /* rx_buf is a data buffer that can be placed / consumed from rx bd
  264. * chain. It has two purposes: We will preallocate the data buffer
  265. * for each aggregation when we open the interface and will place this
  266. * buffer on the rx-bd-ring when we receive TPA_START. We don't want
  267. * to be in a state where allocation fails, as we can't reuse the
  268. * consumer buffer in the rx-chain since FW may still be writing to it
  269. * (since header needs to be modified for TPA).
  270. * The second purpose is to keep a pointer to the bd buffer during
  271. * aggregation.
  272. */
  273. struct sw_rx_data buffer;
  274. struct sk_buff *skb;
  275. /* We need some structs from the start cookie until termination */
  276. u16 vlan_tag;
  277. bool tpa_start_fail;
  278. u8 state;
  279. u8 frag_id;
  280. u8 tunnel_type;
  281. };
  282. struct qede_rx_queue {
  283. __le16 *hw_cons_ptr;
  284. void __iomem *hw_rxq_prod_addr;
  285. /* Required for the allocation of replacement buffers */
  286. struct device *dev;
  287. struct bpf_prog *xdp_prog;
  288. u16 sw_rx_cons;
  289. u16 sw_rx_prod;
  290. u16 filled_buffers;
  291. u8 data_direction;
  292. u8 rxq_id;
  293. /* Used once per each NAPI run */
  294. u16 num_rx_buffers;
  295. u16 rx_headroom;
  296. u32 rx_buf_size;
  297. u32 rx_buf_seg_size;
  298. struct sw_rx_data *sw_rx_ring;
  299. struct qed_chain rx_bd_ring;
  300. struct qed_chain rx_comp_ring ____cacheline_aligned;
  301. /* GRO */
  302. struct qede_agg_info tpa_info[ETH_TPA_MAX_AGGS_NUM];
  303. /* Used once per each NAPI run */
  304. u64 rcv_pkts;
  305. u64 rx_hw_errors;
  306. u64 rx_alloc_errors;
  307. u64 rx_ip_frags;
  308. u64 xdp_no_pass;
  309. void *handle;
  310. struct xdp_rxq_info xdp_rxq;
  311. };
  312. union db_prod {
  313. struct eth_db_data data;
  314. u32 raw;
  315. };
  316. struct sw_tx_bd {
  317. struct sk_buff *skb;
  318. u8 flags;
  319. /* Set on the first BD descriptor when there is a split BD */
  320. #define QEDE_TSO_SPLIT_BD BIT(0)
  321. };
  322. struct sw_tx_xdp {
  323. struct page *page;
  324. struct xdp_frame *xdpf;
  325. dma_addr_t mapping;
  326. };
  327. struct qede_tx_queue {
  328. u8 is_xdp;
  329. bool is_legacy;
  330. u16 sw_tx_cons;
  331. u16 sw_tx_prod;
  332. u16 num_tx_buffers; /* Slowpath only */
  333. u64 xmit_pkts;
  334. u64 stopped_cnt;
  335. u64 tx_mem_alloc_err;
  336. __le16 *hw_cons_ptr;
  337. /* Needed for the mapping of packets */
  338. struct device *dev;
  339. void __iomem *doorbell_addr;
  340. union db_prod tx_db;
  341. /* Spinlock for XDP queues in case of XDP_REDIRECT */
  342. spinlock_t xdp_tx_lock;
  343. int index; /* Slowpath only */
  344. #define QEDE_TXQ_XDP_TO_IDX(edev, txq) ((txq)->index - \
  345. QEDE_MAX_TSS_CNT(edev))
  346. #define QEDE_TXQ_IDX_TO_XDP(edev, idx) ((idx) + QEDE_MAX_TSS_CNT(edev))
  347. #define QEDE_NDEV_TXQ_ID_TO_FP_ID(edev, idx) ((edev)->fp_num_rx + \
  348. ((idx) % QEDE_TSS_COUNT(edev)))
  349. #define QEDE_NDEV_TXQ_ID_TO_TXQ_COS(edev, idx) ((idx) / QEDE_TSS_COUNT(edev))
  350. #define QEDE_TXQ_TO_NDEV_TXQ_ID(edev, txq) ((QEDE_TSS_COUNT(edev) * \
  351. (txq)->cos) + (txq)->index)
  352. #define QEDE_NDEV_TXQ_ID_TO_TXQ(edev, idx) \
  353. (&((edev)->fp_array[QEDE_NDEV_TXQ_ID_TO_FP_ID(edev, idx)].txq \
  354. [QEDE_NDEV_TXQ_ID_TO_TXQ_COS(edev, idx)]))
  355. #define QEDE_FP_TC0_TXQ(fp) (&((fp)->txq[0]))
  356. /* Regular Tx requires skb + metadata for release purpose,
  357. * while XDP requires the pages and the mapped address.
  358. */
  359. union {
  360. struct sw_tx_bd *skbs;
  361. struct sw_tx_xdp *xdp;
  362. } sw_tx_ring;
  363. struct qed_chain tx_pbl;
  364. /* Slowpath; Should be kept in end [unless missing padding] */
  365. void *handle;
  366. u16 cos;
  367. u16 ndev_txq_id;
  368. };
  369. #define BD_UNMAP_ADDR(bd) HILO_U64(le32_to_cpu((bd)->addr.hi), \
  370. le32_to_cpu((bd)->addr.lo))
  371. #define BD_SET_UNMAP_ADDR_LEN(bd, maddr, len) \
  372. do { \
  373. (bd)->addr.hi = cpu_to_le32(upper_32_bits(maddr)); \
  374. (bd)->addr.lo = cpu_to_le32(lower_32_bits(maddr)); \
  375. (bd)->nbytes = cpu_to_le16(len); \
  376. } while (0)
  377. #define BD_UNMAP_LEN(bd) (le16_to_cpu((bd)->nbytes))
  378. struct qede_fastpath {
  379. struct qede_dev *edev;
  380. u8 type;
  381. #define QEDE_FASTPATH_TX BIT(0)
  382. #define QEDE_FASTPATH_RX BIT(1)
  383. #define QEDE_FASTPATH_XDP BIT(2)
  384. #define QEDE_FASTPATH_COMBINED (QEDE_FASTPATH_TX | QEDE_FASTPATH_RX)
  385. u8 id;
  386. u8 xdp_xmit;
  387. #define QEDE_XDP_TX BIT(0)
  388. #define QEDE_XDP_REDIRECT BIT(1)
  389. struct napi_struct napi;
  390. struct qed_sb_info *sb_info;
  391. struct qede_rx_queue *rxq;
  392. struct qede_tx_queue *txq;
  393. struct qede_tx_queue *xdp_tx;
  394. char name[IFNAMSIZ + 8];
  395. };
  396. /* Debug print definitions */
  397. #define DP_NAME(edev) netdev_name((edev)->ndev)
  398. #define XMIT_PLAIN 0
  399. #define XMIT_L4_CSUM BIT(0)
  400. #define XMIT_LSO BIT(1)
  401. #define XMIT_ENC BIT(2)
  402. #define XMIT_ENC_GSO_L4_CSUM BIT(3)
  403. #define QEDE_CSUM_ERROR BIT(0)
  404. #define QEDE_CSUM_UNNECESSARY BIT(1)
  405. #define QEDE_TUNN_CSUM_UNNECESSARY BIT(2)
  406. #define QEDE_SP_RECOVERY 0
  407. #define QEDE_SP_RX_MODE 1
  408. #define QEDE_SP_RSVD1 2
  409. #define QEDE_SP_RSVD2 3
  410. #define QEDE_SP_HW_ERR 4
  411. #define QEDE_SP_ARFS_CONFIG 5
  412. #define QEDE_SP_AER 7
  413. #define QEDE_SP_DISABLE 8
  414. #ifdef CONFIG_RFS_ACCEL
  415. int qede_rx_flow_steer(struct net_device *dev, const struct sk_buff *skb,
  416. u16 rxq_index, u32 flow_id);
  417. #define QEDE_SP_TASK_POLL_DELAY (5 * HZ)
  418. #endif
  419. void qede_process_arfs_filters(struct qede_dev *edev, bool free_fltr);
  420. void qede_poll_for_freeing_arfs_filters(struct qede_dev *edev);
  421. void qede_arfs_filter_op(void *dev, void *filter, u8 fw_rc);
  422. void qede_free_arfs(struct qede_dev *edev);
  423. int qede_alloc_arfs(struct qede_dev *edev);
  424. int qede_add_cls_rule(struct qede_dev *edev, struct ethtool_rxnfc *info);
  425. int qede_delete_flow_filter(struct qede_dev *edev, u64 cookie);
  426. int qede_get_cls_rule_entry(struct qede_dev *edev, struct ethtool_rxnfc *cmd);
  427. int qede_get_cls_rule_all(struct qede_dev *edev, struct ethtool_rxnfc *info,
  428. u32 *rule_locs);
  429. int qede_get_arfs_filter_count(struct qede_dev *edev);
  430. struct qede_reload_args {
  431. void (*func)(struct qede_dev *edev, struct qede_reload_args *args);
  432. union {
  433. netdev_features_t features;
  434. struct bpf_prog *new_prog;
  435. u16 mtu;
  436. } u;
  437. };
  438. /* Datapath functions definition */
  439. netdev_tx_t qede_start_xmit(struct sk_buff *skb, struct net_device *ndev);
  440. int qede_xdp_transmit(struct net_device *dev, int n_frames,
  441. struct xdp_frame **frames, u32 flags);
  442. u16 qede_select_queue(struct net_device *dev, struct sk_buff *skb,
  443. struct net_device *sb_dev);
  444. netdev_features_t qede_features_check(struct sk_buff *skb,
  445. struct net_device *dev,
  446. netdev_features_t features);
  447. int qede_alloc_rx_buffer(struct qede_rx_queue *rxq, bool allow_lazy);
  448. int qede_free_tx_pkt(struct qede_dev *edev,
  449. struct qede_tx_queue *txq, int *len);
  450. int qede_poll(struct napi_struct *napi, int budget);
  451. irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie);
  452. /* Filtering function definitions */
  453. void qede_force_mac(void *dev, u8 *mac, bool forced);
  454. void qede_udp_ports_update(void *dev, u16 vxlan_port, u16 geneve_port);
  455. int qede_set_mac_addr(struct net_device *ndev, void *p);
  456. int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid);
  457. int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid);
  458. void qede_vlan_mark_nonconfigured(struct qede_dev *edev);
  459. int qede_configure_vlan_filters(struct qede_dev *edev);
  460. netdev_features_t qede_fix_features(struct net_device *dev,
  461. netdev_features_t features);
  462. int qede_set_features(struct net_device *dev, netdev_features_t features);
  463. void qede_set_rx_mode(struct net_device *ndev);
  464. void qede_config_rx_mode(struct net_device *ndev);
  465. void qede_fill_rss_params(struct qede_dev *edev,
  466. struct qed_update_vport_rss_params *rss, u8 *update);
  467. void qede_udp_tunnel_add(struct net_device *dev, struct udp_tunnel_info *ti);
  468. void qede_udp_tunnel_del(struct net_device *dev, struct udp_tunnel_info *ti);
  469. int qede_xdp(struct net_device *dev, struct netdev_bpf *xdp);
  470. #ifdef CONFIG_DCB
  471. void qede_set_dcbnl_ops(struct net_device *ndev);
  472. #endif
  473. void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level);
  474. void qede_set_ethtool_ops(struct net_device *netdev);
  475. void qede_set_udp_tunnels(struct qede_dev *edev);
  476. void qede_reload(struct qede_dev *edev,
  477. struct qede_reload_args *args, bool is_locked);
  478. int qede_change_mtu(struct net_device *dev, int new_mtu);
  479. void qede_fill_by_demand_stats(struct qede_dev *edev);
  480. void __qede_lock(struct qede_dev *edev);
  481. void __qede_unlock(struct qede_dev *edev);
  482. bool qede_has_rx_work(struct qede_rx_queue *rxq);
  483. int qede_txq_has_work(struct qede_tx_queue *txq);
  484. void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq, u8 count);
  485. void qede_update_rx_prod(struct qede_dev *edev, struct qede_rx_queue *rxq);
  486. int qede_add_tc_flower_fltr(struct qede_dev *edev, __be16 proto,
  487. struct flow_cls_offload *f);
  488. void qede_forced_speed_maps_init(void);
  489. int qede_set_coalesce(struct net_device *dev, struct ethtool_coalesce *coal,
  490. struct kernel_ethtool_coalesce *kernel_coal,
  491. struct netlink_ext_ack *extack);
  492. int qede_set_per_coalesce(struct net_device *dev, u32 queue,
  493. struct ethtool_coalesce *coal);
  494. #define RX_RING_SIZE_POW 13
  495. #define RX_RING_SIZE ((u16)BIT(RX_RING_SIZE_POW))
  496. #define NUM_RX_BDS_MAX (RX_RING_SIZE - 1)
  497. #define NUM_RX_BDS_MIN 128
  498. #define NUM_RX_BDS_KDUMP_MIN 63
  499. #define NUM_RX_BDS_DEF ((u16)BIT(10) - 1)
  500. #define TX_RING_SIZE_POW 13
  501. #define TX_RING_SIZE ((u16)BIT(TX_RING_SIZE_POW))
  502. #define NUM_TX_BDS_MAX (TX_RING_SIZE - 1)
  503. #define NUM_TX_BDS_MIN 128
  504. #define NUM_TX_BDS_KDUMP_MIN 63
  505. #define NUM_TX_BDS_DEF NUM_TX_BDS_MAX
  506. #define QEDE_MIN_PKT_LEN 64
  507. #define QEDE_RX_HDR_SIZE 256
  508. #define QEDE_MAX_JUMBO_PACKET_SIZE 9600
  509. #define for_each_queue(i) for (i = 0; i < edev->num_queues; i++)
  510. #define for_each_cos_in_txq(edev, var) \
  511. for ((var) = 0; (var) < (edev)->dev_info.num_tc; (var)++)
  512. #endif /* _QEDE_H_ */