enetc.h 14 KB

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  1. /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
  2. /* Copyright 2017-2019 NXP */
  3. #include <linux/timer.h>
  4. #include <linux/pci.h>
  5. #include <linux/netdevice.h>
  6. #include <linux/etherdevice.h>
  7. #include <linux/dma-mapping.h>
  8. #include <linux/skbuff.h>
  9. #include <linux/ethtool.h>
  10. #include <linux/if_vlan.h>
  11. #include <linux/phylink.h>
  12. #include <linux/dim.h>
  13. #include "enetc_hw.h"
  14. #define ENETC_MAC_MAXFRM_SIZE 9600
  15. #define ENETC_MAX_MTU (ENETC_MAC_MAXFRM_SIZE - \
  16. (ETH_FCS_LEN + ETH_HLEN + VLAN_HLEN))
  17. #define ENETC_CBD_DATA_MEM_ALIGN 64
  18. struct enetc_tx_swbd {
  19. union {
  20. struct sk_buff *skb;
  21. struct xdp_frame *xdp_frame;
  22. };
  23. dma_addr_t dma;
  24. struct page *page; /* valid only if is_xdp_tx */
  25. u16 page_offset; /* valid only if is_xdp_tx */
  26. u16 len;
  27. enum dma_data_direction dir;
  28. u8 is_dma_page:1;
  29. u8 check_wb:1;
  30. u8 do_twostep_tstamp:1;
  31. u8 is_eof:1;
  32. u8 is_xdp_tx:1;
  33. u8 is_xdp_redirect:1;
  34. u8 qbv_en:1;
  35. };
  36. #define ENETC_RX_MAXFRM_SIZE ENETC_MAC_MAXFRM_SIZE
  37. #define ENETC_RXB_TRUESIZE 2048 /* PAGE_SIZE >> 1 */
  38. #define ENETC_RXB_PAD NET_SKB_PAD /* add extra space if needed */
  39. #define ENETC_RXB_DMA_SIZE \
  40. (SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - ENETC_RXB_PAD)
  41. #define ENETC_RXB_DMA_SIZE_XDP \
  42. (SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - XDP_PACKET_HEADROOM)
  43. struct enetc_rx_swbd {
  44. dma_addr_t dma;
  45. struct page *page;
  46. u16 page_offset;
  47. enum dma_data_direction dir;
  48. u16 len;
  49. };
  50. /* ENETC overhead: optional extension BD + 1 BD gap */
  51. #define ENETC_TXBDS_NEEDED(val) ((val) + 2)
  52. /* max # of chained Tx BDs is 15, including head and extension BD */
  53. #define ENETC_MAX_SKB_FRAGS 13
  54. #define ENETC_TXBDS_MAX_NEEDED ENETC_TXBDS_NEEDED(ENETC_MAX_SKB_FRAGS + 1)
  55. struct enetc_ring_stats {
  56. unsigned int packets;
  57. unsigned int bytes;
  58. unsigned int rx_alloc_errs;
  59. unsigned int xdp_drops;
  60. unsigned int xdp_tx;
  61. unsigned int xdp_tx_drops;
  62. unsigned int xdp_redirect;
  63. unsigned int xdp_redirect_failures;
  64. unsigned int xdp_redirect_sg;
  65. unsigned int recycles;
  66. unsigned int recycle_failures;
  67. unsigned int win_drop;
  68. };
  69. struct enetc_xdp_data {
  70. struct xdp_rxq_info rxq;
  71. struct bpf_prog *prog;
  72. int xdp_tx_in_flight;
  73. };
  74. #define ENETC_RX_RING_DEFAULT_SIZE 2048
  75. #define ENETC_TX_RING_DEFAULT_SIZE 2048
  76. #define ENETC_DEFAULT_TX_WORK (ENETC_TX_RING_DEFAULT_SIZE / 2)
  77. struct enetc_bdr {
  78. struct device *dev; /* for DMA mapping */
  79. struct net_device *ndev;
  80. void *bd_base; /* points to Rx or Tx BD ring */
  81. union {
  82. void __iomem *tpir;
  83. void __iomem *rcir;
  84. };
  85. u16 index;
  86. u16 prio;
  87. int bd_count; /* # of BDs */
  88. int next_to_use;
  89. int next_to_clean;
  90. union {
  91. struct enetc_tx_swbd *tx_swbd;
  92. struct enetc_rx_swbd *rx_swbd;
  93. };
  94. union {
  95. void __iomem *tcir; /* Tx */
  96. int next_to_alloc; /* Rx */
  97. };
  98. void __iomem *idr; /* Interrupt Detect Register pointer */
  99. int buffer_offset;
  100. struct enetc_xdp_data xdp;
  101. struct enetc_ring_stats stats;
  102. dma_addr_t bd_dma_base;
  103. u8 tsd_enable; /* Time specific departure */
  104. bool ext_en; /* enable h/w descriptor extensions */
  105. /* DMA buffer for TSO headers */
  106. char *tso_headers;
  107. dma_addr_t tso_headers_dma;
  108. } ____cacheline_aligned_in_smp;
  109. static inline void enetc_bdr_idx_inc(struct enetc_bdr *bdr, int *i)
  110. {
  111. if (unlikely(++*i == bdr->bd_count))
  112. *i = 0;
  113. }
  114. static inline int enetc_bd_unused(struct enetc_bdr *bdr)
  115. {
  116. if (bdr->next_to_clean > bdr->next_to_use)
  117. return bdr->next_to_clean - bdr->next_to_use - 1;
  118. return bdr->bd_count + bdr->next_to_clean - bdr->next_to_use - 1;
  119. }
  120. static inline int enetc_swbd_unused(struct enetc_bdr *bdr)
  121. {
  122. if (bdr->next_to_clean > bdr->next_to_alloc)
  123. return bdr->next_to_clean - bdr->next_to_alloc - 1;
  124. return bdr->bd_count + bdr->next_to_clean - bdr->next_to_alloc - 1;
  125. }
  126. /* Control BD ring */
  127. #define ENETC_CBDR_DEFAULT_SIZE 64
  128. struct enetc_cbdr {
  129. void *bd_base; /* points to Rx or Tx BD ring */
  130. void __iomem *pir;
  131. void __iomem *cir;
  132. void __iomem *mr; /* mode register */
  133. int bd_count; /* # of BDs */
  134. int next_to_use;
  135. int next_to_clean;
  136. dma_addr_t bd_dma_base;
  137. struct device *dma_dev;
  138. };
  139. #define ENETC_TXBD(BDR, i) (&(((union enetc_tx_bd *)((BDR).bd_base))[i]))
  140. static inline union enetc_rx_bd *enetc_rxbd(struct enetc_bdr *rx_ring, int i)
  141. {
  142. int hw_idx = i;
  143. #ifdef CONFIG_FSL_ENETC_PTP_CLOCK
  144. if (rx_ring->ext_en)
  145. hw_idx = 2 * i;
  146. #endif
  147. return &(((union enetc_rx_bd *)rx_ring->bd_base)[hw_idx]);
  148. }
  149. static inline void enetc_rxbd_next(struct enetc_bdr *rx_ring,
  150. union enetc_rx_bd **old_rxbd, int *old_index)
  151. {
  152. union enetc_rx_bd *new_rxbd = *old_rxbd;
  153. int new_index = *old_index;
  154. new_rxbd++;
  155. #ifdef CONFIG_FSL_ENETC_PTP_CLOCK
  156. if (rx_ring->ext_en)
  157. new_rxbd++;
  158. #endif
  159. if (unlikely(++new_index == rx_ring->bd_count)) {
  160. new_rxbd = rx_ring->bd_base;
  161. new_index = 0;
  162. }
  163. *old_rxbd = new_rxbd;
  164. *old_index = new_index;
  165. }
  166. static inline union enetc_rx_bd *enetc_rxbd_ext(union enetc_rx_bd *rxbd)
  167. {
  168. return ++rxbd;
  169. }
  170. struct enetc_msg_swbd {
  171. void *vaddr;
  172. dma_addr_t dma;
  173. int size;
  174. };
  175. #define ENETC_REV1 0x1
  176. enum enetc_errata {
  177. ENETC_ERR_VLAN_ISOL = BIT(0),
  178. ENETC_ERR_UCMCSWP = BIT(1),
  179. };
  180. #define ENETC_SI_F_QBV BIT(0)
  181. #define ENETC_SI_F_PSFP BIT(1)
  182. /* PCI IEP device data */
  183. struct enetc_si {
  184. struct pci_dev *pdev;
  185. struct enetc_hw hw;
  186. enum enetc_errata errata;
  187. struct net_device *ndev; /* back ref. */
  188. struct enetc_cbdr cbd_ring;
  189. int num_rx_rings; /* how many rings are available in the SI */
  190. int num_tx_rings;
  191. int num_fs_entries;
  192. int num_rss; /* number of RSS buckets */
  193. unsigned short pad;
  194. int hw_features;
  195. };
  196. #define ENETC_SI_ALIGN 32
  197. static inline void *enetc_si_priv(const struct enetc_si *si)
  198. {
  199. return (char *)si + ALIGN(sizeof(struct enetc_si), ENETC_SI_ALIGN);
  200. }
  201. static inline bool enetc_si_is_pf(struct enetc_si *si)
  202. {
  203. return !!(si->hw.port);
  204. }
  205. static inline int enetc_pf_to_port(struct pci_dev *pf_pdev)
  206. {
  207. switch (pf_pdev->devfn) {
  208. case 0:
  209. return 0;
  210. case 1:
  211. return 1;
  212. case 2:
  213. return 2;
  214. case 6:
  215. return 3;
  216. default:
  217. return -1;
  218. }
  219. }
  220. #define ENETC_MAX_NUM_TXQS 8
  221. #define ENETC_INT_NAME_MAX (IFNAMSIZ + 8)
  222. struct enetc_int_vector {
  223. void __iomem *rbier;
  224. void __iomem *tbier_base;
  225. void __iomem *ricr1;
  226. unsigned long tx_rings_map;
  227. int count_tx_rings;
  228. u32 rx_ictt;
  229. u16 comp_cnt;
  230. bool rx_dim_en, rx_napi_work;
  231. struct napi_struct napi ____cacheline_aligned_in_smp;
  232. struct dim rx_dim ____cacheline_aligned_in_smp;
  233. char name[ENETC_INT_NAME_MAX];
  234. struct enetc_bdr rx_ring;
  235. struct enetc_bdr tx_ring[];
  236. } ____cacheline_aligned_in_smp;
  237. struct enetc_cls_rule {
  238. struct ethtool_rx_flow_spec fs;
  239. int used;
  240. };
  241. #define ENETC_MAX_BDR_INT 2 /* fixed to max # of available cpus */
  242. struct psfp_cap {
  243. u32 max_streamid;
  244. u32 max_psfp_filter;
  245. u32 max_psfp_gate;
  246. u32 max_psfp_gatelist;
  247. u32 max_psfp_meter;
  248. };
  249. #define ENETC_F_TX_TSTAMP_MASK 0xff
  250. /* TODO: more hardware offloads */
  251. enum enetc_active_offloads {
  252. /* 8 bits reserved for TX timestamp types (hwtstamp_tx_types) */
  253. ENETC_F_TX_TSTAMP = BIT(0),
  254. ENETC_F_TX_ONESTEP_SYNC_TSTAMP = BIT(1),
  255. ENETC_F_RX_TSTAMP = BIT(8),
  256. ENETC_F_QBV = BIT(9),
  257. ENETC_F_QCI = BIT(10),
  258. };
  259. enum enetc_flags_bit {
  260. ENETC_TX_ONESTEP_TSTAMP_IN_PROGRESS = 0,
  261. };
  262. /* interrupt coalescing modes */
  263. enum enetc_ic_mode {
  264. /* one interrupt per frame */
  265. ENETC_IC_NONE = 0,
  266. /* activated when int coalescing time is set to a non-0 value */
  267. ENETC_IC_RX_MANUAL = BIT(0),
  268. ENETC_IC_TX_MANUAL = BIT(1),
  269. /* use dynamic interrupt moderation */
  270. ENETC_IC_RX_ADAPTIVE = BIT(2),
  271. };
  272. #define ENETC_RXIC_PKTTHR min_t(u32, 256, ENETC_RX_RING_DEFAULT_SIZE / 2)
  273. #define ENETC_TXIC_PKTTHR min_t(u32, 128, ENETC_TX_RING_DEFAULT_SIZE / 2)
  274. #define ENETC_TXIC_TIMETHR enetc_usecs_to_cycles(600)
  275. struct enetc_ndev_priv {
  276. struct net_device *ndev;
  277. struct device *dev; /* dma-mapping device */
  278. struct enetc_si *si;
  279. int bdr_int_num; /* number of Rx/Tx ring interrupts */
  280. struct enetc_int_vector *int_vector[ENETC_MAX_BDR_INT];
  281. u16 num_rx_rings, num_tx_rings;
  282. u16 rx_bd_count, tx_bd_count;
  283. u16 msg_enable;
  284. enum enetc_active_offloads active_offloads;
  285. u32 speed; /* store speed for compare update pspeed */
  286. struct enetc_bdr **xdp_tx_ring;
  287. struct enetc_bdr *tx_ring[16];
  288. struct enetc_bdr *rx_ring[16];
  289. struct enetc_cls_rule *cls_rules;
  290. struct psfp_cap psfp_cap;
  291. struct phylink *phylink;
  292. int ic_mode;
  293. u32 tx_ictt;
  294. struct bpf_prog *xdp_prog;
  295. unsigned long flags;
  296. struct work_struct tx_onestep_tstamp;
  297. struct sk_buff_head tx_skbs;
  298. };
  299. /* Messaging */
  300. /* VF-PF set primary MAC address message format */
  301. struct enetc_msg_cmd_set_primary_mac {
  302. struct enetc_msg_cmd_header header;
  303. struct sockaddr mac;
  304. };
  305. #define ENETC_CBD(R, i) (&(((struct enetc_cbd *)((R).bd_base))[i]))
  306. #define ENETC_CBDR_TIMEOUT 1000 /* usecs */
  307. /* PTP driver exports */
  308. extern int enetc_phc_index;
  309. /* SI common */
  310. int enetc_pci_probe(struct pci_dev *pdev, const char *name, int sizeof_priv);
  311. void enetc_pci_remove(struct pci_dev *pdev);
  312. int enetc_alloc_msix(struct enetc_ndev_priv *priv);
  313. void enetc_free_msix(struct enetc_ndev_priv *priv);
  314. void enetc_get_si_caps(struct enetc_si *si);
  315. void enetc_init_si_rings_params(struct enetc_ndev_priv *priv);
  316. int enetc_alloc_si_resources(struct enetc_ndev_priv *priv);
  317. void enetc_free_si_resources(struct enetc_ndev_priv *priv);
  318. int enetc_configure_si(struct enetc_ndev_priv *priv);
  319. int enetc_open(struct net_device *ndev);
  320. int enetc_close(struct net_device *ndev);
  321. void enetc_start(struct net_device *ndev);
  322. void enetc_stop(struct net_device *ndev);
  323. netdev_tx_t enetc_xmit(struct sk_buff *skb, struct net_device *ndev);
  324. struct net_device_stats *enetc_get_stats(struct net_device *ndev);
  325. void enetc_set_features(struct net_device *ndev, netdev_features_t features);
  326. int enetc_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd);
  327. int enetc_setup_tc_mqprio(struct net_device *ndev, void *type_data);
  328. int enetc_setup_bpf(struct net_device *dev, struct netdev_bpf *xdp);
  329. int enetc_xdp_xmit(struct net_device *ndev, int num_frames,
  330. struct xdp_frame **frames, u32 flags);
  331. /* ethtool */
  332. void enetc_set_ethtool_ops(struct net_device *ndev);
  333. /* control buffer descriptor ring (CBDR) */
  334. int enetc_setup_cbdr(struct device *dev, struct enetc_hw *hw, int bd_count,
  335. struct enetc_cbdr *cbdr);
  336. void enetc_teardown_cbdr(struct enetc_cbdr *cbdr);
  337. int enetc_set_mac_flt_entry(struct enetc_si *si, int index,
  338. char *mac_addr, int si_map);
  339. int enetc_clear_mac_flt_entry(struct enetc_si *si, int index);
  340. int enetc_set_fs_entry(struct enetc_si *si, struct enetc_cmd_rfse *rfse,
  341. int index);
  342. void enetc_set_rss_key(struct enetc_hw *hw, const u8 *bytes);
  343. int enetc_get_rss_table(struct enetc_si *si, u32 *table, int count);
  344. int enetc_set_rss_table(struct enetc_si *si, const u32 *table, int count);
  345. int enetc_send_cmd(struct enetc_si *si, struct enetc_cbd *cbd);
  346. static inline void *enetc_cbd_alloc_data_mem(struct enetc_si *si,
  347. struct enetc_cbd *cbd,
  348. int size, dma_addr_t *dma,
  349. void **data_align)
  350. {
  351. struct enetc_cbdr *ring = &si->cbd_ring;
  352. dma_addr_t dma_align;
  353. void *data;
  354. data = dma_alloc_coherent(ring->dma_dev,
  355. size + ENETC_CBD_DATA_MEM_ALIGN,
  356. dma, GFP_KERNEL);
  357. if (!data) {
  358. dev_err(ring->dma_dev, "CBD alloc data memory failed!\n");
  359. return NULL;
  360. }
  361. dma_align = ALIGN(*dma, ENETC_CBD_DATA_MEM_ALIGN);
  362. *data_align = PTR_ALIGN(data, ENETC_CBD_DATA_MEM_ALIGN);
  363. cbd->addr[0] = cpu_to_le32(lower_32_bits(dma_align));
  364. cbd->addr[1] = cpu_to_le32(upper_32_bits(dma_align));
  365. cbd->length = cpu_to_le16(size);
  366. return data;
  367. }
  368. static inline void enetc_cbd_free_data_mem(struct enetc_si *si, int size,
  369. void *data, dma_addr_t *dma)
  370. {
  371. struct enetc_cbdr *ring = &si->cbd_ring;
  372. dma_free_coherent(ring->dma_dev, size + ENETC_CBD_DATA_MEM_ALIGN,
  373. data, *dma);
  374. }
  375. void enetc_reset_ptcmsdur(struct enetc_hw *hw);
  376. void enetc_set_ptcmsdur(struct enetc_hw *hw, u32 *queue_max_sdu);
  377. #ifdef CONFIG_FSL_ENETC_QOS
  378. int enetc_qos_query_caps(struct net_device *ndev, void *type_data);
  379. int enetc_setup_tc_taprio(struct net_device *ndev, void *type_data);
  380. void enetc_sched_speed_set(struct enetc_ndev_priv *priv, int speed);
  381. int enetc_setup_tc_cbs(struct net_device *ndev, void *type_data);
  382. int enetc_setup_tc_txtime(struct net_device *ndev, void *type_data);
  383. int enetc_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
  384. void *cb_priv);
  385. int enetc_setup_tc_psfp(struct net_device *ndev, void *type_data);
  386. int enetc_psfp_init(struct enetc_ndev_priv *priv);
  387. int enetc_psfp_clean(struct enetc_ndev_priv *priv);
  388. int enetc_set_psfp(struct net_device *ndev, bool en);
  389. static inline void enetc_get_max_cap(struct enetc_ndev_priv *priv)
  390. {
  391. struct enetc_hw *hw = &priv->si->hw;
  392. u32 reg;
  393. reg = enetc_port_rd(hw, ENETC_PSIDCAPR);
  394. priv->psfp_cap.max_streamid = reg & ENETC_PSIDCAPR_MSK;
  395. /* Port stream filter capability */
  396. reg = enetc_port_rd(hw, ENETC_PSFCAPR);
  397. priv->psfp_cap.max_psfp_filter = reg & ENETC_PSFCAPR_MSK;
  398. /* Port stream gate capability */
  399. reg = enetc_port_rd(hw, ENETC_PSGCAPR);
  400. priv->psfp_cap.max_psfp_gate = (reg & ENETC_PSGCAPR_SGIT_MSK);
  401. priv->psfp_cap.max_psfp_gatelist = (reg & ENETC_PSGCAPR_GCL_MSK) >> 16;
  402. /* Port flow meter capability */
  403. reg = enetc_port_rd(hw, ENETC_PFMCAPR);
  404. priv->psfp_cap.max_psfp_meter = reg & ENETC_PFMCAPR_MSK;
  405. }
  406. static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv)
  407. {
  408. struct enetc_hw *hw = &priv->si->hw;
  409. int err;
  410. enetc_get_max_cap(priv);
  411. err = enetc_psfp_init(priv);
  412. if (err)
  413. return err;
  414. enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) |
  415. ENETC_PPSFPMR_PSFPEN | ENETC_PPSFPMR_VS |
  416. ENETC_PPSFPMR_PVC | ENETC_PPSFPMR_PVZC);
  417. return 0;
  418. }
  419. static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv)
  420. {
  421. struct enetc_hw *hw = &priv->si->hw;
  422. int err;
  423. err = enetc_psfp_clean(priv);
  424. if (err)
  425. return err;
  426. enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) &
  427. ~ENETC_PPSFPMR_PSFPEN & ~ENETC_PPSFPMR_VS &
  428. ~ENETC_PPSFPMR_PVC & ~ENETC_PPSFPMR_PVZC);
  429. memset(&priv->psfp_cap, 0, sizeof(struct psfp_cap));
  430. return 0;
  431. }
  432. #else
  433. #define enetc_qos_query_caps(ndev, type_data) -EOPNOTSUPP
  434. #define enetc_setup_tc_taprio(ndev, type_data) -EOPNOTSUPP
  435. #define enetc_sched_speed_set(priv, speed) (void)0
  436. #define enetc_setup_tc_cbs(ndev, type_data) -EOPNOTSUPP
  437. #define enetc_setup_tc_txtime(ndev, type_data) -EOPNOTSUPP
  438. #define enetc_setup_tc_psfp(ndev, type_data) -EOPNOTSUPP
  439. #define enetc_setup_tc_block_cb NULL
  440. #define enetc_get_max_cap(p) \
  441. memset(&((p)->psfp_cap), 0, sizeof(struct psfp_cap))
  442. static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv)
  443. {
  444. return 0;
  445. }
  446. static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv)
  447. {
  448. return 0;
  449. }
  450. static inline int enetc_set_psfp(struct net_device *ndev, bool en)
  451. {
  452. return 0;
  453. }
  454. #endif