ftmac100.c 30 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191
  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Faraday FTMAC100 10/100 Ethernet
  4. *
  5. * (C) Copyright 2009-2011 Faraday Technology
  6. * Po-Yu Chuang <[email protected]>
  7. */
  8. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  9. #include <linux/dma-mapping.h>
  10. #include <linux/etherdevice.h>
  11. #include <linux/ethtool.h>
  12. #include <linux/init.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/io.h>
  15. #include <linux/mii.h>
  16. #include <linux/module.h>
  17. #include <linux/mod_devicetable.h>
  18. #include <linux/netdevice.h>
  19. #include <linux/platform_device.h>
  20. #include "ftmac100.h"
  21. #define DRV_NAME "ftmac100"
  22. #define RX_QUEUE_ENTRIES 128 /* must be power of 2 */
  23. #define TX_QUEUE_ENTRIES 16 /* must be power of 2 */
  24. #define MAX_PKT_SIZE 1518
  25. #define RX_BUF_SIZE 2044 /* must be smaller than 0x7ff */
  26. #if MAX_PKT_SIZE > 0x7ff
  27. #error invalid MAX_PKT_SIZE
  28. #endif
  29. #if RX_BUF_SIZE > 0x7ff || RX_BUF_SIZE > PAGE_SIZE
  30. #error invalid RX_BUF_SIZE
  31. #endif
  32. /******************************************************************************
  33. * private data
  34. *****************************************************************************/
  35. struct ftmac100_descs {
  36. struct ftmac100_rxdes rxdes[RX_QUEUE_ENTRIES];
  37. struct ftmac100_txdes txdes[TX_QUEUE_ENTRIES];
  38. };
  39. struct ftmac100 {
  40. struct resource *res;
  41. void __iomem *base;
  42. int irq;
  43. struct ftmac100_descs *descs;
  44. dma_addr_t descs_dma_addr;
  45. unsigned int rx_pointer;
  46. unsigned int tx_clean_pointer;
  47. unsigned int tx_pointer;
  48. unsigned int tx_pending;
  49. spinlock_t tx_lock;
  50. struct net_device *netdev;
  51. struct device *dev;
  52. struct napi_struct napi;
  53. struct mii_if_info mii;
  54. };
  55. static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
  56. struct ftmac100_rxdes *rxdes, gfp_t gfp);
  57. /******************************************************************************
  58. * internal functions (hardware register access)
  59. *****************************************************************************/
  60. #define INT_MASK_ALL_ENABLED (FTMAC100_INT_RPKT_FINISH | \
  61. FTMAC100_INT_NORXBUF | \
  62. FTMAC100_INT_XPKT_OK | \
  63. FTMAC100_INT_XPKT_LOST | \
  64. FTMAC100_INT_RPKT_LOST | \
  65. FTMAC100_INT_AHB_ERR | \
  66. FTMAC100_INT_PHYSTS_CHG)
  67. #define INT_MASK_ALL_DISABLED 0
  68. static void ftmac100_enable_all_int(struct ftmac100 *priv)
  69. {
  70. iowrite32(INT_MASK_ALL_ENABLED, priv->base + FTMAC100_OFFSET_IMR);
  71. }
  72. static void ftmac100_disable_all_int(struct ftmac100 *priv)
  73. {
  74. iowrite32(INT_MASK_ALL_DISABLED, priv->base + FTMAC100_OFFSET_IMR);
  75. }
  76. static void ftmac100_set_rx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
  77. {
  78. iowrite32(addr, priv->base + FTMAC100_OFFSET_RXR_BADR);
  79. }
  80. static void ftmac100_set_tx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
  81. {
  82. iowrite32(addr, priv->base + FTMAC100_OFFSET_TXR_BADR);
  83. }
  84. static void ftmac100_txdma_start_polling(struct ftmac100 *priv)
  85. {
  86. iowrite32(1, priv->base + FTMAC100_OFFSET_TXPD);
  87. }
  88. static int ftmac100_reset(struct ftmac100 *priv)
  89. {
  90. struct net_device *netdev = priv->netdev;
  91. int i;
  92. /* NOTE: reset clears all registers */
  93. iowrite32(FTMAC100_MACCR_SW_RST, priv->base + FTMAC100_OFFSET_MACCR);
  94. for (i = 0; i < 5; i++) {
  95. unsigned int maccr;
  96. maccr = ioread32(priv->base + FTMAC100_OFFSET_MACCR);
  97. if (!(maccr & FTMAC100_MACCR_SW_RST)) {
  98. /*
  99. * FTMAC100_MACCR_SW_RST cleared does not indicate
  100. * that hardware reset completed (what the f*ck).
  101. * We still need to wait for a while.
  102. */
  103. udelay(500);
  104. return 0;
  105. }
  106. udelay(1000);
  107. }
  108. netdev_err(netdev, "software reset failed\n");
  109. return -EIO;
  110. }
  111. static void ftmac100_set_mac(struct ftmac100 *priv, const unsigned char *mac)
  112. {
  113. unsigned int maddr = mac[0] << 8 | mac[1];
  114. unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5];
  115. iowrite32(maddr, priv->base + FTMAC100_OFFSET_MAC_MADR);
  116. iowrite32(laddr, priv->base + FTMAC100_OFFSET_MAC_LADR);
  117. }
  118. #define MACCR_ENABLE_ALL (FTMAC100_MACCR_XMT_EN | \
  119. FTMAC100_MACCR_RCV_EN | \
  120. FTMAC100_MACCR_XDMA_EN | \
  121. FTMAC100_MACCR_RDMA_EN | \
  122. FTMAC100_MACCR_CRC_APD | \
  123. FTMAC100_MACCR_FULLDUP | \
  124. FTMAC100_MACCR_RX_RUNT | \
  125. FTMAC100_MACCR_RX_BROADPKT)
  126. static int ftmac100_start_hw(struct ftmac100 *priv)
  127. {
  128. struct net_device *netdev = priv->netdev;
  129. if (ftmac100_reset(priv))
  130. return -EIO;
  131. /* setup ring buffer base registers */
  132. ftmac100_set_rx_ring_base(priv,
  133. priv->descs_dma_addr +
  134. offsetof(struct ftmac100_descs, rxdes));
  135. ftmac100_set_tx_ring_base(priv,
  136. priv->descs_dma_addr +
  137. offsetof(struct ftmac100_descs, txdes));
  138. iowrite32(FTMAC100_APTC_RXPOLL_CNT(1), priv->base + FTMAC100_OFFSET_APTC);
  139. ftmac100_set_mac(priv, netdev->dev_addr);
  140. iowrite32(MACCR_ENABLE_ALL, priv->base + FTMAC100_OFFSET_MACCR);
  141. return 0;
  142. }
  143. static void ftmac100_stop_hw(struct ftmac100 *priv)
  144. {
  145. iowrite32(0, priv->base + FTMAC100_OFFSET_MACCR);
  146. }
  147. /******************************************************************************
  148. * internal functions (receive descriptor)
  149. *****************************************************************************/
  150. static bool ftmac100_rxdes_first_segment(struct ftmac100_rxdes *rxdes)
  151. {
  152. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FRS);
  153. }
  154. static bool ftmac100_rxdes_last_segment(struct ftmac100_rxdes *rxdes)
  155. {
  156. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_LRS);
  157. }
  158. static bool ftmac100_rxdes_owned_by_dma(struct ftmac100_rxdes *rxdes)
  159. {
  160. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
  161. }
  162. static void ftmac100_rxdes_set_dma_own(struct ftmac100_rxdes *rxdes)
  163. {
  164. /* clear status bits */
  165. rxdes->rxdes0 = cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
  166. }
  167. static bool ftmac100_rxdes_rx_error(struct ftmac100_rxdes *rxdes)
  168. {
  169. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ERR);
  170. }
  171. static bool ftmac100_rxdes_crc_error(struct ftmac100_rxdes *rxdes)
  172. {
  173. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_CRC_ERR);
  174. }
  175. static bool ftmac100_rxdes_frame_too_long(struct ftmac100_rxdes *rxdes)
  176. {
  177. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FTL);
  178. }
  179. static bool ftmac100_rxdes_runt(struct ftmac100_rxdes *rxdes)
  180. {
  181. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RUNT);
  182. }
  183. static bool ftmac100_rxdes_odd_nibble(struct ftmac100_rxdes *rxdes)
  184. {
  185. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ODD_NB);
  186. }
  187. static unsigned int ftmac100_rxdes_frame_length(struct ftmac100_rxdes *rxdes)
  188. {
  189. return le32_to_cpu(rxdes->rxdes0) & FTMAC100_RXDES0_RFL;
  190. }
  191. static bool ftmac100_rxdes_multicast(struct ftmac100_rxdes *rxdes)
  192. {
  193. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_MULTICAST);
  194. }
  195. static void ftmac100_rxdes_set_buffer_size(struct ftmac100_rxdes *rxdes,
  196. unsigned int size)
  197. {
  198. rxdes->rxdes1 &= cpu_to_le32(FTMAC100_RXDES1_EDORR);
  199. rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_RXBUF_SIZE(size));
  200. }
  201. static void ftmac100_rxdes_set_end_of_ring(struct ftmac100_rxdes *rxdes)
  202. {
  203. rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_EDORR);
  204. }
  205. static void ftmac100_rxdes_set_dma_addr(struct ftmac100_rxdes *rxdes,
  206. dma_addr_t addr)
  207. {
  208. rxdes->rxdes2 = cpu_to_le32(addr);
  209. }
  210. static dma_addr_t ftmac100_rxdes_get_dma_addr(struct ftmac100_rxdes *rxdes)
  211. {
  212. return le32_to_cpu(rxdes->rxdes2);
  213. }
  214. /*
  215. * rxdes3 is not used by hardware. We use it to keep track of page.
  216. * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
  217. */
  218. static void ftmac100_rxdes_set_page(struct ftmac100_rxdes *rxdes, struct page *page)
  219. {
  220. rxdes->rxdes3 = (unsigned int)page;
  221. }
  222. static struct page *ftmac100_rxdes_get_page(struct ftmac100_rxdes *rxdes)
  223. {
  224. return (struct page *)rxdes->rxdes3;
  225. }
  226. /******************************************************************************
  227. * internal functions (receive)
  228. *****************************************************************************/
  229. static int ftmac100_next_rx_pointer(int pointer)
  230. {
  231. return (pointer + 1) & (RX_QUEUE_ENTRIES - 1);
  232. }
  233. static void ftmac100_rx_pointer_advance(struct ftmac100 *priv)
  234. {
  235. priv->rx_pointer = ftmac100_next_rx_pointer(priv->rx_pointer);
  236. }
  237. static struct ftmac100_rxdes *ftmac100_current_rxdes(struct ftmac100 *priv)
  238. {
  239. return &priv->descs->rxdes[priv->rx_pointer];
  240. }
  241. static struct ftmac100_rxdes *
  242. ftmac100_rx_locate_first_segment(struct ftmac100 *priv)
  243. {
  244. struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
  245. while (!ftmac100_rxdes_owned_by_dma(rxdes)) {
  246. if (ftmac100_rxdes_first_segment(rxdes))
  247. return rxdes;
  248. ftmac100_rxdes_set_dma_own(rxdes);
  249. ftmac100_rx_pointer_advance(priv);
  250. rxdes = ftmac100_current_rxdes(priv);
  251. }
  252. return NULL;
  253. }
  254. static bool ftmac100_rx_packet_error(struct ftmac100 *priv,
  255. struct ftmac100_rxdes *rxdes)
  256. {
  257. struct net_device *netdev = priv->netdev;
  258. bool error = false;
  259. if (unlikely(ftmac100_rxdes_rx_error(rxdes))) {
  260. if (net_ratelimit())
  261. netdev_info(netdev, "rx err\n");
  262. netdev->stats.rx_errors++;
  263. error = true;
  264. }
  265. if (unlikely(ftmac100_rxdes_crc_error(rxdes))) {
  266. if (net_ratelimit())
  267. netdev_info(netdev, "rx crc err\n");
  268. netdev->stats.rx_crc_errors++;
  269. error = true;
  270. }
  271. if (unlikely(ftmac100_rxdes_frame_too_long(rxdes))) {
  272. if (net_ratelimit())
  273. netdev_info(netdev, "rx frame too long\n");
  274. netdev->stats.rx_length_errors++;
  275. error = true;
  276. } else if (unlikely(ftmac100_rxdes_runt(rxdes))) {
  277. if (net_ratelimit())
  278. netdev_info(netdev, "rx runt\n");
  279. netdev->stats.rx_length_errors++;
  280. error = true;
  281. } else if (unlikely(ftmac100_rxdes_odd_nibble(rxdes))) {
  282. if (net_ratelimit())
  283. netdev_info(netdev, "rx odd nibble\n");
  284. netdev->stats.rx_length_errors++;
  285. error = true;
  286. }
  287. return error;
  288. }
  289. static void ftmac100_rx_drop_packet(struct ftmac100 *priv)
  290. {
  291. struct net_device *netdev = priv->netdev;
  292. struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
  293. bool done = false;
  294. if (net_ratelimit())
  295. netdev_dbg(netdev, "drop packet %p\n", rxdes);
  296. do {
  297. if (ftmac100_rxdes_last_segment(rxdes))
  298. done = true;
  299. ftmac100_rxdes_set_dma_own(rxdes);
  300. ftmac100_rx_pointer_advance(priv);
  301. rxdes = ftmac100_current_rxdes(priv);
  302. } while (!done && !ftmac100_rxdes_owned_by_dma(rxdes));
  303. netdev->stats.rx_dropped++;
  304. }
  305. static bool ftmac100_rx_packet(struct ftmac100 *priv, int *processed)
  306. {
  307. struct net_device *netdev = priv->netdev;
  308. struct ftmac100_rxdes *rxdes;
  309. struct sk_buff *skb;
  310. struct page *page;
  311. dma_addr_t map;
  312. int length;
  313. bool ret;
  314. rxdes = ftmac100_rx_locate_first_segment(priv);
  315. if (!rxdes)
  316. return false;
  317. if (unlikely(ftmac100_rx_packet_error(priv, rxdes))) {
  318. ftmac100_rx_drop_packet(priv);
  319. return true;
  320. }
  321. /*
  322. * It is impossible to get multi-segment packets
  323. * because we always provide big enough receive buffers.
  324. */
  325. ret = ftmac100_rxdes_last_segment(rxdes);
  326. BUG_ON(!ret);
  327. /* start processing */
  328. skb = netdev_alloc_skb_ip_align(netdev, 128);
  329. if (unlikely(!skb)) {
  330. if (net_ratelimit())
  331. netdev_err(netdev, "rx skb alloc failed\n");
  332. ftmac100_rx_drop_packet(priv);
  333. return true;
  334. }
  335. if (unlikely(ftmac100_rxdes_multicast(rxdes)))
  336. netdev->stats.multicast++;
  337. map = ftmac100_rxdes_get_dma_addr(rxdes);
  338. dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
  339. length = ftmac100_rxdes_frame_length(rxdes);
  340. page = ftmac100_rxdes_get_page(rxdes);
  341. skb_fill_page_desc(skb, 0, page, 0, length);
  342. skb->len += length;
  343. skb->data_len += length;
  344. if (length > 128) {
  345. skb->truesize += PAGE_SIZE;
  346. /* We pull the minimum amount into linear part */
  347. __pskb_pull_tail(skb, ETH_HLEN);
  348. } else {
  349. /* Small frames are copied into linear part to free one page */
  350. __pskb_pull_tail(skb, length);
  351. }
  352. ftmac100_alloc_rx_page(priv, rxdes, GFP_ATOMIC);
  353. ftmac100_rx_pointer_advance(priv);
  354. skb->protocol = eth_type_trans(skb, netdev);
  355. netdev->stats.rx_packets++;
  356. netdev->stats.rx_bytes += skb->len;
  357. /* push packet to protocol stack */
  358. netif_receive_skb(skb);
  359. (*processed)++;
  360. return true;
  361. }
  362. /******************************************************************************
  363. * internal functions (transmit descriptor)
  364. *****************************************************************************/
  365. static void ftmac100_txdes_reset(struct ftmac100_txdes *txdes)
  366. {
  367. /* clear all except end of ring bit */
  368. txdes->txdes0 = 0;
  369. txdes->txdes1 &= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
  370. txdes->txdes2 = 0;
  371. txdes->txdes3 = 0;
  372. }
  373. static bool ftmac100_txdes_owned_by_dma(struct ftmac100_txdes *txdes)
  374. {
  375. return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
  376. }
  377. static void ftmac100_txdes_set_dma_own(struct ftmac100_txdes *txdes)
  378. {
  379. /*
  380. * Make sure dma own bit will not be set before any other
  381. * descriptor fields.
  382. */
  383. wmb();
  384. txdes->txdes0 |= cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
  385. }
  386. static bool ftmac100_txdes_excessive_collision(struct ftmac100_txdes *txdes)
  387. {
  388. return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_EXSCOL);
  389. }
  390. static bool ftmac100_txdes_late_collision(struct ftmac100_txdes *txdes)
  391. {
  392. return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_LATECOL);
  393. }
  394. static void ftmac100_txdes_set_end_of_ring(struct ftmac100_txdes *txdes)
  395. {
  396. txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
  397. }
  398. static void ftmac100_txdes_set_first_segment(struct ftmac100_txdes *txdes)
  399. {
  400. txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_FTS);
  401. }
  402. static void ftmac100_txdes_set_last_segment(struct ftmac100_txdes *txdes)
  403. {
  404. txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_LTS);
  405. }
  406. static void ftmac100_txdes_set_txint(struct ftmac100_txdes *txdes)
  407. {
  408. txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXIC);
  409. }
  410. static void ftmac100_txdes_set_buffer_size(struct ftmac100_txdes *txdes,
  411. unsigned int len)
  412. {
  413. txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXBUF_SIZE(len));
  414. }
  415. static void ftmac100_txdes_set_dma_addr(struct ftmac100_txdes *txdes,
  416. dma_addr_t addr)
  417. {
  418. txdes->txdes2 = cpu_to_le32(addr);
  419. }
  420. static dma_addr_t ftmac100_txdes_get_dma_addr(struct ftmac100_txdes *txdes)
  421. {
  422. return le32_to_cpu(txdes->txdes2);
  423. }
  424. /*
  425. * txdes3 is not used by hardware. We use it to keep track of socket buffer.
  426. * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
  427. */
  428. static void ftmac100_txdes_set_skb(struct ftmac100_txdes *txdes, struct sk_buff *skb)
  429. {
  430. txdes->txdes3 = (unsigned int)skb;
  431. }
  432. static struct sk_buff *ftmac100_txdes_get_skb(struct ftmac100_txdes *txdes)
  433. {
  434. return (struct sk_buff *)txdes->txdes3;
  435. }
  436. /******************************************************************************
  437. * internal functions (transmit)
  438. *****************************************************************************/
  439. static int ftmac100_next_tx_pointer(int pointer)
  440. {
  441. return (pointer + 1) & (TX_QUEUE_ENTRIES - 1);
  442. }
  443. static void ftmac100_tx_pointer_advance(struct ftmac100 *priv)
  444. {
  445. priv->tx_pointer = ftmac100_next_tx_pointer(priv->tx_pointer);
  446. }
  447. static void ftmac100_tx_clean_pointer_advance(struct ftmac100 *priv)
  448. {
  449. priv->tx_clean_pointer = ftmac100_next_tx_pointer(priv->tx_clean_pointer);
  450. }
  451. static struct ftmac100_txdes *ftmac100_current_txdes(struct ftmac100 *priv)
  452. {
  453. return &priv->descs->txdes[priv->tx_pointer];
  454. }
  455. static struct ftmac100_txdes *ftmac100_current_clean_txdes(struct ftmac100 *priv)
  456. {
  457. return &priv->descs->txdes[priv->tx_clean_pointer];
  458. }
  459. static bool ftmac100_tx_complete_packet(struct ftmac100 *priv)
  460. {
  461. struct net_device *netdev = priv->netdev;
  462. struct ftmac100_txdes *txdes;
  463. struct sk_buff *skb;
  464. dma_addr_t map;
  465. if (priv->tx_pending == 0)
  466. return false;
  467. txdes = ftmac100_current_clean_txdes(priv);
  468. if (ftmac100_txdes_owned_by_dma(txdes))
  469. return false;
  470. skb = ftmac100_txdes_get_skb(txdes);
  471. map = ftmac100_txdes_get_dma_addr(txdes);
  472. if (unlikely(ftmac100_txdes_excessive_collision(txdes) ||
  473. ftmac100_txdes_late_collision(txdes))) {
  474. /*
  475. * packet transmitted to ethernet lost due to late collision
  476. * or excessive collision
  477. */
  478. netdev->stats.tx_aborted_errors++;
  479. } else {
  480. netdev->stats.tx_packets++;
  481. netdev->stats.tx_bytes += skb->len;
  482. }
  483. dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
  484. dev_kfree_skb(skb);
  485. ftmac100_txdes_reset(txdes);
  486. ftmac100_tx_clean_pointer_advance(priv);
  487. spin_lock(&priv->tx_lock);
  488. priv->tx_pending--;
  489. spin_unlock(&priv->tx_lock);
  490. netif_wake_queue(netdev);
  491. return true;
  492. }
  493. static void ftmac100_tx_complete(struct ftmac100 *priv)
  494. {
  495. while (ftmac100_tx_complete_packet(priv))
  496. ;
  497. }
  498. static netdev_tx_t ftmac100_xmit(struct ftmac100 *priv, struct sk_buff *skb,
  499. dma_addr_t map)
  500. {
  501. struct net_device *netdev = priv->netdev;
  502. struct ftmac100_txdes *txdes;
  503. unsigned int len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
  504. txdes = ftmac100_current_txdes(priv);
  505. ftmac100_tx_pointer_advance(priv);
  506. /* setup TX descriptor */
  507. ftmac100_txdes_set_skb(txdes, skb);
  508. ftmac100_txdes_set_dma_addr(txdes, map);
  509. ftmac100_txdes_set_first_segment(txdes);
  510. ftmac100_txdes_set_last_segment(txdes);
  511. ftmac100_txdes_set_txint(txdes);
  512. ftmac100_txdes_set_buffer_size(txdes, len);
  513. spin_lock(&priv->tx_lock);
  514. priv->tx_pending++;
  515. if (priv->tx_pending == TX_QUEUE_ENTRIES)
  516. netif_stop_queue(netdev);
  517. /* start transmit */
  518. ftmac100_txdes_set_dma_own(txdes);
  519. spin_unlock(&priv->tx_lock);
  520. ftmac100_txdma_start_polling(priv);
  521. return NETDEV_TX_OK;
  522. }
  523. /******************************************************************************
  524. * internal functions (buffer)
  525. *****************************************************************************/
  526. static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
  527. struct ftmac100_rxdes *rxdes, gfp_t gfp)
  528. {
  529. struct net_device *netdev = priv->netdev;
  530. struct page *page;
  531. dma_addr_t map;
  532. page = alloc_page(gfp);
  533. if (!page) {
  534. if (net_ratelimit())
  535. netdev_err(netdev, "failed to allocate rx page\n");
  536. return -ENOMEM;
  537. }
  538. map = dma_map_page(priv->dev, page, 0, RX_BUF_SIZE, DMA_FROM_DEVICE);
  539. if (unlikely(dma_mapping_error(priv->dev, map))) {
  540. if (net_ratelimit())
  541. netdev_err(netdev, "failed to map rx page\n");
  542. __free_page(page);
  543. return -ENOMEM;
  544. }
  545. ftmac100_rxdes_set_page(rxdes, page);
  546. ftmac100_rxdes_set_dma_addr(rxdes, map);
  547. ftmac100_rxdes_set_buffer_size(rxdes, RX_BUF_SIZE);
  548. ftmac100_rxdes_set_dma_own(rxdes);
  549. return 0;
  550. }
  551. static void ftmac100_free_buffers(struct ftmac100 *priv)
  552. {
  553. int i;
  554. for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
  555. struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
  556. struct page *page = ftmac100_rxdes_get_page(rxdes);
  557. dma_addr_t map = ftmac100_rxdes_get_dma_addr(rxdes);
  558. if (!page)
  559. continue;
  560. dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
  561. __free_page(page);
  562. }
  563. for (i = 0; i < TX_QUEUE_ENTRIES; i++) {
  564. struct ftmac100_txdes *txdes = &priv->descs->txdes[i];
  565. struct sk_buff *skb = ftmac100_txdes_get_skb(txdes);
  566. dma_addr_t map = ftmac100_txdes_get_dma_addr(txdes);
  567. if (!skb)
  568. continue;
  569. dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
  570. dev_kfree_skb(skb);
  571. }
  572. dma_free_coherent(priv->dev, sizeof(struct ftmac100_descs),
  573. priv->descs, priv->descs_dma_addr);
  574. }
  575. static int ftmac100_alloc_buffers(struct ftmac100 *priv)
  576. {
  577. int i;
  578. priv->descs = dma_alloc_coherent(priv->dev,
  579. sizeof(struct ftmac100_descs),
  580. &priv->descs_dma_addr, GFP_KERNEL);
  581. if (!priv->descs)
  582. return -ENOMEM;
  583. /* initialize RX ring */
  584. ftmac100_rxdes_set_end_of_ring(&priv->descs->rxdes[RX_QUEUE_ENTRIES - 1]);
  585. for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
  586. struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
  587. if (ftmac100_alloc_rx_page(priv, rxdes, GFP_KERNEL))
  588. goto err;
  589. }
  590. /* initialize TX ring */
  591. ftmac100_txdes_set_end_of_ring(&priv->descs->txdes[TX_QUEUE_ENTRIES - 1]);
  592. return 0;
  593. err:
  594. ftmac100_free_buffers(priv);
  595. return -ENOMEM;
  596. }
  597. /******************************************************************************
  598. * struct mii_if_info functions
  599. *****************************************************************************/
  600. static int ftmac100_mdio_read(struct net_device *netdev, int phy_id, int reg)
  601. {
  602. struct ftmac100 *priv = netdev_priv(netdev);
  603. unsigned int phycr;
  604. int i;
  605. phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
  606. FTMAC100_PHYCR_REGAD(reg) |
  607. FTMAC100_PHYCR_MIIRD;
  608. iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
  609. for (i = 0; i < 10; i++) {
  610. phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
  611. if ((phycr & FTMAC100_PHYCR_MIIRD) == 0)
  612. return phycr & FTMAC100_PHYCR_MIIRDATA;
  613. udelay(100);
  614. }
  615. netdev_err(netdev, "mdio read timed out\n");
  616. return 0;
  617. }
  618. static void ftmac100_mdio_write(struct net_device *netdev, int phy_id, int reg,
  619. int data)
  620. {
  621. struct ftmac100 *priv = netdev_priv(netdev);
  622. unsigned int phycr;
  623. int i;
  624. phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
  625. FTMAC100_PHYCR_REGAD(reg) |
  626. FTMAC100_PHYCR_MIIWR;
  627. data = FTMAC100_PHYWDATA_MIIWDATA(data);
  628. iowrite32(data, priv->base + FTMAC100_OFFSET_PHYWDATA);
  629. iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
  630. for (i = 0; i < 10; i++) {
  631. phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
  632. if ((phycr & FTMAC100_PHYCR_MIIWR) == 0)
  633. return;
  634. udelay(100);
  635. }
  636. netdev_err(netdev, "mdio write timed out\n");
  637. }
  638. /******************************************************************************
  639. * struct ethtool_ops functions
  640. *****************************************************************************/
  641. static void ftmac100_get_drvinfo(struct net_device *netdev,
  642. struct ethtool_drvinfo *info)
  643. {
  644. strscpy(info->driver, DRV_NAME, sizeof(info->driver));
  645. strscpy(info->bus_info, dev_name(&netdev->dev), sizeof(info->bus_info));
  646. }
  647. static int ftmac100_get_link_ksettings(struct net_device *netdev,
  648. struct ethtool_link_ksettings *cmd)
  649. {
  650. struct ftmac100 *priv = netdev_priv(netdev);
  651. mii_ethtool_get_link_ksettings(&priv->mii, cmd);
  652. return 0;
  653. }
  654. static int ftmac100_set_link_ksettings(struct net_device *netdev,
  655. const struct ethtool_link_ksettings *cmd)
  656. {
  657. struct ftmac100 *priv = netdev_priv(netdev);
  658. return mii_ethtool_set_link_ksettings(&priv->mii, cmd);
  659. }
  660. static int ftmac100_nway_reset(struct net_device *netdev)
  661. {
  662. struct ftmac100 *priv = netdev_priv(netdev);
  663. return mii_nway_restart(&priv->mii);
  664. }
  665. static u32 ftmac100_get_link(struct net_device *netdev)
  666. {
  667. struct ftmac100 *priv = netdev_priv(netdev);
  668. return mii_link_ok(&priv->mii);
  669. }
  670. static const struct ethtool_ops ftmac100_ethtool_ops = {
  671. .get_drvinfo = ftmac100_get_drvinfo,
  672. .nway_reset = ftmac100_nway_reset,
  673. .get_link = ftmac100_get_link,
  674. .get_link_ksettings = ftmac100_get_link_ksettings,
  675. .set_link_ksettings = ftmac100_set_link_ksettings,
  676. };
  677. /******************************************************************************
  678. * interrupt handler
  679. *****************************************************************************/
  680. static irqreturn_t ftmac100_interrupt(int irq, void *dev_id)
  681. {
  682. struct net_device *netdev = dev_id;
  683. struct ftmac100 *priv = netdev_priv(netdev);
  684. /* Disable interrupts for polling */
  685. ftmac100_disable_all_int(priv);
  686. if (likely(netif_running(netdev)))
  687. napi_schedule(&priv->napi);
  688. return IRQ_HANDLED;
  689. }
  690. /******************************************************************************
  691. * struct napi_struct functions
  692. *****************************************************************************/
  693. static int ftmac100_poll(struct napi_struct *napi, int budget)
  694. {
  695. struct ftmac100 *priv = container_of(napi, struct ftmac100, napi);
  696. struct net_device *netdev = priv->netdev;
  697. unsigned int status;
  698. bool completed = true;
  699. int rx = 0;
  700. status = ioread32(priv->base + FTMAC100_OFFSET_ISR);
  701. if (status & (FTMAC100_INT_RPKT_FINISH | FTMAC100_INT_NORXBUF)) {
  702. /*
  703. * FTMAC100_INT_RPKT_FINISH:
  704. * RX DMA has received packets into RX buffer successfully
  705. *
  706. * FTMAC100_INT_NORXBUF:
  707. * RX buffer unavailable
  708. */
  709. bool retry;
  710. do {
  711. retry = ftmac100_rx_packet(priv, &rx);
  712. } while (retry && rx < budget);
  713. if (retry && rx == budget)
  714. completed = false;
  715. }
  716. if (status & (FTMAC100_INT_XPKT_OK | FTMAC100_INT_XPKT_LOST)) {
  717. /*
  718. * FTMAC100_INT_XPKT_OK:
  719. * packet transmitted to ethernet successfully
  720. *
  721. * FTMAC100_INT_XPKT_LOST:
  722. * packet transmitted to ethernet lost due to late
  723. * collision or excessive collision
  724. */
  725. ftmac100_tx_complete(priv);
  726. }
  727. if (status & (FTMAC100_INT_NORXBUF | FTMAC100_INT_RPKT_LOST |
  728. FTMAC100_INT_AHB_ERR | FTMAC100_INT_PHYSTS_CHG)) {
  729. if (net_ratelimit())
  730. netdev_info(netdev, "[ISR] = 0x%x: %s%s%s%s\n", status,
  731. status & FTMAC100_INT_NORXBUF ? "NORXBUF " : "",
  732. status & FTMAC100_INT_RPKT_LOST ? "RPKT_LOST " : "",
  733. status & FTMAC100_INT_AHB_ERR ? "AHB_ERR " : "",
  734. status & FTMAC100_INT_PHYSTS_CHG ? "PHYSTS_CHG" : "");
  735. if (status & FTMAC100_INT_NORXBUF) {
  736. /* RX buffer unavailable */
  737. netdev->stats.rx_over_errors++;
  738. }
  739. if (status & FTMAC100_INT_RPKT_LOST) {
  740. /* received packet lost due to RX FIFO full */
  741. netdev->stats.rx_fifo_errors++;
  742. }
  743. if (status & FTMAC100_INT_PHYSTS_CHG) {
  744. /* PHY link status change */
  745. mii_check_link(&priv->mii);
  746. }
  747. }
  748. if (completed) {
  749. /* stop polling */
  750. napi_complete(napi);
  751. ftmac100_enable_all_int(priv);
  752. }
  753. return rx;
  754. }
  755. /******************************************************************************
  756. * struct net_device_ops functions
  757. *****************************************************************************/
  758. static int ftmac100_open(struct net_device *netdev)
  759. {
  760. struct ftmac100 *priv = netdev_priv(netdev);
  761. int err;
  762. err = ftmac100_alloc_buffers(priv);
  763. if (err) {
  764. netdev_err(netdev, "failed to allocate buffers\n");
  765. goto err_alloc;
  766. }
  767. err = request_irq(priv->irq, ftmac100_interrupt, 0, netdev->name, netdev);
  768. if (err) {
  769. netdev_err(netdev, "failed to request irq %d\n", priv->irq);
  770. goto err_irq;
  771. }
  772. priv->rx_pointer = 0;
  773. priv->tx_clean_pointer = 0;
  774. priv->tx_pointer = 0;
  775. priv->tx_pending = 0;
  776. err = ftmac100_start_hw(priv);
  777. if (err)
  778. goto err_hw;
  779. napi_enable(&priv->napi);
  780. netif_start_queue(netdev);
  781. ftmac100_enable_all_int(priv);
  782. return 0;
  783. err_hw:
  784. free_irq(priv->irq, netdev);
  785. err_irq:
  786. ftmac100_free_buffers(priv);
  787. err_alloc:
  788. return err;
  789. }
  790. static int ftmac100_stop(struct net_device *netdev)
  791. {
  792. struct ftmac100 *priv = netdev_priv(netdev);
  793. ftmac100_disable_all_int(priv);
  794. netif_stop_queue(netdev);
  795. napi_disable(&priv->napi);
  796. ftmac100_stop_hw(priv);
  797. free_irq(priv->irq, netdev);
  798. ftmac100_free_buffers(priv);
  799. return 0;
  800. }
  801. static netdev_tx_t
  802. ftmac100_hard_start_xmit(struct sk_buff *skb, struct net_device *netdev)
  803. {
  804. struct ftmac100 *priv = netdev_priv(netdev);
  805. dma_addr_t map;
  806. if (unlikely(skb->len > MAX_PKT_SIZE)) {
  807. if (net_ratelimit())
  808. netdev_dbg(netdev, "tx packet too big\n");
  809. netdev->stats.tx_dropped++;
  810. dev_kfree_skb(skb);
  811. return NETDEV_TX_OK;
  812. }
  813. map = dma_map_single(priv->dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE);
  814. if (unlikely(dma_mapping_error(priv->dev, map))) {
  815. /* drop packet */
  816. if (net_ratelimit())
  817. netdev_err(netdev, "map socket buffer failed\n");
  818. netdev->stats.tx_dropped++;
  819. dev_kfree_skb(skb);
  820. return NETDEV_TX_OK;
  821. }
  822. return ftmac100_xmit(priv, skb, map);
  823. }
  824. /* optional */
  825. static int ftmac100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  826. {
  827. struct ftmac100 *priv = netdev_priv(netdev);
  828. struct mii_ioctl_data *data = if_mii(ifr);
  829. return generic_mii_ioctl(&priv->mii, data, cmd, NULL);
  830. }
  831. static const struct net_device_ops ftmac100_netdev_ops = {
  832. .ndo_open = ftmac100_open,
  833. .ndo_stop = ftmac100_stop,
  834. .ndo_start_xmit = ftmac100_hard_start_xmit,
  835. .ndo_set_mac_address = eth_mac_addr,
  836. .ndo_validate_addr = eth_validate_addr,
  837. .ndo_eth_ioctl = ftmac100_do_ioctl,
  838. };
  839. /******************************************************************************
  840. * struct platform_driver functions
  841. *****************************************************************************/
  842. static int ftmac100_probe(struct platform_device *pdev)
  843. {
  844. struct resource *res;
  845. int irq;
  846. struct net_device *netdev;
  847. struct ftmac100 *priv;
  848. int err;
  849. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  850. if (!res)
  851. return -ENXIO;
  852. irq = platform_get_irq(pdev, 0);
  853. if (irq < 0)
  854. return irq;
  855. /* setup net_device */
  856. netdev = alloc_etherdev(sizeof(*priv));
  857. if (!netdev) {
  858. err = -ENOMEM;
  859. goto err_alloc_etherdev;
  860. }
  861. SET_NETDEV_DEV(netdev, &pdev->dev);
  862. netdev->ethtool_ops = &ftmac100_ethtool_ops;
  863. netdev->netdev_ops = &ftmac100_netdev_ops;
  864. netdev->max_mtu = MAX_PKT_SIZE;
  865. err = platform_get_ethdev_address(&pdev->dev, netdev);
  866. if (err == -EPROBE_DEFER)
  867. goto defer_get_mac;
  868. platform_set_drvdata(pdev, netdev);
  869. /* setup private data */
  870. priv = netdev_priv(netdev);
  871. priv->netdev = netdev;
  872. priv->dev = &pdev->dev;
  873. spin_lock_init(&priv->tx_lock);
  874. /* initialize NAPI */
  875. netif_napi_add(netdev, &priv->napi, ftmac100_poll);
  876. /* map io memory */
  877. priv->res = request_mem_region(res->start, resource_size(res),
  878. dev_name(&pdev->dev));
  879. if (!priv->res) {
  880. dev_err(&pdev->dev, "Could not reserve memory region\n");
  881. err = -ENOMEM;
  882. goto err_req_mem;
  883. }
  884. priv->base = ioremap(res->start, resource_size(res));
  885. if (!priv->base) {
  886. dev_err(&pdev->dev, "Failed to ioremap ethernet registers\n");
  887. err = -EIO;
  888. goto err_ioremap;
  889. }
  890. priv->irq = irq;
  891. /* initialize struct mii_if_info */
  892. priv->mii.phy_id = 0;
  893. priv->mii.phy_id_mask = 0x1f;
  894. priv->mii.reg_num_mask = 0x1f;
  895. priv->mii.dev = netdev;
  896. priv->mii.mdio_read = ftmac100_mdio_read;
  897. priv->mii.mdio_write = ftmac100_mdio_write;
  898. /* register network device */
  899. err = register_netdev(netdev);
  900. if (err) {
  901. dev_err(&pdev->dev, "Failed to register netdev\n");
  902. goto err_register_netdev;
  903. }
  904. netdev_info(netdev, "irq %d, mapped at %p\n", priv->irq, priv->base);
  905. if (!is_valid_ether_addr(netdev->dev_addr)) {
  906. eth_hw_addr_random(netdev);
  907. netdev_info(netdev, "generated random MAC address %pM\n",
  908. netdev->dev_addr);
  909. }
  910. return 0;
  911. err_register_netdev:
  912. iounmap(priv->base);
  913. err_ioremap:
  914. release_resource(priv->res);
  915. err_req_mem:
  916. netif_napi_del(&priv->napi);
  917. defer_get_mac:
  918. free_netdev(netdev);
  919. err_alloc_etherdev:
  920. return err;
  921. }
  922. static int ftmac100_remove(struct platform_device *pdev)
  923. {
  924. struct net_device *netdev;
  925. struct ftmac100 *priv;
  926. netdev = platform_get_drvdata(pdev);
  927. priv = netdev_priv(netdev);
  928. unregister_netdev(netdev);
  929. iounmap(priv->base);
  930. release_resource(priv->res);
  931. netif_napi_del(&priv->napi);
  932. free_netdev(netdev);
  933. return 0;
  934. }
  935. static const struct of_device_id ftmac100_of_ids[] = {
  936. { .compatible = "andestech,atmac100" },
  937. { }
  938. };
  939. static struct platform_driver ftmac100_driver = {
  940. .probe = ftmac100_probe,
  941. .remove = ftmac100_remove,
  942. .driver = {
  943. .name = DRV_NAME,
  944. .of_match_table = ftmac100_of_ids
  945. },
  946. };
  947. /******************************************************************************
  948. * initialization / finalization
  949. *****************************************************************************/
  950. module_platform_driver(ftmac100_driver);
  951. MODULE_AUTHOR("Po-Yu Chuang <[email protected]>");
  952. MODULE_DESCRIPTION("FTMAC100 driver");
  953. MODULE_LICENSE("GPL");
  954. MODULE_DEVICE_TABLE(of, ftmac100_of_ids);