tsnep_main.c 40 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* Copyright (C) 2021 Gerhard Engleder <[email protected]> */
  3. /* TSN endpoint Ethernet MAC driver
  4. *
  5. * The TSN endpoint Ethernet MAC is a FPGA based network device for real-time
  6. * communication. It is designed for endpoints within TSN (Time Sensitive
  7. * Networking) networks; e.g., for PLCs in the industrial automation case.
  8. *
  9. * It supports multiple TX/RX queue pairs. The first TX/RX queue pair is used
  10. * by the driver.
  11. *
  12. * More information can be found here:
  13. * - www.embedded-experts.at/tsn
  14. * - www.engleder-embedded.com
  15. */
  16. #include "tsnep.h"
  17. #include "tsnep_hw.h"
  18. #include <linux/module.h>
  19. #include <linux/of.h>
  20. #include <linux/of_net.h>
  21. #include <linux/of_mdio.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/etherdevice.h>
  24. #include <linux/phy.h>
  25. #include <linux/iopoll.h>
  26. #define TSNEP_SKB_PAD (NET_SKB_PAD + NET_IP_ALIGN)
  27. #define TSNEP_HEADROOM ALIGN(TSNEP_SKB_PAD, 4)
  28. #define TSNEP_MAX_RX_BUF_SIZE (PAGE_SIZE - TSNEP_HEADROOM - \
  29. SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
  30. #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
  31. #define DMA_ADDR_HIGH(dma_addr) ((u32)(((dma_addr) >> 32) & 0xFFFFFFFF))
  32. #else
  33. #define DMA_ADDR_HIGH(dma_addr) ((u32)(0))
  34. #endif
  35. #define DMA_ADDR_LOW(dma_addr) ((u32)((dma_addr) & 0xFFFFFFFF))
  36. static void tsnep_enable_irq(struct tsnep_adapter *adapter, u32 mask)
  37. {
  38. iowrite32(mask, adapter->addr + ECM_INT_ENABLE);
  39. }
  40. static void tsnep_disable_irq(struct tsnep_adapter *adapter, u32 mask)
  41. {
  42. mask |= ECM_INT_DISABLE;
  43. iowrite32(mask, adapter->addr + ECM_INT_ENABLE);
  44. }
  45. static irqreturn_t tsnep_irq(int irq, void *arg)
  46. {
  47. struct tsnep_adapter *adapter = arg;
  48. u32 active = ioread32(adapter->addr + ECM_INT_ACTIVE);
  49. /* acknowledge interrupt */
  50. if (active != 0)
  51. iowrite32(active, adapter->addr + ECM_INT_ACKNOWLEDGE);
  52. /* handle link interrupt */
  53. if ((active & ECM_INT_LINK) != 0)
  54. phy_mac_interrupt(adapter->netdev->phydev);
  55. /* handle TX/RX queue 0 interrupt */
  56. if ((active & adapter->queue[0].irq_mask) != 0) {
  57. if (napi_schedule_prep(&adapter->queue[0].napi)) {
  58. tsnep_disable_irq(adapter, adapter->queue[0].irq_mask);
  59. /* schedule after masking to avoid races */
  60. __napi_schedule(&adapter->queue[0].napi);
  61. }
  62. }
  63. return IRQ_HANDLED;
  64. }
  65. static irqreturn_t tsnep_irq_txrx(int irq, void *arg)
  66. {
  67. struct tsnep_queue *queue = arg;
  68. /* handle TX/RX queue interrupt */
  69. if (napi_schedule_prep(&queue->napi)) {
  70. tsnep_disable_irq(queue->adapter, queue->irq_mask);
  71. /* schedule after masking to avoid races */
  72. __napi_schedule(&queue->napi);
  73. }
  74. return IRQ_HANDLED;
  75. }
  76. static int tsnep_mdiobus_read(struct mii_bus *bus, int addr, int regnum)
  77. {
  78. struct tsnep_adapter *adapter = bus->priv;
  79. u32 md;
  80. int retval;
  81. if (regnum & MII_ADDR_C45)
  82. return -EOPNOTSUPP;
  83. md = ECM_MD_READ;
  84. if (!adapter->suppress_preamble)
  85. md |= ECM_MD_PREAMBLE;
  86. md |= (regnum << ECM_MD_ADDR_SHIFT) & ECM_MD_ADDR_MASK;
  87. md |= (addr << ECM_MD_PHY_ADDR_SHIFT) & ECM_MD_PHY_ADDR_MASK;
  88. iowrite32(md, adapter->addr + ECM_MD_CONTROL);
  89. retval = readl_poll_timeout_atomic(adapter->addr + ECM_MD_STATUS, md,
  90. !(md & ECM_MD_BUSY), 16, 1000);
  91. if (retval != 0)
  92. return retval;
  93. return (md & ECM_MD_DATA_MASK) >> ECM_MD_DATA_SHIFT;
  94. }
  95. static int tsnep_mdiobus_write(struct mii_bus *bus, int addr, int regnum,
  96. u16 val)
  97. {
  98. struct tsnep_adapter *adapter = bus->priv;
  99. u32 md;
  100. int retval;
  101. if (regnum & MII_ADDR_C45)
  102. return -EOPNOTSUPP;
  103. md = ECM_MD_WRITE;
  104. if (!adapter->suppress_preamble)
  105. md |= ECM_MD_PREAMBLE;
  106. md |= (regnum << ECM_MD_ADDR_SHIFT) & ECM_MD_ADDR_MASK;
  107. md |= (addr << ECM_MD_PHY_ADDR_SHIFT) & ECM_MD_PHY_ADDR_MASK;
  108. md |= ((u32)val << ECM_MD_DATA_SHIFT) & ECM_MD_DATA_MASK;
  109. iowrite32(md, adapter->addr + ECM_MD_CONTROL);
  110. retval = readl_poll_timeout_atomic(adapter->addr + ECM_MD_STATUS, md,
  111. !(md & ECM_MD_BUSY), 16, 1000);
  112. if (retval != 0)
  113. return retval;
  114. return 0;
  115. }
  116. static void tsnep_set_link_mode(struct tsnep_adapter *adapter)
  117. {
  118. u32 mode;
  119. switch (adapter->phydev->speed) {
  120. case SPEED_100:
  121. mode = ECM_LINK_MODE_100;
  122. break;
  123. case SPEED_1000:
  124. mode = ECM_LINK_MODE_1000;
  125. break;
  126. default:
  127. mode = ECM_LINK_MODE_OFF;
  128. break;
  129. }
  130. iowrite32(mode, adapter->addr + ECM_STATUS);
  131. }
  132. static void tsnep_phy_link_status_change(struct net_device *netdev)
  133. {
  134. struct tsnep_adapter *adapter = netdev_priv(netdev);
  135. struct phy_device *phydev = netdev->phydev;
  136. if (phydev->link)
  137. tsnep_set_link_mode(adapter);
  138. phy_print_status(netdev->phydev);
  139. }
  140. static int tsnep_phy_loopback(struct tsnep_adapter *adapter, bool enable)
  141. {
  142. int retval;
  143. retval = phy_loopback(adapter->phydev, enable);
  144. /* PHY link state change is not signaled if loopback is enabled, it
  145. * would delay a working loopback anyway, let's ensure that loopback
  146. * is working immediately by setting link mode directly
  147. */
  148. if (!retval && enable)
  149. tsnep_set_link_mode(adapter);
  150. return retval;
  151. }
  152. static int tsnep_phy_open(struct tsnep_adapter *adapter)
  153. {
  154. struct phy_device *phydev;
  155. struct ethtool_eee ethtool_eee;
  156. int retval;
  157. retval = phy_connect_direct(adapter->netdev, adapter->phydev,
  158. tsnep_phy_link_status_change,
  159. adapter->phy_mode);
  160. if (retval)
  161. return retval;
  162. phydev = adapter->netdev->phydev;
  163. /* MAC supports only 100Mbps|1000Mbps full duplex
  164. * SPE (Single Pair Ethernet) is also an option but not implemented yet
  165. */
  166. phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_10baseT_Half_BIT);
  167. phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_10baseT_Full_BIT);
  168. phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_100baseT_Half_BIT);
  169. phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT);
  170. /* disable EEE autoneg, EEE not supported by TSNEP */
  171. memset(&ethtool_eee, 0, sizeof(ethtool_eee));
  172. phy_ethtool_set_eee(adapter->phydev, &ethtool_eee);
  173. adapter->phydev->irq = PHY_MAC_INTERRUPT;
  174. phy_start(adapter->phydev);
  175. return 0;
  176. }
  177. static void tsnep_phy_close(struct tsnep_adapter *adapter)
  178. {
  179. phy_stop(adapter->netdev->phydev);
  180. phy_disconnect(adapter->netdev->phydev);
  181. adapter->netdev->phydev = NULL;
  182. }
  183. static void tsnep_tx_ring_cleanup(struct tsnep_tx *tx)
  184. {
  185. struct device *dmadev = tx->adapter->dmadev;
  186. int i;
  187. memset(tx->entry, 0, sizeof(tx->entry));
  188. for (i = 0; i < TSNEP_RING_PAGE_COUNT; i++) {
  189. if (tx->page[i]) {
  190. dma_free_coherent(dmadev, PAGE_SIZE, tx->page[i],
  191. tx->page_dma[i]);
  192. tx->page[i] = NULL;
  193. tx->page_dma[i] = 0;
  194. }
  195. }
  196. }
  197. static int tsnep_tx_ring_init(struct tsnep_tx *tx)
  198. {
  199. struct device *dmadev = tx->adapter->dmadev;
  200. struct tsnep_tx_entry *entry;
  201. struct tsnep_tx_entry *next_entry;
  202. int i, j;
  203. int retval;
  204. for (i = 0; i < TSNEP_RING_PAGE_COUNT; i++) {
  205. tx->page[i] =
  206. dma_alloc_coherent(dmadev, PAGE_SIZE, &tx->page_dma[i],
  207. GFP_KERNEL);
  208. if (!tx->page[i]) {
  209. retval = -ENOMEM;
  210. goto alloc_failed;
  211. }
  212. for (j = 0; j < TSNEP_RING_ENTRIES_PER_PAGE; j++) {
  213. entry = &tx->entry[TSNEP_RING_ENTRIES_PER_PAGE * i + j];
  214. entry->desc_wb = (struct tsnep_tx_desc_wb *)
  215. (((u8 *)tx->page[i]) + TSNEP_DESC_SIZE * j);
  216. entry->desc = (struct tsnep_tx_desc *)
  217. (((u8 *)entry->desc_wb) + TSNEP_DESC_OFFSET);
  218. entry->desc_dma = tx->page_dma[i] + TSNEP_DESC_SIZE * j;
  219. }
  220. }
  221. for (i = 0; i < TSNEP_RING_SIZE; i++) {
  222. entry = &tx->entry[i];
  223. next_entry = &tx->entry[(i + 1) % TSNEP_RING_SIZE];
  224. entry->desc->next = __cpu_to_le64(next_entry->desc_dma);
  225. }
  226. return 0;
  227. alloc_failed:
  228. tsnep_tx_ring_cleanup(tx);
  229. return retval;
  230. }
  231. static void tsnep_tx_activate(struct tsnep_tx *tx, int index, int length,
  232. bool last)
  233. {
  234. struct tsnep_tx_entry *entry = &tx->entry[index];
  235. entry->properties = 0;
  236. if (entry->skb) {
  237. entry->properties = length & TSNEP_DESC_LENGTH_MASK;
  238. entry->properties |= TSNEP_DESC_INTERRUPT_FLAG;
  239. if (skb_shinfo(entry->skb)->tx_flags & SKBTX_IN_PROGRESS)
  240. entry->properties |= TSNEP_DESC_EXTENDED_WRITEBACK_FLAG;
  241. /* toggle user flag to prevent false acknowledge
  242. *
  243. * Only the first fragment is acknowledged. For all other
  244. * fragments no acknowledge is done and the last written owner
  245. * counter stays in the writeback descriptor. Therefore, it is
  246. * possible that the last written owner counter is identical to
  247. * the new incremented owner counter and a false acknowledge is
  248. * detected before the real acknowledge has been done by
  249. * hardware.
  250. *
  251. * The user flag is used to prevent this situation. The user
  252. * flag is copied to the writeback descriptor by the hardware
  253. * and is used as additional acknowledge data. By toggeling the
  254. * user flag only for the first fragment (which is
  255. * acknowledged), it is guaranteed that the last acknowledge
  256. * done for this descriptor has used a different user flag and
  257. * cannot be detected as false acknowledge.
  258. */
  259. entry->owner_user_flag = !entry->owner_user_flag;
  260. }
  261. if (last)
  262. entry->properties |= TSNEP_TX_DESC_LAST_FRAGMENT_FLAG;
  263. if (index == tx->increment_owner_counter) {
  264. tx->owner_counter++;
  265. if (tx->owner_counter == 4)
  266. tx->owner_counter = 1;
  267. tx->increment_owner_counter--;
  268. if (tx->increment_owner_counter < 0)
  269. tx->increment_owner_counter = TSNEP_RING_SIZE - 1;
  270. }
  271. entry->properties |=
  272. (tx->owner_counter << TSNEP_DESC_OWNER_COUNTER_SHIFT) &
  273. TSNEP_DESC_OWNER_COUNTER_MASK;
  274. if (entry->owner_user_flag)
  275. entry->properties |= TSNEP_TX_DESC_OWNER_USER_FLAG;
  276. entry->desc->more_properties =
  277. __cpu_to_le32(entry->len & TSNEP_DESC_LENGTH_MASK);
  278. /* descriptor properties shall be written last, because valid data is
  279. * signaled there
  280. */
  281. dma_wmb();
  282. entry->desc->properties = __cpu_to_le32(entry->properties);
  283. }
  284. static int tsnep_tx_desc_available(struct tsnep_tx *tx)
  285. {
  286. if (tx->read <= tx->write)
  287. return TSNEP_RING_SIZE - tx->write + tx->read - 1;
  288. else
  289. return tx->read - tx->write - 1;
  290. }
  291. static int tsnep_tx_map(struct sk_buff *skb, struct tsnep_tx *tx, int count)
  292. {
  293. struct device *dmadev = tx->adapter->dmadev;
  294. struct tsnep_tx_entry *entry;
  295. unsigned int len;
  296. dma_addr_t dma;
  297. int map_len = 0;
  298. int i;
  299. for (i = 0; i < count; i++) {
  300. entry = &tx->entry[(tx->write + i) % TSNEP_RING_SIZE];
  301. if (i == 0) {
  302. len = skb_headlen(skb);
  303. dma = dma_map_single(dmadev, skb->data, len,
  304. DMA_TO_DEVICE);
  305. } else {
  306. len = skb_frag_size(&skb_shinfo(skb)->frags[i - 1]);
  307. dma = skb_frag_dma_map(dmadev,
  308. &skb_shinfo(skb)->frags[i - 1],
  309. 0, len, DMA_TO_DEVICE);
  310. }
  311. if (dma_mapping_error(dmadev, dma))
  312. return -ENOMEM;
  313. entry->len = len;
  314. dma_unmap_addr_set(entry, dma, dma);
  315. entry->desc->tx = __cpu_to_le64(dma);
  316. map_len += len;
  317. }
  318. return map_len;
  319. }
  320. static int tsnep_tx_unmap(struct tsnep_tx *tx, int index, int count)
  321. {
  322. struct device *dmadev = tx->adapter->dmadev;
  323. struct tsnep_tx_entry *entry;
  324. int map_len = 0;
  325. int i;
  326. for (i = 0; i < count; i++) {
  327. entry = &tx->entry[(index + i) % TSNEP_RING_SIZE];
  328. if (entry->len) {
  329. if (i == 0)
  330. dma_unmap_single(dmadev,
  331. dma_unmap_addr(entry, dma),
  332. dma_unmap_len(entry, len),
  333. DMA_TO_DEVICE);
  334. else
  335. dma_unmap_page(dmadev,
  336. dma_unmap_addr(entry, dma),
  337. dma_unmap_len(entry, len),
  338. DMA_TO_DEVICE);
  339. map_len += entry->len;
  340. entry->len = 0;
  341. }
  342. }
  343. return map_len;
  344. }
  345. static netdev_tx_t tsnep_xmit_frame_ring(struct sk_buff *skb,
  346. struct tsnep_tx *tx)
  347. {
  348. unsigned long flags;
  349. int count = 1;
  350. struct tsnep_tx_entry *entry;
  351. int length;
  352. int i;
  353. int retval;
  354. if (skb_shinfo(skb)->nr_frags > 0)
  355. count += skb_shinfo(skb)->nr_frags;
  356. spin_lock_irqsave(&tx->lock, flags);
  357. if (tsnep_tx_desc_available(tx) < count) {
  358. /* ring full, shall not happen because queue is stopped if full
  359. * below
  360. */
  361. netif_stop_subqueue(tx->adapter->netdev, tx->queue_index);
  362. spin_unlock_irqrestore(&tx->lock, flags);
  363. return NETDEV_TX_BUSY;
  364. }
  365. entry = &tx->entry[tx->write];
  366. entry->skb = skb;
  367. retval = tsnep_tx_map(skb, tx, count);
  368. if (retval < 0) {
  369. tsnep_tx_unmap(tx, tx->write, count);
  370. dev_kfree_skb_any(entry->skb);
  371. entry->skb = NULL;
  372. tx->dropped++;
  373. spin_unlock_irqrestore(&tx->lock, flags);
  374. netdev_err(tx->adapter->netdev, "TX DMA map failed\n");
  375. return NETDEV_TX_OK;
  376. }
  377. length = retval;
  378. if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)
  379. skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
  380. for (i = 0; i < count; i++)
  381. tsnep_tx_activate(tx, (tx->write + i) % TSNEP_RING_SIZE, length,
  382. i == (count - 1));
  383. tx->write = (tx->write + count) % TSNEP_RING_SIZE;
  384. skb_tx_timestamp(skb);
  385. /* descriptor properties shall be valid before hardware is notified */
  386. dma_wmb();
  387. iowrite32(TSNEP_CONTROL_TX_ENABLE, tx->addr + TSNEP_CONTROL);
  388. if (tsnep_tx_desc_available(tx) < (MAX_SKB_FRAGS + 1)) {
  389. /* ring can get full with next frame */
  390. netif_stop_subqueue(tx->adapter->netdev, tx->queue_index);
  391. }
  392. spin_unlock_irqrestore(&tx->lock, flags);
  393. return NETDEV_TX_OK;
  394. }
  395. static bool tsnep_tx_poll(struct tsnep_tx *tx, int napi_budget)
  396. {
  397. struct tsnep_tx_entry *entry;
  398. struct netdev_queue *nq;
  399. unsigned long flags;
  400. int budget = 128;
  401. int length;
  402. int count;
  403. nq = netdev_get_tx_queue(tx->adapter->netdev, tx->queue_index);
  404. spin_lock_irqsave(&tx->lock, flags);
  405. do {
  406. if (tx->read == tx->write)
  407. break;
  408. entry = &tx->entry[tx->read];
  409. if ((__le32_to_cpu(entry->desc_wb->properties) &
  410. TSNEP_TX_DESC_OWNER_MASK) !=
  411. (entry->properties & TSNEP_TX_DESC_OWNER_MASK))
  412. break;
  413. /* descriptor properties shall be read first, because valid data
  414. * is signaled there
  415. */
  416. dma_rmb();
  417. count = 1;
  418. if (skb_shinfo(entry->skb)->nr_frags > 0)
  419. count += skb_shinfo(entry->skb)->nr_frags;
  420. length = tsnep_tx_unmap(tx, tx->read, count);
  421. if ((skb_shinfo(entry->skb)->tx_flags & SKBTX_IN_PROGRESS) &&
  422. (__le32_to_cpu(entry->desc_wb->properties) &
  423. TSNEP_DESC_EXTENDED_WRITEBACK_FLAG)) {
  424. struct skb_shared_hwtstamps hwtstamps;
  425. u64 timestamp;
  426. if (skb_shinfo(entry->skb)->tx_flags &
  427. SKBTX_HW_TSTAMP_USE_CYCLES)
  428. timestamp =
  429. __le64_to_cpu(entry->desc_wb->counter);
  430. else
  431. timestamp =
  432. __le64_to_cpu(entry->desc_wb->timestamp);
  433. memset(&hwtstamps, 0, sizeof(hwtstamps));
  434. hwtstamps.hwtstamp = ns_to_ktime(timestamp);
  435. skb_tstamp_tx(entry->skb, &hwtstamps);
  436. }
  437. napi_consume_skb(entry->skb, budget);
  438. entry->skb = NULL;
  439. tx->read = (tx->read + count) % TSNEP_RING_SIZE;
  440. tx->packets++;
  441. tx->bytes += length + ETH_FCS_LEN;
  442. budget--;
  443. } while (likely(budget));
  444. if ((tsnep_tx_desc_available(tx) >= ((MAX_SKB_FRAGS + 1) * 2)) &&
  445. netif_tx_queue_stopped(nq)) {
  446. netif_tx_wake_queue(nq);
  447. }
  448. spin_unlock_irqrestore(&tx->lock, flags);
  449. return (budget != 0);
  450. }
  451. static bool tsnep_tx_pending(struct tsnep_tx *tx)
  452. {
  453. unsigned long flags;
  454. struct tsnep_tx_entry *entry;
  455. bool pending = false;
  456. spin_lock_irqsave(&tx->lock, flags);
  457. if (tx->read != tx->write) {
  458. entry = &tx->entry[tx->read];
  459. if ((__le32_to_cpu(entry->desc_wb->properties) &
  460. TSNEP_TX_DESC_OWNER_MASK) ==
  461. (entry->properties & TSNEP_TX_DESC_OWNER_MASK))
  462. pending = true;
  463. }
  464. spin_unlock_irqrestore(&tx->lock, flags);
  465. return pending;
  466. }
  467. static int tsnep_tx_open(struct tsnep_adapter *adapter, void __iomem *addr,
  468. int queue_index, struct tsnep_tx *tx)
  469. {
  470. dma_addr_t dma;
  471. int retval;
  472. memset(tx, 0, sizeof(*tx));
  473. tx->adapter = adapter;
  474. tx->addr = addr;
  475. tx->queue_index = queue_index;
  476. retval = tsnep_tx_ring_init(tx);
  477. if (retval)
  478. return retval;
  479. dma = tx->entry[0].desc_dma | TSNEP_RESET_OWNER_COUNTER;
  480. iowrite32(DMA_ADDR_LOW(dma), tx->addr + TSNEP_TX_DESC_ADDR_LOW);
  481. iowrite32(DMA_ADDR_HIGH(dma), tx->addr + TSNEP_TX_DESC_ADDR_HIGH);
  482. tx->owner_counter = 1;
  483. tx->increment_owner_counter = TSNEP_RING_SIZE - 1;
  484. spin_lock_init(&tx->lock);
  485. return 0;
  486. }
  487. static void tsnep_tx_close(struct tsnep_tx *tx)
  488. {
  489. u32 val;
  490. readx_poll_timeout(ioread32, tx->addr + TSNEP_CONTROL, val,
  491. ((val & TSNEP_CONTROL_TX_ENABLE) == 0), 10000,
  492. 1000000);
  493. tsnep_tx_ring_cleanup(tx);
  494. }
  495. static void tsnep_rx_ring_cleanup(struct tsnep_rx *rx)
  496. {
  497. struct device *dmadev = rx->adapter->dmadev;
  498. struct tsnep_rx_entry *entry;
  499. int i;
  500. for (i = 0; i < TSNEP_RING_SIZE; i++) {
  501. entry = &rx->entry[i];
  502. if (entry->page)
  503. page_pool_put_full_page(rx->page_pool, entry->page,
  504. false);
  505. entry->page = NULL;
  506. }
  507. if (rx->page_pool)
  508. page_pool_destroy(rx->page_pool);
  509. memset(rx->entry, 0, sizeof(rx->entry));
  510. for (i = 0; i < TSNEP_RING_PAGE_COUNT; i++) {
  511. if (rx->page[i]) {
  512. dma_free_coherent(dmadev, PAGE_SIZE, rx->page[i],
  513. rx->page_dma[i]);
  514. rx->page[i] = NULL;
  515. rx->page_dma[i] = 0;
  516. }
  517. }
  518. }
  519. static int tsnep_rx_alloc_buffer(struct tsnep_rx *rx,
  520. struct tsnep_rx_entry *entry)
  521. {
  522. struct page *page;
  523. page = page_pool_dev_alloc_pages(rx->page_pool);
  524. if (unlikely(!page))
  525. return -ENOMEM;
  526. entry->page = page;
  527. entry->len = TSNEP_MAX_RX_BUF_SIZE;
  528. entry->dma = page_pool_get_dma_addr(entry->page);
  529. entry->desc->rx = __cpu_to_le64(entry->dma + TSNEP_SKB_PAD);
  530. return 0;
  531. }
  532. static int tsnep_rx_ring_init(struct tsnep_rx *rx)
  533. {
  534. struct device *dmadev = rx->adapter->dmadev;
  535. struct tsnep_rx_entry *entry;
  536. struct page_pool_params pp_params = { 0 };
  537. struct tsnep_rx_entry *next_entry;
  538. int i, j;
  539. int retval;
  540. for (i = 0; i < TSNEP_RING_PAGE_COUNT; i++) {
  541. rx->page[i] =
  542. dma_alloc_coherent(dmadev, PAGE_SIZE, &rx->page_dma[i],
  543. GFP_KERNEL);
  544. if (!rx->page[i]) {
  545. retval = -ENOMEM;
  546. goto failed;
  547. }
  548. for (j = 0; j < TSNEP_RING_ENTRIES_PER_PAGE; j++) {
  549. entry = &rx->entry[TSNEP_RING_ENTRIES_PER_PAGE * i + j];
  550. entry->desc_wb = (struct tsnep_rx_desc_wb *)
  551. (((u8 *)rx->page[i]) + TSNEP_DESC_SIZE * j);
  552. entry->desc = (struct tsnep_rx_desc *)
  553. (((u8 *)entry->desc_wb) + TSNEP_DESC_OFFSET);
  554. entry->desc_dma = rx->page_dma[i] + TSNEP_DESC_SIZE * j;
  555. }
  556. }
  557. pp_params.flags = PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV;
  558. pp_params.order = 0;
  559. pp_params.pool_size = TSNEP_RING_SIZE;
  560. pp_params.nid = dev_to_node(dmadev);
  561. pp_params.dev = dmadev;
  562. pp_params.dma_dir = DMA_FROM_DEVICE;
  563. pp_params.max_len = TSNEP_MAX_RX_BUF_SIZE;
  564. pp_params.offset = TSNEP_SKB_PAD;
  565. rx->page_pool = page_pool_create(&pp_params);
  566. if (IS_ERR(rx->page_pool)) {
  567. retval = PTR_ERR(rx->page_pool);
  568. rx->page_pool = NULL;
  569. goto failed;
  570. }
  571. for (i = 0; i < TSNEP_RING_SIZE; i++) {
  572. entry = &rx->entry[i];
  573. next_entry = &rx->entry[(i + 1) % TSNEP_RING_SIZE];
  574. entry->desc->next = __cpu_to_le64(next_entry->desc_dma);
  575. retval = tsnep_rx_alloc_buffer(rx, entry);
  576. if (retval)
  577. goto failed;
  578. }
  579. return 0;
  580. failed:
  581. tsnep_rx_ring_cleanup(rx);
  582. return retval;
  583. }
  584. static void tsnep_rx_activate(struct tsnep_rx *rx, int index)
  585. {
  586. struct tsnep_rx_entry *entry = &rx->entry[index];
  587. /* TSNEP_MAX_RX_BUF_SIZE is a multiple of 4 */
  588. entry->properties = entry->len & TSNEP_DESC_LENGTH_MASK;
  589. entry->properties |= TSNEP_DESC_INTERRUPT_FLAG;
  590. if (index == rx->increment_owner_counter) {
  591. rx->owner_counter++;
  592. if (rx->owner_counter == 4)
  593. rx->owner_counter = 1;
  594. rx->increment_owner_counter--;
  595. if (rx->increment_owner_counter < 0)
  596. rx->increment_owner_counter = TSNEP_RING_SIZE - 1;
  597. }
  598. entry->properties |=
  599. (rx->owner_counter << TSNEP_DESC_OWNER_COUNTER_SHIFT) &
  600. TSNEP_DESC_OWNER_COUNTER_MASK;
  601. /* descriptor properties shall be written last, because valid data is
  602. * signaled there
  603. */
  604. dma_wmb();
  605. entry->desc->properties = __cpu_to_le32(entry->properties);
  606. }
  607. static struct sk_buff *tsnep_build_skb(struct tsnep_rx *rx, struct page *page,
  608. int length)
  609. {
  610. struct sk_buff *skb;
  611. skb = napi_build_skb(page_address(page), PAGE_SIZE);
  612. if (unlikely(!skb))
  613. return NULL;
  614. /* update pointers within the skb to store the data */
  615. skb_reserve(skb, TSNEP_SKB_PAD + TSNEP_RX_INLINE_METADATA_SIZE);
  616. __skb_put(skb, length - TSNEP_RX_INLINE_METADATA_SIZE - ETH_FCS_LEN);
  617. if (rx->adapter->hwtstamp_config.rx_filter == HWTSTAMP_FILTER_ALL) {
  618. struct skb_shared_hwtstamps *hwtstamps = skb_hwtstamps(skb);
  619. struct tsnep_rx_inline *rx_inline =
  620. (struct tsnep_rx_inline *)(page_address(page) +
  621. TSNEP_SKB_PAD);
  622. skb_shinfo(skb)->tx_flags |=
  623. SKBTX_HW_TSTAMP_NETDEV;
  624. memset(hwtstamps, 0, sizeof(*hwtstamps));
  625. hwtstamps->netdev_data = rx_inline;
  626. }
  627. skb_record_rx_queue(skb, rx->queue_index);
  628. skb->protocol = eth_type_trans(skb, rx->adapter->netdev);
  629. return skb;
  630. }
  631. static int tsnep_rx_poll(struct tsnep_rx *rx, struct napi_struct *napi,
  632. int budget)
  633. {
  634. struct device *dmadev = rx->adapter->dmadev;
  635. int done = 0;
  636. enum dma_data_direction dma_dir;
  637. struct tsnep_rx_entry *entry;
  638. struct page *page;
  639. struct sk_buff *skb;
  640. int length;
  641. bool enable = false;
  642. int retval;
  643. dma_dir = page_pool_get_dma_dir(rx->page_pool);
  644. while (likely(done < budget)) {
  645. entry = &rx->entry[rx->read];
  646. if ((__le32_to_cpu(entry->desc_wb->properties) &
  647. TSNEP_DESC_OWNER_COUNTER_MASK) !=
  648. (entry->properties & TSNEP_DESC_OWNER_COUNTER_MASK))
  649. break;
  650. /* descriptor properties shall be read first, because valid data
  651. * is signaled there
  652. */
  653. dma_rmb();
  654. prefetch(page_address(entry->page) + TSNEP_SKB_PAD);
  655. length = __le32_to_cpu(entry->desc_wb->properties) &
  656. TSNEP_DESC_LENGTH_MASK;
  657. dma_sync_single_range_for_cpu(dmadev, entry->dma, TSNEP_SKB_PAD,
  658. length, dma_dir);
  659. page = entry->page;
  660. /* forward skb only if allocation is successful, otherwise
  661. * page is reused and frame dropped
  662. */
  663. retval = tsnep_rx_alloc_buffer(rx, entry);
  664. if (!retval) {
  665. skb = tsnep_build_skb(rx, page, length);
  666. if (skb) {
  667. page_pool_release_page(rx->page_pool, page);
  668. rx->packets++;
  669. rx->bytes += length -
  670. TSNEP_RX_INLINE_METADATA_SIZE;
  671. if (skb->pkt_type == PACKET_MULTICAST)
  672. rx->multicast++;
  673. napi_gro_receive(napi, skb);
  674. } else {
  675. page_pool_recycle_direct(rx->page_pool, page);
  676. rx->dropped++;
  677. }
  678. done++;
  679. } else {
  680. rx->dropped++;
  681. }
  682. tsnep_rx_activate(rx, rx->read);
  683. enable = true;
  684. rx->read = (rx->read + 1) % TSNEP_RING_SIZE;
  685. }
  686. if (enable) {
  687. /* descriptor properties shall be valid before hardware is
  688. * notified
  689. */
  690. dma_wmb();
  691. iowrite32(TSNEP_CONTROL_RX_ENABLE, rx->addr + TSNEP_CONTROL);
  692. }
  693. return done;
  694. }
  695. static bool tsnep_rx_pending(struct tsnep_rx *rx)
  696. {
  697. struct tsnep_rx_entry *entry;
  698. entry = &rx->entry[rx->read];
  699. if ((__le32_to_cpu(entry->desc_wb->properties) &
  700. TSNEP_DESC_OWNER_COUNTER_MASK) ==
  701. (entry->properties & TSNEP_DESC_OWNER_COUNTER_MASK))
  702. return true;
  703. return false;
  704. }
  705. static int tsnep_rx_open(struct tsnep_adapter *adapter, void __iomem *addr,
  706. int queue_index, struct tsnep_rx *rx)
  707. {
  708. dma_addr_t dma;
  709. int i;
  710. int retval;
  711. memset(rx, 0, sizeof(*rx));
  712. rx->adapter = adapter;
  713. rx->addr = addr;
  714. rx->queue_index = queue_index;
  715. retval = tsnep_rx_ring_init(rx);
  716. if (retval)
  717. return retval;
  718. dma = rx->entry[0].desc_dma | TSNEP_RESET_OWNER_COUNTER;
  719. iowrite32(DMA_ADDR_LOW(dma), rx->addr + TSNEP_RX_DESC_ADDR_LOW);
  720. iowrite32(DMA_ADDR_HIGH(dma), rx->addr + TSNEP_RX_DESC_ADDR_HIGH);
  721. rx->owner_counter = 1;
  722. rx->increment_owner_counter = TSNEP_RING_SIZE - 1;
  723. for (i = 0; i < TSNEP_RING_SIZE; i++)
  724. tsnep_rx_activate(rx, i);
  725. /* descriptor properties shall be valid before hardware is notified */
  726. dma_wmb();
  727. iowrite32(TSNEP_CONTROL_RX_ENABLE, rx->addr + TSNEP_CONTROL);
  728. return 0;
  729. }
  730. static void tsnep_rx_close(struct tsnep_rx *rx)
  731. {
  732. u32 val;
  733. iowrite32(TSNEP_CONTROL_RX_DISABLE, rx->addr + TSNEP_CONTROL);
  734. readx_poll_timeout(ioread32, rx->addr + TSNEP_CONTROL, val,
  735. ((val & TSNEP_CONTROL_RX_ENABLE) == 0), 10000,
  736. 1000000);
  737. tsnep_rx_ring_cleanup(rx);
  738. }
  739. static bool tsnep_pending(struct tsnep_queue *queue)
  740. {
  741. if (queue->tx && tsnep_tx_pending(queue->tx))
  742. return true;
  743. if (queue->rx && tsnep_rx_pending(queue->rx))
  744. return true;
  745. return false;
  746. }
  747. static int tsnep_poll(struct napi_struct *napi, int budget)
  748. {
  749. struct tsnep_queue *queue = container_of(napi, struct tsnep_queue,
  750. napi);
  751. bool complete = true;
  752. int done = 0;
  753. if (queue->tx)
  754. complete = tsnep_tx_poll(queue->tx, budget);
  755. /* handle case where we are called by netpoll with a budget of 0 */
  756. if (unlikely(budget <= 0))
  757. return budget;
  758. if (queue->rx) {
  759. done = tsnep_rx_poll(queue->rx, napi, budget);
  760. if (done >= budget)
  761. complete = false;
  762. }
  763. /* if all work not completed, return budget and keep polling */
  764. if (!complete)
  765. return budget;
  766. if (likely(napi_complete_done(napi, done))) {
  767. tsnep_enable_irq(queue->adapter, queue->irq_mask);
  768. /* reschedule if work is already pending, prevent rotten packets
  769. * which are transmitted or received after polling but before
  770. * interrupt enable
  771. */
  772. if (tsnep_pending(queue)) {
  773. tsnep_disable_irq(queue->adapter, queue->irq_mask);
  774. napi_schedule(napi);
  775. }
  776. }
  777. return min(done, budget - 1);
  778. }
  779. static int tsnep_request_irq(struct tsnep_queue *queue, bool first)
  780. {
  781. const char *name = netdev_name(queue->adapter->netdev);
  782. irq_handler_t handler;
  783. void *dev;
  784. int retval;
  785. if (first) {
  786. sprintf(queue->name, "%s-mac", name);
  787. handler = tsnep_irq;
  788. dev = queue->adapter;
  789. } else {
  790. if (queue->tx && queue->rx)
  791. snprintf(queue->name, sizeof(queue->name), "%s-txrx-%d",
  792. name, queue->rx->queue_index);
  793. else if (queue->tx)
  794. snprintf(queue->name, sizeof(queue->name), "%s-tx-%d",
  795. name, queue->tx->queue_index);
  796. else
  797. snprintf(queue->name, sizeof(queue->name), "%s-rx-%d",
  798. name, queue->rx->queue_index);
  799. handler = tsnep_irq_txrx;
  800. dev = queue;
  801. }
  802. retval = request_irq(queue->irq, handler, 0, queue->name, dev);
  803. if (retval) {
  804. /* if name is empty, then interrupt won't be freed */
  805. memset(queue->name, 0, sizeof(queue->name));
  806. }
  807. return retval;
  808. }
  809. static void tsnep_free_irq(struct tsnep_queue *queue, bool first)
  810. {
  811. void *dev;
  812. if (!strlen(queue->name))
  813. return;
  814. if (first)
  815. dev = queue->adapter;
  816. else
  817. dev = queue;
  818. free_irq(queue->irq, dev);
  819. memset(queue->name, 0, sizeof(queue->name));
  820. }
  821. static int tsnep_netdev_open(struct net_device *netdev)
  822. {
  823. struct tsnep_adapter *adapter = netdev_priv(netdev);
  824. int i;
  825. void __iomem *addr;
  826. int tx_queue_index = 0;
  827. int rx_queue_index = 0;
  828. int retval;
  829. for (i = 0; i < adapter->num_queues; i++) {
  830. adapter->queue[i].adapter = adapter;
  831. if (adapter->queue[i].tx) {
  832. addr = adapter->addr + TSNEP_QUEUE(tx_queue_index);
  833. retval = tsnep_tx_open(adapter, addr, tx_queue_index,
  834. adapter->queue[i].tx);
  835. if (retval)
  836. goto failed;
  837. tx_queue_index++;
  838. }
  839. if (adapter->queue[i].rx) {
  840. addr = adapter->addr + TSNEP_QUEUE(rx_queue_index);
  841. retval = tsnep_rx_open(adapter, addr,
  842. rx_queue_index,
  843. adapter->queue[i].rx);
  844. if (retval)
  845. goto failed;
  846. rx_queue_index++;
  847. }
  848. retval = tsnep_request_irq(&adapter->queue[i], i == 0);
  849. if (retval) {
  850. netif_err(adapter, drv, adapter->netdev,
  851. "can't get assigned irq %d.\n",
  852. adapter->queue[i].irq);
  853. goto failed;
  854. }
  855. }
  856. retval = netif_set_real_num_tx_queues(adapter->netdev,
  857. adapter->num_tx_queues);
  858. if (retval)
  859. goto failed;
  860. retval = netif_set_real_num_rx_queues(adapter->netdev,
  861. adapter->num_rx_queues);
  862. if (retval)
  863. goto failed;
  864. tsnep_enable_irq(adapter, ECM_INT_LINK);
  865. retval = tsnep_phy_open(adapter);
  866. if (retval)
  867. goto phy_failed;
  868. for (i = 0; i < adapter->num_queues; i++) {
  869. netif_napi_add(adapter->netdev, &adapter->queue[i].napi,
  870. tsnep_poll);
  871. napi_enable(&adapter->queue[i].napi);
  872. tsnep_enable_irq(adapter, adapter->queue[i].irq_mask);
  873. }
  874. return 0;
  875. phy_failed:
  876. tsnep_disable_irq(adapter, ECM_INT_LINK);
  877. tsnep_phy_close(adapter);
  878. failed:
  879. for (i = 0; i < adapter->num_queues; i++) {
  880. tsnep_free_irq(&adapter->queue[i], i == 0);
  881. if (adapter->queue[i].rx)
  882. tsnep_rx_close(adapter->queue[i].rx);
  883. if (adapter->queue[i].tx)
  884. tsnep_tx_close(adapter->queue[i].tx);
  885. }
  886. return retval;
  887. }
  888. static int tsnep_netdev_close(struct net_device *netdev)
  889. {
  890. struct tsnep_adapter *adapter = netdev_priv(netdev);
  891. int i;
  892. tsnep_disable_irq(adapter, ECM_INT_LINK);
  893. tsnep_phy_close(adapter);
  894. for (i = 0; i < adapter->num_queues; i++) {
  895. tsnep_disable_irq(adapter, adapter->queue[i].irq_mask);
  896. napi_disable(&adapter->queue[i].napi);
  897. netif_napi_del(&adapter->queue[i].napi);
  898. tsnep_free_irq(&adapter->queue[i], i == 0);
  899. if (adapter->queue[i].rx)
  900. tsnep_rx_close(adapter->queue[i].rx);
  901. if (adapter->queue[i].tx)
  902. tsnep_tx_close(adapter->queue[i].tx);
  903. }
  904. return 0;
  905. }
  906. static netdev_tx_t tsnep_netdev_xmit_frame(struct sk_buff *skb,
  907. struct net_device *netdev)
  908. {
  909. struct tsnep_adapter *adapter = netdev_priv(netdev);
  910. u16 queue_mapping = skb_get_queue_mapping(skb);
  911. if (queue_mapping >= adapter->num_tx_queues)
  912. queue_mapping = 0;
  913. return tsnep_xmit_frame_ring(skb, &adapter->tx[queue_mapping]);
  914. }
  915. static int tsnep_netdev_ioctl(struct net_device *netdev, struct ifreq *ifr,
  916. int cmd)
  917. {
  918. if (!netif_running(netdev))
  919. return -EINVAL;
  920. if (cmd == SIOCSHWTSTAMP || cmd == SIOCGHWTSTAMP)
  921. return tsnep_ptp_ioctl(netdev, ifr, cmd);
  922. return phy_mii_ioctl(netdev->phydev, ifr, cmd);
  923. }
  924. static void tsnep_netdev_set_multicast(struct net_device *netdev)
  925. {
  926. struct tsnep_adapter *adapter = netdev_priv(netdev);
  927. u16 rx_filter = 0;
  928. /* configured MAC address and broadcasts are never filtered */
  929. if (netdev->flags & IFF_PROMISC) {
  930. rx_filter |= TSNEP_RX_FILTER_ACCEPT_ALL_MULTICASTS;
  931. rx_filter |= TSNEP_RX_FILTER_ACCEPT_ALL_UNICASTS;
  932. } else if (!netdev_mc_empty(netdev) || (netdev->flags & IFF_ALLMULTI)) {
  933. rx_filter |= TSNEP_RX_FILTER_ACCEPT_ALL_MULTICASTS;
  934. }
  935. iowrite16(rx_filter, adapter->addr + TSNEP_RX_FILTER);
  936. }
  937. static void tsnep_netdev_get_stats64(struct net_device *netdev,
  938. struct rtnl_link_stats64 *stats)
  939. {
  940. struct tsnep_adapter *adapter = netdev_priv(netdev);
  941. u32 reg;
  942. u32 val;
  943. int i;
  944. for (i = 0; i < adapter->num_tx_queues; i++) {
  945. stats->tx_packets += adapter->tx[i].packets;
  946. stats->tx_bytes += adapter->tx[i].bytes;
  947. stats->tx_dropped += adapter->tx[i].dropped;
  948. }
  949. for (i = 0; i < adapter->num_rx_queues; i++) {
  950. stats->rx_packets += adapter->rx[i].packets;
  951. stats->rx_bytes += adapter->rx[i].bytes;
  952. stats->rx_dropped += adapter->rx[i].dropped;
  953. stats->multicast += adapter->rx[i].multicast;
  954. reg = ioread32(adapter->addr + TSNEP_QUEUE(i) +
  955. TSNEP_RX_STATISTIC);
  956. val = (reg & TSNEP_RX_STATISTIC_NO_DESC_MASK) >>
  957. TSNEP_RX_STATISTIC_NO_DESC_SHIFT;
  958. stats->rx_dropped += val;
  959. val = (reg & TSNEP_RX_STATISTIC_BUFFER_TOO_SMALL_MASK) >>
  960. TSNEP_RX_STATISTIC_BUFFER_TOO_SMALL_SHIFT;
  961. stats->rx_dropped += val;
  962. val = (reg & TSNEP_RX_STATISTIC_FIFO_OVERFLOW_MASK) >>
  963. TSNEP_RX_STATISTIC_FIFO_OVERFLOW_SHIFT;
  964. stats->rx_errors += val;
  965. stats->rx_fifo_errors += val;
  966. val = (reg & TSNEP_RX_STATISTIC_INVALID_FRAME_MASK) >>
  967. TSNEP_RX_STATISTIC_INVALID_FRAME_SHIFT;
  968. stats->rx_errors += val;
  969. stats->rx_frame_errors += val;
  970. }
  971. reg = ioread32(adapter->addr + ECM_STAT);
  972. val = (reg & ECM_STAT_RX_ERR_MASK) >> ECM_STAT_RX_ERR_SHIFT;
  973. stats->rx_errors += val;
  974. val = (reg & ECM_STAT_INV_FRM_MASK) >> ECM_STAT_INV_FRM_SHIFT;
  975. stats->rx_errors += val;
  976. stats->rx_crc_errors += val;
  977. val = (reg & ECM_STAT_FWD_RX_ERR_MASK) >> ECM_STAT_FWD_RX_ERR_SHIFT;
  978. stats->rx_errors += val;
  979. }
  980. static void tsnep_mac_set_address(struct tsnep_adapter *adapter, u8 *addr)
  981. {
  982. iowrite32(*(u32 *)addr, adapter->addr + TSNEP_MAC_ADDRESS_LOW);
  983. iowrite16(*(u16 *)(addr + sizeof(u32)),
  984. adapter->addr + TSNEP_MAC_ADDRESS_HIGH);
  985. ether_addr_copy(adapter->mac_address, addr);
  986. netif_info(adapter, drv, adapter->netdev, "MAC address set to %pM\n",
  987. addr);
  988. }
  989. static int tsnep_netdev_set_mac_address(struct net_device *netdev, void *addr)
  990. {
  991. struct tsnep_adapter *adapter = netdev_priv(netdev);
  992. struct sockaddr *sock_addr = addr;
  993. int retval;
  994. retval = eth_prepare_mac_addr_change(netdev, sock_addr);
  995. if (retval)
  996. return retval;
  997. eth_hw_addr_set(netdev, sock_addr->sa_data);
  998. tsnep_mac_set_address(adapter, sock_addr->sa_data);
  999. return 0;
  1000. }
  1001. static int tsnep_netdev_set_features(struct net_device *netdev,
  1002. netdev_features_t features)
  1003. {
  1004. struct tsnep_adapter *adapter = netdev_priv(netdev);
  1005. netdev_features_t changed = netdev->features ^ features;
  1006. bool enable;
  1007. int retval = 0;
  1008. if (changed & NETIF_F_LOOPBACK) {
  1009. enable = !!(features & NETIF_F_LOOPBACK);
  1010. retval = tsnep_phy_loopback(adapter, enable);
  1011. }
  1012. return retval;
  1013. }
  1014. static ktime_t tsnep_netdev_get_tstamp(struct net_device *netdev,
  1015. const struct skb_shared_hwtstamps *hwtstamps,
  1016. bool cycles)
  1017. {
  1018. struct tsnep_rx_inline *rx_inline = hwtstamps->netdev_data;
  1019. u64 timestamp;
  1020. if (cycles)
  1021. timestamp = __le64_to_cpu(rx_inline->counter);
  1022. else
  1023. timestamp = __le64_to_cpu(rx_inline->timestamp);
  1024. return ns_to_ktime(timestamp);
  1025. }
  1026. static const struct net_device_ops tsnep_netdev_ops = {
  1027. .ndo_open = tsnep_netdev_open,
  1028. .ndo_stop = tsnep_netdev_close,
  1029. .ndo_start_xmit = tsnep_netdev_xmit_frame,
  1030. .ndo_eth_ioctl = tsnep_netdev_ioctl,
  1031. .ndo_set_rx_mode = tsnep_netdev_set_multicast,
  1032. .ndo_get_stats64 = tsnep_netdev_get_stats64,
  1033. .ndo_set_mac_address = tsnep_netdev_set_mac_address,
  1034. .ndo_set_features = tsnep_netdev_set_features,
  1035. .ndo_get_tstamp = tsnep_netdev_get_tstamp,
  1036. .ndo_setup_tc = tsnep_tc_setup,
  1037. };
  1038. static int tsnep_mac_init(struct tsnep_adapter *adapter)
  1039. {
  1040. int retval;
  1041. /* initialize RX filtering, at least configured MAC address and
  1042. * broadcast are not filtered
  1043. */
  1044. iowrite16(0, adapter->addr + TSNEP_RX_FILTER);
  1045. /* try to get MAC address in the following order:
  1046. * - device tree
  1047. * - valid MAC address already set
  1048. * - MAC address register if valid
  1049. * - random MAC address
  1050. */
  1051. retval = of_get_mac_address(adapter->pdev->dev.of_node,
  1052. adapter->mac_address);
  1053. if (retval == -EPROBE_DEFER)
  1054. return retval;
  1055. if (retval && !is_valid_ether_addr(adapter->mac_address)) {
  1056. *(u32 *)adapter->mac_address =
  1057. ioread32(adapter->addr + TSNEP_MAC_ADDRESS_LOW);
  1058. *(u16 *)(adapter->mac_address + sizeof(u32)) =
  1059. ioread16(adapter->addr + TSNEP_MAC_ADDRESS_HIGH);
  1060. if (!is_valid_ether_addr(adapter->mac_address))
  1061. eth_random_addr(adapter->mac_address);
  1062. }
  1063. tsnep_mac_set_address(adapter, adapter->mac_address);
  1064. eth_hw_addr_set(adapter->netdev, adapter->mac_address);
  1065. return 0;
  1066. }
  1067. static int tsnep_mdio_init(struct tsnep_adapter *adapter)
  1068. {
  1069. struct device_node *np = adapter->pdev->dev.of_node;
  1070. int retval;
  1071. if (np) {
  1072. np = of_get_child_by_name(np, "mdio");
  1073. if (!np)
  1074. return 0;
  1075. adapter->suppress_preamble =
  1076. of_property_read_bool(np, "suppress-preamble");
  1077. }
  1078. adapter->mdiobus = devm_mdiobus_alloc(&adapter->pdev->dev);
  1079. if (!adapter->mdiobus) {
  1080. retval = -ENOMEM;
  1081. goto out;
  1082. }
  1083. adapter->mdiobus->priv = (void *)adapter;
  1084. adapter->mdiobus->parent = &adapter->pdev->dev;
  1085. adapter->mdiobus->read = tsnep_mdiobus_read;
  1086. adapter->mdiobus->write = tsnep_mdiobus_write;
  1087. adapter->mdiobus->name = TSNEP "-mdiobus";
  1088. snprintf(adapter->mdiobus->id, MII_BUS_ID_SIZE, "%s",
  1089. adapter->pdev->name);
  1090. /* do not scan broadcast address */
  1091. adapter->mdiobus->phy_mask = 0x0000001;
  1092. retval = of_mdiobus_register(adapter->mdiobus, np);
  1093. out:
  1094. of_node_put(np);
  1095. return retval;
  1096. }
  1097. static int tsnep_phy_init(struct tsnep_adapter *adapter)
  1098. {
  1099. struct device_node *phy_node;
  1100. int retval;
  1101. retval = of_get_phy_mode(adapter->pdev->dev.of_node,
  1102. &adapter->phy_mode);
  1103. if (retval)
  1104. adapter->phy_mode = PHY_INTERFACE_MODE_GMII;
  1105. phy_node = of_parse_phandle(adapter->pdev->dev.of_node, "phy-handle",
  1106. 0);
  1107. adapter->phydev = of_phy_find_device(phy_node);
  1108. of_node_put(phy_node);
  1109. if (!adapter->phydev && adapter->mdiobus)
  1110. adapter->phydev = phy_find_first(adapter->mdiobus);
  1111. if (!adapter->phydev)
  1112. return -EIO;
  1113. return 0;
  1114. }
  1115. static int tsnep_queue_init(struct tsnep_adapter *adapter, int queue_count)
  1116. {
  1117. u32 irq_mask = ECM_INT_TX_0 | ECM_INT_RX_0;
  1118. char name[8];
  1119. int i;
  1120. int retval;
  1121. /* one TX/RX queue pair for netdev is mandatory */
  1122. if (platform_irq_count(adapter->pdev) == 1)
  1123. retval = platform_get_irq(adapter->pdev, 0);
  1124. else
  1125. retval = platform_get_irq_byname(adapter->pdev, "mac");
  1126. if (retval < 0)
  1127. return retval;
  1128. adapter->num_tx_queues = 1;
  1129. adapter->num_rx_queues = 1;
  1130. adapter->num_queues = 1;
  1131. adapter->queue[0].irq = retval;
  1132. adapter->queue[0].tx = &adapter->tx[0];
  1133. adapter->queue[0].rx = &adapter->rx[0];
  1134. adapter->queue[0].irq_mask = irq_mask;
  1135. adapter->netdev->irq = adapter->queue[0].irq;
  1136. /* add additional TX/RX queue pairs only if dedicated interrupt is
  1137. * available
  1138. */
  1139. for (i = 1; i < queue_count; i++) {
  1140. sprintf(name, "txrx-%d", i);
  1141. retval = platform_get_irq_byname_optional(adapter->pdev, name);
  1142. if (retval < 0)
  1143. break;
  1144. adapter->num_tx_queues++;
  1145. adapter->num_rx_queues++;
  1146. adapter->num_queues++;
  1147. adapter->queue[i].irq = retval;
  1148. adapter->queue[i].tx = &adapter->tx[i];
  1149. adapter->queue[i].rx = &adapter->rx[i];
  1150. adapter->queue[i].irq_mask =
  1151. irq_mask << (ECM_INT_TXRX_SHIFT * i);
  1152. }
  1153. return 0;
  1154. }
  1155. static int tsnep_probe(struct platform_device *pdev)
  1156. {
  1157. struct tsnep_adapter *adapter;
  1158. struct net_device *netdev;
  1159. struct resource *io;
  1160. u32 type;
  1161. int revision;
  1162. int version;
  1163. int queue_count;
  1164. int retval;
  1165. netdev = devm_alloc_etherdev_mqs(&pdev->dev,
  1166. sizeof(struct tsnep_adapter),
  1167. TSNEP_MAX_QUEUES, TSNEP_MAX_QUEUES);
  1168. if (!netdev)
  1169. return -ENODEV;
  1170. SET_NETDEV_DEV(netdev, &pdev->dev);
  1171. adapter = netdev_priv(netdev);
  1172. platform_set_drvdata(pdev, adapter);
  1173. adapter->pdev = pdev;
  1174. adapter->dmadev = &pdev->dev;
  1175. adapter->netdev = netdev;
  1176. adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE |
  1177. NETIF_MSG_LINK | NETIF_MSG_IFUP |
  1178. NETIF_MSG_IFDOWN | NETIF_MSG_TX_QUEUED;
  1179. netdev->min_mtu = ETH_MIN_MTU;
  1180. netdev->max_mtu = TSNEP_MAX_FRAME_SIZE;
  1181. mutex_init(&adapter->gate_control_lock);
  1182. mutex_init(&adapter->rxnfc_lock);
  1183. INIT_LIST_HEAD(&adapter->rxnfc_rules);
  1184. io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1185. adapter->addr = devm_ioremap_resource(&pdev->dev, io);
  1186. if (IS_ERR(adapter->addr))
  1187. return PTR_ERR(adapter->addr);
  1188. netdev->mem_start = io->start;
  1189. netdev->mem_end = io->end;
  1190. type = ioread32(adapter->addr + ECM_TYPE);
  1191. revision = (type & ECM_REVISION_MASK) >> ECM_REVISION_SHIFT;
  1192. version = (type & ECM_VERSION_MASK) >> ECM_VERSION_SHIFT;
  1193. queue_count = (type & ECM_QUEUE_COUNT_MASK) >> ECM_QUEUE_COUNT_SHIFT;
  1194. adapter->gate_control = type & ECM_GATE_CONTROL;
  1195. adapter->rxnfc_max = TSNEP_RX_ASSIGN_ETHER_TYPE_COUNT;
  1196. tsnep_disable_irq(adapter, ECM_INT_ALL);
  1197. retval = tsnep_queue_init(adapter, queue_count);
  1198. if (retval)
  1199. return retval;
  1200. retval = dma_set_mask_and_coherent(&adapter->pdev->dev,
  1201. DMA_BIT_MASK(64));
  1202. if (retval) {
  1203. dev_err(&adapter->pdev->dev, "no usable DMA configuration.\n");
  1204. return retval;
  1205. }
  1206. retval = tsnep_mac_init(adapter);
  1207. if (retval)
  1208. return retval;
  1209. retval = tsnep_mdio_init(adapter);
  1210. if (retval)
  1211. goto mdio_init_failed;
  1212. retval = tsnep_phy_init(adapter);
  1213. if (retval)
  1214. goto phy_init_failed;
  1215. retval = tsnep_ptp_init(adapter);
  1216. if (retval)
  1217. goto ptp_init_failed;
  1218. retval = tsnep_tc_init(adapter);
  1219. if (retval)
  1220. goto tc_init_failed;
  1221. retval = tsnep_rxnfc_init(adapter);
  1222. if (retval)
  1223. goto rxnfc_init_failed;
  1224. netdev->netdev_ops = &tsnep_netdev_ops;
  1225. netdev->ethtool_ops = &tsnep_ethtool_ops;
  1226. netdev->features = NETIF_F_SG;
  1227. netdev->hw_features = netdev->features | NETIF_F_LOOPBACK;
  1228. /* carrier off reporting is important to ethtool even BEFORE open */
  1229. netif_carrier_off(netdev);
  1230. retval = register_netdev(netdev);
  1231. if (retval)
  1232. goto register_failed;
  1233. dev_info(&adapter->pdev->dev, "device version %d.%02d\n", version,
  1234. revision);
  1235. if (adapter->gate_control)
  1236. dev_info(&adapter->pdev->dev, "gate control detected\n");
  1237. return 0;
  1238. register_failed:
  1239. tsnep_rxnfc_cleanup(adapter);
  1240. rxnfc_init_failed:
  1241. tsnep_tc_cleanup(adapter);
  1242. tc_init_failed:
  1243. tsnep_ptp_cleanup(adapter);
  1244. ptp_init_failed:
  1245. phy_init_failed:
  1246. if (adapter->mdiobus)
  1247. mdiobus_unregister(adapter->mdiobus);
  1248. mdio_init_failed:
  1249. return retval;
  1250. }
  1251. static int tsnep_remove(struct platform_device *pdev)
  1252. {
  1253. struct tsnep_adapter *adapter = platform_get_drvdata(pdev);
  1254. unregister_netdev(adapter->netdev);
  1255. tsnep_rxnfc_cleanup(adapter);
  1256. tsnep_tc_cleanup(adapter);
  1257. tsnep_ptp_cleanup(adapter);
  1258. if (adapter->mdiobus)
  1259. mdiobus_unregister(adapter->mdiobus);
  1260. tsnep_disable_irq(adapter, ECM_INT_ALL);
  1261. return 0;
  1262. }
  1263. static const struct of_device_id tsnep_of_match[] = {
  1264. { .compatible = "engleder,tsnep", },
  1265. { },
  1266. };
  1267. MODULE_DEVICE_TABLE(of, tsnep_of_match);
  1268. static struct platform_driver tsnep_driver = {
  1269. .driver = {
  1270. .name = TSNEP,
  1271. .of_match_table = tsnep_of_match,
  1272. },
  1273. .probe = tsnep_probe,
  1274. .remove = tsnep_remove,
  1275. };
  1276. module_platform_driver(tsnep_driver);
  1277. MODULE_AUTHOR("Gerhard Engleder <[email protected]>");
  1278. MODULE_DESCRIPTION("TSN endpoint Ethernet MAC driver");
  1279. MODULE_LICENSE("GPL");