au1000_eth.h 2.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. *
  4. * Alchemy Au1x00 ethernet driver include file
  5. *
  6. * Author: Pete Popov <[email protected]>
  7. *
  8. * Copyright 2001 MontaVista Software Inc.
  9. */
  10. #define MAC_IOSIZE 0x10000
  11. #define NUM_RX_DMA 4 /* Au1x00 has 4 rx hardware descriptors */
  12. #define NUM_TX_DMA 4 /* Au1x00 has 4 tx hardware descriptors */
  13. #define NUM_RX_BUFFS 4
  14. #define NUM_TX_BUFFS 4
  15. #define MAX_BUF_SIZE 2048
  16. #define ETH_TX_TIMEOUT (HZ/4)
  17. #define MAC_MIN_PKT_SIZE 64
  18. #define MULTICAST_FILTER_LIMIT 64
  19. /*
  20. * Data Buffer Descriptor. Data buffers must be aligned on 32 byte
  21. * boundary for both, receive and transmit.
  22. */
  23. struct db_dest {
  24. struct db_dest *pnext;
  25. u32 *vaddr;
  26. dma_addr_t dma_addr;
  27. };
  28. /*
  29. * The transmit and receive descriptors are memory
  30. * mapped registers.
  31. */
  32. struct tx_dma {
  33. u32 status;
  34. u32 buff_stat;
  35. u32 len;
  36. u32 pad;
  37. };
  38. struct rx_dma {
  39. u32 status;
  40. u32 buff_stat;
  41. u32 pad[2];
  42. };
  43. /*
  44. * MAC control registers, memory mapped.
  45. */
  46. struct mac_reg {
  47. u32 control;
  48. u32 mac_addr_high;
  49. u32 mac_addr_low;
  50. u32 multi_hash_high;
  51. u32 multi_hash_low;
  52. u32 mii_control;
  53. u32 mii_data;
  54. u32 flow_control;
  55. u32 vlan1_tag;
  56. u32 vlan2_tag;
  57. };
  58. struct au1000_private {
  59. struct db_dest *pDBfree;
  60. struct db_dest db[NUM_RX_BUFFS+NUM_TX_BUFFS];
  61. struct rx_dma *rx_dma_ring[NUM_RX_DMA];
  62. struct tx_dma *tx_dma_ring[NUM_TX_DMA];
  63. struct db_dest *rx_db_inuse[NUM_RX_DMA];
  64. struct db_dest *tx_db_inuse[NUM_TX_DMA];
  65. u32 rx_head;
  66. u32 tx_head;
  67. u32 tx_tail;
  68. u32 tx_full;
  69. int mac_id;
  70. int mac_enabled; /* whether MAC is currently enabled and running
  71. * (req. for mdio)
  72. */
  73. int old_link; /* used by au1000_adjust_link */
  74. int old_speed;
  75. int old_duplex;
  76. struct mii_bus *mii_bus;
  77. /* PHY configuration */
  78. int phy_static_config;
  79. int phy_search_highest_addr;
  80. int phy1_search_mac0;
  81. int phy_addr;
  82. int phy_busid;
  83. int phy_irq;
  84. /* These variables are just for quick access
  85. * to certain regs addresses.
  86. */
  87. struct mac_reg *mac; /* mac registers */
  88. u32 *enable; /* address of MAC Enable Register */
  89. void __iomem *macdma; /* base of MAC DMA port */
  90. void *vaddr; /* virtual address of rx/tx buffers */
  91. dma_addr_t dma_addr; /* dma address of rx/tx buffers */
  92. spinlock_t lock; /* Serialise access to device */
  93. u32 msg_enable;
  94. };