intel_soc_pmic_chtwc.c 7.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * MFD core driver for Intel Cherrytrail Whiskey Cove PMIC
  4. *
  5. * Copyright (C) 2017 Hans de Goede <[email protected]>
  6. *
  7. * Based on various non upstream patches to support the CHT Whiskey Cove PMIC:
  8. * Copyright (C) 2013-2015 Intel Corporation. All rights reserved.
  9. */
  10. #include <linux/acpi.h>
  11. #include <linux/delay.h>
  12. #include <linux/dmi.h>
  13. #include <linux/err.h>
  14. #include <linux/i2c.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel.h>
  17. #include <linux/mfd/core.h>
  18. #include <linux/mfd/intel_soc_pmic.h>
  19. #include <linux/regmap.h>
  20. /* PMIC device registers */
  21. #define REG_OFFSET_MASK GENMASK(7, 0)
  22. #define REG_ADDR_MASK GENMASK(15, 8)
  23. #define REG_ADDR_SHIFT 8
  24. #define CHT_WC_IRQLVL1 0x6e02
  25. #define CHT_WC_IRQLVL1_MASK 0x6e0e
  26. /* Whiskey Cove PMIC share same ACPI ID between different platforms */
  27. #define CHT_WC_HRV 3
  28. /* Level 1 IRQs (level 2 IRQs are handled in the child device drivers) */
  29. enum {
  30. CHT_WC_PWRSRC_IRQ = 0,
  31. CHT_WC_THRM_IRQ,
  32. CHT_WC_BCU_IRQ,
  33. CHT_WC_ADC_IRQ,
  34. CHT_WC_EXT_CHGR_IRQ,
  35. CHT_WC_GPIO_IRQ,
  36. /* There is no irq 6 */
  37. CHT_WC_CRIT_IRQ = 7,
  38. };
  39. static const struct resource cht_wc_pwrsrc_resources[] = {
  40. DEFINE_RES_IRQ(CHT_WC_PWRSRC_IRQ),
  41. };
  42. static const struct resource cht_wc_ext_charger_resources[] = {
  43. DEFINE_RES_IRQ(CHT_WC_EXT_CHGR_IRQ),
  44. };
  45. static struct mfd_cell cht_wc_dev[] = {
  46. {
  47. .name = "cht_wcove_pwrsrc",
  48. .num_resources = ARRAY_SIZE(cht_wc_pwrsrc_resources),
  49. .resources = cht_wc_pwrsrc_resources,
  50. }, {
  51. .name = "cht_wcove_ext_chgr",
  52. .num_resources = ARRAY_SIZE(cht_wc_ext_charger_resources),
  53. .resources = cht_wc_ext_charger_resources,
  54. },
  55. { .name = "cht_wcove_region", },
  56. { .name = "cht_wcove_leds", },
  57. };
  58. /*
  59. * The CHT Whiskey Cove covers multiple I2C addresses, with a 1 Byte
  60. * register address space per I2C address, so we use 16 bit register
  61. * addresses where the high 8 bits contain the I2C client address.
  62. */
  63. static int cht_wc_byte_reg_read(void *context, unsigned int reg,
  64. unsigned int *val)
  65. {
  66. struct i2c_client *client = context;
  67. int ret, orig_addr = client->addr;
  68. if (!(reg & REG_ADDR_MASK)) {
  69. dev_err(&client->dev, "Error I2C address not specified\n");
  70. return -EINVAL;
  71. }
  72. client->addr = (reg & REG_ADDR_MASK) >> REG_ADDR_SHIFT;
  73. ret = i2c_smbus_read_byte_data(client, reg & REG_OFFSET_MASK);
  74. client->addr = orig_addr;
  75. if (ret < 0)
  76. return ret;
  77. *val = ret;
  78. return 0;
  79. }
  80. static int cht_wc_byte_reg_write(void *context, unsigned int reg,
  81. unsigned int val)
  82. {
  83. struct i2c_client *client = context;
  84. int ret, orig_addr = client->addr;
  85. if (!(reg & REG_ADDR_MASK)) {
  86. dev_err(&client->dev, "Error I2C address not specified\n");
  87. return -EINVAL;
  88. }
  89. client->addr = (reg & REG_ADDR_MASK) >> REG_ADDR_SHIFT;
  90. ret = i2c_smbus_write_byte_data(client, reg & REG_OFFSET_MASK, val);
  91. client->addr = orig_addr;
  92. return ret;
  93. }
  94. static const struct regmap_config cht_wc_regmap_cfg = {
  95. .reg_bits = 16,
  96. .val_bits = 8,
  97. .reg_write = cht_wc_byte_reg_write,
  98. .reg_read = cht_wc_byte_reg_read,
  99. };
  100. static const struct regmap_irq cht_wc_regmap_irqs[] = {
  101. REGMAP_IRQ_REG(CHT_WC_PWRSRC_IRQ, 0, BIT(CHT_WC_PWRSRC_IRQ)),
  102. REGMAP_IRQ_REG(CHT_WC_THRM_IRQ, 0, BIT(CHT_WC_THRM_IRQ)),
  103. REGMAP_IRQ_REG(CHT_WC_BCU_IRQ, 0, BIT(CHT_WC_BCU_IRQ)),
  104. REGMAP_IRQ_REG(CHT_WC_ADC_IRQ, 0, BIT(CHT_WC_ADC_IRQ)),
  105. REGMAP_IRQ_REG(CHT_WC_EXT_CHGR_IRQ, 0, BIT(CHT_WC_EXT_CHGR_IRQ)),
  106. REGMAP_IRQ_REG(CHT_WC_GPIO_IRQ, 0, BIT(CHT_WC_GPIO_IRQ)),
  107. REGMAP_IRQ_REG(CHT_WC_CRIT_IRQ, 0, BIT(CHT_WC_CRIT_IRQ)),
  108. };
  109. static const struct regmap_irq_chip cht_wc_regmap_irq_chip = {
  110. .name = "cht_wc_irq_chip",
  111. .status_base = CHT_WC_IRQLVL1,
  112. .mask_base = CHT_WC_IRQLVL1_MASK,
  113. .irqs = cht_wc_regmap_irqs,
  114. .num_irqs = ARRAY_SIZE(cht_wc_regmap_irqs),
  115. .num_regs = 1,
  116. };
  117. static const struct dmi_system_id cht_wc_model_dmi_ids[] = {
  118. {
  119. /* GPD win / GPD pocket mini laptops */
  120. .driver_data = (void *)(long)INTEL_CHT_WC_GPD_WIN_POCKET,
  121. /*
  122. * This DMI match may not seem unique, but it is. In the 67000+
  123. * DMI decode dumps from linux-hardware.org only 116 have
  124. * board_vendor set to "AMI Corporation" and of those 116 only
  125. * the GPD win's and pocket's board_name is "Default string".
  126. */
  127. .matches = {
  128. DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
  129. DMI_EXACT_MATCH(DMI_BOARD_NAME, "Default string"),
  130. DMI_EXACT_MATCH(DMI_BOARD_SERIAL, "Default string"),
  131. DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Default string"),
  132. },
  133. }, {
  134. /* Xiaomi Mi Pad 2 */
  135. .driver_data = (void *)(long)INTEL_CHT_WC_XIAOMI_MIPAD2,
  136. .matches = {
  137. DMI_MATCH(DMI_SYS_VENDOR, "Xiaomi Inc"),
  138. DMI_MATCH(DMI_PRODUCT_NAME, "Mipad2"),
  139. },
  140. }, {
  141. /* Lenovo Yoga Book X90F / X90L */
  142. .driver_data = (void *)(long)INTEL_CHT_WC_LENOVO_YOGABOOK1,
  143. .matches = {
  144. DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Intel Corporation"),
  145. DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "CHERRYVIEW D1 PLATFORM"),
  146. DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "YETI-11"),
  147. },
  148. }, {
  149. /* Lenovo Yoga Book X91F / X91L */
  150. .driver_data = (void *)(long)INTEL_CHT_WC_LENOVO_YOGABOOK1,
  151. .matches = {
  152. /* Non exact match to match F + L versions */
  153. DMI_MATCH(DMI_PRODUCT_NAME, "Lenovo YB1-X91"),
  154. },
  155. },
  156. { }
  157. };
  158. static int cht_wc_probe(struct i2c_client *client)
  159. {
  160. struct device *dev = &client->dev;
  161. const struct dmi_system_id *id;
  162. struct intel_soc_pmic *pmic;
  163. acpi_status status;
  164. unsigned long long hrv;
  165. int ret;
  166. status = acpi_evaluate_integer(ACPI_HANDLE(dev), "_HRV", NULL, &hrv);
  167. if (ACPI_FAILURE(status))
  168. return dev_err_probe(dev, -ENODEV, "Failed to get PMIC hardware revision\n");
  169. if (hrv != CHT_WC_HRV)
  170. return dev_err_probe(dev, -ENODEV, "Invalid PMIC hardware revision: %llu\n", hrv);
  171. if (client->irq < 0)
  172. return dev_err_probe(dev, -EINVAL, "Invalid IRQ\n");
  173. pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL);
  174. if (!pmic)
  175. return -ENOMEM;
  176. id = dmi_first_match(cht_wc_model_dmi_ids);
  177. if (id)
  178. pmic->cht_wc_model = (long)id->driver_data;
  179. pmic->irq = client->irq;
  180. pmic->dev = dev;
  181. i2c_set_clientdata(client, pmic);
  182. pmic->regmap = devm_regmap_init(dev, NULL, client, &cht_wc_regmap_cfg);
  183. if (IS_ERR(pmic->regmap))
  184. return PTR_ERR(pmic->regmap);
  185. ret = devm_regmap_add_irq_chip(dev, pmic->regmap, pmic->irq,
  186. IRQF_ONESHOT | IRQF_SHARED, 0,
  187. &cht_wc_regmap_irq_chip,
  188. &pmic->irq_chip_data);
  189. if (ret)
  190. return ret;
  191. return devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE,
  192. cht_wc_dev, ARRAY_SIZE(cht_wc_dev), NULL, 0,
  193. regmap_irq_get_domain(pmic->irq_chip_data));
  194. }
  195. static void cht_wc_shutdown(struct i2c_client *client)
  196. {
  197. struct intel_soc_pmic *pmic = i2c_get_clientdata(client);
  198. disable_irq(pmic->irq);
  199. }
  200. static int cht_wc_suspend(struct device *dev)
  201. {
  202. struct intel_soc_pmic *pmic = dev_get_drvdata(dev);
  203. disable_irq(pmic->irq);
  204. return 0;
  205. }
  206. static int cht_wc_resume(struct device *dev)
  207. {
  208. struct intel_soc_pmic *pmic = dev_get_drvdata(dev);
  209. enable_irq(pmic->irq);
  210. return 0;
  211. }
  212. static DEFINE_SIMPLE_DEV_PM_OPS(cht_wc_pm_ops, cht_wc_suspend, cht_wc_resume);
  213. static const struct i2c_device_id cht_wc_i2c_id[] = {
  214. { }
  215. };
  216. static const struct acpi_device_id cht_wc_acpi_ids[] = {
  217. { "INT34D3", },
  218. { }
  219. };
  220. static struct i2c_driver cht_wc_driver = {
  221. .driver = {
  222. .name = "CHT Whiskey Cove PMIC",
  223. .pm = pm_sleep_ptr(&cht_wc_pm_ops),
  224. .acpi_match_table = cht_wc_acpi_ids,
  225. },
  226. .probe_new = cht_wc_probe,
  227. .shutdown = cht_wc_shutdown,
  228. .id_table = cht_wc_i2c_id,
  229. };
  230. builtin_i2c_driver(cht_wc_driver);