axp20x.c 35 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * MFD core driver for the X-Powers' Power Management ICs
  4. *
  5. * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC
  6. * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature
  7. * as well as configurable GPIOs.
  8. *
  9. * This file contains the interface independent core functions.
  10. *
  11. * Copyright (C) 2014 Carlo Caione
  12. *
  13. * Author: Carlo Caione <[email protected]>
  14. */
  15. #include <linux/acpi.h>
  16. #include <linux/bitops.h>
  17. #include <linux/delay.h>
  18. #include <linux/err.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/kernel.h>
  21. #include <linux/mfd/axp20x.h>
  22. #include <linux/mfd/core.h>
  23. #include <linux/module.h>
  24. #include <linux/of_device.h>
  25. #include <linux/pm_runtime.h>
  26. #include <linux/regmap.h>
  27. #include <linux/regulator/consumer.h>
  28. #define AXP20X_OFF BIT(7)
  29. #define AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE 0
  30. #define AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE BIT(4)
  31. static const char * const axp20x_model_names[] = {
  32. "AXP152",
  33. "AXP202",
  34. "AXP209",
  35. "AXP221",
  36. "AXP223",
  37. "AXP288",
  38. "AXP803",
  39. "AXP806",
  40. "AXP809",
  41. "AXP813",
  42. };
  43. static const struct regmap_range axp152_writeable_ranges[] = {
  44. regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE),
  45. regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE),
  46. };
  47. static const struct regmap_range axp152_volatile_ranges[] = {
  48. regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE),
  49. regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE),
  50. regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT),
  51. };
  52. static const struct regmap_access_table axp152_writeable_table = {
  53. .yes_ranges = axp152_writeable_ranges,
  54. .n_yes_ranges = ARRAY_SIZE(axp152_writeable_ranges),
  55. };
  56. static const struct regmap_access_table axp152_volatile_table = {
  57. .yes_ranges = axp152_volatile_ranges,
  58. .n_yes_ranges = ARRAY_SIZE(axp152_volatile_ranges),
  59. };
  60. static const struct regmap_range axp20x_writeable_ranges[] = {
  61. regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
  62. regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
  63. regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES),
  64. regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)),
  65. };
  66. static const struct regmap_range axp20x_volatile_ranges[] = {
  67. regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS),
  68. regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
  69. regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
  70. regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L),
  71. regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL),
  72. regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L),
  73. };
  74. static const struct regmap_access_table axp20x_writeable_table = {
  75. .yes_ranges = axp20x_writeable_ranges,
  76. .n_yes_ranges = ARRAY_SIZE(axp20x_writeable_ranges),
  77. };
  78. static const struct regmap_access_table axp20x_volatile_table = {
  79. .yes_ranges = axp20x_volatile_ranges,
  80. .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges),
  81. };
  82. /* AXP22x ranges are shared with the AXP809, as they cover the same range */
  83. static const struct regmap_range axp22x_writeable_ranges[] = {
  84. regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
  85. regmap_reg_range(AXP20X_CHRG_CTRL1, AXP22X_CHRG_CTRL3),
  86. regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1),
  87. };
  88. static const struct regmap_range axp22x_volatile_ranges[] = {
  89. regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_PWR_OP_MODE),
  90. regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
  91. regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE),
  92. regmap_reg_range(AXP22X_PMIC_TEMP_H, AXP20X_IPSOUT_V_HIGH_L),
  93. regmap_reg_range(AXP20X_FG_RES, AXP20X_FG_RES),
  94. };
  95. static const struct regmap_access_table axp22x_writeable_table = {
  96. .yes_ranges = axp22x_writeable_ranges,
  97. .n_yes_ranges = ARRAY_SIZE(axp22x_writeable_ranges),
  98. };
  99. static const struct regmap_access_table axp22x_volatile_table = {
  100. .yes_ranges = axp22x_volatile_ranges,
  101. .n_yes_ranges = ARRAY_SIZE(axp22x_volatile_ranges),
  102. };
  103. /* AXP288 ranges are shared with the AXP803, as they cover the same range */
  104. static const struct regmap_range axp288_writeable_ranges[] = {
  105. regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE),
  106. regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5),
  107. };
  108. static const struct regmap_range axp288_volatile_ranges[] = {
  109. regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP288_POWER_REASON),
  110. regmap_reg_range(AXP22X_PWR_OUT_CTRL1, AXP22X_ALDO3_V_OUT),
  111. regmap_reg_range(AXP288_BC_GLOBAL, AXP288_BC_GLOBAL),
  112. regmap_reg_range(AXP288_BC_DET_STAT, AXP20X_VBUS_IPSOUT_MGMT),
  113. regmap_reg_range(AXP20X_CHRG_BAK_CTRL, AXP20X_CHRG_BAK_CTRL),
  114. regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L),
  115. regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL),
  116. regmap_reg_range(AXP20X_GPIO1_CTRL, AXP22X_GPIO_STATE),
  117. regmap_reg_range(AXP288_RT_BATT_V_H, AXP288_RT_BATT_V_L),
  118. regmap_reg_range(AXP20X_FG_RES, AXP288_FG_CC_CAP_REG),
  119. };
  120. static const struct regmap_access_table axp288_writeable_table = {
  121. .yes_ranges = axp288_writeable_ranges,
  122. .n_yes_ranges = ARRAY_SIZE(axp288_writeable_ranges),
  123. };
  124. static const struct regmap_access_table axp288_volatile_table = {
  125. .yes_ranges = axp288_volatile_ranges,
  126. .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges),
  127. };
  128. static const struct regmap_range axp806_writeable_ranges[] = {
  129. regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_DATACACHE(3)),
  130. regmap_reg_range(AXP806_PWR_OUT_CTRL1, AXP806_CLDO3_V_CTRL),
  131. regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ2_EN),
  132. regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
  133. regmap_reg_range(AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT),
  134. };
  135. static const struct regmap_range axp806_volatile_ranges[] = {
  136. regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
  137. };
  138. static const struct regmap_access_table axp806_writeable_table = {
  139. .yes_ranges = axp806_writeable_ranges,
  140. .n_yes_ranges = ARRAY_SIZE(axp806_writeable_ranges),
  141. };
  142. static const struct regmap_access_table axp806_volatile_table = {
  143. .yes_ranges = axp806_volatile_ranges,
  144. .n_yes_ranges = ARRAY_SIZE(axp806_volatile_ranges),
  145. };
  146. static const struct resource axp152_pek_resources[] = {
  147. DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
  148. DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
  149. };
  150. static const struct resource axp20x_ac_power_supply_resources[] = {
  151. DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"),
  152. DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"),
  153. DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_OVER_V, "ACIN_OVER_V"),
  154. };
  155. static const struct resource axp20x_pek_resources[] = {
  156. DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
  157. DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
  158. };
  159. static const struct resource axp20x_usb_power_supply_resources[] = {
  160. DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
  161. DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
  162. DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_VALID, "VBUS_VALID"),
  163. DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"),
  164. };
  165. static const struct resource axp22x_usb_power_supply_resources[] = {
  166. DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
  167. DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
  168. };
  169. /* AXP803 and AXP813/AXP818 share the same interrupts */
  170. static const struct resource axp803_usb_power_supply_resources[] = {
  171. DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
  172. DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
  173. };
  174. static const struct resource axp22x_pek_resources[] = {
  175. DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
  176. DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
  177. };
  178. static const struct resource axp288_power_button_resources[] = {
  179. DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKP, "PEK_DBR"),
  180. DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKN, "PEK_DBF"),
  181. };
  182. static const struct resource axp288_fuel_gauge_resources[] = {
  183. DEFINE_RES_IRQ(AXP288_IRQ_QWBTU),
  184. DEFINE_RES_IRQ(AXP288_IRQ_WBTU),
  185. DEFINE_RES_IRQ(AXP288_IRQ_QWBTO),
  186. DEFINE_RES_IRQ(AXP288_IRQ_WBTO),
  187. DEFINE_RES_IRQ(AXP288_IRQ_WL2),
  188. DEFINE_RES_IRQ(AXP288_IRQ_WL1),
  189. };
  190. static const struct resource axp803_pek_resources[] = {
  191. DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
  192. DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
  193. };
  194. static const struct resource axp806_pek_resources[] = {
  195. DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_RISE, "PEK_DBR"),
  196. DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_FALL, "PEK_DBF"),
  197. };
  198. static const struct resource axp809_pek_resources[] = {
  199. DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
  200. DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
  201. };
  202. static const struct regmap_config axp152_regmap_config = {
  203. .reg_bits = 8,
  204. .val_bits = 8,
  205. .wr_table = &axp152_writeable_table,
  206. .volatile_table = &axp152_volatile_table,
  207. .max_register = AXP152_PWM1_DUTY_CYCLE,
  208. .cache_type = REGCACHE_RBTREE,
  209. };
  210. static const struct regmap_config axp20x_regmap_config = {
  211. .reg_bits = 8,
  212. .val_bits = 8,
  213. .wr_table = &axp20x_writeable_table,
  214. .volatile_table = &axp20x_volatile_table,
  215. .max_register = AXP20X_OCV(AXP20X_OCV_MAX),
  216. .cache_type = REGCACHE_RBTREE,
  217. };
  218. static const struct regmap_config axp22x_regmap_config = {
  219. .reg_bits = 8,
  220. .val_bits = 8,
  221. .wr_table = &axp22x_writeable_table,
  222. .volatile_table = &axp22x_volatile_table,
  223. .max_register = AXP22X_BATLOW_THRES1,
  224. .cache_type = REGCACHE_RBTREE,
  225. };
  226. static const struct regmap_config axp288_regmap_config = {
  227. .reg_bits = 8,
  228. .val_bits = 8,
  229. .wr_table = &axp288_writeable_table,
  230. .volatile_table = &axp288_volatile_table,
  231. .max_register = AXP288_FG_TUNE5,
  232. .cache_type = REGCACHE_RBTREE,
  233. };
  234. static const struct regmap_config axp806_regmap_config = {
  235. .reg_bits = 8,
  236. .val_bits = 8,
  237. .wr_table = &axp806_writeable_table,
  238. .volatile_table = &axp806_volatile_table,
  239. .max_register = AXP806_REG_ADDR_EXT,
  240. .cache_type = REGCACHE_RBTREE,
  241. };
  242. #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \
  243. [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
  244. static const struct regmap_irq axp152_regmap_irqs[] = {
  245. INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT, 0, 6),
  246. INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL, 0, 5),
  247. INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT, 0, 3),
  248. INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL, 0, 2),
  249. INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW, 1, 5),
  250. INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW, 1, 4),
  251. INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW, 1, 3),
  252. INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW, 1, 2),
  253. INIT_REGMAP_IRQ(AXP152, PEK_SHORT, 1, 1),
  254. INIT_REGMAP_IRQ(AXP152, PEK_LONG, 1, 0),
  255. INIT_REGMAP_IRQ(AXP152, TIMER, 2, 7),
  256. INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE, 2, 6),
  257. INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE, 2, 5),
  258. INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT, 2, 3),
  259. INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT, 2, 2),
  260. INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT, 2, 1),
  261. INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0),
  262. };
  263. static const struct regmap_irq axp20x_regmap_irqs[] = {
  264. INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7),
  265. INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6),
  266. INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL, 0, 5),
  267. INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4),
  268. INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3),
  269. INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2),
  270. INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW, 0, 1),
  271. INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7),
  272. INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6),
  273. INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE, 1, 5),
  274. INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE, 1, 4),
  275. INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3),
  276. INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2),
  277. INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH, 1, 1),
  278. INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW, 1, 0),
  279. INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH, 2, 7),
  280. INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW, 2, 6),
  281. INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG, 2, 5),
  282. INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG, 2, 4),
  283. INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG, 2, 3),
  284. INIT_REGMAP_IRQ(AXP20X, PEK_SHORT, 2, 1),
  285. INIT_REGMAP_IRQ(AXP20X, PEK_LONG, 2, 0),
  286. INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON, 3, 7),
  287. INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF, 3, 6),
  288. INIT_REGMAP_IRQ(AXP20X, VBUS_VALID, 3, 5),
  289. INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID, 3, 4),
  290. INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID, 3, 3),
  291. INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END, 3, 2),
  292. INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1, 3, 1),
  293. INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2, 3, 0),
  294. INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7),
  295. INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE, 4, 6),
  296. INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE, 4, 5),
  297. INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT, 4, 3),
  298. INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT, 4, 2),
  299. INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT, 4, 1),
  300. INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0),
  301. };
  302. static const struct regmap_irq axp22x_regmap_irqs[] = {
  303. INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V, 0, 7),
  304. INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN, 0, 6),
  305. INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL, 0, 5),
  306. INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V, 0, 4),
  307. INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN, 0, 3),
  308. INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL, 0, 2),
  309. INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW, 0, 1),
  310. INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN, 1, 7),
  311. INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL, 1, 6),
  312. INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE, 1, 5),
  313. INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE, 1, 4),
  314. INIT_REGMAP_IRQ(AXP22X, CHARG, 1, 3),
  315. INIT_REGMAP_IRQ(AXP22X, CHARG_DONE, 1, 2),
  316. INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH, 1, 1),
  317. INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW, 1, 0),
  318. INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH, 2, 7),
  319. INIT_REGMAP_IRQ(AXP22X, PEK_SHORT, 2, 1),
  320. INIT_REGMAP_IRQ(AXP22X, PEK_LONG, 2, 0),
  321. INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1, 3, 1),
  322. INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2, 3, 0),
  323. INIT_REGMAP_IRQ(AXP22X, TIMER, 4, 7),
  324. INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE, 4, 6),
  325. INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE, 4, 5),
  326. INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT, 4, 1),
  327. INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT, 4, 0),
  328. };
  329. /* some IRQs are compatible with axp20x models */
  330. static const struct regmap_irq axp288_regmap_irqs[] = {
  331. INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2),
  332. INIT_REGMAP_IRQ(AXP288, VBUS_RISE, 0, 3),
  333. INIT_REGMAP_IRQ(AXP288, OV, 0, 4),
  334. INIT_REGMAP_IRQ(AXP288, FALLING_ALT, 0, 5),
  335. INIT_REGMAP_IRQ(AXP288, RISING_ALT, 0, 6),
  336. INIT_REGMAP_IRQ(AXP288, OV_ALT, 0, 7),
  337. INIT_REGMAP_IRQ(AXP288, DONE, 1, 2),
  338. INIT_REGMAP_IRQ(AXP288, CHARGING, 1, 3),
  339. INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4),
  340. INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5),
  341. INIT_REGMAP_IRQ(AXP288, ABSENT, 1, 6),
  342. INIT_REGMAP_IRQ(AXP288, APPEND, 1, 7),
  343. INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0),
  344. INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1),
  345. INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2),
  346. INIT_REGMAP_IRQ(AXP288, WBTO, 2, 3),
  347. INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4),
  348. INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5),
  349. INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6),
  350. INIT_REGMAP_IRQ(AXP288, CBTO, 2, 7),
  351. INIT_REGMAP_IRQ(AXP288, WL2, 3, 0),
  352. INIT_REGMAP_IRQ(AXP288, WL1, 3, 1),
  353. INIT_REGMAP_IRQ(AXP288, GPADC, 3, 2),
  354. INIT_REGMAP_IRQ(AXP288, OT, 3, 7),
  355. INIT_REGMAP_IRQ(AXP288, GPIO0, 4, 0),
  356. INIT_REGMAP_IRQ(AXP288, GPIO1, 4, 1),
  357. INIT_REGMAP_IRQ(AXP288, POKO, 4, 2),
  358. INIT_REGMAP_IRQ(AXP288, POKL, 4, 3),
  359. INIT_REGMAP_IRQ(AXP288, POKS, 4, 4),
  360. INIT_REGMAP_IRQ(AXP288, POKN, 4, 5),
  361. INIT_REGMAP_IRQ(AXP288, POKP, 4, 6),
  362. INIT_REGMAP_IRQ(AXP288, TIMER, 4, 7),
  363. INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0),
  364. INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1),
  365. };
  366. static const struct regmap_irq axp803_regmap_irqs[] = {
  367. INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V, 0, 7),
  368. INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN, 0, 6),
  369. INIT_REGMAP_IRQ(AXP803, ACIN_REMOVAL, 0, 5),
  370. INIT_REGMAP_IRQ(AXP803, VBUS_OVER_V, 0, 4),
  371. INIT_REGMAP_IRQ(AXP803, VBUS_PLUGIN, 0, 3),
  372. INIT_REGMAP_IRQ(AXP803, VBUS_REMOVAL, 0, 2),
  373. INIT_REGMAP_IRQ(AXP803, BATT_PLUGIN, 1, 7),
  374. INIT_REGMAP_IRQ(AXP803, BATT_REMOVAL, 1, 6),
  375. INIT_REGMAP_IRQ(AXP803, BATT_ENT_ACT_MODE, 1, 5),
  376. INIT_REGMAP_IRQ(AXP803, BATT_EXIT_ACT_MODE, 1, 4),
  377. INIT_REGMAP_IRQ(AXP803, CHARG, 1, 3),
  378. INIT_REGMAP_IRQ(AXP803, CHARG_DONE, 1, 2),
  379. INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH, 2, 7),
  380. INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH_END, 2, 6),
  381. INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW, 2, 5),
  382. INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW_END, 2, 4),
  383. INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH, 2, 3),
  384. INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH_END, 2, 2),
  385. INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW, 2, 1),
  386. INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW_END, 2, 0),
  387. INIT_REGMAP_IRQ(AXP803, DIE_TEMP_HIGH, 3, 7),
  388. INIT_REGMAP_IRQ(AXP803, GPADC, 3, 2),
  389. INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL1, 3, 1),
  390. INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL2, 3, 0),
  391. INIT_REGMAP_IRQ(AXP803, TIMER, 4, 7),
  392. INIT_REGMAP_IRQ(AXP803, PEK_RIS_EDGE, 4, 6),
  393. INIT_REGMAP_IRQ(AXP803, PEK_FAL_EDGE, 4, 5),
  394. INIT_REGMAP_IRQ(AXP803, PEK_SHORT, 4, 4),
  395. INIT_REGMAP_IRQ(AXP803, PEK_LONG, 4, 3),
  396. INIT_REGMAP_IRQ(AXP803, PEK_OVER_OFF, 4, 2),
  397. INIT_REGMAP_IRQ(AXP803, GPIO1_INPUT, 4, 1),
  398. INIT_REGMAP_IRQ(AXP803, GPIO0_INPUT, 4, 0),
  399. INIT_REGMAP_IRQ(AXP803, BC_USB_CHNG, 5, 1),
  400. INIT_REGMAP_IRQ(AXP803, MV_CHNG, 5, 0),
  401. };
  402. static const struct regmap_irq axp806_regmap_irqs[] = {
  403. INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV1, 0, 0),
  404. INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV2, 0, 1),
  405. INIT_REGMAP_IRQ(AXP806, DCDCA_V_LOW, 0, 3),
  406. INIT_REGMAP_IRQ(AXP806, DCDCB_V_LOW, 0, 4),
  407. INIT_REGMAP_IRQ(AXP806, DCDCC_V_LOW, 0, 5),
  408. INIT_REGMAP_IRQ(AXP806, DCDCD_V_LOW, 0, 6),
  409. INIT_REGMAP_IRQ(AXP806, DCDCE_V_LOW, 0, 7),
  410. INIT_REGMAP_IRQ(AXP806, POK_LONG, 1, 0),
  411. INIT_REGMAP_IRQ(AXP806, POK_SHORT, 1, 1),
  412. INIT_REGMAP_IRQ(AXP806, WAKEUP, 1, 4),
  413. INIT_REGMAP_IRQ(AXP806, POK_FALL, 1, 5),
  414. INIT_REGMAP_IRQ(AXP806, POK_RISE, 1, 6),
  415. };
  416. static const struct regmap_irq axp809_regmap_irqs[] = {
  417. INIT_REGMAP_IRQ(AXP809, ACIN_OVER_V, 0, 7),
  418. INIT_REGMAP_IRQ(AXP809, ACIN_PLUGIN, 0, 6),
  419. INIT_REGMAP_IRQ(AXP809, ACIN_REMOVAL, 0, 5),
  420. INIT_REGMAP_IRQ(AXP809, VBUS_OVER_V, 0, 4),
  421. INIT_REGMAP_IRQ(AXP809, VBUS_PLUGIN, 0, 3),
  422. INIT_REGMAP_IRQ(AXP809, VBUS_REMOVAL, 0, 2),
  423. INIT_REGMAP_IRQ(AXP809, VBUS_V_LOW, 0, 1),
  424. INIT_REGMAP_IRQ(AXP809, BATT_PLUGIN, 1, 7),
  425. INIT_REGMAP_IRQ(AXP809, BATT_REMOVAL, 1, 6),
  426. INIT_REGMAP_IRQ(AXP809, BATT_ENT_ACT_MODE, 1, 5),
  427. INIT_REGMAP_IRQ(AXP809, BATT_EXIT_ACT_MODE, 1, 4),
  428. INIT_REGMAP_IRQ(AXP809, CHARG, 1, 3),
  429. INIT_REGMAP_IRQ(AXP809, CHARG_DONE, 1, 2),
  430. INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH, 2, 7),
  431. INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH_END, 2, 6),
  432. INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW, 2, 5),
  433. INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW_END, 2, 4),
  434. INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH, 2, 3),
  435. INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH_END, 2, 2),
  436. INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW, 2, 1),
  437. INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW_END, 2, 0),
  438. INIT_REGMAP_IRQ(AXP809, DIE_TEMP_HIGH, 3, 7),
  439. INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL1, 3, 1),
  440. INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL2, 3, 0),
  441. INIT_REGMAP_IRQ(AXP809, TIMER, 4, 7),
  442. INIT_REGMAP_IRQ(AXP809, PEK_RIS_EDGE, 4, 6),
  443. INIT_REGMAP_IRQ(AXP809, PEK_FAL_EDGE, 4, 5),
  444. INIT_REGMAP_IRQ(AXP809, PEK_SHORT, 4, 4),
  445. INIT_REGMAP_IRQ(AXP809, PEK_LONG, 4, 3),
  446. INIT_REGMAP_IRQ(AXP809, PEK_OVER_OFF, 4, 2),
  447. INIT_REGMAP_IRQ(AXP809, GPIO1_INPUT, 4, 1),
  448. INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT, 4, 0),
  449. };
  450. static const struct regmap_irq_chip axp152_regmap_irq_chip = {
  451. .name = "axp152_irq_chip",
  452. .status_base = AXP152_IRQ1_STATE,
  453. .ack_base = AXP152_IRQ1_STATE,
  454. .mask_base = AXP152_IRQ1_EN,
  455. .mask_invert = true,
  456. .init_ack_masked = true,
  457. .irqs = axp152_regmap_irqs,
  458. .num_irqs = ARRAY_SIZE(axp152_regmap_irqs),
  459. .num_regs = 3,
  460. };
  461. static const struct regmap_irq_chip axp20x_regmap_irq_chip = {
  462. .name = "axp20x_irq_chip",
  463. .status_base = AXP20X_IRQ1_STATE,
  464. .ack_base = AXP20X_IRQ1_STATE,
  465. .mask_base = AXP20X_IRQ1_EN,
  466. .mask_invert = true,
  467. .init_ack_masked = true,
  468. .irqs = axp20x_regmap_irqs,
  469. .num_irqs = ARRAY_SIZE(axp20x_regmap_irqs),
  470. .num_regs = 5,
  471. };
  472. static const struct regmap_irq_chip axp22x_regmap_irq_chip = {
  473. .name = "axp22x_irq_chip",
  474. .status_base = AXP20X_IRQ1_STATE,
  475. .ack_base = AXP20X_IRQ1_STATE,
  476. .mask_base = AXP20X_IRQ1_EN,
  477. .mask_invert = true,
  478. .init_ack_masked = true,
  479. .irqs = axp22x_regmap_irqs,
  480. .num_irqs = ARRAY_SIZE(axp22x_regmap_irqs),
  481. .num_regs = 5,
  482. };
  483. static const struct regmap_irq_chip axp288_regmap_irq_chip = {
  484. .name = "axp288_irq_chip",
  485. .status_base = AXP20X_IRQ1_STATE,
  486. .ack_base = AXP20X_IRQ1_STATE,
  487. .mask_base = AXP20X_IRQ1_EN,
  488. .mask_invert = true,
  489. .init_ack_masked = true,
  490. .irqs = axp288_regmap_irqs,
  491. .num_irqs = ARRAY_SIZE(axp288_regmap_irqs),
  492. .num_regs = 6,
  493. };
  494. static const struct regmap_irq_chip axp803_regmap_irq_chip = {
  495. .name = "axp803",
  496. .status_base = AXP20X_IRQ1_STATE,
  497. .ack_base = AXP20X_IRQ1_STATE,
  498. .mask_base = AXP20X_IRQ1_EN,
  499. .mask_invert = true,
  500. .init_ack_masked = true,
  501. .irqs = axp803_regmap_irqs,
  502. .num_irqs = ARRAY_SIZE(axp803_regmap_irqs),
  503. .num_regs = 6,
  504. };
  505. static const struct regmap_irq_chip axp806_regmap_irq_chip = {
  506. .name = "axp806",
  507. .status_base = AXP20X_IRQ1_STATE,
  508. .ack_base = AXP20X_IRQ1_STATE,
  509. .mask_base = AXP20X_IRQ1_EN,
  510. .mask_invert = true,
  511. .init_ack_masked = true,
  512. .irqs = axp806_regmap_irqs,
  513. .num_irqs = ARRAY_SIZE(axp806_regmap_irqs),
  514. .num_regs = 2,
  515. };
  516. static const struct regmap_irq_chip axp809_regmap_irq_chip = {
  517. .name = "axp809",
  518. .status_base = AXP20X_IRQ1_STATE,
  519. .ack_base = AXP20X_IRQ1_STATE,
  520. .mask_base = AXP20X_IRQ1_EN,
  521. .mask_invert = true,
  522. .init_ack_masked = true,
  523. .irqs = axp809_regmap_irqs,
  524. .num_irqs = ARRAY_SIZE(axp809_regmap_irqs),
  525. .num_regs = 5,
  526. };
  527. static const struct mfd_cell axp20x_cells[] = {
  528. {
  529. .name = "axp20x-gpio",
  530. .of_compatible = "x-powers,axp209-gpio",
  531. }, {
  532. .name = "axp20x-pek",
  533. .num_resources = ARRAY_SIZE(axp20x_pek_resources),
  534. .resources = axp20x_pek_resources,
  535. }, {
  536. .name = "axp20x-regulator",
  537. }, {
  538. .name = "axp20x-adc",
  539. .of_compatible = "x-powers,axp209-adc",
  540. }, {
  541. .name = "axp20x-battery-power-supply",
  542. .of_compatible = "x-powers,axp209-battery-power-supply",
  543. }, {
  544. .name = "axp20x-ac-power-supply",
  545. .of_compatible = "x-powers,axp202-ac-power-supply",
  546. .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
  547. .resources = axp20x_ac_power_supply_resources,
  548. }, {
  549. .name = "axp20x-usb-power-supply",
  550. .of_compatible = "x-powers,axp202-usb-power-supply",
  551. .num_resources = ARRAY_SIZE(axp20x_usb_power_supply_resources),
  552. .resources = axp20x_usb_power_supply_resources,
  553. },
  554. };
  555. static const struct mfd_cell axp221_cells[] = {
  556. {
  557. .name = "axp20x-gpio",
  558. .of_compatible = "x-powers,axp221-gpio",
  559. }, {
  560. .name = "axp221-pek",
  561. .num_resources = ARRAY_SIZE(axp22x_pek_resources),
  562. .resources = axp22x_pek_resources,
  563. }, {
  564. .name = "axp20x-regulator",
  565. }, {
  566. .name = "axp22x-adc",
  567. .of_compatible = "x-powers,axp221-adc",
  568. }, {
  569. .name = "axp20x-ac-power-supply",
  570. .of_compatible = "x-powers,axp221-ac-power-supply",
  571. .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
  572. .resources = axp20x_ac_power_supply_resources,
  573. }, {
  574. .name = "axp20x-battery-power-supply",
  575. .of_compatible = "x-powers,axp221-battery-power-supply",
  576. }, {
  577. .name = "axp20x-usb-power-supply",
  578. .of_compatible = "x-powers,axp221-usb-power-supply",
  579. .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources),
  580. .resources = axp22x_usb_power_supply_resources,
  581. },
  582. };
  583. static const struct mfd_cell axp223_cells[] = {
  584. {
  585. .name = "axp20x-gpio",
  586. .of_compatible = "x-powers,axp221-gpio",
  587. }, {
  588. .name = "axp221-pek",
  589. .num_resources = ARRAY_SIZE(axp22x_pek_resources),
  590. .resources = axp22x_pek_resources,
  591. }, {
  592. .name = "axp22x-adc",
  593. .of_compatible = "x-powers,axp221-adc",
  594. }, {
  595. .name = "axp20x-battery-power-supply",
  596. .of_compatible = "x-powers,axp221-battery-power-supply",
  597. }, {
  598. .name = "axp20x-regulator",
  599. }, {
  600. .name = "axp20x-ac-power-supply",
  601. .of_compatible = "x-powers,axp221-ac-power-supply",
  602. .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
  603. .resources = axp20x_ac_power_supply_resources,
  604. }, {
  605. .name = "axp20x-usb-power-supply",
  606. .of_compatible = "x-powers,axp223-usb-power-supply",
  607. .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources),
  608. .resources = axp22x_usb_power_supply_resources,
  609. },
  610. };
  611. static const struct mfd_cell axp152_cells[] = {
  612. {
  613. .name = "axp20x-pek",
  614. .num_resources = ARRAY_SIZE(axp152_pek_resources),
  615. .resources = axp152_pek_resources,
  616. },
  617. };
  618. static const struct resource axp288_adc_resources[] = {
  619. DEFINE_RES_IRQ_NAMED(AXP288_IRQ_GPADC, "GPADC"),
  620. };
  621. static const struct resource axp288_extcon_resources[] = {
  622. DEFINE_RES_IRQ(AXP288_IRQ_VBUS_FALL),
  623. DEFINE_RES_IRQ(AXP288_IRQ_VBUS_RISE),
  624. DEFINE_RES_IRQ(AXP288_IRQ_MV_CHNG),
  625. DEFINE_RES_IRQ(AXP288_IRQ_BC_USB_CHNG),
  626. };
  627. static const struct resource axp288_charger_resources[] = {
  628. DEFINE_RES_IRQ(AXP288_IRQ_OV),
  629. DEFINE_RES_IRQ(AXP288_IRQ_DONE),
  630. DEFINE_RES_IRQ(AXP288_IRQ_CHARGING),
  631. DEFINE_RES_IRQ(AXP288_IRQ_SAFE_QUIT),
  632. DEFINE_RES_IRQ(AXP288_IRQ_SAFE_ENTER),
  633. DEFINE_RES_IRQ(AXP288_IRQ_QCBTU),
  634. DEFINE_RES_IRQ(AXP288_IRQ_CBTU),
  635. DEFINE_RES_IRQ(AXP288_IRQ_QCBTO),
  636. DEFINE_RES_IRQ(AXP288_IRQ_CBTO),
  637. };
  638. static const char * const axp288_fuel_gauge_suppliers[] = { "axp288_charger" };
  639. static const struct property_entry axp288_fuel_gauge_properties[] = {
  640. PROPERTY_ENTRY_STRING_ARRAY("supplied-from", axp288_fuel_gauge_suppliers),
  641. { }
  642. };
  643. static const struct software_node axp288_fuel_gauge_sw_node = {
  644. .name = "axp288_fuel_gauge",
  645. .properties = axp288_fuel_gauge_properties,
  646. };
  647. static const struct mfd_cell axp288_cells[] = {
  648. {
  649. .name = "axp288_adc",
  650. .num_resources = ARRAY_SIZE(axp288_adc_resources),
  651. .resources = axp288_adc_resources,
  652. }, {
  653. .name = "axp288_extcon",
  654. .num_resources = ARRAY_SIZE(axp288_extcon_resources),
  655. .resources = axp288_extcon_resources,
  656. }, {
  657. .name = "axp288_charger",
  658. .num_resources = ARRAY_SIZE(axp288_charger_resources),
  659. .resources = axp288_charger_resources,
  660. }, {
  661. .name = "axp288_fuel_gauge",
  662. .num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources),
  663. .resources = axp288_fuel_gauge_resources,
  664. .swnode = &axp288_fuel_gauge_sw_node,
  665. }, {
  666. .name = "axp221-pek",
  667. .num_resources = ARRAY_SIZE(axp288_power_button_resources),
  668. .resources = axp288_power_button_resources,
  669. }, {
  670. .name = "axp288_pmic_acpi",
  671. },
  672. };
  673. static const struct mfd_cell axp803_cells[] = {
  674. {
  675. .name = "axp221-pek",
  676. .num_resources = ARRAY_SIZE(axp803_pek_resources),
  677. .resources = axp803_pek_resources,
  678. }, {
  679. .name = "axp20x-gpio",
  680. .of_compatible = "x-powers,axp813-gpio",
  681. }, {
  682. .name = "axp813-adc",
  683. .of_compatible = "x-powers,axp813-adc",
  684. }, {
  685. .name = "axp20x-battery-power-supply",
  686. .of_compatible = "x-powers,axp813-battery-power-supply",
  687. }, {
  688. .name = "axp20x-ac-power-supply",
  689. .of_compatible = "x-powers,axp813-ac-power-supply",
  690. .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
  691. .resources = axp20x_ac_power_supply_resources,
  692. }, {
  693. .name = "axp20x-usb-power-supply",
  694. .num_resources = ARRAY_SIZE(axp803_usb_power_supply_resources),
  695. .resources = axp803_usb_power_supply_resources,
  696. .of_compatible = "x-powers,axp813-usb-power-supply",
  697. },
  698. { .name = "axp20x-regulator" },
  699. };
  700. static const struct mfd_cell axp806_self_working_cells[] = {
  701. {
  702. .name = "axp221-pek",
  703. .num_resources = ARRAY_SIZE(axp806_pek_resources),
  704. .resources = axp806_pek_resources,
  705. },
  706. { .name = "axp20x-regulator" },
  707. };
  708. static const struct mfd_cell axp806_cells[] = {
  709. {
  710. .id = 2,
  711. .name = "axp20x-regulator",
  712. },
  713. };
  714. static const struct mfd_cell axp809_cells[] = {
  715. {
  716. .name = "axp20x-gpio",
  717. .of_compatible = "x-powers,axp221-gpio",
  718. }, {
  719. .name = "axp221-pek",
  720. .num_resources = ARRAY_SIZE(axp809_pek_resources),
  721. .resources = axp809_pek_resources,
  722. }, {
  723. .id = 1,
  724. .name = "axp20x-regulator",
  725. },
  726. };
  727. static const struct mfd_cell axp813_cells[] = {
  728. {
  729. .name = "axp221-pek",
  730. .num_resources = ARRAY_SIZE(axp803_pek_resources),
  731. .resources = axp803_pek_resources,
  732. }, {
  733. .name = "axp20x-regulator",
  734. }, {
  735. .name = "axp20x-gpio",
  736. .of_compatible = "x-powers,axp813-gpio",
  737. }, {
  738. .name = "axp813-adc",
  739. .of_compatible = "x-powers,axp813-adc",
  740. }, {
  741. .name = "axp20x-battery-power-supply",
  742. .of_compatible = "x-powers,axp813-battery-power-supply",
  743. }, {
  744. .name = "axp20x-ac-power-supply",
  745. .of_compatible = "x-powers,axp813-ac-power-supply",
  746. .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
  747. .resources = axp20x_ac_power_supply_resources,
  748. }, {
  749. .name = "axp20x-usb-power-supply",
  750. .num_resources = ARRAY_SIZE(axp803_usb_power_supply_resources),
  751. .resources = axp803_usb_power_supply_resources,
  752. .of_compatible = "x-powers,axp813-usb-power-supply",
  753. },
  754. };
  755. static struct axp20x_dev *axp20x_pm_power_off;
  756. static void axp20x_power_off(void)
  757. {
  758. if (axp20x_pm_power_off->variant == AXP288_ID)
  759. return;
  760. regmap_write(axp20x_pm_power_off->regmap, AXP20X_OFF_CTRL,
  761. AXP20X_OFF);
  762. /* Give capacitors etc. time to drain to avoid kernel panic msg. */
  763. mdelay(500);
  764. }
  765. int axp20x_match_device(struct axp20x_dev *axp20x)
  766. {
  767. struct device *dev = axp20x->dev;
  768. const struct acpi_device_id *acpi_id;
  769. const struct of_device_id *of_id;
  770. if (dev->of_node) {
  771. of_id = of_match_device(dev->driver->of_match_table, dev);
  772. if (!of_id) {
  773. dev_err(dev, "Unable to match OF ID\n");
  774. return -ENODEV;
  775. }
  776. axp20x->variant = (long)of_id->data;
  777. } else {
  778. acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev);
  779. if (!acpi_id || !acpi_id->driver_data) {
  780. dev_err(dev, "Unable to match ACPI ID and data\n");
  781. return -ENODEV;
  782. }
  783. axp20x->variant = (long)acpi_id->driver_data;
  784. }
  785. switch (axp20x->variant) {
  786. case AXP152_ID:
  787. axp20x->nr_cells = ARRAY_SIZE(axp152_cells);
  788. axp20x->cells = axp152_cells;
  789. axp20x->regmap_cfg = &axp152_regmap_config;
  790. axp20x->regmap_irq_chip = &axp152_regmap_irq_chip;
  791. break;
  792. case AXP202_ID:
  793. case AXP209_ID:
  794. axp20x->nr_cells = ARRAY_SIZE(axp20x_cells);
  795. axp20x->cells = axp20x_cells;
  796. axp20x->regmap_cfg = &axp20x_regmap_config;
  797. axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip;
  798. break;
  799. case AXP221_ID:
  800. axp20x->nr_cells = ARRAY_SIZE(axp221_cells);
  801. axp20x->cells = axp221_cells;
  802. axp20x->regmap_cfg = &axp22x_regmap_config;
  803. axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
  804. break;
  805. case AXP223_ID:
  806. axp20x->nr_cells = ARRAY_SIZE(axp223_cells);
  807. axp20x->cells = axp223_cells;
  808. axp20x->regmap_cfg = &axp22x_regmap_config;
  809. axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
  810. break;
  811. case AXP288_ID:
  812. axp20x->cells = axp288_cells;
  813. axp20x->nr_cells = ARRAY_SIZE(axp288_cells);
  814. axp20x->regmap_cfg = &axp288_regmap_config;
  815. axp20x->regmap_irq_chip = &axp288_regmap_irq_chip;
  816. axp20x->irq_flags = IRQF_TRIGGER_LOW;
  817. break;
  818. case AXP803_ID:
  819. axp20x->nr_cells = ARRAY_SIZE(axp803_cells);
  820. axp20x->cells = axp803_cells;
  821. axp20x->regmap_cfg = &axp288_regmap_config;
  822. axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
  823. break;
  824. case AXP806_ID:
  825. /*
  826. * Don't register the power key part if in slave mode or
  827. * if there is no interrupt line.
  828. */
  829. if (of_property_read_bool(axp20x->dev->of_node,
  830. "x-powers,self-working-mode") &&
  831. axp20x->irq > 0) {
  832. axp20x->nr_cells = ARRAY_SIZE(axp806_self_working_cells);
  833. axp20x->cells = axp806_self_working_cells;
  834. } else {
  835. axp20x->nr_cells = ARRAY_SIZE(axp806_cells);
  836. axp20x->cells = axp806_cells;
  837. }
  838. axp20x->regmap_cfg = &axp806_regmap_config;
  839. axp20x->regmap_irq_chip = &axp806_regmap_irq_chip;
  840. break;
  841. case AXP809_ID:
  842. axp20x->nr_cells = ARRAY_SIZE(axp809_cells);
  843. axp20x->cells = axp809_cells;
  844. axp20x->regmap_cfg = &axp22x_regmap_config;
  845. axp20x->regmap_irq_chip = &axp809_regmap_irq_chip;
  846. break;
  847. case AXP813_ID:
  848. axp20x->nr_cells = ARRAY_SIZE(axp813_cells);
  849. axp20x->cells = axp813_cells;
  850. axp20x->regmap_cfg = &axp288_regmap_config;
  851. /*
  852. * The IRQ table given in the datasheet is incorrect.
  853. * In IRQ enable/status registers 1, there are separate
  854. * IRQs for ACIN and VBUS, instead of bits [7:5] being
  855. * the same as bits [4:2]. So it shares the same IRQs
  856. * as the AXP803, rather than the AXP288.
  857. */
  858. axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
  859. break;
  860. default:
  861. dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant);
  862. return -EINVAL;
  863. }
  864. dev_info(dev, "AXP20x variant %s found\n",
  865. axp20x_model_names[axp20x->variant]);
  866. return 0;
  867. }
  868. EXPORT_SYMBOL(axp20x_match_device);
  869. int axp20x_device_probe(struct axp20x_dev *axp20x)
  870. {
  871. int ret;
  872. /*
  873. * The AXP806 supports either master/standalone or slave mode.
  874. * Slave mode allows sharing the serial bus, even with multiple
  875. * AXP806 which all have the same hardware address.
  876. *
  877. * This is done with extra "serial interface address extension",
  878. * or AXP806_BUS_ADDR_EXT, and "register address extension", or
  879. * AXP806_REG_ADDR_EXT, registers. The former is read-only, with
  880. * 1 bit customizable at the factory, and 1 bit depending on the
  881. * state of an external pin. The latter is writable. The device
  882. * will only respond to operations to its other registers when
  883. * the these device addressing bits (in the upper 4 bits of the
  884. * registers) match.
  885. *
  886. * By default we support an AXP806 chained to an AXP809 in slave
  887. * mode. Boards which use an AXP806 in master mode can set the
  888. * property "x-powers,master-mode" to override the default.
  889. */
  890. if (axp20x->variant == AXP806_ID) {
  891. if (of_property_read_bool(axp20x->dev->of_node,
  892. "x-powers,master-mode") ||
  893. of_property_read_bool(axp20x->dev->of_node,
  894. "x-powers,self-working-mode"))
  895. regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT,
  896. AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE);
  897. else
  898. regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT,
  899. AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE);
  900. }
  901. /* Only if there is an interrupt line connected towards the CPU. */
  902. if (axp20x->irq > 0) {
  903. ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq,
  904. IRQF_ONESHOT | IRQF_SHARED | axp20x->irq_flags,
  905. -1, axp20x->regmap_irq_chip,
  906. &axp20x->regmap_irqc);
  907. if (ret) {
  908. dev_err(axp20x->dev, "failed to add irq chip: %d\n",
  909. ret);
  910. return ret;
  911. }
  912. }
  913. ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells,
  914. axp20x->nr_cells, NULL, 0, NULL);
  915. if (ret) {
  916. dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret);
  917. regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
  918. return ret;
  919. }
  920. if (!pm_power_off) {
  921. axp20x_pm_power_off = axp20x;
  922. pm_power_off = axp20x_power_off;
  923. }
  924. dev_info(axp20x->dev, "AXP20X driver loaded\n");
  925. return 0;
  926. }
  927. EXPORT_SYMBOL(axp20x_device_probe);
  928. void axp20x_device_remove(struct axp20x_dev *axp20x)
  929. {
  930. if (axp20x == axp20x_pm_power_off) {
  931. axp20x_pm_power_off = NULL;
  932. pm_power_off = NULL;
  933. }
  934. mfd_remove_devices(axp20x->dev);
  935. regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
  936. }
  937. EXPORT_SYMBOL(axp20x_device_remove);
  938. MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X");
  939. MODULE_AUTHOR("Carlo Caione <[email protected]>");
  940. MODULE_LICENSE("GPL");