tegra194.c 24 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2017-2021 NVIDIA CORPORATION. All rights reserved.
  4. */
  5. #include <soc/tegra/mc.h>
  6. #include <dt-bindings/memory/tegra194-mc.h>
  7. #include "mc.h"
  8. static const struct tegra_mc_client tegra194_mc_clients[] = {
  9. {
  10. .id = TEGRA194_MEMORY_CLIENT_PTCR,
  11. .name = "ptcr",
  12. .sid = TEGRA194_SID_PASSTHROUGH,
  13. .regs = {
  14. .sid = {
  15. .override = 0x000,
  16. .security = 0x004,
  17. },
  18. },
  19. }, {
  20. .id = TEGRA194_MEMORY_CLIENT_MIU7R,
  21. .name = "miu7r",
  22. .sid = TEGRA194_SID_MIU,
  23. .regs = {
  24. .sid = {
  25. .override = 0x008,
  26. .security = 0x00c,
  27. },
  28. },
  29. }, {
  30. .id = TEGRA194_MEMORY_CLIENT_MIU7W,
  31. .name = "miu7w",
  32. .sid = TEGRA194_SID_MIU,
  33. .regs = {
  34. .sid = {
  35. .override = 0x010,
  36. .security = 0x014,
  37. },
  38. },
  39. }, {
  40. .id = TEGRA194_MEMORY_CLIENT_HDAR,
  41. .name = "hdar",
  42. .sid = TEGRA194_SID_HDA,
  43. .regs = {
  44. .sid = {
  45. .override = 0x0a8,
  46. .security = 0x0ac,
  47. },
  48. },
  49. }, {
  50. .id = TEGRA194_MEMORY_CLIENT_HOST1XDMAR,
  51. .name = "host1xdmar",
  52. .sid = TEGRA194_SID_HOST1X,
  53. .regs = {
  54. .sid = {
  55. .override = 0x0b0,
  56. .security = 0x0b4,
  57. },
  58. },
  59. }, {
  60. .id = TEGRA194_MEMORY_CLIENT_NVENCSRD,
  61. .name = "nvencsrd",
  62. .sid = TEGRA194_SID_NVENC,
  63. .regs = {
  64. .sid = {
  65. .override = 0x0e0,
  66. .security = 0x0e4,
  67. },
  68. },
  69. }, {
  70. .id = TEGRA194_MEMORY_CLIENT_SATAR,
  71. .name = "satar",
  72. .sid = TEGRA194_SID_SATA,
  73. .regs = {
  74. .sid = {
  75. .override = 0x0f8,
  76. .security = 0x0fc,
  77. },
  78. },
  79. }, {
  80. .id = TEGRA194_MEMORY_CLIENT_MPCORER,
  81. .name = "mpcorer",
  82. .sid = TEGRA194_SID_PASSTHROUGH,
  83. .regs = {
  84. .sid = {
  85. .override = 0x138,
  86. .security = 0x13c,
  87. },
  88. },
  89. }, {
  90. .id = TEGRA194_MEMORY_CLIENT_NVENCSWR,
  91. .name = "nvencswr",
  92. .sid = TEGRA194_SID_NVENC,
  93. .regs = {
  94. .sid = {
  95. .override = 0x158,
  96. .security = 0x15c,
  97. },
  98. },
  99. }, {
  100. .id = TEGRA194_MEMORY_CLIENT_HDAW,
  101. .name = "hdaw",
  102. .sid = TEGRA194_SID_HDA,
  103. .regs = {
  104. .sid = {
  105. .override = 0x1a8,
  106. .security = 0x1ac,
  107. },
  108. },
  109. }, {
  110. .id = TEGRA194_MEMORY_CLIENT_MPCOREW,
  111. .name = "mpcorew",
  112. .sid = TEGRA194_SID_PASSTHROUGH,
  113. .regs = {
  114. .sid = {
  115. .override = 0x1c8,
  116. .security = 0x1cc,
  117. },
  118. },
  119. }, {
  120. .id = TEGRA194_MEMORY_CLIENT_SATAW,
  121. .name = "sataw",
  122. .sid = TEGRA194_SID_SATA,
  123. .regs = {
  124. .sid = {
  125. .override = 0x1e8,
  126. .security = 0x1ec,
  127. },
  128. },
  129. }, {
  130. .id = TEGRA194_MEMORY_CLIENT_ISPRA,
  131. .name = "ispra",
  132. .sid = TEGRA194_SID_ISP,
  133. .regs = {
  134. .sid = {
  135. .override = 0x220,
  136. .security = 0x224,
  137. },
  138. },
  139. }, {
  140. .id = TEGRA194_MEMORY_CLIENT_ISPFALR,
  141. .name = "ispfalr",
  142. .sid = TEGRA194_SID_ISP_FALCON,
  143. .regs = {
  144. .sid = {
  145. .override = 0x228,
  146. .security = 0x22c,
  147. },
  148. },
  149. }, {
  150. .id = TEGRA194_MEMORY_CLIENT_ISPWA,
  151. .name = "ispwa",
  152. .sid = TEGRA194_SID_ISP,
  153. .regs = {
  154. .sid = {
  155. .override = 0x230,
  156. .security = 0x234,
  157. },
  158. },
  159. }, {
  160. .id = TEGRA194_MEMORY_CLIENT_ISPWB,
  161. .name = "ispwb",
  162. .sid = TEGRA194_SID_ISP,
  163. .regs = {
  164. .sid = {
  165. .override = 0x238,
  166. .security = 0x23c,
  167. },
  168. },
  169. }, {
  170. .id = TEGRA194_MEMORY_CLIENT_XUSB_HOSTR,
  171. .name = "xusb_hostr",
  172. .sid = TEGRA194_SID_XUSB_HOST,
  173. .regs = {
  174. .sid = {
  175. .override = 0x250,
  176. .security = 0x254,
  177. },
  178. },
  179. }, {
  180. .id = TEGRA194_MEMORY_CLIENT_XUSB_HOSTW,
  181. .name = "xusb_hostw",
  182. .sid = TEGRA194_SID_XUSB_HOST,
  183. .regs = {
  184. .sid = {
  185. .override = 0x258,
  186. .security = 0x25c,
  187. },
  188. },
  189. }, {
  190. .id = TEGRA194_MEMORY_CLIENT_XUSB_DEVR,
  191. .name = "xusb_devr",
  192. .sid = TEGRA194_SID_XUSB_DEV,
  193. .regs = {
  194. .sid = {
  195. .override = 0x260,
  196. .security = 0x264,
  197. },
  198. },
  199. }, {
  200. .id = TEGRA194_MEMORY_CLIENT_XUSB_DEVW,
  201. .name = "xusb_devw",
  202. .sid = TEGRA194_SID_XUSB_DEV,
  203. .regs = {
  204. .sid = {
  205. .override = 0x268,
  206. .security = 0x26c,
  207. },
  208. },
  209. }, {
  210. .id = TEGRA194_MEMORY_CLIENT_SDMMCRA,
  211. .name = "sdmmcra",
  212. .sid = TEGRA194_SID_SDMMC1,
  213. .regs = {
  214. .sid = {
  215. .override = 0x300,
  216. .security = 0x304,
  217. },
  218. },
  219. }, {
  220. .id = TEGRA194_MEMORY_CLIENT_SDMMCR,
  221. .name = "sdmmcr",
  222. .sid = TEGRA194_SID_SDMMC3,
  223. .regs = {
  224. .sid = {
  225. .override = 0x310,
  226. .security = 0x314,
  227. },
  228. },
  229. }, {
  230. .id = TEGRA194_MEMORY_CLIENT_SDMMCRAB,
  231. .name = "sdmmcrab",
  232. .sid = TEGRA194_SID_SDMMC4,
  233. .regs = {
  234. .sid = {
  235. .override = 0x318,
  236. .security = 0x31c,
  237. },
  238. },
  239. }, {
  240. .id = TEGRA194_MEMORY_CLIENT_SDMMCWA,
  241. .name = "sdmmcwa",
  242. .sid = TEGRA194_SID_SDMMC1,
  243. .regs = {
  244. .sid = {
  245. .override = 0x320,
  246. .security = 0x324,
  247. },
  248. },
  249. }, {
  250. .id = TEGRA194_MEMORY_CLIENT_SDMMCW,
  251. .name = "sdmmcw",
  252. .sid = TEGRA194_SID_SDMMC3,
  253. .regs = {
  254. .sid = {
  255. .override = 0x330,
  256. .security = 0x334,
  257. },
  258. },
  259. }, {
  260. .id = TEGRA194_MEMORY_CLIENT_SDMMCWAB,
  261. .name = "sdmmcwab",
  262. .sid = TEGRA194_SID_SDMMC4,
  263. .regs = {
  264. .sid = {
  265. .override = 0x338,
  266. .security = 0x33c,
  267. },
  268. },
  269. }, {
  270. .id = TEGRA194_MEMORY_CLIENT_VICSRD,
  271. .name = "vicsrd",
  272. .sid = TEGRA194_SID_VIC,
  273. .regs = {
  274. .sid = {
  275. .override = 0x360,
  276. .security = 0x364,
  277. },
  278. },
  279. }, {
  280. .id = TEGRA194_MEMORY_CLIENT_VICSWR,
  281. .name = "vicswr",
  282. .sid = TEGRA194_SID_VIC,
  283. .regs = {
  284. .sid = {
  285. .override = 0x368,
  286. .security = 0x36c,
  287. },
  288. },
  289. }, {
  290. .id = TEGRA194_MEMORY_CLIENT_VIW,
  291. .name = "viw",
  292. .sid = TEGRA194_SID_VI,
  293. .regs = {
  294. .sid = {
  295. .override = 0x390,
  296. .security = 0x394,
  297. },
  298. },
  299. }, {
  300. .id = TEGRA194_MEMORY_CLIENT_NVDECSRD,
  301. .name = "nvdecsrd",
  302. .sid = TEGRA194_SID_NVDEC,
  303. .regs = {
  304. .sid = {
  305. .override = 0x3c0,
  306. .security = 0x3c4,
  307. },
  308. },
  309. }, {
  310. .id = TEGRA194_MEMORY_CLIENT_NVDECSWR,
  311. .name = "nvdecswr",
  312. .sid = TEGRA194_SID_NVDEC,
  313. .regs = {
  314. .sid = {
  315. .override = 0x3c8,
  316. .security = 0x3cc,
  317. },
  318. },
  319. }, {
  320. .id = TEGRA194_MEMORY_CLIENT_APER,
  321. .name = "aper",
  322. .sid = TEGRA194_SID_APE,
  323. .regs = {
  324. .sid = {
  325. .override = 0x3c0,
  326. .security = 0x3c4,
  327. },
  328. },
  329. }, {
  330. .id = TEGRA194_MEMORY_CLIENT_APEW,
  331. .name = "apew",
  332. .sid = TEGRA194_SID_APE,
  333. .regs = {
  334. .sid = {
  335. .override = 0x3d0,
  336. .security = 0x3d4,
  337. },
  338. },
  339. }, {
  340. .id = TEGRA194_MEMORY_CLIENT_NVJPGSRD,
  341. .name = "nvjpgsrd",
  342. .sid = TEGRA194_SID_NVJPG,
  343. .regs = {
  344. .sid = {
  345. .override = 0x3f0,
  346. .security = 0x3f4,
  347. },
  348. },
  349. }, {
  350. .id = TEGRA194_MEMORY_CLIENT_NVJPGSWR,
  351. .name = "nvjpgswr",
  352. .sid = TEGRA194_SID_NVJPG,
  353. .regs = {
  354. .sid = {
  355. .override = 0x3f0,
  356. .security = 0x3f4,
  357. },
  358. },
  359. }, {
  360. .name = "axiapr",
  361. .id = TEGRA194_MEMORY_CLIENT_AXIAPR,
  362. .sid = TEGRA194_SID_PASSTHROUGH,
  363. .regs = {
  364. .sid = {
  365. .override = 0x410,
  366. .security = 0x414,
  367. },
  368. },
  369. }, {
  370. .id = TEGRA194_MEMORY_CLIENT_AXIAPW,
  371. .name = "axiapw",
  372. .sid = TEGRA194_SID_PASSTHROUGH,
  373. .regs = {
  374. .sid = {
  375. .override = 0x418,
  376. .security = 0x41c,
  377. },
  378. },
  379. }, {
  380. .id = TEGRA194_MEMORY_CLIENT_ETRR,
  381. .name = "etrr",
  382. .sid = TEGRA194_SID_ETR,
  383. .regs = {
  384. .sid = {
  385. .override = 0x420,
  386. .security = 0x424,
  387. },
  388. },
  389. }, {
  390. .id = TEGRA194_MEMORY_CLIENT_ETRW,
  391. .name = "etrw",
  392. .sid = TEGRA194_SID_ETR,
  393. .regs = {
  394. .sid = {
  395. .override = 0x428,
  396. .security = 0x42c,
  397. },
  398. },
  399. }, {
  400. .id = TEGRA194_MEMORY_CLIENT_AXISR,
  401. .name = "axisr",
  402. .sid = TEGRA194_SID_PASSTHROUGH,
  403. .regs = {
  404. .sid = {
  405. .override = 0x460,
  406. .security = 0x464,
  407. },
  408. },
  409. }, {
  410. .id = TEGRA194_MEMORY_CLIENT_AXISW,
  411. .name = "axisw",
  412. .sid = TEGRA194_SID_PASSTHROUGH,
  413. .regs = {
  414. .sid = {
  415. .override = 0x468,
  416. .security = 0x46c,
  417. },
  418. },
  419. }, {
  420. .id = TEGRA194_MEMORY_CLIENT_EQOSR,
  421. .name = "eqosr",
  422. .sid = TEGRA194_SID_EQOS,
  423. .regs = {
  424. .sid = {
  425. .override = 0x470,
  426. .security = 0x474,
  427. },
  428. },
  429. }, {
  430. .name = "eqosw",
  431. .id = TEGRA194_MEMORY_CLIENT_EQOSW,
  432. .sid = TEGRA194_SID_EQOS,
  433. .regs = {
  434. .sid = {
  435. .override = 0x478,
  436. .security = 0x47c,
  437. },
  438. },
  439. }, {
  440. .id = TEGRA194_MEMORY_CLIENT_UFSHCR,
  441. .name = "ufshcr",
  442. .sid = TEGRA194_SID_UFSHC,
  443. .regs = {
  444. .sid = {
  445. .override = 0x480,
  446. .security = 0x484,
  447. },
  448. },
  449. }, {
  450. .id = TEGRA194_MEMORY_CLIENT_UFSHCW,
  451. .name = "ufshcw",
  452. .sid = TEGRA194_SID_UFSHC,
  453. .regs = {
  454. .sid = {
  455. .override = 0x488,
  456. .security = 0x48c,
  457. },
  458. },
  459. }, {
  460. .id = TEGRA194_MEMORY_CLIENT_NVDISPLAYR,
  461. .name = "nvdisplayr",
  462. .sid = TEGRA194_SID_NVDISPLAY,
  463. .regs = {
  464. .sid = {
  465. .override = 0x490,
  466. .security = 0x494,
  467. },
  468. },
  469. }, {
  470. .id = TEGRA194_MEMORY_CLIENT_BPMPR,
  471. .name = "bpmpr",
  472. .sid = TEGRA194_SID_BPMP,
  473. .regs = {
  474. .sid = {
  475. .override = 0x498,
  476. .security = 0x49c,
  477. },
  478. },
  479. }, {
  480. .id = TEGRA194_MEMORY_CLIENT_BPMPW,
  481. .name = "bpmpw",
  482. .sid = TEGRA194_SID_BPMP,
  483. .regs = {
  484. .sid = {
  485. .override = 0x4a0,
  486. .security = 0x4a4,
  487. },
  488. },
  489. }, {
  490. .id = TEGRA194_MEMORY_CLIENT_BPMPDMAR,
  491. .name = "bpmpdmar",
  492. .sid = TEGRA194_SID_BPMP,
  493. .regs = {
  494. .sid = {
  495. .override = 0x4a8,
  496. .security = 0x4ac,
  497. },
  498. },
  499. }, {
  500. .id = TEGRA194_MEMORY_CLIENT_BPMPDMAW,
  501. .name = "bpmpdmaw",
  502. .sid = TEGRA194_SID_BPMP,
  503. .regs = {
  504. .sid = {
  505. .override = 0x4b0,
  506. .security = 0x4b4,
  507. },
  508. },
  509. }, {
  510. .id = TEGRA194_MEMORY_CLIENT_AONR,
  511. .name = "aonr",
  512. .sid = TEGRA194_SID_AON,
  513. .regs = {
  514. .sid = {
  515. .override = 0x4b8,
  516. .security = 0x4bc,
  517. },
  518. },
  519. }, {
  520. .id = TEGRA194_MEMORY_CLIENT_AONW,
  521. .name = "aonw",
  522. .sid = TEGRA194_SID_AON,
  523. .regs = {
  524. .sid = {
  525. .override = 0x4c0,
  526. .security = 0x4c4,
  527. },
  528. },
  529. }, {
  530. .id = TEGRA194_MEMORY_CLIENT_AONDMAR,
  531. .name = "aondmar",
  532. .sid = TEGRA194_SID_AON,
  533. .regs = {
  534. .sid = {
  535. .override = 0x4c8,
  536. .security = 0x4cc,
  537. },
  538. },
  539. }, {
  540. .id = TEGRA194_MEMORY_CLIENT_AONDMAW,
  541. .name = "aondmaw",
  542. .sid = TEGRA194_SID_AON,
  543. .regs = {
  544. .sid = {
  545. .override = 0x4d0,
  546. .security = 0x4d4,
  547. },
  548. },
  549. }, {
  550. .id = TEGRA194_MEMORY_CLIENT_SCER,
  551. .name = "scer",
  552. .sid = TEGRA194_SID_SCE,
  553. .regs = {
  554. .sid = {
  555. .override = 0x4d8,
  556. .security = 0x4dc,
  557. },
  558. },
  559. }, {
  560. .id = TEGRA194_MEMORY_CLIENT_SCEW,
  561. .name = "scew",
  562. .sid = TEGRA194_SID_SCE,
  563. .regs = {
  564. .sid = {
  565. .override = 0x4e0,
  566. .security = 0x4e4,
  567. },
  568. },
  569. }, {
  570. .id = TEGRA194_MEMORY_CLIENT_SCEDMAR,
  571. .name = "scedmar",
  572. .sid = TEGRA194_SID_SCE,
  573. .regs = {
  574. .sid = {
  575. .override = 0x4e8,
  576. .security = 0x4ec,
  577. },
  578. },
  579. }, {
  580. .id = TEGRA194_MEMORY_CLIENT_SCEDMAW,
  581. .name = "scedmaw",
  582. .sid = TEGRA194_SID_SCE,
  583. .regs = {
  584. .sid = {
  585. .override = 0x4f0,
  586. .security = 0x4f4,
  587. },
  588. },
  589. }, {
  590. .id = TEGRA194_MEMORY_CLIENT_APEDMAR,
  591. .name = "apedmar",
  592. .sid = TEGRA194_SID_APE,
  593. .regs = {
  594. .sid = {
  595. .override = 0x4f8,
  596. .security = 0x4fc,
  597. },
  598. },
  599. }, {
  600. .id = TEGRA194_MEMORY_CLIENT_APEDMAW,
  601. .name = "apedmaw",
  602. .sid = TEGRA194_SID_APE,
  603. .regs = {
  604. .sid = {
  605. .override = 0x500,
  606. .security = 0x504,
  607. },
  608. },
  609. }, {
  610. .id = TEGRA194_MEMORY_CLIENT_NVDISPLAYR1,
  611. .name = "nvdisplayr1",
  612. .sid = TEGRA194_SID_NVDISPLAY,
  613. .regs = {
  614. .sid = {
  615. .override = 0x508,
  616. .security = 0x50c,
  617. },
  618. },
  619. }, {
  620. .id = TEGRA194_MEMORY_CLIENT_VICSRD1,
  621. .name = "vicsrd1",
  622. .sid = TEGRA194_SID_VIC,
  623. .regs = {
  624. .sid = {
  625. .override = 0x510,
  626. .security = 0x514,
  627. },
  628. },
  629. }, {
  630. .id = TEGRA194_MEMORY_CLIENT_NVDECSRD1,
  631. .name = "nvdecsrd1",
  632. .sid = TEGRA194_SID_NVDEC,
  633. .regs = {
  634. .sid = {
  635. .override = 0x518,
  636. .security = 0x51c,
  637. },
  638. },
  639. }, {
  640. .id = TEGRA194_MEMORY_CLIENT_MIU0R,
  641. .name = "miu0r",
  642. .sid = TEGRA194_SID_MIU,
  643. .regs = {
  644. .sid = {
  645. .override = 0x530,
  646. .security = 0x534,
  647. },
  648. },
  649. }, {
  650. .name = "miu0w",
  651. .id = TEGRA194_MEMORY_CLIENT_MIU0W,
  652. .sid = TEGRA194_SID_MIU,
  653. .regs = {
  654. .sid = {
  655. .override = 0x538,
  656. .security = 0x53c,
  657. },
  658. },
  659. }, {
  660. .id = TEGRA194_MEMORY_CLIENT_MIU1R,
  661. .name = "miu1r",
  662. .sid = TEGRA194_SID_MIU,
  663. .regs = {
  664. .sid = {
  665. .override = 0x540,
  666. .security = 0x544,
  667. },
  668. },
  669. }, {
  670. .id = TEGRA194_MEMORY_CLIENT_MIU1W,
  671. .name = "miu1w",
  672. .sid = TEGRA194_SID_MIU,
  673. .regs = {
  674. .sid = {
  675. .override = 0x548,
  676. .security = 0x54c,
  677. },
  678. },
  679. }, {
  680. .id = TEGRA194_MEMORY_CLIENT_MIU2R,
  681. .name = "miu2r",
  682. .sid = TEGRA194_SID_MIU,
  683. .regs = {
  684. .sid = {
  685. .override = 0x570,
  686. .security = 0x574,
  687. },
  688. },
  689. }, {
  690. .id = TEGRA194_MEMORY_CLIENT_MIU2W,
  691. .name = "miu2w",
  692. .sid = TEGRA194_SID_MIU,
  693. .regs = {
  694. .sid = {
  695. .override = 0x578,
  696. .security = 0x57c,
  697. },
  698. },
  699. }, {
  700. .id = TEGRA194_MEMORY_CLIENT_MIU3R,
  701. .name = "miu3r",
  702. .sid = TEGRA194_SID_MIU,
  703. .regs = {
  704. .sid = {
  705. .override = 0x580,
  706. .security = 0x584,
  707. },
  708. },
  709. }, {
  710. .id = TEGRA194_MEMORY_CLIENT_MIU3W,
  711. .name = "miu3w",
  712. .sid = TEGRA194_SID_MIU,
  713. .regs = {
  714. .sid = {
  715. .override = 0x588,
  716. .security = 0x58c,
  717. },
  718. },
  719. }, {
  720. .id = TEGRA194_MEMORY_CLIENT_MIU4R,
  721. .name = "miu4r",
  722. .sid = TEGRA194_SID_MIU,
  723. .regs = {
  724. .sid = {
  725. .override = 0x590,
  726. .security = 0x594,
  727. },
  728. },
  729. }, {
  730. .id = TEGRA194_MEMORY_CLIENT_MIU4W,
  731. .name = "miu4w",
  732. .sid = TEGRA194_SID_MIU,
  733. .regs = {
  734. .sid = {
  735. .override = 0x598,
  736. .security = 0x59c,
  737. },
  738. },
  739. }, {
  740. .id = TEGRA194_MEMORY_CLIENT_DPMUR,
  741. .name = "dpmur",
  742. .sid = TEGRA194_SID_PASSTHROUGH,
  743. .regs = {
  744. .sid = {
  745. .override = 0x598,
  746. .security = 0x59c,
  747. },
  748. },
  749. }, {
  750. .id = TEGRA194_MEMORY_CLIENT_VIFALR,
  751. .name = "vifalr",
  752. .sid = TEGRA194_SID_VI_FALCON,
  753. .regs = {
  754. .sid = {
  755. .override = 0x5e0,
  756. .security = 0x5e4,
  757. },
  758. },
  759. }, {
  760. .id = TEGRA194_MEMORY_CLIENT_VIFALW,
  761. .name = "vifalw",
  762. .sid = TEGRA194_SID_VI_FALCON,
  763. .regs = {
  764. .sid = {
  765. .override = 0x5e8,
  766. .security = 0x5ec,
  767. },
  768. },
  769. }, {
  770. .id = TEGRA194_MEMORY_CLIENT_DLA0RDA,
  771. .name = "dla0rda",
  772. .sid = TEGRA194_SID_NVDLA0,
  773. .regs = {
  774. .sid = {
  775. .override = 0x5f0,
  776. .security = 0x5f4,
  777. },
  778. },
  779. }, {
  780. .id = TEGRA194_MEMORY_CLIENT_DLA0FALRDB,
  781. .name = "dla0falrdb",
  782. .sid = TEGRA194_SID_NVDLA0,
  783. .regs = {
  784. .sid = {
  785. .override = 0x5f8,
  786. .security = 0x5fc,
  787. },
  788. },
  789. }, {
  790. .id = TEGRA194_MEMORY_CLIENT_DLA0WRA,
  791. .name = "dla0wra",
  792. .sid = TEGRA194_SID_NVDLA0,
  793. .regs = {
  794. .sid = {
  795. .override = 0x600,
  796. .security = 0x604,
  797. },
  798. },
  799. }, {
  800. .id = TEGRA194_MEMORY_CLIENT_DLA0FALWRB,
  801. .name = "dla0falwrb",
  802. .sid = TEGRA194_SID_NVDLA0,
  803. .regs = {
  804. .sid = {
  805. .override = 0x608,
  806. .security = 0x60c,
  807. },
  808. },
  809. }, {
  810. .id = TEGRA194_MEMORY_CLIENT_DLA1RDA,
  811. .name = "dla1rda",
  812. .sid = TEGRA194_SID_NVDLA1,
  813. .regs = {
  814. .sid = {
  815. .override = 0x610,
  816. .security = 0x614,
  817. },
  818. },
  819. }, {
  820. .id = TEGRA194_MEMORY_CLIENT_DLA1FALRDB,
  821. .name = "dla1falrdb",
  822. .sid = TEGRA194_SID_NVDLA1,
  823. .regs = {
  824. .sid = {
  825. .override = 0x618,
  826. .security = 0x61c,
  827. },
  828. },
  829. }, {
  830. .id = TEGRA194_MEMORY_CLIENT_DLA1WRA,
  831. .name = "dla1wra",
  832. .sid = TEGRA194_SID_NVDLA1,
  833. .regs = {
  834. .sid = {
  835. .override = 0x620,
  836. .security = 0x624,
  837. },
  838. },
  839. }, {
  840. .id = TEGRA194_MEMORY_CLIENT_DLA1FALWRB,
  841. .name = "dla1falwrb",
  842. .sid = TEGRA194_SID_NVDLA1,
  843. .regs = {
  844. .sid = {
  845. .override = 0x628,
  846. .security = 0x62c,
  847. },
  848. },
  849. }, {
  850. .id = TEGRA194_MEMORY_CLIENT_PVA0RDA,
  851. .name = "pva0rda",
  852. .sid = TEGRA194_SID_PVA0,
  853. .regs = {
  854. .sid = {
  855. .override = 0x630,
  856. .security = 0x634,
  857. },
  858. },
  859. }, {
  860. .id = TEGRA194_MEMORY_CLIENT_PVA0RDB,
  861. .name = "pva0rdb",
  862. .sid = TEGRA194_SID_PVA0,
  863. .regs = {
  864. .sid = {
  865. .override = 0x638,
  866. .security = 0x63c,
  867. },
  868. },
  869. }, {
  870. .id = TEGRA194_MEMORY_CLIENT_PVA0RDC,
  871. .name = "pva0rdc",
  872. .sid = TEGRA194_SID_PVA0,
  873. .regs = {
  874. .sid = {
  875. .override = 0x640,
  876. .security = 0x644,
  877. },
  878. },
  879. }, {
  880. .id = TEGRA194_MEMORY_CLIENT_PVA0WRA,
  881. .name = "pva0wra",
  882. .sid = TEGRA194_SID_PVA0,
  883. .regs = {
  884. .sid = {
  885. .override = 0x648,
  886. .security = 0x64c,
  887. },
  888. },
  889. }, {
  890. .id = TEGRA194_MEMORY_CLIENT_PVA0WRB,
  891. .name = "pva0wrb",
  892. .sid = TEGRA194_SID_PVA0,
  893. .regs = {
  894. .sid = {
  895. .override = 0x650,
  896. .security = 0x654,
  897. },
  898. },
  899. }, {
  900. .id = TEGRA194_MEMORY_CLIENT_PVA0WRC,
  901. .name = "pva0wrc",
  902. .sid = TEGRA194_SID_PVA0,
  903. .regs = {
  904. .sid = {
  905. .override = 0x658,
  906. .security = 0x65c,
  907. },
  908. },
  909. }, {
  910. .id = TEGRA194_MEMORY_CLIENT_PVA1RDA,
  911. .name = "pva1rda",
  912. .sid = TEGRA194_SID_PVA1,
  913. .regs = {
  914. .sid = {
  915. .override = 0x660,
  916. .security = 0x664,
  917. },
  918. },
  919. }, {
  920. .id = TEGRA194_MEMORY_CLIENT_PVA1RDB,
  921. .name = "pva1rdb",
  922. .sid = TEGRA194_SID_PVA1,
  923. .regs = {
  924. .sid = {
  925. .override = 0x668,
  926. .security = 0x66c,
  927. },
  928. },
  929. }, {
  930. .id = TEGRA194_MEMORY_CLIENT_PVA1RDC,
  931. .name = "pva1rdc",
  932. .sid = TEGRA194_SID_PVA1,
  933. .regs = {
  934. .sid = {
  935. .override = 0x670,
  936. .security = 0x674,
  937. },
  938. },
  939. }, {
  940. .id = TEGRA194_MEMORY_CLIENT_PVA1WRA,
  941. .name = "pva1wra",
  942. .sid = TEGRA194_SID_PVA1,
  943. .regs = {
  944. .sid = {
  945. .override = 0x678,
  946. .security = 0x67c,
  947. },
  948. },
  949. }, {
  950. .id = TEGRA194_MEMORY_CLIENT_PVA1WRB,
  951. .name = "pva1wrb",
  952. .sid = TEGRA194_SID_PVA1,
  953. .regs = {
  954. .sid = {
  955. .override = 0x680,
  956. .security = 0x684,
  957. },
  958. },
  959. }, {
  960. .id = TEGRA194_MEMORY_CLIENT_PVA1WRC,
  961. .name = "pva1wrc",
  962. .sid = TEGRA194_SID_PVA1,
  963. .regs = {
  964. .sid = {
  965. .override = 0x688,
  966. .security = 0x68c,
  967. },
  968. },
  969. }, {
  970. .id = TEGRA194_MEMORY_CLIENT_RCER,
  971. .name = "rcer",
  972. .sid = TEGRA194_SID_RCE,
  973. .regs = {
  974. .sid = {
  975. .override = 0x690,
  976. .security = 0x694,
  977. },
  978. },
  979. }, {
  980. .id = TEGRA194_MEMORY_CLIENT_RCEW,
  981. .name = "rcew",
  982. .sid = TEGRA194_SID_RCE,
  983. .regs = {
  984. .sid = {
  985. .override = 0x698,
  986. .security = 0x69c,
  987. },
  988. },
  989. }, {
  990. .id = TEGRA194_MEMORY_CLIENT_RCEDMAR,
  991. .name = "rcedmar",
  992. .sid = TEGRA194_SID_RCE,
  993. .regs = {
  994. .sid = {
  995. .override = 0x6a0,
  996. .security = 0x6a4,
  997. },
  998. },
  999. }, {
  1000. .id = TEGRA194_MEMORY_CLIENT_RCEDMAW,
  1001. .name = "rcedmaw",
  1002. .sid = TEGRA194_SID_RCE,
  1003. .regs = {
  1004. .sid = {
  1005. .override = 0x6a8,
  1006. .security = 0x6ac,
  1007. },
  1008. },
  1009. }, {
  1010. .id = TEGRA194_MEMORY_CLIENT_NVENC1SRD,
  1011. .name = "nvenc1srd",
  1012. .sid = TEGRA194_SID_NVENC1,
  1013. .regs = {
  1014. .sid = {
  1015. .override = 0x6b0,
  1016. .security = 0x6b4,
  1017. },
  1018. },
  1019. }, {
  1020. .id = TEGRA194_MEMORY_CLIENT_NVENC1SWR,
  1021. .name = "nvenc1swr",
  1022. .sid = TEGRA194_SID_NVENC1,
  1023. .regs = {
  1024. .sid = {
  1025. .override = 0x6b8,
  1026. .security = 0x6bc,
  1027. },
  1028. },
  1029. }, {
  1030. .id = TEGRA194_MEMORY_CLIENT_PCIE0R,
  1031. .name = "pcie0r",
  1032. .sid = TEGRA194_SID_PCIE0,
  1033. .regs = {
  1034. .sid = {
  1035. .override = 0x6c0,
  1036. .security = 0x6c4,
  1037. },
  1038. },
  1039. }, {
  1040. .id = TEGRA194_MEMORY_CLIENT_PCIE0W,
  1041. .name = "pcie0w",
  1042. .sid = TEGRA194_SID_PCIE0,
  1043. .regs = {
  1044. .sid = {
  1045. .override = 0x6c8,
  1046. .security = 0x6cc,
  1047. },
  1048. },
  1049. }, {
  1050. .id = TEGRA194_MEMORY_CLIENT_PCIE1R,
  1051. .name = "pcie1r",
  1052. .sid = TEGRA194_SID_PCIE1,
  1053. .regs = {
  1054. .sid = {
  1055. .override = 0x6d0,
  1056. .security = 0x6d4,
  1057. },
  1058. },
  1059. }, {
  1060. .id = TEGRA194_MEMORY_CLIENT_PCIE1W,
  1061. .name = "pcie1w",
  1062. .sid = TEGRA194_SID_PCIE1,
  1063. .regs = {
  1064. .sid = {
  1065. .override = 0x6d8,
  1066. .security = 0x6dc,
  1067. },
  1068. },
  1069. }, {
  1070. .id = TEGRA194_MEMORY_CLIENT_PCIE2AR,
  1071. .name = "pcie2ar",
  1072. .sid = TEGRA194_SID_PCIE2,
  1073. .regs = {
  1074. .sid = {
  1075. .override = 0x6e0,
  1076. .security = 0x6e4,
  1077. },
  1078. },
  1079. }, {
  1080. .id = TEGRA194_MEMORY_CLIENT_PCIE2AW,
  1081. .name = "pcie2aw",
  1082. .sid = TEGRA194_SID_PCIE2,
  1083. .regs = {
  1084. .sid = {
  1085. .override = 0x6e8,
  1086. .security = 0x6ec,
  1087. },
  1088. },
  1089. }, {
  1090. .id = TEGRA194_MEMORY_CLIENT_PCIE3R,
  1091. .name = "pcie3r",
  1092. .sid = TEGRA194_SID_PCIE3,
  1093. .regs = {
  1094. .sid = {
  1095. .override = 0x6f0,
  1096. .security = 0x6f4,
  1097. },
  1098. },
  1099. }, {
  1100. .id = TEGRA194_MEMORY_CLIENT_PCIE3W,
  1101. .name = "pcie3w",
  1102. .sid = TEGRA194_SID_PCIE3,
  1103. .regs = {
  1104. .sid = {
  1105. .override = 0x6f8,
  1106. .security = 0x6fc,
  1107. },
  1108. },
  1109. }, {
  1110. .id = TEGRA194_MEMORY_CLIENT_PCIE4R,
  1111. .name = "pcie4r",
  1112. .sid = TEGRA194_SID_PCIE4,
  1113. .regs = {
  1114. .sid = {
  1115. .override = 0x700,
  1116. .security = 0x704,
  1117. },
  1118. },
  1119. }, {
  1120. .id = TEGRA194_MEMORY_CLIENT_PCIE4W,
  1121. .name = "pcie4w",
  1122. .sid = TEGRA194_SID_PCIE4,
  1123. .regs = {
  1124. .sid = {
  1125. .override = 0x708,
  1126. .security = 0x70c,
  1127. },
  1128. },
  1129. }, {
  1130. .id = TEGRA194_MEMORY_CLIENT_PCIE5R,
  1131. .name = "pcie5r",
  1132. .sid = TEGRA194_SID_PCIE5,
  1133. .regs = {
  1134. .sid = {
  1135. .override = 0x710,
  1136. .security = 0x714,
  1137. },
  1138. },
  1139. }, {
  1140. .id = TEGRA194_MEMORY_CLIENT_PCIE5W,
  1141. .name = "pcie5w",
  1142. .sid = TEGRA194_SID_PCIE5,
  1143. .regs = {
  1144. .sid = {
  1145. .override = 0x718,
  1146. .security = 0x71c,
  1147. },
  1148. },
  1149. }, {
  1150. .id = TEGRA194_MEMORY_CLIENT_ISPFALW,
  1151. .name = "ispfalw",
  1152. .sid = TEGRA194_SID_ISP_FALCON,
  1153. .regs = {
  1154. .sid = {
  1155. .override = 0x720,
  1156. .security = 0x724,
  1157. },
  1158. },
  1159. }, {
  1160. .id = TEGRA194_MEMORY_CLIENT_DLA0RDA1,
  1161. .name = "dla0rda1",
  1162. .sid = TEGRA194_SID_NVDLA0,
  1163. .regs = {
  1164. .sid = {
  1165. .override = 0x748,
  1166. .security = 0x74c,
  1167. },
  1168. },
  1169. }, {
  1170. .id = TEGRA194_MEMORY_CLIENT_DLA1RDA1,
  1171. .name = "dla1rda1",
  1172. .sid = TEGRA194_SID_NVDLA1,
  1173. .regs = {
  1174. .sid = {
  1175. .override = 0x750,
  1176. .security = 0x754,
  1177. },
  1178. },
  1179. }, {
  1180. .id = TEGRA194_MEMORY_CLIENT_PVA0RDA1,
  1181. .name = "pva0rda1",
  1182. .sid = TEGRA194_SID_PVA0,
  1183. .regs = {
  1184. .sid = {
  1185. .override = 0x758,
  1186. .security = 0x75c,
  1187. },
  1188. },
  1189. }, {
  1190. .id = TEGRA194_MEMORY_CLIENT_PVA0RDB1,
  1191. .name = "pva0rdb1",
  1192. .sid = TEGRA194_SID_PVA0,
  1193. .regs = {
  1194. .sid = {
  1195. .override = 0x760,
  1196. .security = 0x764,
  1197. },
  1198. },
  1199. }, {
  1200. .id = TEGRA194_MEMORY_CLIENT_PVA1RDA1,
  1201. .name = "pva1rda1",
  1202. .sid = TEGRA194_SID_PVA1,
  1203. .regs = {
  1204. .sid = {
  1205. .override = 0x768,
  1206. .security = 0x76c,
  1207. },
  1208. },
  1209. }, {
  1210. .id = TEGRA194_MEMORY_CLIENT_PVA1RDB1,
  1211. .name = "pva1rdb1",
  1212. .sid = TEGRA194_SID_PVA1,
  1213. .regs = {
  1214. .sid = {
  1215. .override = 0x770,
  1216. .security = 0x774,
  1217. },
  1218. },
  1219. }, {
  1220. .id = TEGRA194_MEMORY_CLIENT_PCIE5R1,
  1221. .name = "pcie5r1",
  1222. .sid = TEGRA194_SID_PCIE5,
  1223. .regs = {
  1224. .sid = {
  1225. .override = 0x778,
  1226. .security = 0x77c,
  1227. },
  1228. },
  1229. }, {
  1230. .id = TEGRA194_MEMORY_CLIENT_NVENCSRD1,
  1231. .name = "nvencsrd1",
  1232. .sid = TEGRA194_SID_NVENC,
  1233. .regs = {
  1234. .sid = {
  1235. .override = 0x780,
  1236. .security = 0x784,
  1237. },
  1238. },
  1239. }, {
  1240. .id = TEGRA194_MEMORY_CLIENT_NVENC1SRD1,
  1241. .name = "nvenc1srd1",
  1242. .sid = TEGRA194_SID_NVENC1,
  1243. .regs = {
  1244. .sid = {
  1245. .override = 0x788,
  1246. .security = 0x78c,
  1247. },
  1248. },
  1249. }, {
  1250. .id = TEGRA194_MEMORY_CLIENT_ISPRA1,
  1251. .name = "ispra1",
  1252. .sid = TEGRA194_SID_ISP,
  1253. .regs = {
  1254. .sid = {
  1255. .override = 0x790,
  1256. .security = 0x794,
  1257. },
  1258. },
  1259. }, {
  1260. .id = TEGRA194_MEMORY_CLIENT_PCIE0R1,
  1261. .name = "pcie0r1",
  1262. .sid = TEGRA194_SID_PCIE0,
  1263. .regs = {
  1264. .sid = {
  1265. .override = 0x798,
  1266. .security = 0x79c,
  1267. },
  1268. },
  1269. }, {
  1270. .id = TEGRA194_MEMORY_CLIENT_NVDEC1SRD,
  1271. .name = "nvdec1srd",
  1272. .sid = TEGRA194_SID_NVDEC1,
  1273. .regs = {
  1274. .sid = {
  1275. .override = 0x7c8,
  1276. .security = 0x7cc,
  1277. },
  1278. },
  1279. }, {
  1280. .id = TEGRA194_MEMORY_CLIENT_NVDEC1SRD1,
  1281. .name = "nvdec1srd1",
  1282. .sid = TEGRA194_SID_NVDEC1,
  1283. .regs = {
  1284. .sid = {
  1285. .override = 0x7d0,
  1286. .security = 0x7d4,
  1287. },
  1288. },
  1289. }, {
  1290. .id = TEGRA194_MEMORY_CLIENT_NVDEC1SWR,
  1291. .name = "nvdec1swr",
  1292. .sid = TEGRA194_SID_NVDEC1,
  1293. .regs = {
  1294. .sid = {
  1295. .override = 0x7d8,
  1296. .security = 0x7dc,
  1297. },
  1298. },
  1299. }, {
  1300. .id = TEGRA194_MEMORY_CLIENT_MIU5R,
  1301. .name = "miu5r",
  1302. .sid = TEGRA194_SID_MIU,
  1303. .regs = {
  1304. .sid = {
  1305. .override = 0x7e0,
  1306. .security = 0x7e4,
  1307. },
  1308. },
  1309. }, {
  1310. .id = TEGRA194_MEMORY_CLIENT_MIU5W,
  1311. .name = "miu5w",
  1312. .sid = TEGRA194_SID_MIU,
  1313. .regs = {
  1314. .sid = {
  1315. .override = 0x7e8,
  1316. .security = 0x7ec,
  1317. },
  1318. },
  1319. }, {
  1320. .id = TEGRA194_MEMORY_CLIENT_MIU6R,
  1321. .name = "miu6r",
  1322. .sid = TEGRA194_SID_MIU,
  1323. .regs = {
  1324. .sid = {
  1325. .override = 0x7f0,
  1326. .security = 0x7f4,
  1327. },
  1328. },
  1329. }, {
  1330. .id = TEGRA194_MEMORY_CLIENT_MIU6W,
  1331. .name = "miu6w",
  1332. .sid = TEGRA194_SID_MIU,
  1333. .regs = {
  1334. .sid = {
  1335. .override = 0x7f8,
  1336. .security = 0x7fc,
  1337. },
  1338. },
  1339. },
  1340. };
  1341. const struct tegra_mc_soc tegra194_mc_soc = {
  1342. .num_clients = ARRAY_SIZE(tegra194_mc_clients),
  1343. .clients = tegra194_mc_clients,
  1344. .num_address_bits = 40,
  1345. .num_channels = 16,
  1346. .client_id_mask = 0xff,
  1347. .intmask = MC_INT_DECERR_ROUTE_SANITY |
  1348. MC_INT_DECERR_GENERALIZED_CARVEOUT | MC_INT_DECERR_MTS |
  1349. MC_INT_SECERR_SEC | MC_INT_DECERR_VPR |
  1350. MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM,
  1351. .has_addr_hi_reg = true,
  1352. .ops = &tegra186_mc_ops,
  1353. .ch_intmask = 0x00000f00,
  1354. .global_intstatus_channel_shift = 8,
  1355. };