Kconfig 8.5 KB

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  1. # SPDX-License-Identifier: GPL-2.0-only
  2. #
  3. # Memory devices
  4. #
  5. menuconfig MEMORY
  6. bool "Memory Controller drivers"
  7. help
  8. This option allows to enable specific memory controller drivers,
  9. useful mostly on embedded systems. These could be controllers
  10. for DRAM (SDR, DDR), ROM, SRAM and others. The drivers features
  11. vary from memory tuning and frequency scaling to enabling
  12. access to attached peripherals through memory bus.
  13. if MEMORY
  14. config DDR
  15. bool
  16. help
  17. Data from JEDEC specs for DDR SDRAM memories,
  18. particularly the AC timing parameters and addressing
  19. information. This data is useful for drivers handling
  20. DDR SDRAM controllers.
  21. config ARM_PL172_MPMC
  22. tristate "ARM PL172 MPMC driver"
  23. depends on ARM_AMBA && OF
  24. help
  25. This selects the ARM PrimeCell PL172 MultiPort Memory Controller.
  26. If you have an embedded system with an AMBA bus and a PL172
  27. controller, say Y or M here.
  28. config ATMEL_SDRAMC
  29. bool "Atmel (Multi-port DDR-)SDRAM Controller"
  30. default y if ARCH_AT91
  31. depends on ARCH_AT91 || COMPILE_TEST
  32. depends on OF
  33. help
  34. This driver is for Atmel SDRAM Controller or Atmel Multi-port
  35. DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
  36. Starting with the at91sam9g45, this controller supports SDR, DDR and
  37. LP-DDR memories.
  38. config ATMEL_EBI
  39. bool "Atmel EBI driver"
  40. default y if ARCH_AT91
  41. depends on ARCH_AT91 || COMPILE_TEST
  42. depends on OF
  43. select MFD_SYSCON
  44. select MFD_ATMEL_SMC
  45. help
  46. Driver for Atmel EBI controller.
  47. Used to configure the EBI (external bus interface) when the device-
  48. tree is used. This bus supports NANDs, external ethernet controller,
  49. SRAMs, ATA devices, etc.
  50. config BRCMSTB_DPFE
  51. tristate "Broadcom STB DPFE driver"
  52. default ARCH_BRCMSTB
  53. depends on ARCH_BRCMSTB || COMPILE_TEST
  54. help
  55. This driver provides access to the DPFE interface of Broadcom
  56. STB SoCs. The firmware running on the DCPU inside the DDR PHY can
  57. provide current information about the system's RAM, for instance
  58. the DRAM refresh rate. This can be used as an indirect indicator
  59. for the DRAM's temperature. Slower refresh rate means cooler RAM,
  60. higher refresh rate means hotter RAM.
  61. config BRCMSTB_MEMC
  62. tristate "Broadcom STB MEMC driver"
  63. default ARCH_BRCMSTB
  64. depends on ARCH_BRCMSTB || COMPILE_TEST
  65. help
  66. This driver provides a way to configure the Broadcom STB memory
  67. controller and specifically control the Self Refresh Power Down
  68. (SRPD) inactivity timeout.
  69. config BT1_L2_CTL
  70. bool "Baikal-T1 CM2 L2-RAM Cache Control Block"
  71. depends on MIPS_BAIKAL_T1 || COMPILE_TEST
  72. select MFD_SYSCON
  73. help
  74. Baikal-T1 CPU is based on the MIPS P5600 Warrior IP-core. The CPU
  75. resides Coherency Manager v2 with embedded 1MB L2-cache. It's
  76. possible to tune the L2 cache performance up by setting the data,
  77. tags and way-select latencies of RAM access. This driver provides a
  78. dt properties-based and sysfs interface for it.
  79. config TI_AEMIF
  80. tristate "Texas Instruments AEMIF driver"
  81. depends on ARCH_DAVINCI || ARCH_KEYSTONE || COMPILE_TEST
  82. depends on OF
  83. help
  84. This driver is for the AEMIF module available in Texas Instruments
  85. SoCs. AEMIF stands for Asynchronous External Memory Interface and
  86. is intended to provide a glue-less interface to a variety of
  87. asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
  88. of 256M bytes of any of these memories can be accessed at a given
  89. time via four chip selects with 64M byte access per chip select.
  90. config TI_EMIF
  91. tristate "Texas Instruments EMIF driver"
  92. depends on ARCH_OMAP2PLUS || COMPILE_TEST
  93. select DDR
  94. help
  95. This driver is for the EMIF module available in Texas Instruments
  96. SoCs. EMIF is an SDRAM controller that, based on its revision,
  97. supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
  98. This driver takes care of only LPDDR2 memories presently. The
  99. functions of the driver includes re-configuring AC timing
  100. parameters and other settings during frequency, voltage and
  101. temperature changes
  102. config OMAP_GPMC
  103. tristate "Texas Instruments OMAP SoC GPMC driver"
  104. depends on OF_ADDRESS
  105. depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST
  106. select GPIOLIB
  107. help
  108. This driver is for the General Purpose Memory Controller (GPMC)
  109. present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
  110. interfacing to a variety of asynchronous as well as synchronous
  111. memory drives like NOR, NAND, OneNAND, SRAM.
  112. config OMAP_GPMC_DEBUG
  113. bool "Enable GPMC debug output and skip reset of GPMC during init"
  114. depends on OMAP_GPMC
  115. help
  116. Enables verbose debugging mostly to decode the bootloader provided
  117. timings. To preserve the bootloader provided timings, the reset
  118. of GPMC is skipped during init. Enable this during development to
  119. configure devices connected to the GPMC bus.
  120. NOTE: In addition to matching the register setup with the bootloader
  121. you also need to match the GPMC FCLK frequency used by the
  122. bootloader or else the GPMC timings won't be identical with the
  123. bootloader timings.
  124. config TI_EMIF_SRAM
  125. tristate "Texas Instruments EMIF SRAM driver"
  126. depends on SOC_AM33XX || SOC_AM43XX || (ARM && CPU_V7 && COMPILE_TEST)
  127. depends on SRAM
  128. help
  129. This driver is for the EMIF module available on Texas Instruments
  130. AM33XX and AM43XX SoCs and is required for PM. Certain parts of
  131. the EMIF PM code must run from on-chip SRAM late in the suspend
  132. sequence so this driver provides several relocatable PM functions
  133. for the SoC PM code to use.
  134. config FPGA_DFL_EMIF
  135. tristate "FPGA DFL EMIF Driver"
  136. depends on FPGA_DFL && HAS_IOMEM
  137. help
  138. This driver is for the EMIF private feature implemented under
  139. FPGA Device Feature List (DFL) framework. It is used to expose
  140. memory interface status information as well as memory clearing
  141. control.
  142. config MVEBU_DEVBUS
  143. bool "Marvell EBU Device Bus Controller"
  144. default y if PLAT_ORION
  145. depends on PLAT_ORION || COMPILE_TEST
  146. depends on OF
  147. help
  148. This driver is for the Device Bus controller available in some
  149. Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
  150. Armada 370 and Armada XP. This controller allows to handle flash
  151. devices such as NOR, NAND, SRAM, and FPGA.
  152. config FSL_CORENET_CF
  153. tristate "Freescale CoreNet Error Reporting"
  154. depends on FSL_SOC_BOOKE || COMPILE_TEST
  155. help
  156. Say Y for reporting of errors from the Freescale CoreNet
  157. Coherency Fabric. Errors reported include accesses to
  158. physical addresses that mapped by no local access window
  159. (LAW) or an invalid LAW, as well as bad cache state that
  160. represents a coherency violation.
  161. config FSL_IFC
  162. bool "Freescale IFC driver" if COMPILE_TEST
  163. depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST
  164. depends on HAS_IOMEM
  165. config JZ4780_NEMC
  166. bool "Ingenic JZ4780 SoC NEMC driver"
  167. depends on MIPS || COMPILE_TEST
  168. depends on HAS_IOMEM && OF
  169. help
  170. This driver is for the NAND/External Memory Controller (NEMC) in
  171. the Ingenic JZ4780. This controller is used to handle external
  172. memory devices such as NAND and SRAM.
  173. config MTK_SMI
  174. tristate "MediaTek SoC Memory Controller driver" if COMPILE_TEST
  175. depends on ARCH_MEDIATEK || COMPILE_TEST
  176. help
  177. This driver is for the Memory Controller module in MediaTek SoCs,
  178. mainly help enable/disable iommu and control the power domain and
  179. clocks for each local arbiter.
  180. config DA8XX_DDRCTL
  181. bool "Texas Instruments da8xx DDR2/mDDR driver"
  182. depends on ARCH_DAVINCI_DA8XX || COMPILE_TEST
  183. help
  184. This driver is for the DDR2/mDDR Memory Controller present on
  185. Texas Instruments da8xx SoCs. It's used to tweak various memory
  186. controller configuration options.
  187. config PL353_SMC
  188. tristate "ARM PL35X Static Memory Controller(SMC) driver"
  189. default y if ARM
  190. depends on ARM || COMPILE_TEST
  191. depends on ARM_AMBA
  192. help
  193. This driver is for the ARM PL351/PL353 Static Memory
  194. Controller(SMC) module.
  195. config RENESAS_RPCIF
  196. tristate "Renesas RPC-IF driver"
  197. depends on ARCH_RENESAS || COMPILE_TEST
  198. select REGMAP_MMIO
  199. select RESET_CONTROLLER
  200. help
  201. This supports Renesas R-Car Gen3 or RZ/G2 RPC-IF which provides
  202. either SPI host or HyperFlash. You'll have to select individual
  203. components under the corresponding menu.
  204. config STM32_FMC2_EBI
  205. tristate "Support for FMC2 External Bus Interface on STM32MP SoCs"
  206. depends on MACH_STM32MP157 || COMPILE_TEST
  207. select MFD_SYSCON
  208. help
  209. Select this option to enable the STM32 FMC2 External Bus Interface
  210. controller. This driver configures the transactions with external
  211. devices (like SRAM, ethernet adapters, FPGAs, LCD displays, ...) on
  212. SOCs containing the FMC2 External Bus Interface.
  213. source "drivers/memory/samsung/Kconfig"
  214. source "drivers/memory/tegra/Kconfig"
  215. endif