aspeed-video.c 60 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. // Copyright 2020 IBM Corp.
  3. // Copyright (c) 2019-2020 Intel Corporation
  4. #include <linux/atomic.h>
  5. #include <linux/bitfield.h>
  6. #include <linux/clk.h>
  7. #include <linux/delay.h>
  8. #include <linux/device.h>
  9. #include <linux/dma-mapping.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/jiffies.h>
  12. #include <linux/module.h>
  13. #include <linux/mutex.h>
  14. #include <linux/of.h>
  15. #include <linux/of_device.h>
  16. #include <linux/of_irq.h>
  17. #include <linux/of_reserved_mem.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/sched.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/string.h>
  22. #include <linux/v4l2-controls.h>
  23. #include <linux/videodev2.h>
  24. #include <linux/wait.h>
  25. #include <linux/workqueue.h>
  26. #include <linux/debugfs.h>
  27. #include <linux/ktime.h>
  28. #include <media/v4l2-ctrls.h>
  29. #include <media/v4l2-dev.h>
  30. #include <media/v4l2-device.h>
  31. #include <media/v4l2-dv-timings.h>
  32. #include <media/v4l2-event.h>
  33. #include <media/v4l2-ioctl.h>
  34. #include <media/videobuf2-dma-contig.h>
  35. #define ASPEED_VIDEO_V4L2_MIN_BUF_REQ 3
  36. #define DEVICE_NAME "aspeed-video"
  37. #define ASPEED_VIDEO_JPEG_NUM_QUALITIES 12
  38. #define ASPEED_VIDEO_JPEG_HEADER_SIZE 10
  39. #define ASPEED_VIDEO_JPEG_QUANT_SIZE 116
  40. #define ASPEED_VIDEO_JPEG_DCT_SIZE 34
  41. #define MAX_FRAME_RATE 60
  42. #define MAX_HEIGHT 1200
  43. #define MAX_WIDTH 1920
  44. #define MIN_HEIGHT 480
  45. #define MIN_WIDTH 640
  46. #define NUM_POLARITY_CHECKS 10
  47. #define INVALID_RESOLUTION_RETRIES 2
  48. #define INVALID_RESOLUTION_DELAY msecs_to_jiffies(250)
  49. #define RESOLUTION_CHANGE_DELAY msecs_to_jiffies(500)
  50. #define MODE_DETECT_TIMEOUT msecs_to_jiffies(500)
  51. #define STOP_TIMEOUT msecs_to_jiffies(1000)
  52. #define DIRECT_FETCH_THRESHOLD 0x0c0000 /* 1024 * 768 */
  53. #define VE_MAX_SRC_BUFFER_SIZE 0x8ca000 /* 1920 * 1200, 32bpp */
  54. #define VE_JPEG_HEADER_SIZE 0x006000 /* 512 * 12 * 4 */
  55. #define VE_PROTECTION_KEY 0x000
  56. #define VE_PROTECTION_KEY_UNLOCK 0x1a038aa8
  57. #define VE_SEQ_CTRL 0x004
  58. #define VE_SEQ_CTRL_TRIG_MODE_DET BIT(0)
  59. #define VE_SEQ_CTRL_TRIG_CAPTURE BIT(1)
  60. #define VE_SEQ_CTRL_FORCE_IDLE BIT(2)
  61. #define VE_SEQ_CTRL_MULT_FRAME BIT(3)
  62. #define VE_SEQ_CTRL_TRIG_COMP BIT(4)
  63. #define VE_SEQ_CTRL_AUTO_COMP BIT(5)
  64. #define VE_SEQ_CTRL_EN_WATCHDOG BIT(7)
  65. #define VE_SEQ_CTRL_YUV420 BIT(10)
  66. #define VE_SEQ_CTRL_COMP_FMT GENMASK(11, 10)
  67. #define VE_SEQ_CTRL_HALT BIT(12)
  68. #define VE_SEQ_CTRL_EN_WATCHDOG_COMP BIT(14)
  69. #define VE_SEQ_CTRL_TRIG_JPG BIT(15)
  70. #define VE_SEQ_CTRL_CAP_BUSY BIT(16)
  71. #define VE_SEQ_CTRL_COMP_BUSY BIT(18)
  72. #define AST2500_VE_SEQ_CTRL_JPEG_MODE BIT(13)
  73. #define AST2400_VE_SEQ_CTRL_JPEG_MODE BIT(8)
  74. #define VE_CTRL 0x008
  75. #define VE_CTRL_HSYNC_POL BIT(0)
  76. #define VE_CTRL_VSYNC_POL BIT(1)
  77. #define VE_CTRL_SOURCE BIT(2)
  78. #define VE_CTRL_INT_DE BIT(4)
  79. #define VE_CTRL_DIRECT_FETCH BIT(5)
  80. #define VE_CTRL_CAPTURE_FMT GENMASK(7, 6)
  81. #define VE_CTRL_AUTO_OR_CURSOR BIT(8)
  82. #define VE_CTRL_CLK_INVERSE BIT(11)
  83. #define VE_CTRL_CLK_DELAY GENMASK(11, 9)
  84. #define VE_CTRL_INTERLACE BIT(14)
  85. #define VE_CTRL_HSYNC_POL_CTRL BIT(15)
  86. #define VE_CTRL_FRC GENMASK(23, 16)
  87. #define VE_TGS_0 0x00c
  88. #define VE_TGS_1 0x010
  89. #define VE_TGS_FIRST GENMASK(28, 16)
  90. #define VE_TGS_LAST GENMASK(12, 0)
  91. #define VE_SCALING_FACTOR 0x014
  92. #define VE_SCALING_FILTER0 0x018
  93. #define VE_SCALING_FILTER1 0x01c
  94. #define VE_SCALING_FILTER2 0x020
  95. #define VE_SCALING_FILTER3 0x024
  96. #define VE_CAP_WINDOW 0x030
  97. #define VE_COMP_WINDOW 0x034
  98. #define VE_COMP_PROC_OFFSET 0x038
  99. #define VE_COMP_OFFSET 0x03c
  100. #define VE_JPEG_ADDR 0x040
  101. #define VE_SRC0_ADDR 0x044
  102. #define VE_SRC_SCANLINE_OFFSET 0x048
  103. #define VE_SRC1_ADDR 0x04c
  104. #define VE_COMP_ADDR 0x054
  105. #define VE_STREAM_BUF_SIZE 0x058
  106. #define VE_STREAM_BUF_SIZE_N_PACKETS GENMASK(5, 3)
  107. #define VE_STREAM_BUF_SIZE_P_SIZE GENMASK(2, 0)
  108. #define VE_COMP_CTRL 0x060
  109. #define VE_COMP_CTRL_VQ_DCT_ONLY BIT(0)
  110. #define VE_COMP_CTRL_VQ_4COLOR BIT(1)
  111. #define VE_COMP_CTRL_QUANTIZE BIT(2)
  112. #define VE_COMP_CTRL_EN_BQ BIT(4)
  113. #define VE_COMP_CTRL_EN_CRYPTO BIT(5)
  114. #define VE_COMP_CTRL_DCT_CHR GENMASK(10, 6)
  115. #define VE_COMP_CTRL_DCT_LUM GENMASK(15, 11)
  116. #define VE_COMP_CTRL_EN_HQ BIT(16)
  117. #define VE_COMP_CTRL_RSVD BIT(19)
  118. #define VE_COMP_CTRL_ENCODE GENMASK(21, 20)
  119. #define VE_COMP_CTRL_HQ_DCT_CHR GENMASK(26, 22)
  120. #define VE_COMP_CTRL_HQ_DCT_LUM GENMASK(31, 27)
  121. #define AST2400_VE_COMP_SIZE_READ_BACK 0x078
  122. #define AST2600_VE_COMP_SIZE_READ_BACK 0x084
  123. #define VE_SRC_LR_EDGE_DET 0x090
  124. #define VE_SRC_LR_EDGE_DET_LEFT GENMASK(11, 0)
  125. #define VE_SRC_LR_EDGE_DET_NO_V BIT(12)
  126. #define VE_SRC_LR_EDGE_DET_NO_H BIT(13)
  127. #define VE_SRC_LR_EDGE_DET_NO_DISP BIT(14)
  128. #define VE_SRC_LR_EDGE_DET_NO_CLK BIT(15)
  129. #define VE_SRC_LR_EDGE_DET_RT GENMASK(27, 16)
  130. #define VE_SRC_LR_EDGE_DET_INTERLACE BIT(31)
  131. #define VE_SRC_TB_EDGE_DET 0x094
  132. #define VE_SRC_TB_EDGE_DET_TOP GENMASK(12, 0)
  133. #define VE_SRC_TB_EDGE_DET_BOT GENMASK(28, 16)
  134. #define VE_MODE_DETECT_STATUS 0x098
  135. #define VE_MODE_DETECT_H_PERIOD GENMASK(11, 0)
  136. #define VE_MODE_DETECT_EXTSRC_ADC BIT(12)
  137. #define VE_MODE_DETECT_H_STABLE BIT(13)
  138. #define VE_MODE_DETECT_V_STABLE BIT(14)
  139. #define VE_MODE_DETECT_V_LINES GENMASK(27, 16)
  140. #define VE_MODE_DETECT_STATUS_VSYNC BIT(28)
  141. #define VE_MODE_DETECT_STATUS_HSYNC BIT(29)
  142. #define VE_MODE_DETECT_VSYNC_RDY BIT(30)
  143. #define VE_MODE_DETECT_HSYNC_RDY BIT(31)
  144. #define VE_SYNC_STATUS 0x09c
  145. #define VE_SYNC_STATUS_HSYNC GENMASK(11, 0)
  146. #define VE_SYNC_STATUS_VSYNC GENMASK(27, 16)
  147. #define VE_H_TOTAL_PIXELS 0x0A0
  148. #define VE_INTERRUPT_CTRL 0x304
  149. #define VE_INTERRUPT_STATUS 0x308
  150. #define VE_INTERRUPT_MODE_DETECT_WD BIT(0)
  151. #define VE_INTERRUPT_CAPTURE_COMPLETE BIT(1)
  152. #define VE_INTERRUPT_COMP_READY BIT(2)
  153. #define VE_INTERRUPT_COMP_COMPLETE BIT(3)
  154. #define VE_INTERRUPT_MODE_DETECT BIT(4)
  155. #define VE_INTERRUPT_FRAME_COMPLETE BIT(5)
  156. #define VE_INTERRUPT_DECODE_ERR BIT(6)
  157. #define VE_INTERRUPT_HALT_READY BIT(8)
  158. #define VE_INTERRUPT_HANG_WD BIT(9)
  159. #define VE_INTERRUPT_STREAM_DESC BIT(10)
  160. #define VE_INTERRUPT_VSYNC_DESC BIT(11)
  161. #define VE_MODE_DETECT 0x30c
  162. #define VE_MODE_DT_HOR_TOLER GENMASK(31, 28)
  163. #define VE_MODE_DT_VER_TOLER GENMASK(27, 24)
  164. #define VE_MODE_DT_HOR_STABLE GENMASK(23, 20)
  165. #define VE_MODE_DT_VER_STABLE GENMASK(19, 16)
  166. #define VE_MODE_DT_EDG_THROD GENMASK(15, 8)
  167. #define VE_MEM_RESTRICT_START 0x310
  168. #define VE_MEM_RESTRICT_END 0x314
  169. /*
  170. * VIDEO_MODE_DETECT_DONE: a flag raised if signal lock
  171. * VIDEO_RES_CHANGE: a flag raised if res_change work on-going
  172. * VIDEO_RES_DETECT: a flag raised if res. detection on-going
  173. * VIDEO_STREAMING: a flag raised if user requires stream-on
  174. * VIDEO_FRAME_INPRG: a flag raised if hw working on a frame
  175. * VIDEO_STOPPED: a flag raised if device release
  176. * VIDEO_CLOCKS_ON: a flag raised if clk is on
  177. */
  178. enum {
  179. VIDEO_MODE_DETECT_DONE,
  180. VIDEO_RES_CHANGE,
  181. VIDEO_RES_DETECT,
  182. VIDEO_STREAMING,
  183. VIDEO_FRAME_INPRG,
  184. VIDEO_STOPPED,
  185. VIDEO_CLOCKS_ON,
  186. };
  187. // for VE_CTRL_CAPTURE_FMT
  188. enum aspeed_video_capture_format {
  189. VIDEO_CAP_FMT_YUV_STUDIO_SWING = 0,
  190. VIDEO_CAP_FMT_YUV_FULL_SWING,
  191. VIDEO_CAP_FMT_RGB,
  192. VIDEO_CAP_FMT_GRAY,
  193. VIDEO_CAP_FMT_MAX
  194. };
  195. struct aspeed_video_addr {
  196. unsigned int size;
  197. dma_addr_t dma;
  198. void *virt;
  199. };
  200. struct aspeed_video_buffer {
  201. struct vb2_v4l2_buffer vb;
  202. struct list_head link;
  203. };
  204. struct aspeed_video_perf {
  205. ktime_t last_sample;
  206. u32 totaltime;
  207. u32 duration;
  208. u32 duration_min;
  209. u32 duration_max;
  210. };
  211. #define to_aspeed_video_buffer(x) \
  212. container_of((x), struct aspeed_video_buffer, vb)
  213. /*
  214. * struct aspeed_video - driver data
  215. *
  216. * res_work: holds the delayed_work for res-detection if unlock
  217. * buffers: holds the list of buffer queued from user
  218. * flags: holds the state of video
  219. * sequence: holds the last number of frame completed
  220. * max_compressed_size: holds max compressed stream's size
  221. * srcs: holds the buffer information for srcs
  222. * jpeg: holds the buffer information for jpeg header
  223. * yuv420: a flag raised if JPEG subsampling is 420
  224. * frame_rate: holds the frame_rate
  225. * jpeg_quality: holds jpeq's quality (0~11)
  226. * frame_bottom: end position of video data in vertical direction
  227. * frame_left: start position of video data in horizontal direction
  228. * frame_right: end position of video data in horizontal direction
  229. * frame_top: start position of video data in vertical direction
  230. * perf: holds the statistics primary for debugfs
  231. */
  232. struct aspeed_video {
  233. void __iomem *base;
  234. struct clk *eclk;
  235. struct clk *vclk;
  236. struct device *dev;
  237. struct v4l2_ctrl_handler ctrl_handler;
  238. struct v4l2_device v4l2_dev;
  239. struct v4l2_pix_format pix_fmt;
  240. struct v4l2_bt_timings active_timings;
  241. struct v4l2_bt_timings detected_timings;
  242. u32 v4l2_input_status;
  243. struct vb2_queue queue;
  244. struct video_device vdev;
  245. struct mutex video_lock; /* v4l2 and videobuf2 lock */
  246. u32 jpeg_mode;
  247. u32 comp_size_read;
  248. wait_queue_head_t wait;
  249. spinlock_t lock; /* buffer list lock */
  250. struct delayed_work res_work;
  251. struct list_head buffers;
  252. unsigned long flags;
  253. unsigned int sequence;
  254. unsigned int max_compressed_size;
  255. struct aspeed_video_addr srcs[2];
  256. struct aspeed_video_addr jpeg;
  257. bool yuv420;
  258. unsigned int frame_rate;
  259. unsigned int jpeg_quality;
  260. unsigned int frame_bottom;
  261. unsigned int frame_left;
  262. unsigned int frame_right;
  263. unsigned int frame_top;
  264. struct aspeed_video_perf perf;
  265. };
  266. #define to_aspeed_video(x) container_of((x), struct aspeed_video, v4l2_dev)
  267. struct aspeed_video_config {
  268. u32 jpeg_mode;
  269. u32 comp_size_read;
  270. };
  271. static const struct aspeed_video_config ast2400_config = {
  272. .jpeg_mode = AST2400_VE_SEQ_CTRL_JPEG_MODE,
  273. .comp_size_read = AST2400_VE_COMP_SIZE_READ_BACK,
  274. };
  275. static const struct aspeed_video_config ast2500_config = {
  276. .jpeg_mode = AST2500_VE_SEQ_CTRL_JPEG_MODE,
  277. .comp_size_read = AST2400_VE_COMP_SIZE_READ_BACK,
  278. };
  279. static const struct aspeed_video_config ast2600_config = {
  280. .jpeg_mode = AST2500_VE_SEQ_CTRL_JPEG_MODE,
  281. .comp_size_read = AST2600_VE_COMP_SIZE_READ_BACK,
  282. };
  283. static const u32 aspeed_video_jpeg_header[ASPEED_VIDEO_JPEG_HEADER_SIZE] = {
  284. 0xe0ffd8ff, 0x464a1000, 0x01004649, 0x60000101, 0x00006000, 0x0f00feff,
  285. 0x00002d05, 0x00000000, 0x00000000, 0x00dbff00
  286. };
  287. static const u32 aspeed_video_jpeg_quant[ASPEED_VIDEO_JPEG_QUANT_SIZE] = {
  288. 0x081100c0, 0x00000000, 0x00110103, 0x03011102, 0xc4ff0111, 0x00001f00,
  289. 0x01010501, 0x01010101, 0x00000000, 0x00000000, 0x04030201, 0x08070605,
  290. 0xff0b0a09, 0x10b500c4, 0x03010200, 0x03040203, 0x04040505, 0x7d010000,
  291. 0x00030201, 0x12051104, 0x06413121, 0x07615113, 0x32147122, 0x08a19181,
  292. 0xc1b14223, 0xf0d15215, 0x72623324, 0x160a0982, 0x1a191817, 0x28272625,
  293. 0x35342a29, 0x39383736, 0x4544433a, 0x49484746, 0x5554534a, 0x59585756,
  294. 0x6564635a, 0x69686766, 0x7574736a, 0x79787776, 0x8584837a, 0x89888786,
  295. 0x9493928a, 0x98979695, 0xa3a29a99, 0xa7a6a5a4, 0xb2aaa9a8, 0xb6b5b4b3,
  296. 0xbab9b8b7, 0xc5c4c3c2, 0xc9c8c7c6, 0xd4d3d2ca, 0xd8d7d6d5, 0xe2e1dad9,
  297. 0xe6e5e4e3, 0xeae9e8e7, 0xf4f3f2f1, 0xf8f7f6f5, 0xc4fffaf9, 0x00011f00,
  298. 0x01010103, 0x01010101, 0x00000101, 0x00000000, 0x04030201, 0x08070605,
  299. 0xff0b0a09, 0x11b500c4, 0x02010200, 0x04030404, 0x04040507, 0x77020100,
  300. 0x03020100, 0x21050411, 0x41120631, 0x71610751, 0x81322213, 0x91421408,
  301. 0x09c1b1a1, 0xf0523323, 0xd1726215, 0x3424160a, 0x17f125e1, 0x261a1918,
  302. 0x2a292827, 0x38373635, 0x44433a39, 0x48474645, 0x54534a49, 0x58575655,
  303. 0x64635a59, 0x68676665, 0x74736a69, 0x78777675, 0x83827a79, 0x87868584,
  304. 0x928a8988, 0x96959493, 0x9a999897, 0xa5a4a3a2, 0xa9a8a7a6, 0xb4b3b2aa,
  305. 0xb8b7b6b5, 0xc3c2bab9, 0xc7c6c5c4, 0xd2cac9c8, 0xd6d5d4d3, 0xdad9d8d7,
  306. 0xe5e4e3e2, 0xe9e8e7e6, 0xf4f3f2ea, 0xf8f7f6f5, 0xdafffaf9, 0x01030c00,
  307. 0x03110200, 0x003f0011
  308. };
  309. static const u32 aspeed_video_jpeg_dct[ASPEED_VIDEO_JPEG_NUM_QUALITIES]
  310. [ASPEED_VIDEO_JPEG_DCT_SIZE] = {
  311. { 0x0d140043, 0x0c0f110f, 0x11101114, 0x17141516, 0x1e20321e,
  312. 0x3d1e1b1b, 0x32242e2b, 0x4b4c3f48, 0x44463f47, 0x61735a50,
  313. 0x566c5550, 0x88644644, 0x7a766c65, 0x4d808280, 0x8c978d60,
  314. 0x7e73967d, 0xdbff7b80, 0x1f014300, 0x272d2121, 0x3030582d,
  315. 0x697bb958, 0xb8b9b97b, 0xb9b8a6a6, 0xb9b9b9b9, 0xb9b9b9b9,
  316. 0xb9b9b9b9, 0xb9b9b9b9, 0xb9b9b9b9, 0xb9b9b9b9, 0xb9b9b9b9,
  317. 0xb9b9b9b9, 0xb9b9b9b9, 0xb9b9b9b9, 0xffb9b9b9 },
  318. { 0x0c110043, 0x0a0d0f0d, 0x0f0e0f11, 0x14111213, 0x1a1c2b1a,
  319. 0x351a1818, 0x2b1f2826, 0x4142373f, 0x3c3d373e, 0x55644e46,
  320. 0x4b5f4a46, 0x77573d3c, 0x6b675f58, 0x43707170, 0x7a847b54,
  321. 0x6e64836d, 0xdbff6c70, 0x1b014300, 0x22271d1d, 0x2a2a4c27,
  322. 0x5b6ba04c, 0xa0a0a06b, 0xa0a0a0a0, 0xa0a0a0a0, 0xa0a0a0a0,
  323. 0xa0a0a0a0, 0xa0a0a0a0, 0xa0a0a0a0, 0xa0a0a0a0, 0xa0a0a0a0,
  324. 0xa0a0a0a0, 0xa0a0a0a0, 0xa0a0a0a0, 0xffa0a0a0 },
  325. { 0x090e0043, 0x090a0c0a, 0x0c0b0c0e, 0x110e0f10, 0x15172415,
  326. 0x2c151313, 0x241a211f, 0x36372e34, 0x31322e33, 0x4653413a,
  327. 0x3e4e3d3a, 0x62483231, 0x58564e49, 0x385d5e5d, 0x656d6645,
  328. 0x5b536c5a, 0xdbff595d, 0x16014300, 0x1c201818, 0x22223f20,
  329. 0x4b58853f, 0x85858558, 0x85858585, 0x85858585, 0x85858585,
  330. 0x85858585, 0x85858585, 0x85858585, 0x85858585, 0x85858585,
  331. 0x85858585, 0x85858585, 0x85858585, 0xff858585 },
  332. { 0x070b0043, 0x07080a08, 0x0a090a0b, 0x0d0b0c0c, 0x11121c11,
  333. 0x23110f0f, 0x1c141a19, 0x2b2b2429, 0x27282428, 0x3842332e,
  334. 0x313e302e, 0x4e392827, 0x46443e3a, 0x2c4a4a4a, 0x50565137,
  335. 0x48425647, 0xdbff474a, 0x12014300, 0x161a1313, 0x1c1c331a,
  336. 0x3d486c33, 0x6c6c6c48, 0x6c6c6c6c, 0x6c6c6c6c, 0x6c6c6c6c,
  337. 0x6c6c6c6c, 0x6c6c6c6c, 0x6c6c6c6c, 0x6c6c6c6c, 0x6c6c6c6c,
  338. 0x6c6c6c6c, 0x6c6c6c6c, 0x6c6c6c6c, 0xff6c6c6c },
  339. { 0x06090043, 0x05060706, 0x07070709, 0x0a09090a, 0x0d0e160d,
  340. 0x1b0d0c0c, 0x16101413, 0x21221c20, 0x1e1f1c20, 0x2b332824,
  341. 0x26302624, 0x3d2d1f1e, 0x3735302d, 0x22393a39, 0x3f443f2b,
  342. 0x38334338, 0xdbff3739, 0x0d014300, 0x11130e0e, 0x15152613,
  343. 0x2d355026, 0x50505035, 0x50505050, 0x50505050, 0x50505050,
  344. 0x50505050, 0x50505050, 0x50505050, 0x50505050, 0x50505050,
  345. 0x50505050, 0x50505050, 0x50505050, 0xff505050 },
  346. { 0x04060043, 0x03040504, 0x05040506, 0x07060606, 0x09090f09,
  347. 0x12090808, 0x0f0a0d0d, 0x16161315, 0x14151315, 0x1d221b18,
  348. 0x19201918, 0x281e1514, 0x2423201e, 0x17262726, 0x2a2d2a1c,
  349. 0x25222d25, 0xdbff2526, 0x09014300, 0x0b0d0a0a, 0x0e0e1a0d,
  350. 0x1f25371a, 0x37373725, 0x37373737, 0x37373737, 0x37373737,
  351. 0x37373737, 0x37373737, 0x37373737, 0x37373737, 0x37373737,
  352. 0x37373737, 0x37373737, 0x37373737, 0xff373737 },
  353. { 0x02030043, 0x01020202, 0x02020203, 0x03030303, 0x04040704,
  354. 0x09040404, 0x07050606, 0x0b0b090a, 0x0a0a090a, 0x0e110d0c,
  355. 0x0c100c0c, 0x140f0a0a, 0x1211100f, 0x0b131313, 0x1516150e,
  356. 0x12111612, 0xdbff1213, 0x04014300, 0x05060505, 0x07070d06,
  357. 0x0f121b0d, 0x1b1b1b12, 0x1b1b1b1b, 0x1b1b1b1b, 0x1b1b1b1b,
  358. 0x1b1b1b1b, 0x1b1b1b1b, 0x1b1b1b1b, 0x1b1b1b1b, 0x1b1b1b1b,
  359. 0x1b1b1b1b, 0x1b1b1b1b, 0x1b1b1b1b, 0xff1b1b1b },
  360. { 0x01020043, 0x01010101, 0x01010102, 0x02020202, 0x03030503,
  361. 0x06030202, 0x05030404, 0x07070607, 0x06070607, 0x090b0908,
  362. 0x080a0808, 0x0d0a0706, 0x0c0b0a0a, 0x070c0d0c, 0x0e0f0e09,
  363. 0x0c0b0f0c, 0xdbff0c0c, 0x03014300, 0x03040303, 0x04040804,
  364. 0x0a0c1208, 0x1212120c, 0x12121212, 0x12121212, 0x12121212,
  365. 0x12121212, 0x12121212, 0x12121212, 0x12121212, 0x12121212,
  366. 0x12121212, 0x12121212, 0x12121212, 0xff121212 },
  367. { 0x01020043, 0x01010101, 0x01010102, 0x02020202, 0x03030503,
  368. 0x06030202, 0x05030404, 0x07070607, 0x06070607, 0x090b0908,
  369. 0x080a0808, 0x0d0a0706, 0x0c0b0a0a, 0x070c0d0c, 0x0e0f0e09,
  370. 0x0c0b0f0c, 0xdbff0c0c, 0x02014300, 0x03030202, 0x04040703,
  371. 0x080a0f07, 0x0f0f0f0a, 0x0f0f0f0f, 0x0f0f0f0f, 0x0f0f0f0f,
  372. 0x0f0f0f0f, 0x0f0f0f0f, 0x0f0f0f0f, 0x0f0f0f0f, 0x0f0f0f0f,
  373. 0x0f0f0f0f, 0x0f0f0f0f, 0x0f0f0f0f, 0xff0f0f0f },
  374. { 0x01010043, 0x01010101, 0x01010101, 0x01010101, 0x02020302,
  375. 0x04020202, 0x03020303, 0x05050405, 0x05050405, 0x07080606,
  376. 0x06080606, 0x0a070505, 0x09080807, 0x05090909, 0x0a0b0a07,
  377. 0x09080b09, 0xdbff0909, 0x02014300, 0x02030202, 0x03030503,
  378. 0x07080c05, 0x0c0c0c08, 0x0c0c0c0c, 0x0c0c0c0c, 0x0c0c0c0c,
  379. 0x0c0c0c0c, 0x0c0c0c0c, 0x0c0c0c0c, 0x0c0c0c0c, 0x0c0c0c0c,
  380. 0x0c0c0c0c, 0x0c0c0c0c, 0x0c0c0c0c, 0xff0c0c0c },
  381. { 0x01010043, 0x01010101, 0x01010101, 0x01010101, 0x01010201,
  382. 0x03010101, 0x02010202, 0x03030303, 0x03030303, 0x04050404,
  383. 0x04050404, 0x06050303, 0x06050505, 0x03060606, 0x07070704,
  384. 0x06050706, 0xdbff0606, 0x01014300, 0x01020101, 0x02020402,
  385. 0x05060904, 0x09090906, 0x09090909, 0x09090909, 0x09090909,
  386. 0x09090909, 0x09090909, 0x09090909, 0x09090909, 0x09090909,
  387. 0x09090909, 0x09090909, 0x09090909, 0xff090909 },
  388. { 0x01010043, 0x01010101, 0x01010101, 0x01010101, 0x01010101,
  389. 0x01010101, 0x01010101, 0x01010101, 0x01010101, 0x02020202,
  390. 0x02020202, 0x03020101, 0x03020202, 0x01030303, 0x03030302,
  391. 0x03020303, 0xdbff0403, 0x01014300, 0x01010101, 0x01010201,
  392. 0x03040602, 0x06060604, 0x06060606, 0x06060606, 0x06060606,
  393. 0x06060606, 0x06060606, 0x06060606, 0x06060606, 0x06060606,
  394. 0x06060606, 0x06060606, 0x06060606, 0xff060606 }
  395. };
  396. static const struct v4l2_dv_timings_cap aspeed_video_timings_cap = {
  397. .type = V4L2_DV_BT_656_1120,
  398. .bt = {
  399. .min_width = MIN_WIDTH,
  400. .max_width = MAX_WIDTH,
  401. .min_height = MIN_HEIGHT,
  402. .max_height = MAX_HEIGHT,
  403. .min_pixelclock = 6574080, /* 640 x 480 x 24Hz */
  404. .max_pixelclock = 138240000, /* 1920 x 1200 x 60Hz */
  405. .standards = V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
  406. V4L2_DV_BT_STD_CVT | V4L2_DV_BT_STD_GTF,
  407. .capabilities = V4L2_DV_BT_CAP_PROGRESSIVE |
  408. V4L2_DV_BT_CAP_REDUCED_BLANKING |
  409. V4L2_DV_BT_CAP_CUSTOM,
  410. },
  411. };
  412. static unsigned int debug;
  413. static void aspeed_video_init_jpeg_table(u32 *table, bool yuv420)
  414. {
  415. int i;
  416. unsigned int base;
  417. for (i = 0; i < ASPEED_VIDEO_JPEG_NUM_QUALITIES; i++) {
  418. base = 256 * i; /* AST HW requires this header spacing */
  419. memcpy(&table[base], aspeed_video_jpeg_header,
  420. sizeof(aspeed_video_jpeg_header));
  421. base += ASPEED_VIDEO_JPEG_HEADER_SIZE;
  422. memcpy(&table[base], aspeed_video_jpeg_dct[i],
  423. sizeof(aspeed_video_jpeg_dct[i]));
  424. base += ASPEED_VIDEO_JPEG_DCT_SIZE;
  425. memcpy(&table[base], aspeed_video_jpeg_quant,
  426. sizeof(aspeed_video_jpeg_quant));
  427. if (yuv420)
  428. table[base + 2] = 0x00220103;
  429. }
  430. }
  431. // just update jpeg dct table per 420/444
  432. static void aspeed_video_update_jpeg_table(u32 *table, bool yuv420)
  433. {
  434. int i;
  435. unsigned int base;
  436. for (i = 0; i < ASPEED_VIDEO_JPEG_NUM_QUALITIES; i++) {
  437. base = 256 * i; /* AST HW requires this header spacing */
  438. base += ASPEED_VIDEO_JPEG_HEADER_SIZE +
  439. ASPEED_VIDEO_JPEG_DCT_SIZE;
  440. table[base + 2] = (yuv420) ? 0x00220103 : 0x00110103;
  441. }
  442. }
  443. static void aspeed_video_update(struct aspeed_video *video, u32 reg, u32 clear,
  444. u32 bits)
  445. {
  446. u32 t = readl(video->base + reg);
  447. u32 before = t;
  448. t &= ~clear;
  449. t |= bits;
  450. writel(t, video->base + reg);
  451. v4l2_dbg(3, debug, &video->v4l2_dev, "update %03x[%08x -> %08x]\n",
  452. reg, before, readl(video->base + reg));
  453. }
  454. static u32 aspeed_video_read(struct aspeed_video *video, u32 reg)
  455. {
  456. u32 t = readl(video->base + reg);
  457. v4l2_dbg(3, debug, &video->v4l2_dev, "read %03x[%08x]\n", reg, t);
  458. return t;
  459. }
  460. static void aspeed_video_write(struct aspeed_video *video, u32 reg, u32 val)
  461. {
  462. writel(val, video->base + reg);
  463. v4l2_dbg(3, debug, &video->v4l2_dev, "write %03x[%08x]\n", reg,
  464. readl(video->base + reg));
  465. }
  466. static void update_perf(struct aspeed_video_perf *p)
  467. {
  468. struct aspeed_video *v = container_of(p, struct aspeed_video,
  469. perf);
  470. p->duration =
  471. ktime_to_ms(ktime_sub(ktime_get(), p->last_sample));
  472. p->totaltime += p->duration;
  473. p->duration_max = max(p->duration, p->duration_max);
  474. p->duration_min = min(p->duration, p->duration_min);
  475. v4l2_dbg(2, debug, &v->v4l2_dev, "time consumed: %d ms\n",
  476. p->duration);
  477. }
  478. static int aspeed_video_start_frame(struct aspeed_video *video)
  479. {
  480. dma_addr_t addr;
  481. unsigned long flags;
  482. struct aspeed_video_buffer *buf;
  483. u32 seq_ctrl = aspeed_video_read(video, VE_SEQ_CTRL);
  484. if (video->v4l2_input_status) {
  485. v4l2_warn(&video->v4l2_dev, "No signal; don't start frame\n");
  486. return 0;
  487. }
  488. if (!(seq_ctrl & VE_SEQ_CTRL_COMP_BUSY) ||
  489. !(seq_ctrl & VE_SEQ_CTRL_CAP_BUSY)) {
  490. v4l2_warn(&video->v4l2_dev, "Engine busy; don't start frame\n");
  491. return -EBUSY;
  492. }
  493. spin_lock_irqsave(&video->lock, flags);
  494. buf = list_first_entry_or_null(&video->buffers,
  495. struct aspeed_video_buffer, link);
  496. if (!buf) {
  497. spin_unlock_irqrestore(&video->lock, flags);
  498. v4l2_warn(&video->v4l2_dev, "No buffers; don't start frame\n");
  499. return -EPROTO;
  500. }
  501. set_bit(VIDEO_FRAME_INPRG, &video->flags);
  502. addr = vb2_dma_contig_plane_dma_addr(&buf->vb.vb2_buf, 0);
  503. spin_unlock_irqrestore(&video->lock, flags);
  504. aspeed_video_write(video, VE_COMP_PROC_OFFSET, 0);
  505. aspeed_video_write(video, VE_COMP_OFFSET, 0);
  506. aspeed_video_write(video, VE_COMP_ADDR, addr);
  507. aspeed_video_update(video, VE_INTERRUPT_CTRL, 0,
  508. VE_INTERRUPT_COMP_COMPLETE);
  509. video->perf.last_sample = ktime_get();
  510. aspeed_video_update(video, VE_SEQ_CTRL, 0,
  511. VE_SEQ_CTRL_TRIG_CAPTURE | VE_SEQ_CTRL_TRIG_COMP);
  512. return 0;
  513. }
  514. static void aspeed_video_enable_mode_detect(struct aspeed_video *video)
  515. {
  516. /* Enable mode detect interrupts */
  517. aspeed_video_update(video, VE_INTERRUPT_CTRL, 0,
  518. VE_INTERRUPT_MODE_DETECT);
  519. /* Disable mode detect in order to re-trigger */
  520. aspeed_video_update(video, VE_SEQ_CTRL,
  521. VE_SEQ_CTRL_TRIG_MODE_DET, 0);
  522. /* Trigger mode detect */
  523. aspeed_video_update(video, VE_SEQ_CTRL, 0, VE_SEQ_CTRL_TRIG_MODE_DET);
  524. }
  525. static void aspeed_video_off(struct aspeed_video *video)
  526. {
  527. if (!test_bit(VIDEO_CLOCKS_ON, &video->flags))
  528. return;
  529. /* Disable interrupts */
  530. aspeed_video_write(video, VE_INTERRUPT_CTRL, 0);
  531. aspeed_video_write(video, VE_INTERRUPT_STATUS, 0xffffffff);
  532. /* Turn off the relevant clocks */
  533. clk_disable(video->eclk);
  534. clk_disable(video->vclk);
  535. clear_bit(VIDEO_CLOCKS_ON, &video->flags);
  536. }
  537. static void aspeed_video_on(struct aspeed_video *video)
  538. {
  539. if (test_bit(VIDEO_CLOCKS_ON, &video->flags))
  540. return;
  541. /* Turn on the relevant clocks */
  542. clk_enable(video->vclk);
  543. clk_enable(video->eclk);
  544. set_bit(VIDEO_CLOCKS_ON, &video->flags);
  545. }
  546. static void aspeed_video_bufs_done(struct aspeed_video *video,
  547. enum vb2_buffer_state state)
  548. {
  549. unsigned long flags;
  550. struct aspeed_video_buffer *buf;
  551. spin_lock_irqsave(&video->lock, flags);
  552. list_for_each_entry(buf, &video->buffers, link)
  553. vb2_buffer_done(&buf->vb.vb2_buf, state);
  554. INIT_LIST_HEAD(&video->buffers);
  555. spin_unlock_irqrestore(&video->lock, flags);
  556. }
  557. static void aspeed_video_irq_res_change(struct aspeed_video *video, ulong delay)
  558. {
  559. v4l2_dbg(1, debug, &video->v4l2_dev, "Resolution changed; resetting\n");
  560. set_bit(VIDEO_RES_CHANGE, &video->flags);
  561. clear_bit(VIDEO_FRAME_INPRG, &video->flags);
  562. video->v4l2_input_status = V4L2_IN_ST_NO_SIGNAL;
  563. aspeed_video_off(video);
  564. aspeed_video_bufs_done(video, VB2_BUF_STATE_ERROR);
  565. schedule_delayed_work(&video->res_work, delay);
  566. }
  567. static irqreturn_t aspeed_video_irq(int irq, void *arg)
  568. {
  569. struct aspeed_video *video = arg;
  570. u32 sts = aspeed_video_read(video, VE_INTERRUPT_STATUS);
  571. /*
  572. * Hardware sometimes asserts interrupts that we haven't actually
  573. * enabled; ignore them if so.
  574. */
  575. sts &= aspeed_video_read(video, VE_INTERRUPT_CTRL);
  576. v4l2_dbg(2, debug, &video->v4l2_dev, "irq sts=%#x %s%s%s%s\n", sts,
  577. sts & VE_INTERRUPT_MODE_DETECT_WD ? ", unlock" : "",
  578. sts & VE_INTERRUPT_MODE_DETECT ? ", lock" : "",
  579. sts & VE_INTERRUPT_CAPTURE_COMPLETE ? ", capture-done" : "",
  580. sts & VE_INTERRUPT_COMP_COMPLETE ? ", comp-done" : "");
  581. /*
  582. * Resolution changed or signal was lost; reset the engine and
  583. * re-initialize
  584. */
  585. if (sts & VE_INTERRUPT_MODE_DETECT_WD) {
  586. aspeed_video_irq_res_change(video, 0);
  587. return IRQ_HANDLED;
  588. }
  589. if (sts & VE_INTERRUPT_MODE_DETECT) {
  590. if (test_bit(VIDEO_RES_DETECT, &video->flags)) {
  591. aspeed_video_update(video, VE_INTERRUPT_CTRL,
  592. VE_INTERRUPT_MODE_DETECT, 0);
  593. aspeed_video_write(video, VE_INTERRUPT_STATUS,
  594. VE_INTERRUPT_MODE_DETECT);
  595. sts &= ~VE_INTERRUPT_MODE_DETECT;
  596. set_bit(VIDEO_MODE_DETECT_DONE, &video->flags);
  597. wake_up_interruptible_all(&video->wait);
  598. } else {
  599. /*
  600. * Signal acquired while NOT doing resolution
  601. * detection; reset the engine and re-initialize
  602. */
  603. aspeed_video_irq_res_change(video,
  604. RESOLUTION_CHANGE_DELAY);
  605. return IRQ_HANDLED;
  606. }
  607. }
  608. if (sts & VE_INTERRUPT_COMP_COMPLETE) {
  609. struct aspeed_video_buffer *buf;
  610. u32 frame_size = aspeed_video_read(video,
  611. video->comp_size_read);
  612. update_perf(&video->perf);
  613. spin_lock(&video->lock);
  614. clear_bit(VIDEO_FRAME_INPRG, &video->flags);
  615. buf = list_first_entry_or_null(&video->buffers,
  616. struct aspeed_video_buffer,
  617. link);
  618. if (buf) {
  619. vb2_set_plane_payload(&buf->vb.vb2_buf, 0, frame_size);
  620. if (!list_is_last(&buf->link, &video->buffers)) {
  621. buf->vb.vb2_buf.timestamp = ktime_get_ns();
  622. buf->vb.sequence = video->sequence++;
  623. buf->vb.field = V4L2_FIELD_NONE;
  624. vb2_buffer_done(&buf->vb.vb2_buf,
  625. VB2_BUF_STATE_DONE);
  626. list_del(&buf->link);
  627. }
  628. }
  629. spin_unlock(&video->lock);
  630. aspeed_video_update(video, VE_SEQ_CTRL,
  631. VE_SEQ_CTRL_TRIG_CAPTURE |
  632. VE_SEQ_CTRL_FORCE_IDLE |
  633. VE_SEQ_CTRL_TRIG_COMP, 0);
  634. aspeed_video_update(video, VE_INTERRUPT_CTRL,
  635. VE_INTERRUPT_COMP_COMPLETE, 0);
  636. aspeed_video_write(video, VE_INTERRUPT_STATUS,
  637. VE_INTERRUPT_COMP_COMPLETE);
  638. sts &= ~VE_INTERRUPT_COMP_COMPLETE;
  639. if (test_bit(VIDEO_STREAMING, &video->flags) && buf)
  640. aspeed_video_start_frame(video);
  641. }
  642. return sts ? IRQ_NONE : IRQ_HANDLED;
  643. }
  644. static void aspeed_video_check_and_set_polarity(struct aspeed_video *video)
  645. {
  646. int i;
  647. int hsync_counter = 0;
  648. int vsync_counter = 0;
  649. u32 sts, ctrl;
  650. for (i = 0; i < NUM_POLARITY_CHECKS; ++i) {
  651. sts = aspeed_video_read(video, VE_MODE_DETECT_STATUS);
  652. if (sts & VE_MODE_DETECT_STATUS_VSYNC)
  653. vsync_counter--;
  654. else
  655. vsync_counter++;
  656. if (sts & VE_MODE_DETECT_STATUS_HSYNC)
  657. hsync_counter--;
  658. else
  659. hsync_counter++;
  660. }
  661. ctrl = aspeed_video_read(video, VE_CTRL);
  662. if (hsync_counter < 0) {
  663. ctrl |= VE_CTRL_HSYNC_POL;
  664. video->detected_timings.polarities &=
  665. ~V4L2_DV_HSYNC_POS_POL;
  666. } else {
  667. ctrl &= ~VE_CTRL_HSYNC_POL;
  668. video->detected_timings.polarities |=
  669. V4L2_DV_HSYNC_POS_POL;
  670. }
  671. if (vsync_counter < 0) {
  672. ctrl |= VE_CTRL_VSYNC_POL;
  673. video->detected_timings.polarities &=
  674. ~V4L2_DV_VSYNC_POS_POL;
  675. } else {
  676. ctrl &= ~VE_CTRL_VSYNC_POL;
  677. video->detected_timings.polarities |=
  678. V4L2_DV_VSYNC_POS_POL;
  679. }
  680. aspeed_video_write(video, VE_CTRL, ctrl);
  681. }
  682. static bool aspeed_video_alloc_buf(struct aspeed_video *video,
  683. struct aspeed_video_addr *addr,
  684. unsigned int size)
  685. {
  686. addr->virt = dma_alloc_coherent(video->dev, size, &addr->dma,
  687. GFP_KERNEL);
  688. if (!addr->virt)
  689. return false;
  690. addr->size = size;
  691. return true;
  692. }
  693. static void aspeed_video_free_buf(struct aspeed_video *video,
  694. struct aspeed_video_addr *addr)
  695. {
  696. dma_free_coherent(video->dev, addr->size, addr->virt, addr->dma);
  697. addr->size = 0;
  698. addr->dma = 0ULL;
  699. addr->virt = NULL;
  700. }
  701. /*
  702. * Get the minimum HW-supported compression buffer size for the frame size.
  703. * Assume worst-case JPEG compression size is 1/8 raw size. This should be
  704. * plenty even for maximum quality; any worse and the engine will simply return
  705. * incomplete JPEGs.
  706. */
  707. static void aspeed_video_calc_compressed_size(struct aspeed_video *video,
  708. unsigned int frame_size)
  709. {
  710. int i, j;
  711. u32 compression_buffer_size_reg = 0;
  712. unsigned int size;
  713. const unsigned int num_compression_packets = 4;
  714. const unsigned int compression_packet_size = 1024;
  715. const unsigned int max_compressed_size = frame_size / 2; /* 4bpp / 8 */
  716. video->max_compressed_size = UINT_MAX;
  717. for (i = 0; i < 6; ++i) {
  718. for (j = 0; j < 8; ++j) {
  719. size = (num_compression_packets << i) *
  720. (compression_packet_size << j);
  721. if (size < max_compressed_size)
  722. continue;
  723. if (size < video->max_compressed_size) {
  724. compression_buffer_size_reg = (i << 3) | j;
  725. video->max_compressed_size = size;
  726. }
  727. }
  728. }
  729. aspeed_video_write(video, VE_STREAM_BUF_SIZE,
  730. compression_buffer_size_reg);
  731. v4l2_dbg(1, debug, &video->v4l2_dev, "Max compressed size: %#x\n",
  732. video->max_compressed_size);
  733. }
  734. /*
  735. * Update v4l2_bt_timings per current status.
  736. * frame_top/frame_bottom/frame_left/frame_right need to be ready.
  737. *
  738. * The following registers start counting from sync's rising edge:
  739. * 1. VR090: frame edge's left and right
  740. * 2. VR094: frame edge's top and bottom
  741. * 3. VR09C: counting from sync's rising edge to falling edge
  742. *
  743. * [Vertical timing]
  744. * +--+ +-------------------+ +--+
  745. * | | | v i d e o | | |
  746. * +--+ +-----+ +-----+ +---+
  747. * vsync+--+
  748. * frame_top+--------+
  749. * frame_bottom+----------------------------+
  750. *
  751. * +-------------------+
  752. * | v i d e o |
  753. * +--+ +-----+ +-----+ +---+
  754. * | | | |
  755. * +--+ +--+
  756. * vsync+-------------------------------+
  757. * frame_top+-----+
  758. * frame_bottom+-------------------------+
  759. *
  760. * [Horizontal timing]
  761. * +--+ +-------------------+ +--+
  762. * | | | v i d e o | | |
  763. * +--+ +-----+ +-----+ +---+
  764. * hsync+--+
  765. * frame_left+--------+
  766. * frame_right+----------------------------+
  767. *
  768. * +-------------------+
  769. * | v i d e o |
  770. * +--+ +-----+ +-----+ +---+
  771. * | | | |
  772. * +--+ +--+
  773. * hsync+-------------------------------+
  774. * frame_left+-----+
  775. * frame_right+-------------------------+
  776. *
  777. * @v: the struct of aspeed_video
  778. * @det: v4l2_bt_timings to be updated.
  779. */
  780. static void aspeed_video_get_timings(struct aspeed_video *v,
  781. struct v4l2_bt_timings *det)
  782. {
  783. u32 mds, sync, htotal, vtotal, vsync, hsync;
  784. mds = aspeed_video_read(v, VE_MODE_DETECT_STATUS);
  785. sync = aspeed_video_read(v, VE_SYNC_STATUS);
  786. htotal = aspeed_video_read(v, VE_H_TOTAL_PIXELS);
  787. vtotal = FIELD_GET(VE_MODE_DETECT_V_LINES, mds);
  788. vsync = FIELD_GET(VE_SYNC_STATUS_VSYNC, sync);
  789. hsync = FIELD_GET(VE_SYNC_STATUS_HSYNC, sync);
  790. /*
  791. * This is a workaround for polarity detection.
  792. * Because ast-soc counts sync from sync's rising edge, the reg value
  793. * of sync would be larger than video's active area if negative.
  794. */
  795. if (vsync > det->height)
  796. det->polarities &= ~V4L2_DV_VSYNC_POS_POL;
  797. else
  798. det->polarities |= V4L2_DV_VSYNC_POS_POL;
  799. if (hsync > det->width)
  800. det->polarities &= ~V4L2_DV_HSYNC_POS_POL;
  801. else
  802. det->polarities |= V4L2_DV_HSYNC_POS_POL;
  803. if (det->polarities & V4L2_DV_VSYNC_POS_POL) {
  804. det->vbackporch = v->frame_top - vsync;
  805. det->vfrontporch = vtotal - v->frame_bottom;
  806. det->vsync = vsync;
  807. } else {
  808. det->vbackporch = v->frame_top;
  809. det->vfrontporch = vsync - v->frame_bottom;
  810. det->vsync = vtotal - vsync;
  811. }
  812. if (det->polarities & V4L2_DV_HSYNC_POS_POL) {
  813. det->hbackporch = v->frame_left - hsync;
  814. det->hfrontporch = htotal - v->frame_right;
  815. det->hsync = hsync;
  816. } else {
  817. det->hbackporch = v->frame_left;
  818. det->hfrontporch = hsync - v->frame_right;
  819. det->hsync = htotal - hsync;
  820. }
  821. }
  822. #define res_check(v) test_and_clear_bit(VIDEO_MODE_DETECT_DONE, &(v)->flags)
  823. static void aspeed_video_get_resolution(struct aspeed_video *video)
  824. {
  825. bool invalid_resolution = true;
  826. int rc;
  827. int tries = 0;
  828. u32 mds;
  829. u32 src_lr_edge;
  830. u32 src_tb_edge;
  831. struct v4l2_bt_timings *det = &video->detected_timings;
  832. det->width = MIN_WIDTH;
  833. det->height = MIN_HEIGHT;
  834. video->v4l2_input_status = V4L2_IN_ST_NO_SIGNAL;
  835. memset(&video->perf, 0, sizeof(video->perf));
  836. do {
  837. if (tries) {
  838. set_current_state(TASK_INTERRUPTIBLE);
  839. if (schedule_timeout(INVALID_RESOLUTION_DELAY))
  840. return;
  841. }
  842. set_bit(VIDEO_RES_DETECT, &video->flags);
  843. aspeed_video_update(video, VE_CTRL,
  844. VE_CTRL_VSYNC_POL | VE_CTRL_HSYNC_POL, 0);
  845. aspeed_video_enable_mode_detect(video);
  846. rc = wait_event_interruptible_timeout(video->wait,
  847. res_check(video),
  848. MODE_DETECT_TIMEOUT);
  849. if (!rc) {
  850. v4l2_warn(&video->v4l2_dev, "Timed out; first mode detect\n");
  851. clear_bit(VIDEO_RES_DETECT, &video->flags);
  852. return;
  853. }
  854. mds = aspeed_video_read(video, VE_MODE_DETECT_STATUS);
  855. // try detection again if current signal isn't stable
  856. if (!(mds & VE_MODE_DETECT_H_STABLE) ||
  857. !(mds & VE_MODE_DETECT_V_STABLE) ||
  858. (mds & VE_MODE_DETECT_EXTSRC_ADC))
  859. continue;
  860. aspeed_video_check_and_set_polarity(video);
  861. aspeed_video_enable_mode_detect(video);
  862. rc = wait_event_interruptible_timeout(video->wait,
  863. res_check(video),
  864. MODE_DETECT_TIMEOUT);
  865. clear_bit(VIDEO_RES_DETECT, &video->flags);
  866. if (!rc) {
  867. v4l2_warn(&video->v4l2_dev, "Timed out; second mode detect\n");
  868. return;
  869. }
  870. src_lr_edge = aspeed_video_read(video, VE_SRC_LR_EDGE_DET);
  871. src_tb_edge = aspeed_video_read(video, VE_SRC_TB_EDGE_DET);
  872. video->frame_bottom = FIELD_GET(VE_SRC_TB_EDGE_DET_BOT, src_tb_edge);
  873. video->frame_top = FIELD_GET(VE_SRC_TB_EDGE_DET_TOP, src_tb_edge);
  874. if (video->frame_top > video->frame_bottom)
  875. continue;
  876. video->frame_right = FIELD_GET(VE_SRC_LR_EDGE_DET_RT, src_lr_edge);
  877. video->frame_left = FIELD_GET(VE_SRC_LR_EDGE_DET_LEFT, src_lr_edge);
  878. if (video->frame_left > video->frame_right)
  879. continue;
  880. invalid_resolution = false;
  881. } while (invalid_resolution && (tries++ < INVALID_RESOLUTION_RETRIES));
  882. if (invalid_resolution) {
  883. v4l2_warn(&video->v4l2_dev, "Invalid resolution detected\n");
  884. return;
  885. }
  886. det->height = (video->frame_bottom - video->frame_top) + 1;
  887. det->width = (video->frame_right - video->frame_left) + 1;
  888. video->v4l2_input_status = 0;
  889. aspeed_video_get_timings(video, det);
  890. /*
  891. * Enable mode-detect watchdog, resolution-change watchdog and
  892. * automatic compression after frame capture.
  893. */
  894. aspeed_video_update(video, VE_INTERRUPT_CTRL, 0,
  895. VE_INTERRUPT_MODE_DETECT_WD);
  896. aspeed_video_update(video, VE_SEQ_CTRL, 0,
  897. VE_SEQ_CTRL_AUTO_COMP | VE_SEQ_CTRL_EN_WATCHDOG);
  898. v4l2_dbg(1, debug, &video->v4l2_dev, "Got resolution: %dx%d\n",
  899. det->width, det->height);
  900. }
  901. static void aspeed_video_set_resolution(struct aspeed_video *video)
  902. {
  903. struct v4l2_bt_timings *act = &video->active_timings;
  904. unsigned int size = act->width * act->height;
  905. /* Set capture/compression frame sizes */
  906. aspeed_video_calc_compressed_size(video, size);
  907. if (!IS_ALIGNED(act->width, 64)) {
  908. /*
  909. * This is a workaround to fix a AST2500 silicon bug on A1 and
  910. * A2 revisions. Since it doesn't break capturing operation of
  911. * other revisions, use it for all revisions without checking
  912. * the revision ID. It picked new width which is a very next
  913. * 64-pixels aligned value to minimize memory bandwidth
  914. * and to get better access speed from video engine.
  915. */
  916. u32 width = ALIGN(act->width, 64);
  917. aspeed_video_write(video, VE_CAP_WINDOW, width << 16 | act->height);
  918. size = width * act->height;
  919. } else {
  920. aspeed_video_write(video, VE_CAP_WINDOW,
  921. act->width << 16 | act->height);
  922. }
  923. aspeed_video_write(video, VE_COMP_WINDOW,
  924. act->width << 16 | act->height);
  925. aspeed_video_write(video, VE_SRC_SCANLINE_OFFSET, act->width * 4);
  926. /* Don't use direct mode below 1024 x 768 (irqs don't fire) */
  927. if (size < DIRECT_FETCH_THRESHOLD) {
  928. v4l2_dbg(1, debug, &video->v4l2_dev, "Capture: Sync Mode\n");
  929. aspeed_video_write(video, VE_TGS_0,
  930. FIELD_PREP(VE_TGS_FIRST,
  931. video->frame_left - 1) |
  932. FIELD_PREP(VE_TGS_LAST,
  933. video->frame_right));
  934. aspeed_video_write(video, VE_TGS_1,
  935. FIELD_PREP(VE_TGS_FIRST, video->frame_top) |
  936. FIELD_PREP(VE_TGS_LAST,
  937. video->frame_bottom + 1));
  938. aspeed_video_update(video, VE_CTRL, 0, VE_CTRL_INT_DE);
  939. } else {
  940. v4l2_dbg(1, debug, &video->v4l2_dev, "Capture: Direct Mode\n");
  941. aspeed_video_update(video, VE_CTRL, 0, VE_CTRL_DIRECT_FETCH);
  942. }
  943. size *= 4;
  944. if (size != video->srcs[0].size) {
  945. if (video->srcs[0].size)
  946. aspeed_video_free_buf(video, &video->srcs[0]);
  947. if (video->srcs[1].size)
  948. aspeed_video_free_buf(video, &video->srcs[1]);
  949. if (!aspeed_video_alloc_buf(video, &video->srcs[0], size))
  950. goto err_mem;
  951. if (!aspeed_video_alloc_buf(video, &video->srcs[1], size))
  952. goto err_mem;
  953. v4l2_dbg(1, debug, &video->v4l2_dev, "src buf0 addr(%pad) size(%d)\n",
  954. &video->srcs[0].dma, video->srcs[0].size);
  955. v4l2_dbg(1, debug, &video->v4l2_dev, "src buf1 addr(%pad) size(%d)\n",
  956. &video->srcs[1].dma, video->srcs[1].size);
  957. aspeed_video_write(video, VE_SRC0_ADDR, video->srcs[0].dma);
  958. aspeed_video_write(video, VE_SRC1_ADDR, video->srcs[1].dma);
  959. }
  960. return;
  961. err_mem:
  962. dev_err(video->dev, "Failed to allocate source buffers\n");
  963. if (video->srcs[0].size)
  964. aspeed_video_free_buf(video, &video->srcs[0]);
  965. }
  966. static void aspeed_video_init_regs(struct aspeed_video *video)
  967. {
  968. u32 comp_ctrl = VE_COMP_CTRL_RSVD |
  969. FIELD_PREP(VE_COMP_CTRL_DCT_LUM, video->jpeg_quality) |
  970. FIELD_PREP(VE_COMP_CTRL_DCT_CHR, video->jpeg_quality | 0x10);
  971. u32 ctrl = VE_CTRL_AUTO_OR_CURSOR |
  972. FIELD_PREP(VE_CTRL_CAPTURE_FMT, VIDEO_CAP_FMT_YUV_FULL_SWING);
  973. u32 seq_ctrl = video->jpeg_mode;
  974. if (video->frame_rate)
  975. ctrl |= FIELD_PREP(VE_CTRL_FRC, video->frame_rate);
  976. if (video->yuv420)
  977. seq_ctrl |= VE_SEQ_CTRL_YUV420;
  978. /* Unlock VE registers */
  979. aspeed_video_write(video, VE_PROTECTION_KEY, VE_PROTECTION_KEY_UNLOCK);
  980. /* Disable interrupts */
  981. aspeed_video_write(video, VE_INTERRUPT_CTRL, 0);
  982. aspeed_video_write(video, VE_INTERRUPT_STATUS, 0xffffffff);
  983. /* Clear the offset */
  984. aspeed_video_write(video, VE_COMP_PROC_OFFSET, 0);
  985. aspeed_video_write(video, VE_COMP_OFFSET, 0);
  986. aspeed_video_write(video, VE_JPEG_ADDR, video->jpeg.dma);
  987. /* Set control registers */
  988. aspeed_video_write(video, VE_SEQ_CTRL, seq_ctrl);
  989. aspeed_video_write(video, VE_CTRL, ctrl);
  990. aspeed_video_write(video, VE_COMP_CTRL, comp_ctrl);
  991. /* Don't downscale */
  992. aspeed_video_write(video, VE_SCALING_FACTOR, 0x10001000);
  993. aspeed_video_write(video, VE_SCALING_FILTER0, 0x00200000);
  994. aspeed_video_write(video, VE_SCALING_FILTER1, 0x00200000);
  995. aspeed_video_write(video, VE_SCALING_FILTER2, 0x00200000);
  996. aspeed_video_write(video, VE_SCALING_FILTER3, 0x00200000);
  997. /* Set mode detection defaults */
  998. aspeed_video_write(video, VE_MODE_DETECT,
  999. FIELD_PREP(VE_MODE_DT_HOR_TOLER, 2) |
  1000. FIELD_PREP(VE_MODE_DT_VER_TOLER, 2) |
  1001. FIELD_PREP(VE_MODE_DT_HOR_STABLE, 6) |
  1002. FIELD_PREP(VE_MODE_DT_VER_STABLE, 6) |
  1003. FIELD_PREP(VE_MODE_DT_EDG_THROD, 0x65));
  1004. }
  1005. static void aspeed_video_start(struct aspeed_video *video)
  1006. {
  1007. aspeed_video_on(video);
  1008. aspeed_video_init_regs(video);
  1009. /* Resolution set to 640x480 if no signal found */
  1010. aspeed_video_get_resolution(video);
  1011. /* Set timings since the device is being opened for the first time */
  1012. video->active_timings = video->detected_timings;
  1013. aspeed_video_set_resolution(video);
  1014. video->pix_fmt.width = video->active_timings.width;
  1015. video->pix_fmt.height = video->active_timings.height;
  1016. video->pix_fmt.sizeimage = video->max_compressed_size;
  1017. }
  1018. static void aspeed_video_stop(struct aspeed_video *video)
  1019. {
  1020. set_bit(VIDEO_STOPPED, &video->flags);
  1021. cancel_delayed_work_sync(&video->res_work);
  1022. aspeed_video_off(video);
  1023. if (video->srcs[0].size)
  1024. aspeed_video_free_buf(video, &video->srcs[0]);
  1025. if (video->srcs[1].size)
  1026. aspeed_video_free_buf(video, &video->srcs[1]);
  1027. video->v4l2_input_status = V4L2_IN_ST_NO_SIGNAL;
  1028. video->flags = 0;
  1029. }
  1030. static int aspeed_video_querycap(struct file *file, void *fh,
  1031. struct v4l2_capability *cap)
  1032. {
  1033. strscpy(cap->driver, DEVICE_NAME, sizeof(cap->driver));
  1034. strscpy(cap->card, "Aspeed Video Engine", sizeof(cap->card));
  1035. snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
  1036. DEVICE_NAME);
  1037. return 0;
  1038. }
  1039. static int aspeed_video_enum_format(struct file *file, void *fh,
  1040. struct v4l2_fmtdesc *f)
  1041. {
  1042. if (f->index)
  1043. return -EINVAL;
  1044. f->pixelformat = V4L2_PIX_FMT_JPEG;
  1045. return 0;
  1046. }
  1047. static int aspeed_video_get_format(struct file *file, void *fh,
  1048. struct v4l2_format *f)
  1049. {
  1050. struct aspeed_video *video = video_drvdata(file);
  1051. f->fmt.pix = video->pix_fmt;
  1052. return 0;
  1053. }
  1054. static int aspeed_video_enum_input(struct file *file, void *fh,
  1055. struct v4l2_input *inp)
  1056. {
  1057. struct aspeed_video *video = video_drvdata(file);
  1058. if (inp->index)
  1059. return -EINVAL;
  1060. strscpy(inp->name, "Host VGA capture", sizeof(inp->name));
  1061. inp->type = V4L2_INPUT_TYPE_CAMERA;
  1062. inp->capabilities = V4L2_IN_CAP_DV_TIMINGS;
  1063. inp->status = video->v4l2_input_status;
  1064. return 0;
  1065. }
  1066. static int aspeed_video_get_input(struct file *file, void *fh, unsigned int *i)
  1067. {
  1068. *i = 0;
  1069. return 0;
  1070. }
  1071. static int aspeed_video_set_input(struct file *file, void *fh, unsigned int i)
  1072. {
  1073. if (i)
  1074. return -EINVAL;
  1075. return 0;
  1076. }
  1077. static int aspeed_video_get_parm(struct file *file, void *fh,
  1078. struct v4l2_streamparm *a)
  1079. {
  1080. struct aspeed_video *video = video_drvdata(file);
  1081. a->parm.capture.capability = V4L2_CAP_TIMEPERFRAME;
  1082. a->parm.capture.readbuffers = ASPEED_VIDEO_V4L2_MIN_BUF_REQ;
  1083. a->parm.capture.timeperframe.numerator = 1;
  1084. if (!video->frame_rate)
  1085. a->parm.capture.timeperframe.denominator = MAX_FRAME_RATE;
  1086. else
  1087. a->parm.capture.timeperframe.denominator = video->frame_rate;
  1088. return 0;
  1089. }
  1090. static int aspeed_video_set_parm(struct file *file, void *fh,
  1091. struct v4l2_streamparm *a)
  1092. {
  1093. unsigned int frame_rate = 0;
  1094. struct aspeed_video *video = video_drvdata(file);
  1095. a->parm.capture.capability = V4L2_CAP_TIMEPERFRAME;
  1096. a->parm.capture.readbuffers = ASPEED_VIDEO_V4L2_MIN_BUF_REQ;
  1097. if (a->parm.capture.timeperframe.numerator)
  1098. frame_rate = a->parm.capture.timeperframe.denominator /
  1099. a->parm.capture.timeperframe.numerator;
  1100. if (!frame_rate || frame_rate > MAX_FRAME_RATE) {
  1101. frame_rate = 0;
  1102. a->parm.capture.timeperframe.denominator = MAX_FRAME_RATE;
  1103. a->parm.capture.timeperframe.numerator = 1;
  1104. }
  1105. if (video->frame_rate != frame_rate) {
  1106. video->frame_rate = frame_rate;
  1107. aspeed_video_update(video, VE_CTRL, VE_CTRL_FRC,
  1108. FIELD_PREP(VE_CTRL_FRC, frame_rate));
  1109. }
  1110. return 0;
  1111. }
  1112. static int aspeed_video_enum_framesizes(struct file *file, void *fh,
  1113. struct v4l2_frmsizeenum *fsize)
  1114. {
  1115. struct aspeed_video *video = video_drvdata(file);
  1116. if (fsize->index)
  1117. return -EINVAL;
  1118. if (fsize->pixel_format != V4L2_PIX_FMT_JPEG)
  1119. return -EINVAL;
  1120. fsize->discrete.width = video->pix_fmt.width;
  1121. fsize->discrete.height = video->pix_fmt.height;
  1122. fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE;
  1123. return 0;
  1124. }
  1125. static int aspeed_video_enum_frameintervals(struct file *file, void *fh,
  1126. struct v4l2_frmivalenum *fival)
  1127. {
  1128. struct aspeed_video *video = video_drvdata(file);
  1129. if (fival->index)
  1130. return -EINVAL;
  1131. if (fival->width != video->detected_timings.width ||
  1132. fival->height != video->detected_timings.height)
  1133. return -EINVAL;
  1134. if (fival->pixel_format != V4L2_PIX_FMT_JPEG)
  1135. return -EINVAL;
  1136. fival->type = V4L2_FRMIVAL_TYPE_CONTINUOUS;
  1137. fival->stepwise.min.denominator = MAX_FRAME_RATE;
  1138. fival->stepwise.min.numerator = 1;
  1139. fival->stepwise.max.denominator = 1;
  1140. fival->stepwise.max.numerator = 1;
  1141. fival->stepwise.step = fival->stepwise.max;
  1142. return 0;
  1143. }
  1144. static int aspeed_video_set_dv_timings(struct file *file, void *fh,
  1145. struct v4l2_dv_timings *timings)
  1146. {
  1147. struct aspeed_video *video = video_drvdata(file);
  1148. if (timings->bt.width == video->active_timings.width &&
  1149. timings->bt.height == video->active_timings.height)
  1150. return 0;
  1151. if (vb2_is_busy(&video->queue))
  1152. return -EBUSY;
  1153. video->active_timings = timings->bt;
  1154. aspeed_video_set_resolution(video);
  1155. video->pix_fmt.width = timings->bt.width;
  1156. video->pix_fmt.height = timings->bt.height;
  1157. video->pix_fmt.sizeimage = video->max_compressed_size;
  1158. timings->type = V4L2_DV_BT_656_1120;
  1159. v4l2_dbg(1, debug, &video->v4l2_dev, "set new timings(%dx%d)\n",
  1160. timings->bt.width, timings->bt.height);
  1161. return 0;
  1162. }
  1163. static int aspeed_video_get_dv_timings(struct file *file, void *fh,
  1164. struct v4l2_dv_timings *timings)
  1165. {
  1166. struct aspeed_video *video = video_drvdata(file);
  1167. timings->type = V4L2_DV_BT_656_1120;
  1168. timings->bt = video->active_timings;
  1169. return 0;
  1170. }
  1171. static int aspeed_video_query_dv_timings(struct file *file, void *fh,
  1172. struct v4l2_dv_timings *timings)
  1173. {
  1174. int rc;
  1175. struct aspeed_video *video = video_drvdata(file);
  1176. /*
  1177. * This blocks only if the driver is currently in the process of
  1178. * detecting a new resolution; in the event of no signal or timeout
  1179. * this function is woken up.
  1180. */
  1181. if (file->f_flags & O_NONBLOCK) {
  1182. if (test_bit(VIDEO_RES_CHANGE, &video->flags))
  1183. return -EAGAIN;
  1184. } else {
  1185. rc = wait_event_interruptible(video->wait,
  1186. !test_bit(VIDEO_RES_CHANGE,
  1187. &video->flags));
  1188. if (rc)
  1189. return -EINTR;
  1190. }
  1191. timings->type = V4L2_DV_BT_656_1120;
  1192. timings->bt = video->detected_timings;
  1193. return video->v4l2_input_status ? -ENOLINK : 0;
  1194. }
  1195. static int aspeed_video_enum_dv_timings(struct file *file, void *fh,
  1196. struct v4l2_enum_dv_timings *timings)
  1197. {
  1198. return v4l2_enum_dv_timings_cap(timings, &aspeed_video_timings_cap,
  1199. NULL, NULL);
  1200. }
  1201. static int aspeed_video_dv_timings_cap(struct file *file, void *fh,
  1202. struct v4l2_dv_timings_cap *cap)
  1203. {
  1204. *cap = aspeed_video_timings_cap;
  1205. return 0;
  1206. }
  1207. static int aspeed_video_sub_event(struct v4l2_fh *fh,
  1208. const struct v4l2_event_subscription *sub)
  1209. {
  1210. switch (sub->type) {
  1211. case V4L2_EVENT_SOURCE_CHANGE:
  1212. return v4l2_src_change_event_subscribe(fh, sub);
  1213. }
  1214. return v4l2_ctrl_subscribe_event(fh, sub);
  1215. }
  1216. static const struct v4l2_ioctl_ops aspeed_video_ioctl_ops = {
  1217. .vidioc_querycap = aspeed_video_querycap,
  1218. .vidioc_enum_fmt_vid_cap = aspeed_video_enum_format,
  1219. .vidioc_g_fmt_vid_cap = aspeed_video_get_format,
  1220. .vidioc_s_fmt_vid_cap = aspeed_video_get_format,
  1221. .vidioc_try_fmt_vid_cap = aspeed_video_get_format,
  1222. .vidioc_reqbufs = vb2_ioctl_reqbufs,
  1223. .vidioc_querybuf = vb2_ioctl_querybuf,
  1224. .vidioc_qbuf = vb2_ioctl_qbuf,
  1225. .vidioc_expbuf = vb2_ioctl_expbuf,
  1226. .vidioc_dqbuf = vb2_ioctl_dqbuf,
  1227. .vidioc_create_bufs = vb2_ioctl_create_bufs,
  1228. .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
  1229. .vidioc_streamon = vb2_ioctl_streamon,
  1230. .vidioc_streamoff = vb2_ioctl_streamoff,
  1231. .vidioc_enum_input = aspeed_video_enum_input,
  1232. .vidioc_g_input = aspeed_video_get_input,
  1233. .vidioc_s_input = aspeed_video_set_input,
  1234. .vidioc_g_parm = aspeed_video_get_parm,
  1235. .vidioc_s_parm = aspeed_video_set_parm,
  1236. .vidioc_enum_framesizes = aspeed_video_enum_framesizes,
  1237. .vidioc_enum_frameintervals = aspeed_video_enum_frameintervals,
  1238. .vidioc_s_dv_timings = aspeed_video_set_dv_timings,
  1239. .vidioc_g_dv_timings = aspeed_video_get_dv_timings,
  1240. .vidioc_query_dv_timings = aspeed_video_query_dv_timings,
  1241. .vidioc_enum_dv_timings = aspeed_video_enum_dv_timings,
  1242. .vidioc_dv_timings_cap = aspeed_video_dv_timings_cap,
  1243. .vidioc_subscribe_event = aspeed_video_sub_event,
  1244. .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
  1245. };
  1246. static void aspeed_video_update_jpeg_quality(struct aspeed_video *video)
  1247. {
  1248. u32 comp_ctrl = FIELD_PREP(VE_COMP_CTRL_DCT_LUM, video->jpeg_quality) |
  1249. FIELD_PREP(VE_COMP_CTRL_DCT_CHR, video->jpeg_quality | 0x10);
  1250. aspeed_video_update(video, VE_COMP_CTRL,
  1251. VE_COMP_CTRL_DCT_LUM | VE_COMP_CTRL_DCT_CHR,
  1252. comp_ctrl);
  1253. }
  1254. static void aspeed_video_update_subsampling(struct aspeed_video *video)
  1255. {
  1256. if (video->jpeg.virt)
  1257. aspeed_video_update_jpeg_table(video->jpeg.virt, video->yuv420);
  1258. if (video->yuv420)
  1259. aspeed_video_update(video, VE_SEQ_CTRL, 0, VE_SEQ_CTRL_YUV420);
  1260. else
  1261. aspeed_video_update(video, VE_SEQ_CTRL, VE_SEQ_CTRL_YUV420, 0);
  1262. }
  1263. static int aspeed_video_set_ctrl(struct v4l2_ctrl *ctrl)
  1264. {
  1265. struct aspeed_video *video = container_of(ctrl->handler,
  1266. struct aspeed_video,
  1267. ctrl_handler);
  1268. switch (ctrl->id) {
  1269. case V4L2_CID_JPEG_COMPRESSION_QUALITY:
  1270. video->jpeg_quality = ctrl->val;
  1271. aspeed_video_update_jpeg_quality(video);
  1272. break;
  1273. case V4L2_CID_JPEG_CHROMA_SUBSAMPLING:
  1274. if (ctrl->val == V4L2_JPEG_CHROMA_SUBSAMPLING_420) {
  1275. video->yuv420 = true;
  1276. aspeed_video_update_subsampling(video);
  1277. } else {
  1278. video->yuv420 = false;
  1279. aspeed_video_update_subsampling(video);
  1280. }
  1281. break;
  1282. default:
  1283. return -EINVAL;
  1284. }
  1285. return 0;
  1286. }
  1287. static const struct v4l2_ctrl_ops aspeed_video_ctrl_ops = {
  1288. .s_ctrl = aspeed_video_set_ctrl,
  1289. };
  1290. static void aspeed_video_resolution_work(struct work_struct *work)
  1291. {
  1292. struct delayed_work *dwork = to_delayed_work(work);
  1293. struct aspeed_video *video = container_of(dwork, struct aspeed_video,
  1294. res_work);
  1295. aspeed_video_on(video);
  1296. /* Exit early in case no clients remain */
  1297. if (test_bit(VIDEO_STOPPED, &video->flags))
  1298. goto done;
  1299. aspeed_video_init_regs(video);
  1300. aspeed_video_get_resolution(video);
  1301. if (video->detected_timings.width != video->active_timings.width ||
  1302. video->detected_timings.height != video->active_timings.height) {
  1303. static const struct v4l2_event ev = {
  1304. .type = V4L2_EVENT_SOURCE_CHANGE,
  1305. .u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION,
  1306. };
  1307. v4l2_dbg(1, debug, &video->v4l2_dev, "fire source change event\n");
  1308. v4l2_event_queue(&video->vdev, &ev);
  1309. } else if (test_bit(VIDEO_STREAMING, &video->flags)) {
  1310. /* No resolution change so just restart streaming */
  1311. aspeed_video_start_frame(video);
  1312. }
  1313. done:
  1314. clear_bit(VIDEO_RES_CHANGE, &video->flags);
  1315. wake_up_interruptible_all(&video->wait);
  1316. }
  1317. static int aspeed_video_open(struct file *file)
  1318. {
  1319. int rc;
  1320. struct aspeed_video *video = video_drvdata(file);
  1321. mutex_lock(&video->video_lock);
  1322. rc = v4l2_fh_open(file);
  1323. if (rc) {
  1324. mutex_unlock(&video->video_lock);
  1325. return rc;
  1326. }
  1327. if (v4l2_fh_is_singular_file(file))
  1328. aspeed_video_start(video);
  1329. mutex_unlock(&video->video_lock);
  1330. return 0;
  1331. }
  1332. static int aspeed_video_release(struct file *file)
  1333. {
  1334. int rc;
  1335. struct aspeed_video *video = video_drvdata(file);
  1336. mutex_lock(&video->video_lock);
  1337. if (v4l2_fh_is_singular_file(file))
  1338. aspeed_video_stop(video);
  1339. rc = _vb2_fop_release(file, NULL);
  1340. mutex_unlock(&video->video_lock);
  1341. return rc;
  1342. }
  1343. static const struct v4l2_file_operations aspeed_video_v4l2_fops = {
  1344. .owner = THIS_MODULE,
  1345. .read = vb2_fop_read,
  1346. .poll = vb2_fop_poll,
  1347. .unlocked_ioctl = video_ioctl2,
  1348. .mmap = vb2_fop_mmap,
  1349. .open = aspeed_video_open,
  1350. .release = aspeed_video_release,
  1351. };
  1352. static int aspeed_video_queue_setup(struct vb2_queue *q,
  1353. unsigned int *num_buffers,
  1354. unsigned int *num_planes,
  1355. unsigned int sizes[],
  1356. struct device *alloc_devs[])
  1357. {
  1358. struct aspeed_video *video = vb2_get_drv_priv(q);
  1359. if (*num_planes) {
  1360. if (sizes[0] < video->max_compressed_size)
  1361. return -EINVAL;
  1362. return 0;
  1363. }
  1364. *num_planes = 1;
  1365. sizes[0] = video->max_compressed_size;
  1366. return 0;
  1367. }
  1368. static int aspeed_video_buf_prepare(struct vb2_buffer *vb)
  1369. {
  1370. struct aspeed_video *video = vb2_get_drv_priv(vb->vb2_queue);
  1371. if (vb2_plane_size(vb, 0) < video->max_compressed_size)
  1372. return -EINVAL;
  1373. return 0;
  1374. }
  1375. static int aspeed_video_start_streaming(struct vb2_queue *q,
  1376. unsigned int count)
  1377. {
  1378. int rc;
  1379. struct aspeed_video *video = vb2_get_drv_priv(q);
  1380. video->sequence = 0;
  1381. video->perf.duration_max = 0;
  1382. video->perf.duration_min = 0xffffffff;
  1383. rc = aspeed_video_start_frame(video);
  1384. if (rc) {
  1385. aspeed_video_bufs_done(video, VB2_BUF_STATE_QUEUED);
  1386. return rc;
  1387. }
  1388. set_bit(VIDEO_STREAMING, &video->flags);
  1389. return 0;
  1390. }
  1391. static void aspeed_video_stop_streaming(struct vb2_queue *q)
  1392. {
  1393. int rc;
  1394. struct aspeed_video *video = vb2_get_drv_priv(q);
  1395. clear_bit(VIDEO_STREAMING, &video->flags);
  1396. rc = wait_event_timeout(video->wait,
  1397. !test_bit(VIDEO_FRAME_INPRG, &video->flags),
  1398. STOP_TIMEOUT);
  1399. if (!rc) {
  1400. v4l2_warn(&video->v4l2_dev, "Timed out when stopping streaming\n");
  1401. /*
  1402. * Need to force stop any DMA and try and get HW into a good
  1403. * state for future calls to start streaming again.
  1404. */
  1405. aspeed_video_off(video);
  1406. aspeed_video_on(video);
  1407. aspeed_video_init_regs(video);
  1408. aspeed_video_get_resolution(video);
  1409. }
  1410. aspeed_video_bufs_done(video, VB2_BUF_STATE_ERROR);
  1411. }
  1412. static void aspeed_video_buf_queue(struct vb2_buffer *vb)
  1413. {
  1414. bool empty;
  1415. struct aspeed_video *video = vb2_get_drv_priv(vb->vb2_queue);
  1416. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  1417. struct aspeed_video_buffer *avb = to_aspeed_video_buffer(vbuf);
  1418. unsigned long flags;
  1419. spin_lock_irqsave(&video->lock, flags);
  1420. empty = list_empty(&video->buffers);
  1421. list_add_tail(&avb->link, &video->buffers);
  1422. spin_unlock_irqrestore(&video->lock, flags);
  1423. if (test_bit(VIDEO_STREAMING, &video->flags) &&
  1424. !test_bit(VIDEO_FRAME_INPRG, &video->flags) && empty)
  1425. aspeed_video_start_frame(video);
  1426. }
  1427. static const struct vb2_ops aspeed_video_vb2_ops = {
  1428. .queue_setup = aspeed_video_queue_setup,
  1429. .wait_prepare = vb2_ops_wait_prepare,
  1430. .wait_finish = vb2_ops_wait_finish,
  1431. .buf_prepare = aspeed_video_buf_prepare,
  1432. .start_streaming = aspeed_video_start_streaming,
  1433. .stop_streaming = aspeed_video_stop_streaming,
  1434. .buf_queue = aspeed_video_buf_queue,
  1435. };
  1436. #ifdef CONFIG_DEBUG_FS
  1437. static int aspeed_video_debugfs_show(struct seq_file *s, void *data)
  1438. {
  1439. struct aspeed_video *v = s->private;
  1440. seq_puts(s, "\n");
  1441. seq_printf(s, " %-20s:\t%s\n", "Signal",
  1442. v->v4l2_input_status ? "Unlock" : "Lock");
  1443. seq_printf(s, " %-20s:\t%d\n", "Width", v->pix_fmt.width);
  1444. seq_printf(s, " %-20s:\t%d\n", "Height", v->pix_fmt.height);
  1445. seq_printf(s, " %-20s:\t%d\n", "FRC", v->frame_rate);
  1446. seq_puts(s, "\n");
  1447. seq_puts(s, "Performance:\n");
  1448. seq_printf(s, " %-20s:\t%d\n", "Frame#", v->sequence);
  1449. seq_printf(s, " %-20s:\n", "Frame Duration(ms)");
  1450. seq_printf(s, " %-18s:\t%d\n", "Now", v->perf.duration);
  1451. seq_printf(s, " %-18s:\t%d\n", "Min", v->perf.duration_min);
  1452. seq_printf(s, " %-18s:\t%d\n", "Max", v->perf.duration_max);
  1453. seq_printf(s, " %-20s:\t%d\n", "FPS", 1000 / (v->perf.totaltime / v->sequence));
  1454. return 0;
  1455. }
  1456. static int aspeed_video_proc_open(struct inode *inode, struct file *file)
  1457. {
  1458. return single_open(file, aspeed_video_debugfs_show, inode->i_private);
  1459. }
  1460. static const struct file_operations aspeed_video_debugfs_ops = {
  1461. .owner = THIS_MODULE,
  1462. .open = aspeed_video_proc_open,
  1463. .read = seq_read,
  1464. .llseek = seq_lseek,
  1465. .release = single_release,
  1466. };
  1467. static struct dentry *debugfs_entry;
  1468. static void aspeed_video_debugfs_remove(struct aspeed_video *video)
  1469. {
  1470. debugfs_remove_recursive(debugfs_entry);
  1471. debugfs_entry = NULL;
  1472. }
  1473. static int aspeed_video_debugfs_create(struct aspeed_video *video)
  1474. {
  1475. debugfs_entry = debugfs_create_file(DEVICE_NAME, 0444, NULL,
  1476. video,
  1477. &aspeed_video_debugfs_ops);
  1478. if (!debugfs_entry)
  1479. aspeed_video_debugfs_remove(video);
  1480. return !debugfs_entry ? -EIO : 0;
  1481. }
  1482. #else
  1483. static void aspeed_video_debugfs_remove(struct aspeed_video *video) { }
  1484. static int aspeed_video_debugfs_create(struct aspeed_video *video)
  1485. {
  1486. return 0;
  1487. }
  1488. #endif /* CONFIG_DEBUG_FS */
  1489. static int aspeed_video_setup_video(struct aspeed_video *video)
  1490. {
  1491. const u64 mask = ~(BIT(V4L2_JPEG_CHROMA_SUBSAMPLING_444) |
  1492. BIT(V4L2_JPEG_CHROMA_SUBSAMPLING_420));
  1493. struct v4l2_device *v4l2_dev = &video->v4l2_dev;
  1494. struct vb2_queue *vbq = &video->queue;
  1495. struct video_device *vdev = &video->vdev;
  1496. int rc;
  1497. video->pix_fmt.pixelformat = V4L2_PIX_FMT_JPEG;
  1498. video->pix_fmt.field = V4L2_FIELD_NONE;
  1499. video->pix_fmt.colorspace = V4L2_COLORSPACE_SRGB;
  1500. video->pix_fmt.quantization = V4L2_QUANTIZATION_FULL_RANGE;
  1501. video->v4l2_input_status = V4L2_IN_ST_NO_SIGNAL;
  1502. rc = v4l2_device_register(video->dev, v4l2_dev);
  1503. if (rc) {
  1504. dev_err(video->dev, "Failed to register v4l2 device\n");
  1505. return rc;
  1506. }
  1507. v4l2_ctrl_handler_init(&video->ctrl_handler, 2);
  1508. v4l2_ctrl_new_std(&video->ctrl_handler, &aspeed_video_ctrl_ops,
  1509. V4L2_CID_JPEG_COMPRESSION_QUALITY, 0,
  1510. ASPEED_VIDEO_JPEG_NUM_QUALITIES - 1, 1, 0);
  1511. v4l2_ctrl_new_std_menu(&video->ctrl_handler, &aspeed_video_ctrl_ops,
  1512. V4L2_CID_JPEG_CHROMA_SUBSAMPLING,
  1513. V4L2_JPEG_CHROMA_SUBSAMPLING_420, mask,
  1514. V4L2_JPEG_CHROMA_SUBSAMPLING_444);
  1515. rc = video->ctrl_handler.error;
  1516. if (rc) {
  1517. v4l2_ctrl_handler_free(&video->ctrl_handler);
  1518. v4l2_device_unregister(v4l2_dev);
  1519. dev_err(video->dev, "Failed to init controls: %d\n", rc);
  1520. return rc;
  1521. }
  1522. v4l2_dev->ctrl_handler = &video->ctrl_handler;
  1523. vbq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  1524. vbq->io_modes = VB2_MMAP | VB2_READ | VB2_DMABUF;
  1525. vbq->dev = v4l2_dev->dev;
  1526. vbq->lock = &video->video_lock;
  1527. vbq->ops = &aspeed_video_vb2_ops;
  1528. vbq->mem_ops = &vb2_dma_contig_memops;
  1529. vbq->drv_priv = video;
  1530. vbq->buf_struct_size = sizeof(struct aspeed_video_buffer);
  1531. vbq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  1532. vbq->min_buffers_needed = ASPEED_VIDEO_V4L2_MIN_BUF_REQ;
  1533. rc = vb2_queue_init(vbq);
  1534. if (rc) {
  1535. v4l2_ctrl_handler_free(&video->ctrl_handler);
  1536. v4l2_device_unregister(v4l2_dev);
  1537. dev_err(video->dev, "Failed to init vb2 queue\n");
  1538. return rc;
  1539. }
  1540. vdev->queue = vbq;
  1541. vdev->fops = &aspeed_video_v4l2_fops;
  1542. vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE |
  1543. V4L2_CAP_STREAMING;
  1544. vdev->v4l2_dev = v4l2_dev;
  1545. strscpy(vdev->name, DEVICE_NAME, sizeof(vdev->name));
  1546. vdev->vfl_type = VFL_TYPE_VIDEO;
  1547. vdev->vfl_dir = VFL_DIR_RX;
  1548. vdev->release = video_device_release_empty;
  1549. vdev->ioctl_ops = &aspeed_video_ioctl_ops;
  1550. vdev->lock = &video->video_lock;
  1551. video_set_drvdata(vdev, video);
  1552. rc = video_register_device(vdev, VFL_TYPE_VIDEO, 0);
  1553. if (rc) {
  1554. v4l2_ctrl_handler_free(&video->ctrl_handler);
  1555. v4l2_device_unregister(v4l2_dev);
  1556. dev_err(video->dev, "Failed to register video device\n");
  1557. return rc;
  1558. }
  1559. return 0;
  1560. }
  1561. static int aspeed_video_init(struct aspeed_video *video)
  1562. {
  1563. int irq;
  1564. int rc;
  1565. struct device *dev = video->dev;
  1566. irq = irq_of_parse_and_map(dev->of_node, 0);
  1567. if (!irq) {
  1568. dev_err(dev, "Unable to find IRQ\n");
  1569. return -ENODEV;
  1570. }
  1571. rc = devm_request_threaded_irq(dev, irq, NULL, aspeed_video_irq,
  1572. IRQF_ONESHOT, DEVICE_NAME, video);
  1573. if (rc < 0) {
  1574. dev_err(dev, "Unable to request IRQ %d\n", irq);
  1575. return rc;
  1576. }
  1577. dev_info(video->dev, "irq %d\n", irq);
  1578. video->eclk = devm_clk_get(dev, "eclk");
  1579. if (IS_ERR(video->eclk)) {
  1580. dev_err(dev, "Unable to get ECLK\n");
  1581. return PTR_ERR(video->eclk);
  1582. }
  1583. rc = clk_prepare(video->eclk);
  1584. if (rc)
  1585. return rc;
  1586. video->vclk = devm_clk_get(dev, "vclk");
  1587. if (IS_ERR(video->vclk)) {
  1588. dev_err(dev, "Unable to get VCLK\n");
  1589. rc = PTR_ERR(video->vclk);
  1590. goto err_unprepare_eclk;
  1591. }
  1592. rc = clk_prepare(video->vclk);
  1593. if (rc)
  1594. goto err_unprepare_eclk;
  1595. of_reserved_mem_device_init(dev);
  1596. rc = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
  1597. if (rc) {
  1598. dev_err(dev, "Failed to set DMA mask\n");
  1599. goto err_release_reserved_mem;
  1600. }
  1601. if (!aspeed_video_alloc_buf(video, &video->jpeg,
  1602. VE_JPEG_HEADER_SIZE)) {
  1603. dev_err(dev, "Failed to allocate DMA for JPEG header\n");
  1604. rc = -ENOMEM;
  1605. goto err_release_reserved_mem;
  1606. }
  1607. dev_info(video->dev, "alloc mem size(%d) at %pad for jpeg header\n",
  1608. VE_JPEG_HEADER_SIZE, &video->jpeg.dma);
  1609. aspeed_video_init_jpeg_table(video->jpeg.virt, video->yuv420);
  1610. return 0;
  1611. err_release_reserved_mem:
  1612. of_reserved_mem_device_release(dev);
  1613. clk_unprepare(video->vclk);
  1614. err_unprepare_eclk:
  1615. clk_unprepare(video->eclk);
  1616. return rc;
  1617. }
  1618. static const struct of_device_id aspeed_video_of_match[] = {
  1619. { .compatible = "aspeed,ast2400-video-engine", .data = &ast2400_config },
  1620. { .compatible = "aspeed,ast2500-video-engine", .data = &ast2500_config },
  1621. { .compatible = "aspeed,ast2600-video-engine", .data = &ast2600_config },
  1622. {}
  1623. };
  1624. MODULE_DEVICE_TABLE(of, aspeed_video_of_match);
  1625. static int aspeed_video_probe(struct platform_device *pdev)
  1626. {
  1627. const struct aspeed_video_config *config;
  1628. struct aspeed_video *video;
  1629. int rc;
  1630. video = devm_kzalloc(&pdev->dev, sizeof(*video), GFP_KERNEL);
  1631. if (!video)
  1632. return -ENOMEM;
  1633. video->base = devm_platform_ioremap_resource(pdev, 0);
  1634. if (IS_ERR(video->base))
  1635. return PTR_ERR(video->base);
  1636. config = of_device_get_match_data(&pdev->dev);
  1637. if (!config)
  1638. return -ENODEV;
  1639. video->jpeg_mode = config->jpeg_mode;
  1640. video->comp_size_read = config->comp_size_read;
  1641. video->frame_rate = 30;
  1642. video->dev = &pdev->dev;
  1643. spin_lock_init(&video->lock);
  1644. mutex_init(&video->video_lock);
  1645. init_waitqueue_head(&video->wait);
  1646. INIT_DELAYED_WORK(&video->res_work, aspeed_video_resolution_work);
  1647. INIT_LIST_HEAD(&video->buffers);
  1648. rc = aspeed_video_init(video);
  1649. if (rc)
  1650. return rc;
  1651. rc = aspeed_video_setup_video(video);
  1652. if (rc) {
  1653. aspeed_video_free_buf(video, &video->jpeg);
  1654. clk_unprepare(video->vclk);
  1655. clk_unprepare(video->eclk);
  1656. return rc;
  1657. }
  1658. rc = aspeed_video_debugfs_create(video);
  1659. if (rc)
  1660. dev_err(video->dev, "debugfs create failed\n");
  1661. return 0;
  1662. }
  1663. static int aspeed_video_remove(struct platform_device *pdev)
  1664. {
  1665. struct device *dev = &pdev->dev;
  1666. struct v4l2_device *v4l2_dev = dev_get_drvdata(dev);
  1667. struct aspeed_video *video = to_aspeed_video(v4l2_dev);
  1668. aspeed_video_off(video);
  1669. aspeed_video_debugfs_remove(video);
  1670. clk_unprepare(video->vclk);
  1671. clk_unprepare(video->eclk);
  1672. vb2_video_unregister_device(&video->vdev);
  1673. v4l2_ctrl_handler_free(&video->ctrl_handler);
  1674. v4l2_device_unregister(v4l2_dev);
  1675. aspeed_video_free_buf(video, &video->jpeg);
  1676. of_reserved_mem_device_release(dev);
  1677. return 0;
  1678. }
  1679. static struct platform_driver aspeed_video_driver = {
  1680. .driver = {
  1681. .name = DEVICE_NAME,
  1682. .of_match_table = aspeed_video_of_match,
  1683. },
  1684. .probe = aspeed_video_probe,
  1685. .remove = aspeed_video_remove,
  1686. };
  1687. module_platform_driver(aspeed_video_driver);
  1688. module_param(debug, int, 0644);
  1689. MODULE_PARM_DESC(debug, "Debug level (0=off,1=info,2=debug,3=reg ops)");
  1690. MODULE_DESCRIPTION("ASPEED Video Engine Driver");
  1691. MODULE_AUTHOR("Eddie James");
  1692. MODULE_LICENSE("GPL v2");