irq-ti-sci-inta.c 22 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Texas Instruments' K3 Interrupt Aggregator irqchip driver
  4. *
  5. * Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/
  6. * Lokesh Vutla <[email protected]>
  7. */
  8. #include <linux/err.h>
  9. #include <linux/io.h>
  10. #include <linux/irq.h>
  11. #include <linux/irqchip.h>
  12. #include <linux/irqdomain.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/msi.h>
  15. #include <linux/module.h>
  16. #include <linux/moduleparam.h>
  17. #include <linux/of_address.h>
  18. #include <linux/of_irq.h>
  19. #include <linux/of_platform.h>
  20. #include <linux/irqchip/chained_irq.h>
  21. #include <linux/soc/ti/ti_sci_inta_msi.h>
  22. #include <linux/soc/ti/ti_sci_protocol.h>
  23. #include <asm-generic/msi.h>
  24. #define TI_SCI_DEV_ID_MASK 0xffff
  25. #define TI_SCI_DEV_ID_SHIFT 16
  26. #define TI_SCI_IRQ_ID_MASK 0xffff
  27. #define TI_SCI_IRQ_ID_SHIFT 0
  28. #define HWIRQ_TO_DEVID(hwirq) (((hwirq) >> (TI_SCI_DEV_ID_SHIFT)) & \
  29. (TI_SCI_DEV_ID_MASK))
  30. #define HWIRQ_TO_IRQID(hwirq) ((hwirq) & (TI_SCI_IRQ_ID_MASK))
  31. #define TO_HWIRQ(dev, index) ((((dev) & TI_SCI_DEV_ID_MASK) << \
  32. TI_SCI_DEV_ID_SHIFT) | \
  33. ((index) & TI_SCI_IRQ_ID_MASK))
  34. #define MAX_EVENTS_PER_VINT 64
  35. #define VINT_ENABLE_SET_OFFSET 0x0
  36. #define VINT_ENABLE_CLR_OFFSET 0x8
  37. #define VINT_STATUS_OFFSET 0x18
  38. #define VINT_STATUS_MASKED_OFFSET 0x20
  39. /**
  40. * struct ti_sci_inta_event_desc - Description of an event coming to
  41. * Interrupt Aggregator. This serves
  42. * as a mapping table for global event,
  43. * hwirq and vint bit.
  44. * @global_event: Global event number corresponding to this event
  45. * @hwirq: Hwirq of the incoming interrupt
  46. * @vint_bit: Corresponding vint bit to which this event is attached.
  47. */
  48. struct ti_sci_inta_event_desc {
  49. u16 global_event;
  50. u32 hwirq;
  51. u8 vint_bit;
  52. };
  53. /**
  54. * struct ti_sci_inta_vint_desc - Description of a virtual interrupt coming out
  55. * of Interrupt Aggregator.
  56. * @domain: Pointer to IRQ domain to which this vint belongs.
  57. * @list: List entry for the vint list
  58. * @event_map: Bitmap to manage the allocation of events to vint.
  59. * @events: Array of event descriptors assigned to this vint.
  60. * @parent_virq: Linux IRQ number that gets attached to parent
  61. * @vint_id: TISCI vint ID
  62. */
  63. struct ti_sci_inta_vint_desc {
  64. struct irq_domain *domain;
  65. struct list_head list;
  66. DECLARE_BITMAP(event_map, MAX_EVENTS_PER_VINT);
  67. struct ti_sci_inta_event_desc events[MAX_EVENTS_PER_VINT];
  68. unsigned int parent_virq;
  69. u16 vint_id;
  70. };
  71. /**
  72. * struct ti_sci_inta_irq_domain - Structure representing a TISCI based
  73. * Interrupt Aggregator IRQ domain.
  74. * @sci: Pointer to TISCI handle
  75. * @vint: TISCI resource pointer representing IA interrupts.
  76. * @global_event: TISCI resource pointer representing global events.
  77. * @vint_list: List of the vints active in the system
  78. * @vint_mutex: Mutex to protect vint_list
  79. * @base: Base address of the memory mapped IO registers
  80. * @pdev: Pointer to platform device.
  81. * @ti_sci_id: TI-SCI device identifier
  82. * @unmapped_cnt: Number of @unmapped_dev_ids entries
  83. * @unmapped_dev_ids: Pointer to an array of TI-SCI device identifiers of
  84. * unmapped event sources.
  85. * Unmapped Events are not part of the Global Event Map and
  86. * they are converted to Global event within INTA to be
  87. * received by the same INTA to generate an interrupt.
  88. * In case an interrupt request comes for a device which is
  89. * generating Unmapped Event, we must use the INTA's TI-SCI
  90. * device identifier in place of the source device
  91. * identifier to let sysfw know where it has to program the
  92. * Global Event number.
  93. */
  94. struct ti_sci_inta_irq_domain {
  95. const struct ti_sci_handle *sci;
  96. struct ti_sci_resource *vint;
  97. struct ti_sci_resource *global_event;
  98. struct list_head vint_list;
  99. /* Mutex to protect vint list */
  100. struct mutex vint_mutex;
  101. void __iomem *base;
  102. struct platform_device *pdev;
  103. u32 ti_sci_id;
  104. int unmapped_cnt;
  105. u16 *unmapped_dev_ids;
  106. };
  107. #define to_vint_desc(e, i) container_of(e, struct ti_sci_inta_vint_desc, \
  108. events[i])
  109. static u16 ti_sci_inta_get_dev_id(struct ti_sci_inta_irq_domain *inta, u32 hwirq)
  110. {
  111. u16 dev_id = HWIRQ_TO_DEVID(hwirq);
  112. int i;
  113. if (inta->unmapped_cnt == 0)
  114. return dev_id;
  115. /*
  116. * For devices sending Unmapped Events we must use the INTA's TI-SCI
  117. * device identifier number to be able to convert it to a Global Event
  118. * and map it to an interrupt.
  119. */
  120. for (i = 0; i < inta->unmapped_cnt; i++) {
  121. if (dev_id == inta->unmapped_dev_ids[i]) {
  122. dev_id = inta->ti_sci_id;
  123. break;
  124. }
  125. }
  126. return dev_id;
  127. }
  128. /**
  129. * ti_sci_inta_irq_handler() - Chained IRQ handler for the vint irqs
  130. * @desc: Pointer to irq_desc corresponding to the irq
  131. */
  132. static void ti_sci_inta_irq_handler(struct irq_desc *desc)
  133. {
  134. struct ti_sci_inta_vint_desc *vint_desc;
  135. struct ti_sci_inta_irq_domain *inta;
  136. struct irq_domain *domain;
  137. unsigned int bit;
  138. unsigned long val;
  139. vint_desc = irq_desc_get_handler_data(desc);
  140. domain = vint_desc->domain;
  141. inta = domain->host_data;
  142. chained_irq_enter(irq_desc_get_chip(desc), desc);
  143. val = readq_relaxed(inta->base + vint_desc->vint_id * 0x1000 +
  144. VINT_STATUS_MASKED_OFFSET);
  145. for_each_set_bit(bit, &val, MAX_EVENTS_PER_VINT)
  146. generic_handle_domain_irq(domain, vint_desc->events[bit].hwirq);
  147. chained_irq_exit(irq_desc_get_chip(desc), desc);
  148. }
  149. /**
  150. * ti_sci_inta_xlate_irq() - Translate hwirq to parent's hwirq.
  151. * @inta: IRQ domain corresponding to Interrupt Aggregator
  152. * @irq: Hardware irq corresponding to the above irq domain
  153. *
  154. * Return parent irq number if translation is available else -ENOENT.
  155. */
  156. static int ti_sci_inta_xlate_irq(struct ti_sci_inta_irq_domain *inta,
  157. u16 vint_id)
  158. {
  159. struct device_node *np = dev_of_node(&inta->pdev->dev);
  160. u32 base, parent_base, size;
  161. const __be32 *range;
  162. int len;
  163. range = of_get_property(np, "ti,interrupt-ranges", &len);
  164. if (!range)
  165. return vint_id;
  166. for (len /= sizeof(*range); len >= 3; len -= 3) {
  167. base = be32_to_cpu(*range++);
  168. parent_base = be32_to_cpu(*range++);
  169. size = be32_to_cpu(*range++);
  170. if (base <= vint_id && vint_id < base + size)
  171. return vint_id - base + parent_base;
  172. }
  173. return -ENOENT;
  174. }
  175. /**
  176. * ti_sci_inta_alloc_parent_irq() - Allocate parent irq to Interrupt aggregator
  177. * @domain: IRQ domain corresponding to Interrupt Aggregator
  178. *
  179. * Return 0 if all went well else corresponding error value.
  180. */
  181. static struct ti_sci_inta_vint_desc *ti_sci_inta_alloc_parent_irq(struct irq_domain *domain)
  182. {
  183. struct ti_sci_inta_irq_domain *inta = domain->host_data;
  184. struct ti_sci_inta_vint_desc *vint_desc;
  185. struct irq_fwspec parent_fwspec;
  186. struct device_node *parent_node;
  187. unsigned int parent_virq;
  188. int p_hwirq, ret;
  189. u16 vint_id;
  190. vint_id = ti_sci_get_free_resource(inta->vint);
  191. if (vint_id == TI_SCI_RESOURCE_NULL)
  192. return ERR_PTR(-EINVAL);
  193. p_hwirq = ti_sci_inta_xlate_irq(inta, vint_id);
  194. if (p_hwirq < 0) {
  195. ret = p_hwirq;
  196. goto free_vint;
  197. }
  198. vint_desc = kzalloc(sizeof(*vint_desc), GFP_KERNEL);
  199. if (!vint_desc) {
  200. ret = -ENOMEM;
  201. goto free_vint;
  202. }
  203. vint_desc->domain = domain;
  204. vint_desc->vint_id = vint_id;
  205. INIT_LIST_HEAD(&vint_desc->list);
  206. parent_node = of_irq_find_parent(dev_of_node(&inta->pdev->dev));
  207. parent_fwspec.fwnode = of_node_to_fwnode(parent_node);
  208. if (of_device_is_compatible(parent_node, "arm,gic-v3")) {
  209. /* Parent is GIC */
  210. parent_fwspec.param_count = 3;
  211. parent_fwspec.param[0] = 0;
  212. parent_fwspec.param[1] = p_hwirq - 32;
  213. parent_fwspec.param[2] = IRQ_TYPE_LEVEL_HIGH;
  214. } else {
  215. /* Parent is Interrupt Router */
  216. parent_fwspec.param_count = 1;
  217. parent_fwspec.param[0] = p_hwirq;
  218. }
  219. parent_virq = irq_create_fwspec_mapping(&parent_fwspec);
  220. if (parent_virq == 0) {
  221. dev_err(&inta->pdev->dev, "Parent IRQ allocation failed\n");
  222. ret = -EINVAL;
  223. goto free_vint_desc;
  224. }
  225. vint_desc->parent_virq = parent_virq;
  226. list_add_tail(&vint_desc->list, &inta->vint_list);
  227. irq_set_chained_handler_and_data(vint_desc->parent_virq,
  228. ti_sci_inta_irq_handler, vint_desc);
  229. return vint_desc;
  230. free_vint_desc:
  231. kfree(vint_desc);
  232. free_vint:
  233. ti_sci_release_resource(inta->vint, vint_id);
  234. return ERR_PTR(ret);
  235. }
  236. /**
  237. * ti_sci_inta_alloc_event() - Attach an event to a IA vint.
  238. * @vint_desc: Pointer to vint_desc to which the event gets attached
  239. * @free_bit: Bit inside vint to which event gets attached
  240. * @hwirq: hwirq of the input event
  241. *
  242. * Return event_desc pointer if all went ok else appropriate error value.
  243. */
  244. static struct ti_sci_inta_event_desc *ti_sci_inta_alloc_event(struct ti_sci_inta_vint_desc *vint_desc,
  245. u16 free_bit,
  246. u32 hwirq)
  247. {
  248. struct ti_sci_inta_irq_domain *inta = vint_desc->domain->host_data;
  249. struct ti_sci_inta_event_desc *event_desc;
  250. u16 dev_id, dev_index;
  251. int err;
  252. dev_id = ti_sci_inta_get_dev_id(inta, hwirq);
  253. dev_index = HWIRQ_TO_IRQID(hwirq);
  254. event_desc = &vint_desc->events[free_bit];
  255. event_desc->hwirq = hwirq;
  256. event_desc->vint_bit = free_bit;
  257. event_desc->global_event = ti_sci_get_free_resource(inta->global_event);
  258. if (event_desc->global_event == TI_SCI_RESOURCE_NULL)
  259. return ERR_PTR(-EINVAL);
  260. err = inta->sci->ops.rm_irq_ops.set_event_map(inta->sci,
  261. dev_id, dev_index,
  262. inta->ti_sci_id,
  263. vint_desc->vint_id,
  264. event_desc->global_event,
  265. free_bit);
  266. if (err)
  267. goto free_global_event;
  268. return event_desc;
  269. free_global_event:
  270. ti_sci_release_resource(inta->global_event, event_desc->global_event);
  271. return ERR_PTR(err);
  272. }
  273. /**
  274. * ti_sci_inta_alloc_irq() - Allocate an irq within INTA domain
  275. * @domain: irq_domain pointer corresponding to INTA
  276. * @hwirq: hwirq of the input event
  277. *
  278. * Note: Allocation happens in the following manner:
  279. * - Find a free bit available in any of the vints available in the list.
  280. * - If not found, allocate a vint from the vint pool
  281. * - Attach the free bit to input hwirq.
  282. * Return event_desc if all went ok else appropriate error value.
  283. */
  284. static struct ti_sci_inta_event_desc *ti_sci_inta_alloc_irq(struct irq_domain *domain,
  285. u32 hwirq)
  286. {
  287. struct ti_sci_inta_irq_domain *inta = domain->host_data;
  288. struct ti_sci_inta_vint_desc *vint_desc = NULL;
  289. struct ti_sci_inta_event_desc *event_desc;
  290. u16 free_bit;
  291. mutex_lock(&inta->vint_mutex);
  292. list_for_each_entry(vint_desc, &inta->vint_list, list) {
  293. free_bit = find_first_zero_bit(vint_desc->event_map,
  294. MAX_EVENTS_PER_VINT);
  295. if (free_bit != MAX_EVENTS_PER_VINT) {
  296. set_bit(free_bit, vint_desc->event_map);
  297. goto alloc_event;
  298. }
  299. }
  300. /* No free bits available. Allocate a new vint */
  301. vint_desc = ti_sci_inta_alloc_parent_irq(domain);
  302. if (IS_ERR(vint_desc)) {
  303. event_desc = ERR_CAST(vint_desc);
  304. goto unlock;
  305. }
  306. free_bit = find_first_zero_bit(vint_desc->event_map,
  307. MAX_EVENTS_PER_VINT);
  308. set_bit(free_bit, vint_desc->event_map);
  309. alloc_event:
  310. event_desc = ti_sci_inta_alloc_event(vint_desc, free_bit, hwirq);
  311. if (IS_ERR(event_desc))
  312. clear_bit(free_bit, vint_desc->event_map);
  313. unlock:
  314. mutex_unlock(&inta->vint_mutex);
  315. return event_desc;
  316. }
  317. /**
  318. * ti_sci_inta_free_parent_irq() - Free a parent irq to INTA
  319. * @inta: Pointer to inta domain.
  320. * @vint_desc: Pointer to vint_desc that needs to be freed.
  321. */
  322. static void ti_sci_inta_free_parent_irq(struct ti_sci_inta_irq_domain *inta,
  323. struct ti_sci_inta_vint_desc *vint_desc)
  324. {
  325. if (find_first_bit(vint_desc->event_map, MAX_EVENTS_PER_VINT) == MAX_EVENTS_PER_VINT) {
  326. list_del(&vint_desc->list);
  327. ti_sci_release_resource(inta->vint, vint_desc->vint_id);
  328. irq_dispose_mapping(vint_desc->parent_virq);
  329. kfree(vint_desc);
  330. }
  331. }
  332. /**
  333. * ti_sci_inta_free_irq() - Free an IRQ within INTA domain
  334. * @event_desc: Pointer to event_desc that needs to be freed.
  335. * @hwirq: Hwirq number within INTA domain that needs to be freed
  336. */
  337. static void ti_sci_inta_free_irq(struct ti_sci_inta_event_desc *event_desc,
  338. u32 hwirq)
  339. {
  340. struct ti_sci_inta_vint_desc *vint_desc;
  341. struct ti_sci_inta_irq_domain *inta;
  342. u16 dev_id;
  343. vint_desc = to_vint_desc(event_desc, event_desc->vint_bit);
  344. inta = vint_desc->domain->host_data;
  345. dev_id = ti_sci_inta_get_dev_id(inta, hwirq);
  346. /* free event irq */
  347. mutex_lock(&inta->vint_mutex);
  348. inta->sci->ops.rm_irq_ops.free_event_map(inta->sci,
  349. dev_id, HWIRQ_TO_IRQID(hwirq),
  350. inta->ti_sci_id,
  351. vint_desc->vint_id,
  352. event_desc->global_event,
  353. event_desc->vint_bit);
  354. clear_bit(event_desc->vint_bit, vint_desc->event_map);
  355. ti_sci_release_resource(inta->global_event, event_desc->global_event);
  356. event_desc->global_event = TI_SCI_RESOURCE_NULL;
  357. event_desc->hwirq = 0;
  358. ti_sci_inta_free_parent_irq(inta, vint_desc);
  359. mutex_unlock(&inta->vint_mutex);
  360. }
  361. /**
  362. * ti_sci_inta_request_resources() - Allocate resources for input irq
  363. * @data: Pointer to corresponding irq_data
  364. *
  365. * Note: This is the core api where the actual allocation happens for input
  366. * hwirq. This allocation involves creating a parent irq for vint.
  367. * If this is done in irq_domain_ops.alloc() then a deadlock is reached
  368. * for allocation. So this allocation is being done in request_resources()
  369. *
  370. * Return: 0 if all went well else corresponding error.
  371. */
  372. static int ti_sci_inta_request_resources(struct irq_data *data)
  373. {
  374. struct ti_sci_inta_event_desc *event_desc;
  375. event_desc = ti_sci_inta_alloc_irq(data->domain, data->hwirq);
  376. if (IS_ERR(event_desc))
  377. return PTR_ERR(event_desc);
  378. data->chip_data = event_desc;
  379. return 0;
  380. }
  381. /**
  382. * ti_sci_inta_release_resources - Release resources for input irq
  383. * @data: Pointer to corresponding irq_data
  384. *
  385. * Note: Corresponding to request_resources(), all the unmapping and deletion
  386. * of parent vint irqs happens in this api.
  387. */
  388. static void ti_sci_inta_release_resources(struct irq_data *data)
  389. {
  390. struct ti_sci_inta_event_desc *event_desc;
  391. event_desc = irq_data_get_irq_chip_data(data);
  392. ti_sci_inta_free_irq(event_desc, data->hwirq);
  393. }
  394. /**
  395. * ti_sci_inta_manage_event() - Control the event based on the offset
  396. * @data: Pointer to corresponding irq_data
  397. * @offset: register offset using which event is controlled.
  398. */
  399. static void ti_sci_inta_manage_event(struct irq_data *data, u32 offset)
  400. {
  401. struct ti_sci_inta_event_desc *event_desc;
  402. struct ti_sci_inta_vint_desc *vint_desc;
  403. struct ti_sci_inta_irq_domain *inta;
  404. event_desc = irq_data_get_irq_chip_data(data);
  405. vint_desc = to_vint_desc(event_desc, event_desc->vint_bit);
  406. inta = data->domain->host_data;
  407. writeq_relaxed(BIT(event_desc->vint_bit),
  408. inta->base + vint_desc->vint_id * 0x1000 + offset);
  409. }
  410. /**
  411. * ti_sci_inta_mask_irq() - Mask an event
  412. * @data: Pointer to corresponding irq_data
  413. */
  414. static void ti_sci_inta_mask_irq(struct irq_data *data)
  415. {
  416. ti_sci_inta_manage_event(data, VINT_ENABLE_CLR_OFFSET);
  417. }
  418. /**
  419. * ti_sci_inta_unmask_irq() - Unmask an event
  420. * @data: Pointer to corresponding irq_data
  421. */
  422. static void ti_sci_inta_unmask_irq(struct irq_data *data)
  423. {
  424. ti_sci_inta_manage_event(data, VINT_ENABLE_SET_OFFSET);
  425. }
  426. /**
  427. * ti_sci_inta_ack_irq() - Ack an event
  428. * @data: Pointer to corresponding irq_data
  429. */
  430. static void ti_sci_inta_ack_irq(struct irq_data *data)
  431. {
  432. /*
  433. * Do not clear the event if hardware is capable of sending
  434. * a down event.
  435. */
  436. if (irqd_get_trigger_type(data) != IRQF_TRIGGER_HIGH)
  437. ti_sci_inta_manage_event(data, VINT_STATUS_OFFSET);
  438. }
  439. static int ti_sci_inta_set_affinity(struct irq_data *d,
  440. const struct cpumask *mask_val, bool force)
  441. {
  442. return -EINVAL;
  443. }
  444. /**
  445. * ti_sci_inta_set_type() - Update the trigger type of the irq.
  446. * @data: Pointer to corresponding irq_data
  447. * @type: Trigger type as specified by user
  448. *
  449. * Note: This updates the handle_irq callback for level msi.
  450. *
  451. * Return 0 if all went well else appropriate error.
  452. */
  453. static int ti_sci_inta_set_type(struct irq_data *data, unsigned int type)
  454. {
  455. /*
  456. * .alloc default sets handle_edge_irq. But if the user specifies
  457. * that IRQ is level MSI, then update the handle to handle_level_irq
  458. */
  459. switch (type & IRQ_TYPE_SENSE_MASK) {
  460. case IRQF_TRIGGER_HIGH:
  461. irq_set_handler_locked(data, handle_level_irq);
  462. return 0;
  463. case IRQF_TRIGGER_RISING:
  464. return 0;
  465. default:
  466. return -EINVAL;
  467. }
  468. }
  469. static struct irq_chip ti_sci_inta_irq_chip = {
  470. .name = "INTA",
  471. .irq_ack = ti_sci_inta_ack_irq,
  472. .irq_mask = ti_sci_inta_mask_irq,
  473. .irq_set_type = ti_sci_inta_set_type,
  474. .irq_unmask = ti_sci_inta_unmask_irq,
  475. .irq_set_affinity = ti_sci_inta_set_affinity,
  476. .irq_request_resources = ti_sci_inta_request_resources,
  477. .irq_release_resources = ti_sci_inta_release_resources,
  478. };
  479. /**
  480. * ti_sci_inta_irq_domain_free() - Free an IRQ from the IRQ domain
  481. * @domain: Domain to which the irqs belong
  482. * @virq: base linux virtual IRQ to be freed.
  483. * @nr_irqs: Number of continuous irqs to be freed
  484. */
  485. static void ti_sci_inta_irq_domain_free(struct irq_domain *domain,
  486. unsigned int virq, unsigned int nr_irqs)
  487. {
  488. struct irq_data *data = irq_domain_get_irq_data(domain, virq);
  489. irq_domain_reset_irq_data(data);
  490. }
  491. /**
  492. * ti_sci_inta_irq_domain_alloc() - Allocate Interrupt aggregator IRQs
  493. * @domain: Point to the interrupt aggregator IRQ domain
  494. * @virq: Corresponding Linux virtual IRQ number
  495. * @nr_irqs: Continuous irqs to be allocated
  496. * @data: Pointer to firmware specifier
  497. *
  498. * No actual allocation happens here.
  499. *
  500. * Return 0 if all went well else appropriate error value.
  501. */
  502. static int ti_sci_inta_irq_domain_alloc(struct irq_domain *domain,
  503. unsigned int virq, unsigned int nr_irqs,
  504. void *data)
  505. {
  506. msi_alloc_info_t *arg = data;
  507. irq_domain_set_info(domain, virq, arg->hwirq, &ti_sci_inta_irq_chip,
  508. NULL, handle_edge_irq, NULL, NULL);
  509. return 0;
  510. }
  511. static const struct irq_domain_ops ti_sci_inta_irq_domain_ops = {
  512. .free = ti_sci_inta_irq_domain_free,
  513. .alloc = ti_sci_inta_irq_domain_alloc,
  514. };
  515. static struct irq_chip ti_sci_inta_msi_irq_chip = {
  516. .name = "MSI-INTA",
  517. .flags = IRQCHIP_SUPPORTS_LEVEL_MSI,
  518. };
  519. static void ti_sci_inta_msi_set_desc(msi_alloc_info_t *arg,
  520. struct msi_desc *desc)
  521. {
  522. struct platform_device *pdev = to_platform_device(desc->dev);
  523. arg->desc = desc;
  524. arg->hwirq = TO_HWIRQ(pdev->id, desc->msi_index);
  525. }
  526. static struct msi_domain_ops ti_sci_inta_msi_ops = {
  527. .set_desc = ti_sci_inta_msi_set_desc,
  528. };
  529. static struct msi_domain_info ti_sci_inta_msi_domain_info = {
  530. .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
  531. MSI_FLAG_LEVEL_CAPABLE),
  532. .ops = &ti_sci_inta_msi_ops,
  533. .chip = &ti_sci_inta_msi_irq_chip,
  534. };
  535. static int ti_sci_inta_get_unmapped_sources(struct ti_sci_inta_irq_domain *inta)
  536. {
  537. struct device *dev = &inta->pdev->dev;
  538. struct device_node *node = dev_of_node(dev);
  539. struct of_phandle_iterator it;
  540. int count, err, ret, i;
  541. count = of_count_phandle_with_args(node, "ti,unmapped-event-sources", NULL);
  542. if (count <= 0)
  543. return 0;
  544. inta->unmapped_dev_ids = devm_kcalloc(dev, count,
  545. sizeof(*inta->unmapped_dev_ids),
  546. GFP_KERNEL);
  547. if (!inta->unmapped_dev_ids)
  548. return -ENOMEM;
  549. i = 0;
  550. of_for_each_phandle(&it, err, node, "ti,unmapped-event-sources", NULL, 0) {
  551. u32 dev_id;
  552. ret = of_property_read_u32(it.node, "ti,sci-dev-id", &dev_id);
  553. if (ret) {
  554. dev_err(dev, "ti,sci-dev-id read failure for %pOFf\n", it.node);
  555. of_node_put(it.node);
  556. return ret;
  557. }
  558. inta->unmapped_dev_ids[i++] = dev_id;
  559. }
  560. inta->unmapped_cnt = count;
  561. return 0;
  562. }
  563. static int ti_sci_inta_irq_domain_probe(struct platform_device *pdev)
  564. {
  565. struct irq_domain *parent_domain, *domain, *msi_domain;
  566. struct device_node *parent_node, *node;
  567. struct ti_sci_inta_irq_domain *inta;
  568. struct device *dev = &pdev->dev;
  569. int ret;
  570. node = dev_of_node(dev);
  571. parent_node = of_irq_find_parent(node);
  572. if (!parent_node) {
  573. dev_err(dev, "Failed to get IRQ parent node\n");
  574. return -ENODEV;
  575. }
  576. parent_domain = irq_find_host(parent_node);
  577. if (!parent_domain)
  578. return -EPROBE_DEFER;
  579. inta = devm_kzalloc(dev, sizeof(*inta), GFP_KERNEL);
  580. if (!inta)
  581. return -ENOMEM;
  582. inta->pdev = pdev;
  583. inta->sci = devm_ti_sci_get_by_phandle(dev, "ti,sci");
  584. if (IS_ERR(inta->sci))
  585. return dev_err_probe(dev, PTR_ERR(inta->sci),
  586. "ti,sci read fail\n");
  587. ret = of_property_read_u32(dev->of_node, "ti,sci-dev-id", &inta->ti_sci_id);
  588. if (ret) {
  589. dev_err(dev, "missing 'ti,sci-dev-id' property\n");
  590. return -EINVAL;
  591. }
  592. inta->vint = devm_ti_sci_get_resource(inta->sci, dev, inta->ti_sci_id,
  593. TI_SCI_RESASG_SUBTYPE_IA_VINT);
  594. if (IS_ERR(inta->vint)) {
  595. dev_err(dev, "VINT resource allocation failed\n");
  596. return PTR_ERR(inta->vint);
  597. }
  598. inta->global_event = devm_ti_sci_get_resource(inta->sci, dev, inta->ti_sci_id,
  599. TI_SCI_RESASG_SUBTYPE_GLOBAL_EVENT_SEVT);
  600. if (IS_ERR(inta->global_event)) {
  601. dev_err(dev, "Global event resource allocation failed\n");
  602. return PTR_ERR(inta->global_event);
  603. }
  604. inta->base = devm_platform_ioremap_resource(pdev, 0);
  605. if (IS_ERR(inta->base))
  606. return PTR_ERR(inta->base);
  607. ret = ti_sci_inta_get_unmapped_sources(inta);
  608. if (ret)
  609. return ret;
  610. domain = irq_domain_add_linear(dev_of_node(dev),
  611. ti_sci_get_num_resources(inta->vint),
  612. &ti_sci_inta_irq_domain_ops, inta);
  613. if (!domain) {
  614. dev_err(dev, "Failed to allocate IRQ domain\n");
  615. return -ENOMEM;
  616. }
  617. msi_domain = ti_sci_inta_msi_create_irq_domain(of_node_to_fwnode(node),
  618. &ti_sci_inta_msi_domain_info,
  619. domain);
  620. if (!msi_domain) {
  621. irq_domain_remove(domain);
  622. dev_err(dev, "Failed to allocate msi domain\n");
  623. return -ENOMEM;
  624. }
  625. INIT_LIST_HEAD(&inta->vint_list);
  626. mutex_init(&inta->vint_mutex);
  627. dev_info(dev, "Interrupt Aggregator domain %d created\n", inta->ti_sci_id);
  628. return 0;
  629. }
  630. static const struct of_device_id ti_sci_inta_irq_domain_of_match[] = {
  631. { .compatible = "ti,sci-inta", },
  632. { /* sentinel */ },
  633. };
  634. MODULE_DEVICE_TABLE(of, ti_sci_inta_irq_domain_of_match);
  635. static struct platform_driver ti_sci_inta_irq_domain_driver = {
  636. .probe = ti_sci_inta_irq_domain_probe,
  637. .driver = {
  638. .name = "ti-sci-inta",
  639. .of_match_table = ti_sci_inta_irq_domain_of_match,
  640. },
  641. };
  642. module_platform_driver(ti_sci_inta_irq_domain_driver);
  643. MODULE_AUTHOR("Lokesh Vutla <[email protected]>");
  644. MODULE_DESCRIPTION("K3 Interrupt Aggregator driver over TI SCI protocol");
  645. MODULE_LICENSE("GPL v2");