irq-aspeed-i2c-ic.c 2.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Aspeed 24XX/25XX I2C Interrupt Controller.
  4. *
  5. * Copyright (C) 2012-2017 ASPEED Technology Inc.
  6. * Copyright 2017 IBM Corporation
  7. * Copyright 2017 Google, Inc.
  8. */
  9. #include <linux/irq.h>
  10. #include <linux/irqchip.h>
  11. #include <linux/irqchip/chained_irq.h>
  12. #include <linux/irqdomain.h>
  13. #include <linux/of_address.h>
  14. #include <linux/of_irq.h>
  15. #include <linux/io.h>
  16. #define ASPEED_I2C_IC_NUM_BUS 14
  17. struct aspeed_i2c_ic {
  18. void __iomem *base;
  19. int parent_irq;
  20. struct irq_domain *irq_domain;
  21. };
  22. /*
  23. * The aspeed chip provides a single hardware interrupt for all of the I2C
  24. * busses, so we use a dummy interrupt chip to translate this single interrupt
  25. * into multiple interrupts, each associated with a single I2C bus.
  26. */
  27. static void aspeed_i2c_ic_irq_handler(struct irq_desc *desc)
  28. {
  29. struct aspeed_i2c_ic *i2c_ic = irq_desc_get_handler_data(desc);
  30. struct irq_chip *chip = irq_desc_get_chip(desc);
  31. unsigned long bit, status;
  32. chained_irq_enter(chip, desc);
  33. status = readl(i2c_ic->base);
  34. for_each_set_bit(bit, &status, ASPEED_I2C_IC_NUM_BUS)
  35. generic_handle_domain_irq(i2c_ic->irq_domain, bit);
  36. chained_irq_exit(chip, desc);
  37. }
  38. /*
  39. * Set simple handler and mark IRQ as valid. Nothing interesting to do here
  40. * since we are using a dummy interrupt chip.
  41. */
  42. static int aspeed_i2c_ic_map_irq_domain(struct irq_domain *domain,
  43. unsigned int irq, irq_hw_number_t hwirq)
  44. {
  45. irq_set_chip_and_handler(irq, &dummy_irq_chip, handle_simple_irq);
  46. irq_set_chip_data(irq, domain->host_data);
  47. return 0;
  48. }
  49. static const struct irq_domain_ops aspeed_i2c_ic_irq_domain_ops = {
  50. .map = aspeed_i2c_ic_map_irq_domain,
  51. };
  52. static int __init aspeed_i2c_ic_of_init(struct device_node *node,
  53. struct device_node *parent)
  54. {
  55. struct aspeed_i2c_ic *i2c_ic;
  56. int ret = 0;
  57. i2c_ic = kzalloc(sizeof(*i2c_ic), GFP_KERNEL);
  58. if (!i2c_ic)
  59. return -ENOMEM;
  60. i2c_ic->base = of_iomap(node, 0);
  61. if (!i2c_ic->base) {
  62. ret = -ENOMEM;
  63. goto err_free_ic;
  64. }
  65. i2c_ic->parent_irq = irq_of_parse_and_map(node, 0);
  66. if (!i2c_ic->parent_irq) {
  67. ret = -EINVAL;
  68. goto err_iounmap;
  69. }
  70. i2c_ic->irq_domain = irq_domain_add_linear(node, ASPEED_I2C_IC_NUM_BUS,
  71. &aspeed_i2c_ic_irq_domain_ops,
  72. NULL);
  73. if (!i2c_ic->irq_domain) {
  74. ret = -ENOMEM;
  75. goto err_iounmap;
  76. }
  77. i2c_ic->irq_domain->name = "aspeed-i2c-domain";
  78. irq_set_chained_handler_and_data(i2c_ic->parent_irq,
  79. aspeed_i2c_ic_irq_handler, i2c_ic);
  80. pr_info("i2c controller registered, irq %d\n", i2c_ic->parent_irq);
  81. return 0;
  82. err_iounmap:
  83. iounmap(i2c_ic->base);
  84. err_free_ic:
  85. kfree(i2c_ic);
  86. return ret;
  87. }
  88. IRQCHIP_DECLARE(ast2400_i2c_ic, "aspeed,ast2400-i2c-ic", aspeed_i2c_ic_of_init);
  89. IRQCHIP_DECLARE(ast2500_i2c_ic, "aspeed,ast2500-i2c-ic", aspeed_i2c_ic_of_init);