msm8916.c 30 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2018-2020 Linaro Ltd
  4. * Author: Georgi Djakov <[email protected]>
  5. */
  6. #include <linux/clk.h>
  7. #include <linux/device.h>
  8. #include <linux/interconnect-provider.h>
  9. #include <linux/io.h>
  10. #include <linux/module.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/regmap.h>
  13. #include <linux/of_device.h>
  14. #include <dt-bindings/interconnect/qcom,msm8916.h>
  15. #include "smd-rpm.h"
  16. #include "icc-rpm.h"
  17. enum {
  18. MSM8916_BIMC_SNOC_MAS = 1,
  19. MSM8916_BIMC_SNOC_SLV,
  20. MSM8916_MASTER_AMPSS_M0,
  21. MSM8916_MASTER_LPASS,
  22. MSM8916_MASTER_BLSP_1,
  23. MSM8916_MASTER_DEHR,
  24. MSM8916_MASTER_GRAPHICS_3D,
  25. MSM8916_MASTER_JPEG,
  26. MSM8916_MASTER_MDP_PORT0,
  27. MSM8916_MASTER_CRYPTO_CORE0,
  28. MSM8916_MASTER_SDCC_1,
  29. MSM8916_MASTER_SDCC_2,
  30. MSM8916_MASTER_QDSS_BAM,
  31. MSM8916_MASTER_QDSS_ETR,
  32. MSM8916_MASTER_SNOC_CFG,
  33. MSM8916_MASTER_SPDM,
  34. MSM8916_MASTER_TCU0,
  35. MSM8916_MASTER_TCU1,
  36. MSM8916_MASTER_USB_HS,
  37. MSM8916_MASTER_VFE,
  38. MSM8916_MASTER_VIDEO_P0,
  39. MSM8916_SNOC_MM_INT_0,
  40. MSM8916_SNOC_MM_INT_1,
  41. MSM8916_SNOC_MM_INT_2,
  42. MSM8916_SNOC_MM_INT_BIMC,
  43. MSM8916_PNOC_INT_0,
  44. MSM8916_PNOC_INT_1,
  45. MSM8916_PNOC_MAS_0,
  46. MSM8916_PNOC_MAS_1,
  47. MSM8916_PNOC_SLV_0,
  48. MSM8916_PNOC_SLV_1,
  49. MSM8916_PNOC_SLV_2,
  50. MSM8916_PNOC_SLV_3,
  51. MSM8916_PNOC_SLV_4,
  52. MSM8916_PNOC_SLV_8,
  53. MSM8916_PNOC_SLV_9,
  54. MSM8916_PNOC_SNOC_MAS,
  55. MSM8916_PNOC_SNOC_SLV,
  56. MSM8916_SNOC_QDSS_INT,
  57. MSM8916_SLAVE_AMPSS_L2,
  58. MSM8916_SLAVE_APSS,
  59. MSM8916_SLAVE_LPASS,
  60. MSM8916_SLAVE_BIMC_CFG,
  61. MSM8916_SLAVE_BLSP_1,
  62. MSM8916_SLAVE_BOOT_ROM,
  63. MSM8916_SLAVE_CAMERA_CFG,
  64. MSM8916_SLAVE_CATS_128,
  65. MSM8916_SLAVE_OCMEM_64,
  66. MSM8916_SLAVE_CLK_CTL,
  67. MSM8916_SLAVE_CRYPTO_0_CFG,
  68. MSM8916_SLAVE_DEHR_CFG,
  69. MSM8916_SLAVE_DISPLAY_CFG,
  70. MSM8916_SLAVE_EBI_CH0,
  71. MSM8916_SLAVE_GRAPHICS_3D_CFG,
  72. MSM8916_SLAVE_IMEM_CFG,
  73. MSM8916_SLAVE_IMEM,
  74. MSM8916_SLAVE_MPM,
  75. MSM8916_SLAVE_MSG_RAM,
  76. MSM8916_SLAVE_MSS,
  77. MSM8916_SLAVE_PDM,
  78. MSM8916_SLAVE_PMIC_ARB,
  79. MSM8916_SLAVE_PNOC_CFG,
  80. MSM8916_SLAVE_PRNG,
  81. MSM8916_SLAVE_QDSS_CFG,
  82. MSM8916_SLAVE_QDSS_STM,
  83. MSM8916_SLAVE_RBCPR_CFG,
  84. MSM8916_SLAVE_SDCC_1,
  85. MSM8916_SLAVE_SDCC_2,
  86. MSM8916_SLAVE_SECURITY,
  87. MSM8916_SLAVE_SNOC_CFG,
  88. MSM8916_SLAVE_SPDM,
  89. MSM8916_SLAVE_SRVC_SNOC,
  90. MSM8916_SLAVE_TCSR,
  91. MSM8916_SLAVE_TLMM,
  92. MSM8916_SLAVE_USB_HS,
  93. MSM8916_SLAVE_VENUS_CFG,
  94. MSM8916_SNOC_BIMC_0_MAS,
  95. MSM8916_SNOC_BIMC_0_SLV,
  96. MSM8916_SNOC_BIMC_1_MAS,
  97. MSM8916_SNOC_BIMC_1_SLV,
  98. MSM8916_SNOC_INT_0,
  99. MSM8916_SNOC_INT_1,
  100. MSM8916_SNOC_INT_BIMC,
  101. MSM8916_SNOC_PNOC_MAS,
  102. MSM8916_SNOC_PNOC_SLV,
  103. };
  104. static const u16 bimc_snoc_mas_links[] = {
  105. MSM8916_BIMC_SNOC_SLV
  106. };
  107. static struct qcom_icc_node bimc_snoc_mas = {
  108. .name = "bimc_snoc_mas",
  109. .id = MSM8916_BIMC_SNOC_MAS,
  110. .buswidth = 8,
  111. .mas_rpm_id = -1,
  112. .slv_rpm_id = -1,
  113. .qos.ap_owned = true,
  114. .qos.qos_mode = NOC_QOS_MODE_INVALID,
  115. .num_links = ARRAY_SIZE(bimc_snoc_mas_links),
  116. .links = bimc_snoc_mas_links,
  117. };
  118. static const u16 bimc_snoc_slv_links[] = {
  119. MSM8916_SNOC_INT_0,
  120. MSM8916_SNOC_INT_1
  121. };
  122. static struct qcom_icc_node bimc_snoc_slv = {
  123. .name = "bimc_snoc_slv",
  124. .id = MSM8916_BIMC_SNOC_SLV,
  125. .buswidth = 8,
  126. .mas_rpm_id = -1,
  127. .slv_rpm_id = -1,
  128. .qos.ap_owned = true,
  129. .qos.qos_mode = NOC_QOS_MODE_INVALID,
  130. .num_links = ARRAY_SIZE(bimc_snoc_slv_links),
  131. .links = bimc_snoc_slv_links,
  132. };
  133. static const u16 mas_apss_links[] = {
  134. MSM8916_SLAVE_EBI_CH0,
  135. MSM8916_BIMC_SNOC_MAS,
  136. MSM8916_SLAVE_AMPSS_L2
  137. };
  138. static struct qcom_icc_node mas_apss = {
  139. .name = "mas_apss",
  140. .id = MSM8916_MASTER_AMPSS_M0,
  141. .buswidth = 8,
  142. .mas_rpm_id = -1,
  143. .slv_rpm_id = -1,
  144. .qos.ap_owned = true,
  145. .qos.qos_mode = NOC_QOS_MODE_FIXED,
  146. .qos.areq_prio = 0,
  147. .qos.prio_level = 0,
  148. .qos.qos_port = 0,
  149. .num_links = ARRAY_SIZE(mas_apss_links),
  150. .links = mas_apss_links,
  151. };
  152. static const u16 mas_audio_links[] = {
  153. MSM8916_PNOC_MAS_0
  154. };
  155. static struct qcom_icc_node mas_audio = {
  156. .name = "mas_audio",
  157. .id = MSM8916_MASTER_LPASS,
  158. .buswidth = 4,
  159. .mas_rpm_id = -1,
  160. .slv_rpm_id = -1,
  161. .num_links = ARRAY_SIZE(mas_audio_links),
  162. .links = mas_audio_links,
  163. };
  164. static const u16 mas_blsp_1_links[] = {
  165. MSM8916_PNOC_MAS_1
  166. };
  167. static struct qcom_icc_node mas_blsp_1 = {
  168. .name = "mas_blsp_1",
  169. .id = MSM8916_MASTER_BLSP_1,
  170. .buswidth = 4,
  171. .mas_rpm_id = -1,
  172. .slv_rpm_id = -1,
  173. .num_links = ARRAY_SIZE(mas_blsp_1_links),
  174. .links = mas_blsp_1_links,
  175. };
  176. static const u16 mas_dehr_links[] = {
  177. MSM8916_PNOC_MAS_0
  178. };
  179. static struct qcom_icc_node mas_dehr = {
  180. .name = "mas_dehr",
  181. .id = MSM8916_MASTER_DEHR,
  182. .buswidth = 4,
  183. .mas_rpm_id = -1,
  184. .slv_rpm_id = -1,
  185. .num_links = ARRAY_SIZE(mas_dehr_links),
  186. .links = mas_dehr_links,
  187. };
  188. static const u16 mas_gfx_links[] = {
  189. MSM8916_SLAVE_EBI_CH0,
  190. MSM8916_BIMC_SNOC_MAS,
  191. MSM8916_SLAVE_AMPSS_L2
  192. };
  193. static struct qcom_icc_node mas_gfx = {
  194. .name = "mas_gfx",
  195. .id = MSM8916_MASTER_GRAPHICS_3D,
  196. .buswidth = 8,
  197. .mas_rpm_id = -1,
  198. .slv_rpm_id = -1,
  199. .qos.ap_owned = true,
  200. .qos.qos_mode = NOC_QOS_MODE_FIXED,
  201. .qos.areq_prio = 0,
  202. .qos.prio_level = 0,
  203. .qos.qos_port = 2,
  204. .num_links = ARRAY_SIZE(mas_gfx_links),
  205. .links = mas_gfx_links,
  206. };
  207. static const u16 mas_jpeg_links[] = {
  208. MSM8916_SNOC_MM_INT_0,
  209. MSM8916_SNOC_MM_INT_2
  210. };
  211. static struct qcom_icc_node mas_jpeg = {
  212. .name = "mas_jpeg",
  213. .id = MSM8916_MASTER_JPEG,
  214. .buswidth = 16,
  215. .mas_rpm_id = -1,
  216. .slv_rpm_id = -1,
  217. .qos.ap_owned = true,
  218. .qos.qos_mode = NOC_QOS_MODE_BYPASS,
  219. .qos.areq_prio = 0,
  220. .qos.prio_level = 0,
  221. .qos.qos_port = 6,
  222. .num_links = ARRAY_SIZE(mas_jpeg_links),
  223. .links = mas_jpeg_links,
  224. };
  225. static const u16 mas_mdp_links[] = {
  226. MSM8916_SNOC_MM_INT_0,
  227. MSM8916_SNOC_MM_INT_2
  228. };
  229. static struct qcom_icc_node mas_mdp = {
  230. .name = "mas_mdp",
  231. .id = MSM8916_MASTER_MDP_PORT0,
  232. .buswidth = 16,
  233. .mas_rpm_id = -1,
  234. .slv_rpm_id = -1,
  235. .qos.ap_owned = true,
  236. .qos.qos_mode = NOC_QOS_MODE_BYPASS,
  237. .qos.areq_prio = 0,
  238. .qos.prio_level = 0,
  239. .qos.qos_port = 7,
  240. .num_links = ARRAY_SIZE(mas_mdp_links),
  241. .links = mas_mdp_links,
  242. };
  243. static const u16 mas_pcnoc_crypto_0_links[] = {
  244. MSM8916_PNOC_INT_1
  245. };
  246. static struct qcom_icc_node mas_pcnoc_crypto_0 = {
  247. .name = "mas_pcnoc_crypto_0",
  248. .id = MSM8916_MASTER_CRYPTO_CORE0,
  249. .buswidth = 8,
  250. .mas_rpm_id = -1,
  251. .slv_rpm_id = -1,
  252. .num_links = ARRAY_SIZE(mas_pcnoc_crypto_0_links),
  253. .links = mas_pcnoc_crypto_0_links,
  254. };
  255. static const u16 mas_pcnoc_sdcc_1_links[] = {
  256. MSM8916_PNOC_INT_1
  257. };
  258. static struct qcom_icc_node mas_pcnoc_sdcc_1 = {
  259. .name = "mas_pcnoc_sdcc_1",
  260. .id = MSM8916_MASTER_SDCC_1,
  261. .buswidth = 8,
  262. .mas_rpm_id = -1,
  263. .slv_rpm_id = -1,
  264. .num_links = ARRAY_SIZE(mas_pcnoc_sdcc_1_links),
  265. .links = mas_pcnoc_sdcc_1_links,
  266. };
  267. static const u16 mas_pcnoc_sdcc_2_links[] = {
  268. MSM8916_PNOC_INT_1
  269. };
  270. static struct qcom_icc_node mas_pcnoc_sdcc_2 = {
  271. .name = "mas_pcnoc_sdcc_2",
  272. .id = MSM8916_MASTER_SDCC_2,
  273. .buswidth = 8,
  274. .mas_rpm_id = -1,
  275. .slv_rpm_id = -1,
  276. .num_links = ARRAY_SIZE(mas_pcnoc_sdcc_2_links),
  277. .links = mas_pcnoc_sdcc_2_links,
  278. };
  279. static const u16 mas_qdss_bam_links[] = {
  280. MSM8916_SNOC_QDSS_INT
  281. };
  282. static struct qcom_icc_node mas_qdss_bam = {
  283. .name = "mas_qdss_bam",
  284. .id = MSM8916_MASTER_QDSS_BAM,
  285. .buswidth = 8,
  286. .mas_rpm_id = -1,
  287. .slv_rpm_id = -1,
  288. .qos.ap_owned = true,
  289. .qos.qos_mode = NOC_QOS_MODE_FIXED,
  290. .qos.areq_prio = 1,
  291. .qos.prio_level = 1,
  292. .qos.qos_port = 11,
  293. .num_links = ARRAY_SIZE(mas_qdss_bam_links),
  294. .links = mas_qdss_bam_links,
  295. };
  296. static const u16 mas_qdss_etr_links[] = {
  297. MSM8916_SNOC_QDSS_INT
  298. };
  299. static struct qcom_icc_node mas_qdss_etr = {
  300. .name = "mas_qdss_etr",
  301. .id = MSM8916_MASTER_QDSS_ETR,
  302. .buswidth = 8,
  303. .mas_rpm_id = -1,
  304. .slv_rpm_id = -1,
  305. .qos.ap_owned = true,
  306. .qos.qos_mode = NOC_QOS_MODE_FIXED,
  307. .qos.areq_prio = 1,
  308. .qos.prio_level = 1,
  309. .qos.qos_port = 10,
  310. .num_links = ARRAY_SIZE(mas_qdss_etr_links),
  311. .links = mas_qdss_etr_links,
  312. };
  313. static const u16 mas_snoc_cfg_links[] = {
  314. MSM8916_SNOC_QDSS_INT
  315. };
  316. static struct qcom_icc_node mas_snoc_cfg = {
  317. .name = "mas_snoc_cfg",
  318. .id = MSM8916_MASTER_SNOC_CFG,
  319. .buswidth = 4,
  320. .mas_rpm_id = -1,
  321. .slv_rpm_id = -1,
  322. .num_links = ARRAY_SIZE(mas_snoc_cfg_links),
  323. .links = mas_snoc_cfg_links,
  324. };
  325. static const u16 mas_spdm_links[] = {
  326. MSM8916_PNOC_MAS_0
  327. };
  328. static struct qcom_icc_node mas_spdm = {
  329. .name = "mas_spdm",
  330. .id = MSM8916_MASTER_SPDM,
  331. .buswidth = 4,
  332. .mas_rpm_id = -1,
  333. .slv_rpm_id = -1,
  334. .num_links = ARRAY_SIZE(mas_spdm_links),
  335. .links = mas_spdm_links,
  336. };
  337. static const u16 mas_tcu0_links[] = {
  338. MSM8916_SLAVE_EBI_CH0,
  339. MSM8916_BIMC_SNOC_MAS,
  340. MSM8916_SLAVE_AMPSS_L2
  341. };
  342. static struct qcom_icc_node mas_tcu0 = {
  343. .name = "mas_tcu0",
  344. .id = MSM8916_MASTER_TCU0,
  345. .buswidth = 8,
  346. .mas_rpm_id = -1,
  347. .slv_rpm_id = -1,
  348. .qos.ap_owned = true,
  349. .qos.qos_mode = NOC_QOS_MODE_FIXED,
  350. .qos.areq_prio = 2,
  351. .qos.prio_level = 2,
  352. .qos.qos_port = 5,
  353. .num_links = ARRAY_SIZE(mas_tcu0_links),
  354. .links = mas_tcu0_links,
  355. };
  356. static const u16 mas_tcu1_links[] = {
  357. MSM8916_SLAVE_EBI_CH0,
  358. MSM8916_BIMC_SNOC_MAS,
  359. MSM8916_SLAVE_AMPSS_L2
  360. };
  361. static struct qcom_icc_node mas_tcu1 = {
  362. .name = "mas_tcu1",
  363. .id = MSM8916_MASTER_TCU1,
  364. .buswidth = 8,
  365. .mas_rpm_id = -1,
  366. .slv_rpm_id = -1,
  367. .qos.ap_owned = true,
  368. .qos.qos_mode = NOC_QOS_MODE_FIXED,
  369. .qos.areq_prio = 2,
  370. .qos.prio_level = 2,
  371. .qos.qos_port = 6,
  372. .num_links = ARRAY_SIZE(mas_tcu1_links),
  373. .links = mas_tcu1_links,
  374. };
  375. static const u16 mas_usb_hs_links[] = {
  376. MSM8916_PNOC_MAS_1
  377. };
  378. static struct qcom_icc_node mas_usb_hs = {
  379. .name = "mas_usb_hs",
  380. .id = MSM8916_MASTER_USB_HS,
  381. .buswidth = 4,
  382. .mas_rpm_id = -1,
  383. .slv_rpm_id = -1,
  384. .num_links = ARRAY_SIZE(mas_usb_hs_links),
  385. .links = mas_usb_hs_links,
  386. };
  387. static const u16 mas_vfe_links[] = {
  388. MSM8916_SNOC_MM_INT_1,
  389. MSM8916_SNOC_MM_INT_2
  390. };
  391. static struct qcom_icc_node mas_vfe = {
  392. .name = "mas_vfe",
  393. .id = MSM8916_MASTER_VFE,
  394. .buswidth = 16,
  395. .mas_rpm_id = -1,
  396. .slv_rpm_id = -1,
  397. .qos.ap_owned = true,
  398. .qos.qos_mode = NOC_QOS_MODE_BYPASS,
  399. .qos.areq_prio = 0,
  400. .qos.prio_level = 0,
  401. .qos.qos_port = 9,
  402. .num_links = ARRAY_SIZE(mas_vfe_links),
  403. .links = mas_vfe_links,
  404. };
  405. static const u16 mas_video_links[] = {
  406. MSM8916_SNOC_MM_INT_0,
  407. MSM8916_SNOC_MM_INT_2
  408. };
  409. static struct qcom_icc_node mas_video = {
  410. .name = "mas_video",
  411. .id = MSM8916_MASTER_VIDEO_P0,
  412. .buswidth = 16,
  413. .mas_rpm_id = -1,
  414. .slv_rpm_id = -1,
  415. .qos.ap_owned = true,
  416. .qos.qos_mode = NOC_QOS_MODE_BYPASS,
  417. .qos.areq_prio = 0,
  418. .qos.prio_level = 0,
  419. .qos.qos_port = 8,
  420. .num_links = ARRAY_SIZE(mas_video_links),
  421. .links = mas_video_links,
  422. };
  423. static const u16 mm_int_0_links[] = {
  424. MSM8916_SNOC_MM_INT_BIMC
  425. };
  426. static struct qcom_icc_node mm_int_0 = {
  427. .name = "mm_int_0",
  428. .id = MSM8916_SNOC_MM_INT_0,
  429. .buswidth = 16,
  430. .mas_rpm_id = -1,
  431. .slv_rpm_id = -1,
  432. .qos.ap_owned = true,
  433. .qos.qos_mode = NOC_QOS_MODE_INVALID,
  434. .num_links = ARRAY_SIZE(mm_int_0_links),
  435. .links = mm_int_0_links,
  436. };
  437. static const u16 mm_int_1_links[] = {
  438. MSM8916_SNOC_MM_INT_BIMC
  439. };
  440. static struct qcom_icc_node mm_int_1 = {
  441. .name = "mm_int_1",
  442. .id = MSM8916_SNOC_MM_INT_1,
  443. .buswidth = 16,
  444. .mas_rpm_id = -1,
  445. .slv_rpm_id = -1,
  446. .qos.ap_owned = true,
  447. .qos.qos_mode = NOC_QOS_MODE_INVALID,
  448. .num_links = ARRAY_SIZE(mm_int_1_links),
  449. .links = mm_int_1_links,
  450. };
  451. static const u16 mm_int_2_links[] = {
  452. MSM8916_SNOC_INT_0
  453. };
  454. static struct qcom_icc_node mm_int_2 = {
  455. .name = "mm_int_2",
  456. .id = MSM8916_SNOC_MM_INT_2,
  457. .buswidth = 16,
  458. .mas_rpm_id = -1,
  459. .slv_rpm_id = -1,
  460. .qos.ap_owned = true,
  461. .qos.qos_mode = NOC_QOS_MODE_INVALID,
  462. .num_links = ARRAY_SIZE(mm_int_2_links),
  463. .links = mm_int_2_links,
  464. };
  465. static const u16 mm_int_bimc_links[] = {
  466. MSM8916_SNOC_BIMC_1_MAS
  467. };
  468. static struct qcom_icc_node mm_int_bimc = {
  469. .name = "mm_int_bimc",
  470. .id = MSM8916_SNOC_MM_INT_BIMC,
  471. .buswidth = 16,
  472. .mas_rpm_id = -1,
  473. .slv_rpm_id = -1,
  474. .qos.ap_owned = true,
  475. .qos.qos_mode = NOC_QOS_MODE_INVALID,
  476. .num_links = ARRAY_SIZE(mm_int_bimc_links),
  477. .links = mm_int_bimc_links,
  478. };
  479. static const u16 pcnoc_int_0_links[] = {
  480. MSM8916_PNOC_SNOC_MAS,
  481. MSM8916_PNOC_SLV_0,
  482. MSM8916_PNOC_SLV_1,
  483. MSM8916_PNOC_SLV_2,
  484. MSM8916_PNOC_SLV_3,
  485. MSM8916_PNOC_SLV_4,
  486. MSM8916_PNOC_SLV_8,
  487. MSM8916_PNOC_SLV_9
  488. };
  489. static struct qcom_icc_node pcnoc_int_0 = {
  490. .name = "pcnoc_int_0",
  491. .id = MSM8916_PNOC_INT_0,
  492. .buswidth = 8,
  493. .mas_rpm_id = -1,
  494. .slv_rpm_id = -1,
  495. .num_links = ARRAY_SIZE(pcnoc_int_0_links),
  496. .links = pcnoc_int_0_links,
  497. };
  498. static const u16 pcnoc_int_1_links[] = {
  499. MSM8916_PNOC_SNOC_MAS
  500. };
  501. static struct qcom_icc_node pcnoc_int_1 = {
  502. .name = "pcnoc_int_1",
  503. .id = MSM8916_PNOC_INT_1,
  504. .buswidth = 8,
  505. .mas_rpm_id = -1,
  506. .slv_rpm_id = -1,
  507. .num_links = ARRAY_SIZE(pcnoc_int_1_links),
  508. .links = pcnoc_int_1_links,
  509. };
  510. static const u16 pcnoc_m_0_links[] = {
  511. MSM8916_PNOC_INT_0
  512. };
  513. static struct qcom_icc_node pcnoc_m_0 = {
  514. .name = "pcnoc_m_0",
  515. .id = MSM8916_PNOC_MAS_0,
  516. .buswidth = 8,
  517. .mas_rpm_id = -1,
  518. .slv_rpm_id = -1,
  519. .num_links = ARRAY_SIZE(pcnoc_m_0_links),
  520. .links = pcnoc_m_0_links,
  521. };
  522. static const u16 pcnoc_m_1_links[] = {
  523. MSM8916_PNOC_SNOC_MAS
  524. };
  525. static struct qcom_icc_node pcnoc_m_1 = {
  526. .name = "pcnoc_m_1",
  527. .id = MSM8916_PNOC_MAS_1,
  528. .buswidth = 8,
  529. .mas_rpm_id = -1,
  530. .slv_rpm_id = -1,
  531. .num_links = ARRAY_SIZE(pcnoc_m_1_links),
  532. .links = pcnoc_m_1_links,
  533. };
  534. static const u16 pcnoc_s_0_links[] = {
  535. MSM8916_SLAVE_CLK_CTL,
  536. MSM8916_SLAVE_TLMM,
  537. MSM8916_SLAVE_TCSR,
  538. MSM8916_SLAVE_SECURITY,
  539. MSM8916_SLAVE_MSS
  540. };
  541. static struct qcom_icc_node pcnoc_s_0 = {
  542. .name = "pcnoc_s_0",
  543. .id = MSM8916_PNOC_SLV_0,
  544. .buswidth = 4,
  545. .mas_rpm_id = -1,
  546. .slv_rpm_id = -1,
  547. .num_links = ARRAY_SIZE(pcnoc_s_0_links),
  548. .links = pcnoc_s_0_links,
  549. };
  550. static const u16 pcnoc_s_1_links[] = {
  551. MSM8916_SLAVE_IMEM_CFG,
  552. MSM8916_SLAVE_CRYPTO_0_CFG,
  553. MSM8916_SLAVE_MSG_RAM,
  554. MSM8916_SLAVE_PDM,
  555. MSM8916_SLAVE_PRNG
  556. };
  557. static struct qcom_icc_node pcnoc_s_1 = {
  558. .name = "pcnoc_s_1",
  559. .id = MSM8916_PNOC_SLV_1,
  560. .buswidth = 4,
  561. .mas_rpm_id = -1,
  562. .slv_rpm_id = -1,
  563. .num_links = ARRAY_SIZE(pcnoc_s_1_links),
  564. .links = pcnoc_s_1_links,
  565. };
  566. static const u16 pcnoc_s_2_links[] = {
  567. MSM8916_SLAVE_SPDM,
  568. MSM8916_SLAVE_BOOT_ROM,
  569. MSM8916_SLAVE_BIMC_CFG,
  570. MSM8916_SLAVE_PNOC_CFG,
  571. MSM8916_SLAVE_PMIC_ARB
  572. };
  573. static struct qcom_icc_node pcnoc_s_2 = {
  574. .name = "pcnoc_s_2",
  575. .id = MSM8916_PNOC_SLV_2,
  576. .buswidth = 4,
  577. .mas_rpm_id = -1,
  578. .slv_rpm_id = -1,
  579. .num_links = ARRAY_SIZE(pcnoc_s_2_links),
  580. .links = pcnoc_s_2_links,
  581. };
  582. static const u16 pcnoc_s_3_links[] = {
  583. MSM8916_SLAVE_MPM,
  584. MSM8916_SLAVE_SNOC_CFG,
  585. MSM8916_SLAVE_RBCPR_CFG,
  586. MSM8916_SLAVE_QDSS_CFG,
  587. MSM8916_SLAVE_DEHR_CFG
  588. };
  589. static struct qcom_icc_node pcnoc_s_3 = {
  590. .name = "pcnoc_s_3",
  591. .id = MSM8916_PNOC_SLV_3,
  592. .buswidth = 4,
  593. .mas_rpm_id = -1,
  594. .slv_rpm_id = -1,
  595. .num_links = ARRAY_SIZE(pcnoc_s_3_links),
  596. .links = pcnoc_s_3_links,
  597. };
  598. static const u16 pcnoc_s_4_links[] = {
  599. MSM8916_SLAVE_VENUS_CFG,
  600. MSM8916_SLAVE_CAMERA_CFG,
  601. MSM8916_SLAVE_DISPLAY_CFG
  602. };
  603. static struct qcom_icc_node pcnoc_s_4 = {
  604. .name = "pcnoc_s_4",
  605. .id = MSM8916_PNOC_SLV_4,
  606. .buswidth = 4,
  607. .mas_rpm_id = -1,
  608. .slv_rpm_id = -1,
  609. .num_links = ARRAY_SIZE(pcnoc_s_4_links),
  610. .links = pcnoc_s_4_links,
  611. };
  612. static const u16 pcnoc_s_8_links[] = {
  613. MSM8916_SLAVE_USB_HS,
  614. MSM8916_SLAVE_SDCC_1,
  615. MSM8916_SLAVE_BLSP_1
  616. };
  617. static struct qcom_icc_node pcnoc_s_8 = {
  618. .name = "pcnoc_s_8",
  619. .id = MSM8916_PNOC_SLV_8,
  620. .buswidth = 4,
  621. .mas_rpm_id = -1,
  622. .slv_rpm_id = -1,
  623. .num_links = ARRAY_SIZE(pcnoc_s_8_links),
  624. .links = pcnoc_s_8_links,
  625. };
  626. static const u16 pcnoc_s_9_links[] = {
  627. MSM8916_SLAVE_SDCC_2,
  628. MSM8916_SLAVE_LPASS,
  629. MSM8916_SLAVE_GRAPHICS_3D_CFG
  630. };
  631. static struct qcom_icc_node pcnoc_s_9 = {
  632. .name = "pcnoc_s_9",
  633. .id = MSM8916_PNOC_SLV_9,
  634. .buswidth = 4,
  635. .mas_rpm_id = -1,
  636. .slv_rpm_id = -1,
  637. .num_links = ARRAY_SIZE(pcnoc_s_9_links),
  638. .links = pcnoc_s_9_links,
  639. };
  640. static const u16 pcnoc_snoc_mas_links[] = {
  641. MSM8916_PNOC_SNOC_SLV
  642. };
  643. static struct qcom_icc_node pcnoc_snoc_mas = {
  644. .name = "pcnoc_snoc_mas",
  645. .id = MSM8916_PNOC_SNOC_MAS,
  646. .buswidth = 8,
  647. .mas_rpm_id = 29,
  648. .slv_rpm_id = -1,
  649. .num_links = ARRAY_SIZE(pcnoc_snoc_mas_links),
  650. .links = pcnoc_snoc_mas_links,
  651. };
  652. static const u16 pcnoc_snoc_slv_links[] = {
  653. MSM8916_SNOC_INT_0,
  654. MSM8916_SNOC_INT_BIMC,
  655. MSM8916_SNOC_INT_1
  656. };
  657. static struct qcom_icc_node pcnoc_snoc_slv = {
  658. .name = "pcnoc_snoc_slv",
  659. .id = MSM8916_PNOC_SNOC_SLV,
  660. .buswidth = 8,
  661. .mas_rpm_id = -1,
  662. .slv_rpm_id = 45,
  663. .num_links = ARRAY_SIZE(pcnoc_snoc_slv_links),
  664. .links = pcnoc_snoc_slv_links,
  665. };
  666. static const u16 qdss_int_links[] = {
  667. MSM8916_SNOC_INT_0,
  668. MSM8916_SNOC_INT_BIMC
  669. };
  670. static struct qcom_icc_node qdss_int = {
  671. .name = "qdss_int",
  672. .id = MSM8916_SNOC_QDSS_INT,
  673. .buswidth = 8,
  674. .mas_rpm_id = -1,
  675. .slv_rpm_id = -1,
  676. .qos.ap_owned = true,
  677. .qos.qos_mode = NOC_QOS_MODE_INVALID,
  678. .num_links = ARRAY_SIZE(qdss_int_links),
  679. .links = qdss_int_links,
  680. };
  681. static struct qcom_icc_node slv_apps_l2 = {
  682. .name = "slv_apps_l2",
  683. .id = MSM8916_SLAVE_AMPSS_L2,
  684. .buswidth = 8,
  685. .mas_rpm_id = -1,
  686. .slv_rpm_id = -1,
  687. };
  688. static struct qcom_icc_node slv_apss = {
  689. .name = "slv_apss",
  690. .id = MSM8916_SLAVE_APSS,
  691. .buswidth = 4,
  692. .mas_rpm_id = -1,
  693. .slv_rpm_id = -1,
  694. };
  695. static struct qcom_icc_node slv_audio = {
  696. .name = "slv_audio",
  697. .id = MSM8916_SLAVE_LPASS,
  698. .buswidth = 4,
  699. .mas_rpm_id = -1,
  700. .slv_rpm_id = -1,
  701. };
  702. static struct qcom_icc_node slv_bimc_cfg = {
  703. .name = "slv_bimc_cfg",
  704. .id = MSM8916_SLAVE_BIMC_CFG,
  705. .buswidth = 4,
  706. .mas_rpm_id = -1,
  707. .slv_rpm_id = -1,
  708. };
  709. static struct qcom_icc_node slv_blsp_1 = {
  710. .name = "slv_blsp_1",
  711. .id = MSM8916_SLAVE_BLSP_1,
  712. .buswidth = 4,
  713. .mas_rpm_id = -1,
  714. .slv_rpm_id = -1,
  715. };
  716. static struct qcom_icc_node slv_boot_rom = {
  717. .name = "slv_boot_rom",
  718. .id = MSM8916_SLAVE_BOOT_ROM,
  719. .buswidth = 4,
  720. .mas_rpm_id = -1,
  721. .slv_rpm_id = -1,
  722. };
  723. static struct qcom_icc_node slv_camera_cfg = {
  724. .name = "slv_camera_cfg",
  725. .id = MSM8916_SLAVE_CAMERA_CFG,
  726. .buswidth = 4,
  727. .mas_rpm_id = -1,
  728. .slv_rpm_id = -1,
  729. };
  730. static struct qcom_icc_node slv_cats_0 = {
  731. .name = "slv_cats_0",
  732. .id = MSM8916_SLAVE_CATS_128,
  733. .buswidth = 16,
  734. .mas_rpm_id = -1,
  735. .slv_rpm_id = -1,
  736. };
  737. static struct qcom_icc_node slv_cats_1 = {
  738. .name = "slv_cats_1",
  739. .id = MSM8916_SLAVE_OCMEM_64,
  740. .buswidth = 8,
  741. .mas_rpm_id = -1,
  742. .slv_rpm_id = -1,
  743. };
  744. static struct qcom_icc_node slv_clk_ctl = {
  745. .name = "slv_clk_ctl",
  746. .id = MSM8916_SLAVE_CLK_CTL,
  747. .buswidth = 4,
  748. .mas_rpm_id = -1,
  749. .slv_rpm_id = -1,
  750. };
  751. static struct qcom_icc_node slv_crypto_0_cfg = {
  752. .name = "slv_crypto_0_cfg",
  753. .id = MSM8916_SLAVE_CRYPTO_0_CFG,
  754. .buswidth = 4,
  755. .mas_rpm_id = -1,
  756. .slv_rpm_id = -1,
  757. };
  758. static struct qcom_icc_node slv_dehr_cfg = {
  759. .name = "slv_dehr_cfg",
  760. .id = MSM8916_SLAVE_DEHR_CFG,
  761. .buswidth = 4,
  762. .mas_rpm_id = -1,
  763. .slv_rpm_id = -1,
  764. };
  765. static struct qcom_icc_node slv_display_cfg = {
  766. .name = "slv_display_cfg",
  767. .id = MSM8916_SLAVE_DISPLAY_CFG,
  768. .buswidth = 4,
  769. .mas_rpm_id = -1,
  770. .slv_rpm_id = -1,
  771. };
  772. static struct qcom_icc_node slv_ebi_ch0 = {
  773. .name = "slv_ebi_ch0",
  774. .id = MSM8916_SLAVE_EBI_CH0,
  775. .buswidth = 8,
  776. .mas_rpm_id = -1,
  777. .slv_rpm_id = 0,
  778. };
  779. static struct qcom_icc_node slv_gfx_cfg = {
  780. .name = "slv_gfx_cfg",
  781. .id = MSM8916_SLAVE_GRAPHICS_3D_CFG,
  782. .buswidth = 4,
  783. .mas_rpm_id = -1,
  784. .slv_rpm_id = -1,
  785. };
  786. static struct qcom_icc_node slv_imem_cfg = {
  787. .name = "slv_imem_cfg",
  788. .id = MSM8916_SLAVE_IMEM_CFG,
  789. .buswidth = 4,
  790. .mas_rpm_id = -1,
  791. .slv_rpm_id = -1,
  792. };
  793. static struct qcom_icc_node slv_imem = {
  794. .name = "slv_imem",
  795. .id = MSM8916_SLAVE_IMEM,
  796. .buswidth = 8,
  797. .mas_rpm_id = -1,
  798. .slv_rpm_id = 26,
  799. };
  800. static struct qcom_icc_node slv_mpm = {
  801. .name = "slv_mpm",
  802. .id = MSM8916_SLAVE_MPM,
  803. .buswidth = 4,
  804. .mas_rpm_id = -1,
  805. .slv_rpm_id = -1,
  806. };
  807. static struct qcom_icc_node slv_msg_ram = {
  808. .name = "slv_msg_ram",
  809. .id = MSM8916_SLAVE_MSG_RAM,
  810. .buswidth = 4,
  811. .mas_rpm_id = -1,
  812. .slv_rpm_id = -1,
  813. };
  814. static struct qcom_icc_node slv_mss = {
  815. .name = "slv_mss",
  816. .id = MSM8916_SLAVE_MSS,
  817. .buswidth = 4,
  818. .mas_rpm_id = -1,
  819. .slv_rpm_id = -1,
  820. };
  821. static struct qcom_icc_node slv_pdm = {
  822. .name = "slv_pdm",
  823. .id = MSM8916_SLAVE_PDM,
  824. .buswidth = 4,
  825. .mas_rpm_id = -1,
  826. .slv_rpm_id = -1,
  827. };
  828. static struct qcom_icc_node slv_pmic_arb = {
  829. .name = "slv_pmic_arb",
  830. .id = MSM8916_SLAVE_PMIC_ARB,
  831. .buswidth = 4,
  832. .mas_rpm_id = -1,
  833. .slv_rpm_id = -1,
  834. };
  835. static struct qcom_icc_node slv_pcnoc_cfg = {
  836. .name = "slv_pcnoc_cfg",
  837. .id = MSM8916_SLAVE_PNOC_CFG,
  838. .buswidth = 4,
  839. .mas_rpm_id = -1,
  840. .slv_rpm_id = -1,
  841. };
  842. static struct qcom_icc_node slv_prng = {
  843. .name = "slv_prng",
  844. .id = MSM8916_SLAVE_PRNG,
  845. .buswidth = 4,
  846. .mas_rpm_id = -1,
  847. .slv_rpm_id = -1,
  848. };
  849. static struct qcom_icc_node slv_qdss_cfg = {
  850. .name = "slv_qdss_cfg",
  851. .id = MSM8916_SLAVE_QDSS_CFG,
  852. .buswidth = 4,
  853. .mas_rpm_id = -1,
  854. .slv_rpm_id = -1,
  855. };
  856. static struct qcom_icc_node slv_qdss_stm = {
  857. .name = "slv_qdss_stm",
  858. .id = MSM8916_SLAVE_QDSS_STM,
  859. .buswidth = 4,
  860. .mas_rpm_id = -1,
  861. .slv_rpm_id = 30,
  862. };
  863. static struct qcom_icc_node slv_rbcpr_cfg = {
  864. .name = "slv_rbcpr_cfg",
  865. .id = MSM8916_SLAVE_RBCPR_CFG,
  866. .buswidth = 4,
  867. .mas_rpm_id = -1,
  868. .slv_rpm_id = -1,
  869. };
  870. static struct qcom_icc_node slv_sdcc_1 = {
  871. .name = "slv_sdcc_1",
  872. .id = MSM8916_SLAVE_SDCC_1,
  873. .buswidth = 4,
  874. .mas_rpm_id = -1,
  875. .slv_rpm_id = -1,
  876. };
  877. static struct qcom_icc_node slv_sdcc_2 = {
  878. .name = "slv_sdcc_2",
  879. .id = MSM8916_SLAVE_SDCC_2,
  880. .buswidth = 4,
  881. .mas_rpm_id = -1,
  882. .slv_rpm_id = -1,
  883. };
  884. static struct qcom_icc_node slv_security = {
  885. .name = "slv_security",
  886. .id = MSM8916_SLAVE_SECURITY,
  887. .buswidth = 4,
  888. .mas_rpm_id = -1,
  889. .slv_rpm_id = -1,
  890. };
  891. static struct qcom_icc_node slv_snoc_cfg = {
  892. .name = "slv_snoc_cfg",
  893. .id = MSM8916_SLAVE_SNOC_CFG,
  894. .buswidth = 4,
  895. .mas_rpm_id = -1,
  896. .slv_rpm_id = -1,
  897. };
  898. static struct qcom_icc_node slv_spdm = {
  899. .name = "slv_spdm",
  900. .id = MSM8916_SLAVE_SPDM,
  901. .buswidth = 4,
  902. .mas_rpm_id = -1,
  903. .slv_rpm_id = -1,
  904. };
  905. static struct qcom_icc_node slv_srvc_snoc = {
  906. .name = "slv_srvc_snoc",
  907. .id = MSM8916_SLAVE_SRVC_SNOC,
  908. .buswidth = 8,
  909. .mas_rpm_id = -1,
  910. .slv_rpm_id = -1,
  911. };
  912. static struct qcom_icc_node slv_tcsr = {
  913. .name = "slv_tcsr",
  914. .id = MSM8916_SLAVE_TCSR,
  915. .buswidth = 4,
  916. .mas_rpm_id = -1,
  917. .slv_rpm_id = -1,
  918. };
  919. static struct qcom_icc_node slv_tlmm = {
  920. .name = "slv_tlmm",
  921. .id = MSM8916_SLAVE_TLMM,
  922. .buswidth = 4,
  923. .mas_rpm_id = -1,
  924. .slv_rpm_id = -1,
  925. };
  926. static struct qcom_icc_node slv_usb_hs = {
  927. .name = "slv_usb_hs",
  928. .id = MSM8916_SLAVE_USB_HS,
  929. .buswidth = 4,
  930. .mas_rpm_id = -1,
  931. .slv_rpm_id = -1,
  932. };
  933. static struct qcom_icc_node slv_venus_cfg = {
  934. .name = "slv_venus_cfg",
  935. .id = MSM8916_SLAVE_VENUS_CFG,
  936. .buswidth = 4,
  937. .mas_rpm_id = -1,
  938. .slv_rpm_id = -1,
  939. };
  940. static const u16 snoc_bimc_0_mas_links[] = {
  941. MSM8916_SNOC_BIMC_0_SLV
  942. };
  943. static struct qcom_icc_node snoc_bimc_0_mas = {
  944. .name = "snoc_bimc_0_mas",
  945. .id = MSM8916_SNOC_BIMC_0_MAS,
  946. .buswidth = 8,
  947. .mas_rpm_id = 3,
  948. .slv_rpm_id = -1,
  949. .num_links = ARRAY_SIZE(snoc_bimc_0_mas_links),
  950. .links = snoc_bimc_0_mas_links,
  951. };
  952. static const u16 snoc_bimc_0_slv_links[] = {
  953. MSM8916_SLAVE_EBI_CH0
  954. };
  955. static struct qcom_icc_node snoc_bimc_0_slv = {
  956. .name = "snoc_bimc_0_slv",
  957. .id = MSM8916_SNOC_BIMC_0_SLV,
  958. .buswidth = 8,
  959. .mas_rpm_id = -1,
  960. .slv_rpm_id = 24,
  961. .num_links = ARRAY_SIZE(snoc_bimc_0_slv_links),
  962. .links = snoc_bimc_0_slv_links,
  963. };
  964. static const u16 snoc_bimc_1_mas_links[] = {
  965. MSM8916_SNOC_BIMC_1_SLV
  966. };
  967. static struct qcom_icc_node snoc_bimc_1_mas = {
  968. .name = "snoc_bimc_1_mas",
  969. .id = MSM8916_SNOC_BIMC_1_MAS,
  970. .buswidth = 16,
  971. .mas_rpm_id = -1,
  972. .slv_rpm_id = -1,
  973. .qos.ap_owned = true,
  974. .qos.qos_mode = NOC_QOS_MODE_INVALID,
  975. .num_links = ARRAY_SIZE(snoc_bimc_1_mas_links),
  976. .links = snoc_bimc_1_mas_links,
  977. };
  978. static const u16 snoc_bimc_1_slv_links[] = {
  979. MSM8916_SLAVE_EBI_CH0
  980. };
  981. static struct qcom_icc_node snoc_bimc_1_slv = {
  982. .name = "snoc_bimc_1_slv",
  983. .id = MSM8916_SNOC_BIMC_1_SLV,
  984. .buswidth = 8,
  985. .mas_rpm_id = -1,
  986. .slv_rpm_id = -1,
  987. .qos.ap_owned = true,
  988. .qos.qos_mode = NOC_QOS_MODE_INVALID,
  989. .num_links = ARRAY_SIZE(snoc_bimc_1_slv_links),
  990. .links = snoc_bimc_1_slv_links,
  991. };
  992. static const u16 snoc_int_0_links[] = {
  993. MSM8916_SLAVE_QDSS_STM,
  994. MSM8916_SLAVE_IMEM,
  995. MSM8916_SNOC_PNOC_MAS
  996. };
  997. static struct qcom_icc_node snoc_int_0 = {
  998. .name = "snoc_int_0",
  999. .id = MSM8916_SNOC_INT_0,
  1000. .buswidth = 8,
  1001. .mas_rpm_id = 99,
  1002. .slv_rpm_id = 130,
  1003. .num_links = ARRAY_SIZE(snoc_int_0_links),
  1004. .links = snoc_int_0_links,
  1005. };
  1006. static const u16 snoc_int_1_links[] = {
  1007. MSM8916_SLAVE_APSS,
  1008. MSM8916_SLAVE_CATS_128,
  1009. MSM8916_SLAVE_OCMEM_64
  1010. };
  1011. static struct qcom_icc_node snoc_int_1 = {
  1012. .name = "snoc_int_1",
  1013. .id = MSM8916_SNOC_INT_1,
  1014. .buswidth = 8,
  1015. .mas_rpm_id = -1,
  1016. .slv_rpm_id = -1,
  1017. .num_links = ARRAY_SIZE(snoc_int_1_links),
  1018. .links = snoc_int_1_links,
  1019. };
  1020. static const u16 snoc_int_bimc_links[] = {
  1021. MSM8916_SNOC_BIMC_0_MAS
  1022. };
  1023. static struct qcom_icc_node snoc_int_bimc = {
  1024. .name = "snoc_int_bimc",
  1025. .id = MSM8916_SNOC_INT_BIMC,
  1026. .buswidth = 8,
  1027. .mas_rpm_id = 101,
  1028. .slv_rpm_id = 132,
  1029. .num_links = ARRAY_SIZE(snoc_int_bimc_links),
  1030. .links = snoc_int_bimc_links,
  1031. };
  1032. static const u16 snoc_pcnoc_mas_links[] = {
  1033. MSM8916_SNOC_PNOC_SLV
  1034. };
  1035. static struct qcom_icc_node snoc_pcnoc_mas = {
  1036. .name = "snoc_pcnoc_mas",
  1037. .id = MSM8916_SNOC_PNOC_MAS,
  1038. .buswidth = 8,
  1039. .mas_rpm_id = -1,
  1040. .slv_rpm_id = -1,
  1041. .num_links = ARRAY_SIZE(snoc_pcnoc_mas_links),
  1042. .links = snoc_pcnoc_mas_links,
  1043. };
  1044. static const u16 snoc_pcnoc_slv_links[] = {
  1045. MSM8916_PNOC_INT_0
  1046. };
  1047. static struct qcom_icc_node snoc_pcnoc_slv = {
  1048. .name = "snoc_pcnoc_slv",
  1049. .id = MSM8916_SNOC_PNOC_SLV,
  1050. .buswidth = 8,
  1051. .mas_rpm_id = -1,
  1052. .slv_rpm_id = -1,
  1053. .num_links = ARRAY_SIZE(snoc_pcnoc_slv_links),
  1054. .links = snoc_pcnoc_slv_links,
  1055. };
  1056. static struct qcom_icc_node * const msm8916_snoc_nodes[] = {
  1057. [BIMC_SNOC_SLV] = &bimc_snoc_slv,
  1058. [MASTER_JPEG] = &mas_jpeg,
  1059. [MASTER_MDP_PORT0] = &mas_mdp,
  1060. [MASTER_QDSS_BAM] = &mas_qdss_bam,
  1061. [MASTER_QDSS_ETR] = &mas_qdss_etr,
  1062. [MASTER_SNOC_CFG] = &mas_snoc_cfg,
  1063. [MASTER_VFE] = &mas_vfe,
  1064. [MASTER_VIDEO_P0] = &mas_video,
  1065. [SNOC_MM_INT_0] = &mm_int_0,
  1066. [SNOC_MM_INT_1] = &mm_int_1,
  1067. [SNOC_MM_INT_2] = &mm_int_2,
  1068. [SNOC_MM_INT_BIMC] = &mm_int_bimc,
  1069. [PCNOC_SNOC_SLV] = &pcnoc_snoc_slv,
  1070. [SLAVE_APSS] = &slv_apss,
  1071. [SLAVE_CATS_128] = &slv_cats_0,
  1072. [SLAVE_OCMEM_64] = &slv_cats_1,
  1073. [SLAVE_IMEM] = &slv_imem,
  1074. [SLAVE_QDSS_STM] = &slv_qdss_stm,
  1075. [SLAVE_SRVC_SNOC] = &slv_srvc_snoc,
  1076. [SNOC_BIMC_0_MAS] = &snoc_bimc_0_mas,
  1077. [SNOC_BIMC_1_MAS] = &snoc_bimc_1_mas,
  1078. [SNOC_INT_0] = &snoc_int_0,
  1079. [SNOC_INT_1] = &snoc_int_1,
  1080. [SNOC_INT_BIMC] = &snoc_int_bimc,
  1081. [SNOC_PCNOC_MAS] = &snoc_pcnoc_mas,
  1082. [SNOC_QDSS_INT] = &qdss_int,
  1083. };
  1084. static const struct regmap_config msm8916_snoc_regmap_config = {
  1085. .reg_bits = 32,
  1086. .reg_stride = 4,
  1087. .val_bits = 32,
  1088. .max_register = 0x14000,
  1089. .fast_io = true,
  1090. };
  1091. static const struct qcom_icc_desc msm8916_snoc = {
  1092. .type = QCOM_ICC_NOC,
  1093. .nodes = msm8916_snoc_nodes,
  1094. .num_nodes = ARRAY_SIZE(msm8916_snoc_nodes),
  1095. .regmap_cfg = &msm8916_snoc_regmap_config,
  1096. .qos_offset = 0x7000,
  1097. };
  1098. static struct qcom_icc_node * const msm8916_bimc_nodes[] = {
  1099. [BIMC_SNOC_MAS] = &bimc_snoc_mas,
  1100. [MASTER_AMPSS_M0] = &mas_apss,
  1101. [MASTER_GRAPHICS_3D] = &mas_gfx,
  1102. [MASTER_TCU0] = &mas_tcu0,
  1103. [MASTER_TCU1] = &mas_tcu1,
  1104. [SLAVE_AMPSS_L2] = &slv_apps_l2,
  1105. [SLAVE_EBI_CH0] = &slv_ebi_ch0,
  1106. [SNOC_BIMC_0_SLV] = &snoc_bimc_0_slv,
  1107. [SNOC_BIMC_1_SLV] = &snoc_bimc_1_slv,
  1108. };
  1109. static const struct regmap_config msm8916_bimc_regmap_config = {
  1110. .reg_bits = 32,
  1111. .reg_stride = 4,
  1112. .val_bits = 32,
  1113. .max_register = 0x62000,
  1114. .fast_io = true,
  1115. };
  1116. static const struct qcom_icc_desc msm8916_bimc = {
  1117. .type = QCOM_ICC_BIMC,
  1118. .nodes = msm8916_bimc_nodes,
  1119. .num_nodes = ARRAY_SIZE(msm8916_bimc_nodes),
  1120. .regmap_cfg = &msm8916_bimc_regmap_config,
  1121. .qos_offset = 0x8000,
  1122. };
  1123. static struct qcom_icc_node * const msm8916_pcnoc_nodes[] = {
  1124. [MASTER_BLSP_1] = &mas_blsp_1,
  1125. [MASTER_DEHR] = &mas_dehr,
  1126. [MASTER_LPASS] = &mas_audio,
  1127. [MASTER_CRYPTO_CORE0] = &mas_pcnoc_crypto_0,
  1128. [MASTER_SDCC_1] = &mas_pcnoc_sdcc_1,
  1129. [MASTER_SDCC_2] = &mas_pcnoc_sdcc_2,
  1130. [MASTER_SPDM] = &mas_spdm,
  1131. [MASTER_USB_HS] = &mas_usb_hs,
  1132. [PCNOC_INT_0] = &pcnoc_int_0,
  1133. [PCNOC_INT_1] = &pcnoc_int_1,
  1134. [PCNOC_MAS_0] = &pcnoc_m_0,
  1135. [PCNOC_MAS_1] = &pcnoc_m_1,
  1136. [PCNOC_SLV_0] = &pcnoc_s_0,
  1137. [PCNOC_SLV_1] = &pcnoc_s_1,
  1138. [PCNOC_SLV_2] = &pcnoc_s_2,
  1139. [PCNOC_SLV_3] = &pcnoc_s_3,
  1140. [PCNOC_SLV_4] = &pcnoc_s_4,
  1141. [PCNOC_SLV_8] = &pcnoc_s_8,
  1142. [PCNOC_SLV_9] = &pcnoc_s_9,
  1143. [PCNOC_SNOC_MAS] = &pcnoc_snoc_mas,
  1144. [SLAVE_BIMC_CFG] = &slv_bimc_cfg,
  1145. [SLAVE_BLSP_1] = &slv_blsp_1,
  1146. [SLAVE_BOOT_ROM] = &slv_boot_rom,
  1147. [SLAVE_CAMERA_CFG] = &slv_camera_cfg,
  1148. [SLAVE_CLK_CTL] = &slv_clk_ctl,
  1149. [SLAVE_CRYPTO_0_CFG] = &slv_crypto_0_cfg,
  1150. [SLAVE_DEHR_CFG] = &slv_dehr_cfg,
  1151. [SLAVE_DISPLAY_CFG] = &slv_display_cfg,
  1152. [SLAVE_GRAPHICS_3D_CFG] = &slv_gfx_cfg,
  1153. [SLAVE_IMEM_CFG] = &slv_imem_cfg,
  1154. [SLAVE_LPASS] = &slv_audio,
  1155. [SLAVE_MPM] = &slv_mpm,
  1156. [SLAVE_MSG_RAM] = &slv_msg_ram,
  1157. [SLAVE_MSS] = &slv_mss,
  1158. [SLAVE_PDM] = &slv_pdm,
  1159. [SLAVE_PMIC_ARB] = &slv_pmic_arb,
  1160. [SLAVE_PCNOC_CFG] = &slv_pcnoc_cfg,
  1161. [SLAVE_PRNG] = &slv_prng,
  1162. [SLAVE_QDSS_CFG] = &slv_qdss_cfg,
  1163. [SLAVE_RBCPR_CFG] = &slv_rbcpr_cfg,
  1164. [SLAVE_SDCC_1] = &slv_sdcc_1,
  1165. [SLAVE_SDCC_2] = &slv_sdcc_2,
  1166. [SLAVE_SECURITY] = &slv_security,
  1167. [SLAVE_SNOC_CFG] = &slv_snoc_cfg,
  1168. [SLAVE_SPDM] = &slv_spdm,
  1169. [SLAVE_TCSR] = &slv_tcsr,
  1170. [SLAVE_TLMM] = &slv_tlmm,
  1171. [SLAVE_USB_HS] = &slv_usb_hs,
  1172. [SLAVE_VENUS_CFG] = &slv_venus_cfg,
  1173. [SNOC_PCNOC_SLV] = &snoc_pcnoc_slv,
  1174. };
  1175. static const struct regmap_config msm8916_pcnoc_regmap_config = {
  1176. .reg_bits = 32,
  1177. .reg_stride = 4,
  1178. .val_bits = 32,
  1179. .max_register = 0x11000,
  1180. .fast_io = true,
  1181. };
  1182. static const struct qcom_icc_desc msm8916_pcnoc = {
  1183. .type = QCOM_ICC_NOC,
  1184. .nodes = msm8916_pcnoc_nodes,
  1185. .num_nodes = ARRAY_SIZE(msm8916_pcnoc_nodes),
  1186. .regmap_cfg = &msm8916_pcnoc_regmap_config,
  1187. .qos_offset = 0x7000,
  1188. };
  1189. static const struct of_device_id msm8916_noc_of_match[] = {
  1190. { .compatible = "qcom,msm8916-bimc", .data = &msm8916_bimc },
  1191. { .compatible = "qcom,msm8916-pcnoc", .data = &msm8916_pcnoc },
  1192. { .compatible = "qcom,msm8916-snoc", .data = &msm8916_snoc },
  1193. { }
  1194. };
  1195. MODULE_DEVICE_TABLE(of, msm8916_noc_of_match);
  1196. static struct platform_driver msm8916_noc_driver = {
  1197. .probe = qnoc_probe,
  1198. .remove = qnoc_remove,
  1199. .driver = {
  1200. .name = "qnoc-msm8916",
  1201. .of_match_table = msm8916_noc_of_match,
  1202. },
  1203. };
  1204. module_platform_driver(msm8916_noc_driver);
  1205. MODULE_AUTHOR("Georgi Djakov <[email protected]>");
  1206. MODULE_DESCRIPTION("Qualcomm MSM8916 NoC driver");
  1207. MODULE_LICENSE("GPL v2");