icc-rpm.c 5.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2020 Linaro Ltd
  4. * Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved.
  5. *
  6. */
  7. #include <asm/div64.h>
  8. #include <linux/clk.h>
  9. #include <linux/interconnect-provider.h>
  10. #include <linux/module.h>
  11. #include <dt-bindings/interconnect/qcom,icc.h>
  12. #include "icc-rpm.h"
  13. #include "qnoc-qos-rpm.h"
  14. static int qcom_icc_rpm_smd_send_msg(int ctx, int rsc_type, int rpm_id, u64 val)
  15. {
  16. int ret;
  17. struct msm_rpm_kvp rpm_kvp;
  18. rpm_kvp.length = sizeof(uint64_t);
  19. rpm_kvp.key = RPM_MASTER_FIELD_BW;
  20. rpm_kvp.data = (uint8_t *)&val;
  21. ret = msm_rpm_send_message(ctx, rsc_type, rpm_id, &rpm_kvp, 1);
  22. return ret;
  23. }
  24. /**
  25. * qcom_icc_get_bw_stub - initializes the bw values to zero
  26. * @node: icc node to operate on
  27. * @avg_bw: initial bw to sum aggregate
  28. * @peak_bw: initial bw to max aggregate
  29. */
  30. int qcom_icc_get_bw_stub(struct icc_node *node, u32 *avg, u32 *peak)
  31. {
  32. *avg = 0;
  33. *peak = 0;
  34. return 0;
  35. }
  36. EXPORT_SYMBOL(qcom_icc_get_bw_stub);
  37. /**
  38. * qcom_icc_rpm_pre_aggregate - cleans up stale values from prior icc_set
  39. * @node: icc node to operate on
  40. */
  41. void qcom_icc_rpm_pre_aggregate(struct icc_node *node)
  42. {
  43. size_t i;
  44. struct qcom_icc_node *qn;
  45. qn = node->data;
  46. for (i = 0; i < RPM_NUM_CXT; i++) {
  47. qn->sum_avg[i] = 0;
  48. qn->max_peak[i] = 0;
  49. }
  50. }
  51. EXPORT_SYMBOL(qcom_icc_rpm_pre_aggregate);
  52. /**
  53. * qcom_icc_rpm_aggregate - aggregate bw for buckets indicated by tag
  54. * @node: node to aggregate
  55. * @tag: tag to indicate which buckets to aggregate
  56. * @avg_bw: new bw to sum aggregate
  57. * @peak_bw: new bw to max aggregate
  58. * @agg_avg: existing aggregate avg bw val
  59. * @agg_peak: existing aggregate peak bw val
  60. */
  61. int qcom_icc_rpm_aggregate(struct icc_node *node, u32 tag, u32 avg_bw,
  62. u32 peak_bw, u32 *agg_avg, u32 *agg_peak)
  63. {
  64. size_t i;
  65. struct qcom_icc_node *qn;
  66. qn = node->data;
  67. if (tag && !(tag & QCOM_ICC_TAG_SLEEP))
  68. tag = BIT(RPM_ACTIVE_CXT);
  69. else
  70. tag = BIT(RPM_SLEEP_CXT) | BIT(RPM_ACTIVE_CXT);
  71. for (i = 0; i < RPM_NUM_CXT; i++) {
  72. if (tag & BIT(i)) {
  73. qn->sum_avg[i] += avg_bw;
  74. qn->max_peak[i] = max_t(u32, qn->max_peak[i], peak_bw);
  75. }
  76. }
  77. *agg_avg += avg_bw;
  78. *agg_peak = max_t(u32, *agg_peak, peak_bw);
  79. qn->dirty = true;
  80. return 0;
  81. }
  82. EXPORT_SYMBOL(qcom_icc_rpm_aggregate);
  83. /**
  84. * qcom_icc_rpm_set - set the constraints based on path
  85. * @src: source node for the path to set constraints on
  86. * @dst: destination node for the path to set constraints on
  87. *
  88. * Return: 0 on success, or an error code otherwise
  89. */
  90. int qcom_icc_rpm_set(struct icc_node *src, struct icc_node *dst)
  91. {
  92. struct qcom_icc_provider *qp;
  93. struct qcom_icc_node *qn;
  94. struct icc_node *n, *node;
  95. struct icc_provider *provider;
  96. int ret, i;
  97. int rpm_ctx;
  98. u64 clk_rate, sum_avg, max_peak;
  99. u64 bus_clk_rate[RPM_NUM_CXT] = {0, 0};
  100. if (!src)
  101. node = dst;
  102. else
  103. node = src;
  104. qp = to_qcom_provider(node->provider);
  105. qn = node->data;
  106. if (!qn->dirty)
  107. return 0;
  108. provider = node->provider;
  109. list_for_each_entry(n, &provider->nodes, node_list) {
  110. qn = n->data;
  111. for (i = 0; i < RPM_NUM_CXT; i++) {
  112. sum_avg = icc_units_to_bps(qn->sum_avg[i]);
  113. sum_avg *= qp->util_factor;
  114. do_div(sum_avg, DEFAULT_UTIL_FACTOR);
  115. do_div(sum_avg, qn->channels);
  116. max_peak = icc_units_to_bps(qn->max_peak[i]);
  117. clk_rate = max(sum_avg, max_peak);
  118. do_div(clk_rate, qn->buswidth);
  119. bus_clk_rate[i] = max(bus_clk_rate[i], clk_rate);
  120. if (bus_clk_rate[i] > RPM_CLK_MAX_LEVEL)
  121. bus_clk_rate[i] = RPM_CLK_MAX_LEVEL;
  122. }
  123. }
  124. for (i = 0; i < RPM_NUM_CXT; i++) {
  125. if (qp->bus_clk_cur_rate[i] != bus_clk_rate[i]) {
  126. if (qp->keepalive && i == RPM_ACTIVE_CXT) {
  127. if (qp->init)
  128. ret = clk_set_rate(qp->bus_clks[i].clk,
  129. RPM_CLK_MAX_LEVEL);
  130. else if (bus_clk_rate[i] == 0)
  131. ret = clk_set_rate(qp->bus_clks[i].clk,
  132. RPM_CLK_MIN_LEVEL);
  133. else
  134. ret = clk_set_rate(qp->bus_clks[i].clk,
  135. bus_clk_rate[i]);
  136. } else {
  137. ret = clk_set_rate(qp->bus_clks[i].clk,
  138. bus_clk_rate[i]);
  139. }
  140. if (ret) {
  141. pr_err("%s clk_set_rate error: %d\n",
  142. qp->bus_clks[i].id, ret);
  143. return ret;
  144. }
  145. qp->bus_clk_cur_rate[i] = bus_clk_rate[i];
  146. }
  147. }
  148. list_for_each_entry(n, &provider->nodes, node_list) {
  149. qn = n->data;
  150. if (!qn->dirty)
  151. continue;
  152. qn->dirty = false;
  153. if ((qn->mas_rpm_id == -1) && (qn->slv_rpm_id == -1))
  154. continue;
  155. /* send bandwidth request message to the RPM processor */
  156. for (i = 0; i < RPM_NUM_CXT; i++) {
  157. if (qn->last_sum_avg[i] != qn->sum_avg[i]) {
  158. rpm_ctx = (i == RPM_SLEEP_CXT) ?
  159. RPM_SLEEP_SET : RPM_ACTIVE_SET;
  160. sum_avg = icc_units_to_bps(qn->sum_avg[i]);
  161. if (qn->mas_rpm_id != -1) {
  162. ret = qcom_icc_rpm_smd_send_msg(
  163. rpm_ctx,
  164. RPM_BUS_MASTER_REQ,
  165. qn->mas_rpm_id,
  166. sum_avg);
  167. if (ret) {
  168. pr_err("qcom_icc_rpm_smd_send_msg mas %d error %d\n",
  169. qn->mas_rpm_id, ret);
  170. return ret;
  171. }
  172. }
  173. if (qn->slv_rpm_id != -1) {
  174. ret = qcom_icc_rpm_smd_send_msg(
  175. rpm_ctx,
  176. RPM_BUS_SLAVE_REQ,
  177. qn->slv_rpm_id,
  178. sum_avg);
  179. if (ret) {
  180. pr_err("qcom_icc_rpm_smd_send_msg slv %s error %d\n",
  181. qn->slv_rpm_id, ret);
  182. return ret;
  183. }
  184. }
  185. qn->last_sum_avg[i] = qn->sum_avg[i];
  186. }
  187. }
  188. }
  189. return 0;
  190. }
  191. EXPORT_SYMBOL(qcom_icc_rpm_set);
  192. MODULE_LICENSE("GPL");