mtk-pmic-keys.c 10 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2017 MediaTek, Inc.
  4. *
  5. * Author: Chen Zhong <[email protected]>
  6. */
  7. #include <linux/input.h>
  8. #include <linux/interrupt.h>
  9. #include <linux/kernel.h>
  10. #include <linux/mfd/mt6323/registers.h>
  11. #include <linux/mfd/mt6331/registers.h>
  12. #include <linux/mfd/mt6358/registers.h>
  13. #include <linux/mfd/mt6397/core.h>
  14. #include <linux/mfd/mt6397/registers.h>
  15. #include <linux/module.h>
  16. #include <linux/of_device.h>
  17. #include <linux/of.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/regmap.h>
  20. #define MTK_PMIC_RST_DU_MASK GENMASK(9, 8)
  21. #define MTK_PMIC_PWRKEY_RST BIT(6)
  22. #define MTK_PMIC_HOMEKEY_RST BIT(5)
  23. #define MTK_PMIC_MT6331_RST_DU_MASK GENMASK(13, 12)
  24. #define MTK_PMIC_MT6331_PWRKEY_RST BIT(9)
  25. #define MTK_PMIC_MT6331_HOMEKEY_RST BIT(8)
  26. #define MTK_PMIC_PWRKEY_INDEX 0
  27. #define MTK_PMIC_HOMEKEY_INDEX 1
  28. #define MTK_PMIC_MAX_KEY_COUNT 2
  29. struct mtk_pmic_keys_regs {
  30. u32 deb_reg;
  31. u32 deb_mask;
  32. u32 intsel_reg;
  33. u32 intsel_mask;
  34. u32 rst_en_mask;
  35. };
  36. #define MTK_PMIC_KEYS_REGS(_deb_reg, _deb_mask, \
  37. _intsel_reg, _intsel_mask, _rst_mask) \
  38. { \
  39. .deb_reg = _deb_reg, \
  40. .deb_mask = _deb_mask, \
  41. .intsel_reg = _intsel_reg, \
  42. .intsel_mask = _intsel_mask, \
  43. .rst_en_mask = _rst_mask, \
  44. }
  45. struct mtk_pmic_regs {
  46. const struct mtk_pmic_keys_regs keys_regs[MTK_PMIC_MAX_KEY_COUNT];
  47. u32 pmic_rst_reg;
  48. u32 rst_lprst_mask; /* Long-press reset timeout bitmask */
  49. };
  50. static const struct mtk_pmic_regs mt6397_regs = {
  51. .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
  52. MTK_PMIC_KEYS_REGS(MT6397_CHRSTATUS,
  53. 0x8, MT6397_INT_RSV, 0x10, MTK_PMIC_PWRKEY_RST),
  54. .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
  55. MTK_PMIC_KEYS_REGS(MT6397_OCSTATUS2,
  56. 0x10, MT6397_INT_RSV, 0x8, MTK_PMIC_HOMEKEY_RST),
  57. .pmic_rst_reg = MT6397_TOP_RST_MISC,
  58. .rst_lprst_mask = MTK_PMIC_RST_DU_MASK,
  59. };
  60. static const struct mtk_pmic_regs mt6323_regs = {
  61. .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
  62. MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS,
  63. 0x2, MT6323_INT_MISC_CON, 0x10, MTK_PMIC_PWRKEY_RST),
  64. .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
  65. MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS,
  66. 0x4, MT6323_INT_MISC_CON, 0x8, MTK_PMIC_HOMEKEY_RST),
  67. .pmic_rst_reg = MT6323_TOP_RST_MISC,
  68. .rst_lprst_mask = MTK_PMIC_RST_DU_MASK,
  69. };
  70. static const struct mtk_pmic_regs mt6331_regs = {
  71. .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
  72. MTK_PMIC_KEYS_REGS(MT6331_TOPSTATUS, 0x2,
  73. MT6331_INT_MISC_CON, 0x4,
  74. MTK_PMIC_MT6331_PWRKEY_RST),
  75. .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
  76. MTK_PMIC_KEYS_REGS(MT6331_TOPSTATUS, 0x4,
  77. MT6331_INT_MISC_CON, 0x2,
  78. MTK_PMIC_MT6331_HOMEKEY_RST),
  79. .pmic_rst_reg = MT6331_TOP_RST_MISC,
  80. .rst_lprst_mask = MTK_PMIC_MT6331_RST_DU_MASK,
  81. };
  82. static const struct mtk_pmic_regs mt6358_regs = {
  83. .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
  84. MTK_PMIC_KEYS_REGS(MT6358_TOPSTATUS,
  85. 0x2, MT6358_PSC_TOP_INT_CON0, 0x5,
  86. MTK_PMIC_PWRKEY_RST),
  87. .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
  88. MTK_PMIC_KEYS_REGS(MT6358_TOPSTATUS,
  89. 0x8, MT6358_PSC_TOP_INT_CON0, 0xa,
  90. MTK_PMIC_HOMEKEY_RST),
  91. .pmic_rst_reg = MT6358_TOP_RST_MISC,
  92. .rst_lprst_mask = MTK_PMIC_RST_DU_MASK,
  93. };
  94. struct mtk_pmic_keys_info {
  95. struct mtk_pmic_keys *keys;
  96. const struct mtk_pmic_keys_regs *regs;
  97. unsigned int keycode;
  98. int irq;
  99. int irq_r; /* optional: release irq if different */
  100. bool wakeup:1;
  101. };
  102. struct mtk_pmic_keys {
  103. struct input_dev *input_dev;
  104. struct device *dev;
  105. struct regmap *regmap;
  106. struct mtk_pmic_keys_info keys[MTK_PMIC_MAX_KEY_COUNT];
  107. };
  108. enum mtk_pmic_keys_lp_mode {
  109. LP_DISABLE,
  110. LP_ONEKEY,
  111. LP_TWOKEY,
  112. };
  113. static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys,
  114. const struct mtk_pmic_regs *regs)
  115. {
  116. const struct mtk_pmic_keys_regs *kregs_home, *kregs_pwr;
  117. u32 long_press_mode, long_press_debounce;
  118. u32 value, mask;
  119. int error;
  120. kregs_home = keys->keys[MTK_PMIC_HOMEKEY_INDEX].regs;
  121. kregs_pwr = keys->keys[MTK_PMIC_PWRKEY_INDEX].regs;
  122. error = of_property_read_u32(keys->dev->of_node, "power-off-time-sec",
  123. &long_press_debounce);
  124. if (error)
  125. long_press_debounce = 0;
  126. mask = regs->rst_lprst_mask;
  127. value = long_press_debounce << (ffs(regs->rst_lprst_mask) - 1);
  128. error = of_property_read_u32(keys->dev->of_node,
  129. "mediatek,long-press-mode",
  130. &long_press_mode);
  131. if (error)
  132. long_press_mode = LP_DISABLE;
  133. switch (long_press_mode) {
  134. case LP_TWOKEY:
  135. value |= kregs_home->rst_en_mask;
  136. fallthrough;
  137. case LP_ONEKEY:
  138. value |= kregs_pwr->rst_en_mask;
  139. fallthrough;
  140. case LP_DISABLE:
  141. mask |= kregs_home->rst_en_mask;
  142. mask |= kregs_pwr->rst_en_mask;
  143. break;
  144. default:
  145. break;
  146. }
  147. regmap_update_bits(keys->regmap, regs->pmic_rst_reg, mask, value);
  148. }
  149. static irqreturn_t mtk_pmic_keys_irq_handler_thread(int irq, void *data)
  150. {
  151. struct mtk_pmic_keys_info *info = data;
  152. u32 key_deb, pressed;
  153. regmap_read(info->keys->regmap, info->regs->deb_reg, &key_deb);
  154. key_deb &= info->regs->deb_mask;
  155. pressed = !key_deb;
  156. input_report_key(info->keys->input_dev, info->keycode, pressed);
  157. input_sync(info->keys->input_dev);
  158. dev_dbg(info->keys->dev, "(%s) key =%d using PMIC\n",
  159. pressed ? "pressed" : "released", info->keycode);
  160. return IRQ_HANDLED;
  161. }
  162. static int mtk_pmic_key_setup(struct mtk_pmic_keys *keys,
  163. struct mtk_pmic_keys_info *info)
  164. {
  165. int ret;
  166. info->keys = keys;
  167. ret = regmap_update_bits(keys->regmap, info->regs->intsel_reg,
  168. info->regs->intsel_mask,
  169. info->regs->intsel_mask);
  170. if (ret < 0)
  171. return ret;
  172. ret = devm_request_threaded_irq(keys->dev, info->irq, NULL,
  173. mtk_pmic_keys_irq_handler_thread,
  174. IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
  175. "mtk-pmic-keys", info);
  176. if (ret) {
  177. dev_err(keys->dev, "Failed to request IRQ: %d: %d\n",
  178. info->irq, ret);
  179. return ret;
  180. }
  181. if (info->irq_r > 0) {
  182. ret = devm_request_threaded_irq(keys->dev, info->irq_r, NULL,
  183. mtk_pmic_keys_irq_handler_thread,
  184. IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
  185. "mtk-pmic-keys", info);
  186. if (ret) {
  187. dev_err(keys->dev, "Failed to request IRQ_r: %d: %d\n",
  188. info->irq, ret);
  189. return ret;
  190. }
  191. }
  192. input_set_capability(keys->input_dev, EV_KEY, info->keycode);
  193. return 0;
  194. }
  195. static int __maybe_unused mtk_pmic_keys_suspend(struct device *dev)
  196. {
  197. struct mtk_pmic_keys *keys = dev_get_drvdata(dev);
  198. int index;
  199. for (index = 0; index < MTK_PMIC_MAX_KEY_COUNT; index++) {
  200. if (keys->keys[index].wakeup) {
  201. enable_irq_wake(keys->keys[index].irq);
  202. if (keys->keys[index].irq_r > 0)
  203. enable_irq_wake(keys->keys[index].irq_r);
  204. }
  205. }
  206. return 0;
  207. }
  208. static int __maybe_unused mtk_pmic_keys_resume(struct device *dev)
  209. {
  210. struct mtk_pmic_keys *keys = dev_get_drvdata(dev);
  211. int index;
  212. for (index = 0; index < MTK_PMIC_MAX_KEY_COUNT; index++) {
  213. if (keys->keys[index].wakeup) {
  214. disable_irq_wake(keys->keys[index].irq);
  215. if (keys->keys[index].irq_r > 0)
  216. disable_irq_wake(keys->keys[index].irq_r);
  217. }
  218. }
  219. return 0;
  220. }
  221. static SIMPLE_DEV_PM_OPS(mtk_pmic_keys_pm_ops, mtk_pmic_keys_suspend,
  222. mtk_pmic_keys_resume);
  223. static const struct of_device_id of_mtk_pmic_keys_match_tbl[] = {
  224. {
  225. .compatible = "mediatek,mt6397-keys",
  226. .data = &mt6397_regs,
  227. }, {
  228. .compatible = "mediatek,mt6323-keys",
  229. .data = &mt6323_regs,
  230. }, {
  231. .compatible = "mediatek,mt6331-keys",
  232. .data = &mt6331_regs,
  233. }, {
  234. .compatible = "mediatek,mt6358-keys",
  235. .data = &mt6358_regs,
  236. }, {
  237. /* sentinel */
  238. }
  239. };
  240. MODULE_DEVICE_TABLE(of, of_mtk_pmic_keys_match_tbl);
  241. static int mtk_pmic_keys_probe(struct platform_device *pdev)
  242. {
  243. int error, index = 0;
  244. unsigned int keycount;
  245. struct mt6397_chip *pmic_chip = dev_get_drvdata(pdev->dev.parent);
  246. struct device_node *node = pdev->dev.of_node, *child;
  247. static const char *const irqnames[] = { "powerkey", "homekey" };
  248. static const char *const irqnames_r[] = { "powerkey_r", "homekey_r" };
  249. struct mtk_pmic_keys *keys;
  250. const struct mtk_pmic_regs *mtk_pmic_regs;
  251. struct input_dev *input_dev;
  252. const struct of_device_id *of_id =
  253. of_match_device(of_mtk_pmic_keys_match_tbl, &pdev->dev);
  254. keys = devm_kzalloc(&pdev->dev, sizeof(*keys), GFP_KERNEL);
  255. if (!keys)
  256. return -ENOMEM;
  257. keys->dev = &pdev->dev;
  258. keys->regmap = pmic_chip->regmap;
  259. mtk_pmic_regs = of_id->data;
  260. keys->input_dev = input_dev = devm_input_allocate_device(keys->dev);
  261. if (!input_dev) {
  262. dev_err(keys->dev, "input allocate device fail.\n");
  263. return -ENOMEM;
  264. }
  265. input_dev->name = "mtk-pmic-keys";
  266. input_dev->id.bustype = BUS_HOST;
  267. input_dev->id.vendor = 0x0001;
  268. input_dev->id.product = 0x0001;
  269. input_dev->id.version = 0x0001;
  270. keycount = of_get_available_child_count(node);
  271. if (keycount > MTK_PMIC_MAX_KEY_COUNT ||
  272. keycount > ARRAY_SIZE(irqnames)) {
  273. dev_err(keys->dev, "too many keys defined (%d)\n", keycount);
  274. return -EINVAL;
  275. }
  276. for_each_child_of_node(node, child) {
  277. keys->keys[index].regs = &mtk_pmic_regs->keys_regs[index];
  278. keys->keys[index].irq =
  279. platform_get_irq_byname(pdev, irqnames[index]);
  280. if (keys->keys[index].irq < 0) {
  281. of_node_put(child);
  282. return keys->keys[index].irq;
  283. }
  284. if (of_device_is_compatible(node, "mediatek,mt6358-keys")) {
  285. keys->keys[index].irq_r = platform_get_irq_byname(pdev,
  286. irqnames_r[index]);
  287. if (keys->keys[index].irq_r < 0) {
  288. of_node_put(child);
  289. return keys->keys[index].irq_r;
  290. }
  291. }
  292. error = of_property_read_u32(child,
  293. "linux,keycodes", &keys->keys[index].keycode);
  294. if (error) {
  295. dev_err(keys->dev,
  296. "failed to read key:%d linux,keycode property: %d\n",
  297. index, error);
  298. of_node_put(child);
  299. return error;
  300. }
  301. if (of_property_read_bool(child, "wakeup-source"))
  302. keys->keys[index].wakeup = true;
  303. error = mtk_pmic_key_setup(keys, &keys->keys[index]);
  304. if (error) {
  305. of_node_put(child);
  306. return error;
  307. }
  308. index++;
  309. }
  310. error = input_register_device(input_dev);
  311. if (error) {
  312. dev_err(&pdev->dev,
  313. "register input device failed (%d)\n", error);
  314. return error;
  315. }
  316. mtk_pmic_keys_lp_reset_setup(keys, mtk_pmic_regs);
  317. platform_set_drvdata(pdev, keys);
  318. return 0;
  319. }
  320. static struct platform_driver pmic_keys_pdrv = {
  321. .probe = mtk_pmic_keys_probe,
  322. .driver = {
  323. .name = "mtk-pmic-keys",
  324. .of_match_table = of_mtk_pmic_keys_match_tbl,
  325. .pm = &mtk_pmic_keys_pm_ops,
  326. },
  327. };
  328. module_platform_driver(pmic_keys_pdrv);
  329. MODULE_LICENSE("GPL v2");
  330. MODULE_AUTHOR("Chen Zhong <[email protected]>");
  331. MODULE_DESCRIPTION("MTK pmic-keys driver v0.1");