siw_cq.c 3.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause
  2. /* Authors: Bernard Metzler <[email protected]> */
  3. /* Copyright (c) 2008-2019, IBM Corporation */
  4. #include <linux/errno.h>
  5. #include <linux/types.h>
  6. #include <rdma/ib_verbs.h>
  7. #include "siw.h"
  8. static int map_wc_opcode[SIW_NUM_OPCODES] = {
  9. [SIW_OP_WRITE] = IB_WC_RDMA_WRITE,
  10. [SIW_OP_SEND] = IB_WC_SEND,
  11. [SIW_OP_SEND_WITH_IMM] = IB_WC_SEND,
  12. [SIW_OP_READ] = IB_WC_RDMA_READ,
  13. [SIW_OP_READ_LOCAL_INV] = IB_WC_RDMA_READ,
  14. [SIW_OP_COMP_AND_SWAP] = IB_WC_COMP_SWAP,
  15. [SIW_OP_FETCH_AND_ADD] = IB_WC_FETCH_ADD,
  16. [SIW_OP_INVAL_STAG] = IB_WC_LOCAL_INV,
  17. [SIW_OP_REG_MR] = IB_WC_REG_MR,
  18. [SIW_OP_RECEIVE] = IB_WC_RECV,
  19. [SIW_OP_READ_RESPONSE] = -1 /* not used */
  20. };
  21. static struct {
  22. enum siw_wc_status siw;
  23. enum ib_wc_status ib;
  24. } map_cqe_status[SIW_NUM_WC_STATUS] = {
  25. { SIW_WC_SUCCESS, IB_WC_SUCCESS },
  26. { SIW_WC_LOC_LEN_ERR, IB_WC_LOC_LEN_ERR },
  27. { SIW_WC_LOC_PROT_ERR, IB_WC_LOC_PROT_ERR },
  28. { SIW_WC_LOC_QP_OP_ERR, IB_WC_LOC_QP_OP_ERR },
  29. { SIW_WC_WR_FLUSH_ERR, IB_WC_WR_FLUSH_ERR },
  30. { SIW_WC_BAD_RESP_ERR, IB_WC_BAD_RESP_ERR },
  31. { SIW_WC_LOC_ACCESS_ERR, IB_WC_LOC_ACCESS_ERR },
  32. { SIW_WC_REM_ACCESS_ERR, IB_WC_REM_ACCESS_ERR },
  33. { SIW_WC_REM_INV_REQ_ERR, IB_WC_REM_INV_REQ_ERR },
  34. { SIW_WC_GENERAL_ERR, IB_WC_GENERAL_ERR }
  35. };
  36. /*
  37. * Reap one CQE from the CQ. Only used by kernel clients
  38. * during CQ normal operation. Might be called during CQ
  39. * flush for user mapped CQE array as well.
  40. */
  41. int siw_reap_cqe(struct siw_cq *cq, struct ib_wc *wc)
  42. {
  43. struct siw_cqe *cqe;
  44. unsigned long flags;
  45. spin_lock_irqsave(&cq->lock, flags);
  46. cqe = &cq->queue[cq->cq_get % cq->num_cqe];
  47. if (READ_ONCE(cqe->flags) & SIW_WQE_VALID) {
  48. memset(wc, 0, sizeof(*wc));
  49. wc->wr_id = cqe->id;
  50. wc->byte_len = cqe->bytes;
  51. /*
  52. * During CQ flush, also user land CQE's may get
  53. * reaped here, which do not hold a QP reference
  54. * and do not qualify for memory extension verbs.
  55. */
  56. if (likely(rdma_is_kernel_res(&cq->base_cq.res))) {
  57. if (cqe->flags & SIW_WQE_REM_INVAL) {
  58. wc->ex.invalidate_rkey = cqe->inval_stag;
  59. wc->wc_flags = IB_WC_WITH_INVALIDATE;
  60. }
  61. wc->qp = cqe->base_qp;
  62. wc->opcode = map_wc_opcode[cqe->opcode];
  63. wc->status = map_cqe_status[cqe->status].ib;
  64. siw_dbg_cq(cq,
  65. "idx %u, type %d, flags %2x, id 0x%pK\n",
  66. cq->cq_get % cq->num_cqe, cqe->opcode,
  67. cqe->flags, (void *)(uintptr_t)cqe->id);
  68. } else {
  69. /*
  70. * A malicious user may set invalid opcode or
  71. * status in the user mmapped CQE array.
  72. * Sanity check and correct values in that case
  73. * to avoid out-of-bounds access to global arrays
  74. * for opcode and status mapping.
  75. */
  76. u8 opcode = cqe->opcode;
  77. u16 status = cqe->status;
  78. if (opcode >= SIW_NUM_OPCODES) {
  79. opcode = 0;
  80. status = SIW_WC_GENERAL_ERR;
  81. } else if (status >= SIW_NUM_WC_STATUS) {
  82. status = SIW_WC_GENERAL_ERR;
  83. }
  84. wc->opcode = map_wc_opcode[opcode];
  85. wc->status = map_cqe_status[status].ib;
  86. }
  87. WRITE_ONCE(cqe->flags, 0);
  88. cq->cq_get++;
  89. spin_unlock_irqrestore(&cq->lock, flags);
  90. return 1;
  91. }
  92. spin_unlock_irqrestore(&cq->lock, flags);
  93. return 0;
  94. }
  95. /*
  96. * siw_cq_flush()
  97. *
  98. * Flush all CQ elements.
  99. */
  100. void siw_cq_flush(struct siw_cq *cq)
  101. {
  102. struct ib_wc wc;
  103. while (siw_reap_cqe(cq, &wc))
  104. ;
  105. }