efa_verbs.c 55 KB

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  1. // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
  2. /*
  3. * Copyright 2018-2022 Amazon.com, Inc. or its affiliates. All rights reserved.
  4. */
  5. #include <linux/dma-buf.h>
  6. #include <linux/dma-resv.h>
  7. #include <linux/vmalloc.h>
  8. #include <linux/log2.h>
  9. #include <rdma/ib_addr.h>
  10. #include <rdma/ib_umem.h>
  11. #include <rdma/ib_user_verbs.h>
  12. #include <rdma/ib_verbs.h>
  13. #include <rdma/uverbs_ioctl.h>
  14. #include "efa.h"
  15. #include "efa_io_defs.h"
  16. enum {
  17. EFA_MMAP_DMA_PAGE = 0,
  18. EFA_MMAP_IO_WC,
  19. EFA_MMAP_IO_NC,
  20. };
  21. #define EFA_AENQ_ENABLED_GROUPS \
  22. (BIT(EFA_ADMIN_FATAL_ERROR) | BIT(EFA_ADMIN_WARNING) | \
  23. BIT(EFA_ADMIN_NOTIFICATION) | BIT(EFA_ADMIN_KEEP_ALIVE))
  24. struct efa_user_mmap_entry {
  25. struct rdma_user_mmap_entry rdma_entry;
  26. u64 address;
  27. u8 mmap_flag;
  28. };
  29. #define EFA_DEFINE_DEVICE_STATS(op) \
  30. op(EFA_SUBMITTED_CMDS, "submitted_cmds") \
  31. op(EFA_COMPLETED_CMDS, "completed_cmds") \
  32. op(EFA_CMDS_ERR, "cmds_err") \
  33. op(EFA_NO_COMPLETION_CMDS, "no_completion_cmds") \
  34. op(EFA_KEEP_ALIVE_RCVD, "keep_alive_rcvd") \
  35. op(EFA_ALLOC_PD_ERR, "alloc_pd_err") \
  36. op(EFA_CREATE_QP_ERR, "create_qp_err") \
  37. op(EFA_CREATE_CQ_ERR, "create_cq_err") \
  38. op(EFA_REG_MR_ERR, "reg_mr_err") \
  39. op(EFA_ALLOC_UCONTEXT_ERR, "alloc_ucontext_err") \
  40. op(EFA_CREATE_AH_ERR, "create_ah_err") \
  41. op(EFA_MMAP_ERR, "mmap_err")
  42. #define EFA_DEFINE_PORT_STATS(op) \
  43. op(EFA_TX_BYTES, "tx_bytes") \
  44. op(EFA_TX_PKTS, "tx_pkts") \
  45. op(EFA_RX_BYTES, "rx_bytes") \
  46. op(EFA_RX_PKTS, "rx_pkts") \
  47. op(EFA_RX_DROPS, "rx_drops") \
  48. op(EFA_SEND_BYTES, "send_bytes") \
  49. op(EFA_SEND_WRS, "send_wrs") \
  50. op(EFA_RECV_BYTES, "recv_bytes") \
  51. op(EFA_RECV_WRS, "recv_wrs") \
  52. op(EFA_RDMA_READ_WRS, "rdma_read_wrs") \
  53. op(EFA_RDMA_READ_BYTES, "rdma_read_bytes") \
  54. op(EFA_RDMA_READ_WR_ERR, "rdma_read_wr_err") \
  55. op(EFA_RDMA_READ_RESP_BYTES, "rdma_read_resp_bytes") \
  56. #define EFA_STATS_ENUM(ename, name) ename,
  57. #define EFA_STATS_STR(ename, nam) \
  58. [ename].name = nam,
  59. enum efa_hw_device_stats {
  60. EFA_DEFINE_DEVICE_STATS(EFA_STATS_ENUM)
  61. };
  62. static const struct rdma_stat_desc efa_device_stats_descs[] = {
  63. EFA_DEFINE_DEVICE_STATS(EFA_STATS_STR)
  64. };
  65. enum efa_hw_port_stats {
  66. EFA_DEFINE_PORT_STATS(EFA_STATS_ENUM)
  67. };
  68. static const struct rdma_stat_desc efa_port_stats_descs[] = {
  69. EFA_DEFINE_PORT_STATS(EFA_STATS_STR)
  70. };
  71. #define EFA_CHUNK_PAYLOAD_SHIFT 12
  72. #define EFA_CHUNK_PAYLOAD_SIZE BIT(EFA_CHUNK_PAYLOAD_SHIFT)
  73. #define EFA_CHUNK_PAYLOAD_PTR_SIZE 8
  74. #define EFA_CHUNK_SHIFT 12
  75. #define EFA_CHUNK_SIZE BIT(EFA_CHUNK_SHIFT)
  76. #define EFA_CHUNK_PTR_SIZE sizeof(struct efa_com_ctrl_buff_info)
  77. #define EFA_PTRS_PER_CHUNK \
  78. ((EFA_CHUNK_SIZE - EFA_CHUNK_PTR_SIZE) / EFA_CHUNK_PAYLOAD_PTR_SIZE)
  79. #define EFA_CHUNK_USED_SIZE \
  80. ((EFA_PTRS_PER_CHUNK * EFA_CHUNK_PAYLOAD_PTR_SIZE) + EFA_CHUNK_PTR_SIZE)
  81. struct pbl_chunk {
  82. dma_addr_t dma_addr;
  83. u64 *buf;
  84. u32 length;
  85. };
  86. struct pbl_chunk_list {
  87. struct pbl_chunk *chunks;
  88. unsigned int size;
  89. };
  90. struct pbl_context {
  91. union {
  92. struct {
  93. dma_addr_t dma_addr;
  94. } continuous;
  95. struct {
  96. u32 pbl_buf_size_in_pages;
  97. struct scatterlist *sgl;
  98. int sg_dma_cnt;
  99. struct pbl_chunk_list chunk_list;
  100. } indirect;
  101. } phys;
  102. u64 *pbl_buf;
  103. u32 pbl_buf_size_in_bytes;
  104. u8 physically_continuous;
  105. };
  106. static inline struct efa_dev *to_edev(struct ib_device *ibdev)
  107. {
  108. return container_of(ibdev, struct efa_dev, ibdev);
  109. }
  110. static inline struct efa_ucontext *to_eucontext(struct ib_ucontext *ibucontext)
  111. {
  112. return container_of(ibucontext, struct efa_ucontext, ibucontext);
  113. }
  114. static inline struct efa_pd *to_epd(struct ib_pd *ibpd)
  115. {
  116. return container_of(ibpd, struct efa_pd, ibpd);
  117. }
  118. static inline struct efa_mr *to_emr(struct ib_mr *ibmr)
  119. {
  120. return container_of(ibmr, struct efa_mr, ibmr);
  121. }
  122. static inline struct efa_qp *to_eqp(struct ib_qp *ibqp)
  123. {
  124. return container_of(ibqp, struct efa_qp, ibqp);
  125. }
  126. static inline struct efa_cq *to_ecq(struct ib_cq *ibcq)
  127. {
  128. return container_of(ibcq, struct efa_cq, ibcq);
  129. }
  130. static inline struct efa_ah *to_eah(struct ib_ah *ibah)
  131. {
  132. return container_of(ibah, struct efa_ah, ibah);
  133. }
  134. static inline struct efa_user_mmap_entry *
  135. to_emmap(struct rdma_user_mmap_entry *rdma_entry)
  136. {
  137. return container_of(rdma_entry, struct efa_user_mmap_entry, rdma_entry);
  138. }
  139. #define EFA_DEV_CAP(dev, cap) \
  140. ((dev)->dev_attr.device_caps & \
  141. EFA_ADMIN_FEATURE_DEVICE_ATTR_DESC_##cap##_MASK)
  142. #define is_reserved_cleared(reserved) \
  143. !memchr_inv(reserved, 0, sizeof(reserved))
  144. static void *efa_zalloc_mapped(struct efa_dev *dev, dma_addr_t *dma_addr,
  145. size_t size, enum dma_data_direction dir)
  146. {
  147. void *addr;
  148. addr = alloc_pages_exact(size, GFP_KERNEL | __GFP_ZERO);
  149. if (!addr)
  150. return NULL;
  151. *dma_addr = dma_map_single(&dev->pdev->dev, addr, size, dir);
  152. if (dma_mapping_error(&dev->pdev->dev, *dma_addr)) {
  153. ibdev_err(&dev->ibdev, "Failed to map DMA address\n");
  154. free_pages_exact(addr, size);
  155. return NULL;
  156. }
  157. return addr;
  158. }
  159. static void efa_free_mapped(struct efa_dev *dev, void *cpu_addr,
  160. dma_addr_t dma_addr,
  161. size_t size, enum dma_data_direction dir)
  162. {
  163. dma_unmap_single(&dev->pdev->dev, dma_addr, size, dir);
  164. free_pages_exact(cpu_addr, size);
  165. }
  166. int efa_query_device(struct ib_device *ibdev,
  167. struct ib_device_attr *props,
  168. struct ib_udata *udata)
  169. {
  170. struct efa_com_get_device_attr_result *dev_attr;
  171. struct efa_ibv_ex_query_device_resp resp = {};
  172. struct efa_dev *dev = to_edev(ibdev);
  173. int err;
  174. if (udata && udata->inlen &&
  175. !ib_is_udata_cleared(udata, 0, udata->inlen)) {
  176. ibdev_dbg(ibdev,
  177. "Incompatible ABI params, udata not cleared\n");
  178. return -EINVAL;
  179. }
  180. dev_attr = &dev->dev_attr;
  181. memset(props, 0, sizeof(*props));
  182. props->max_mr_size = dev_attr->max_mr_pages * PAGE_SIZE;
  183. props->page_size_cap = dev_attr->page_size_cap;
  184. props->vendor_id = dev->pdev->vendor;
  185. props->vendor_part_id = dev->pdev->device;
  186. props->hw_ver = dev->pdev->subsystem_device;
  187. props->max_qp = dev_attr->max_qp;
  188. props->max_cq = dev_attr->max_cq;
  189. props->max_pd = dev_attr->max_pd;
  190. props->max_mr = dev_attr->max_mr;
  191. props->max_ah = dev_attr->max_ah;
  192. props->max_cqe = dev_attr->max_cq_depth;
  193. props->max_qp_wr = min_t(u32, dev_attr->max_sq_depth,
  194. dev_attr->max_rq_depth);
  195. props->max_send_sge = dev_attr->max_sq_sge;
  196. props->max_recv_sge = dev_attr->max_rq_sge;
  197. props->max_sge_rd = dev_attr->max_wr_rdma_sge;
  198. props->max_pkeys = 1;
  199. if (udata && udata->outlen) {
  200. resp.max_sq_sge = dev_attr->max_sq_sge;
  201. resp.max_rq_sge = dev_attr->max_rq_sge;
  202. resp.max_sq_wr = dev_attr->max_sq_depth;
  203. resp.max_rq_wr = dev_attr->max_rq_depth;
  204. resp.max_rdma_size = dev_attr->max_rdma_size;
  205. resp.device_caps |= EFA_QUERY_DEVICE_CAPS_CQ_WITH_SGID;
  206. if (EFA_DEV_CAP(dev, RDMA_READ))
  207. resp.device_caps |= EFA_QUERY_DEVICE_CAPS_RDMA_READ;
  208. if (EFA_DEV_CAP(dev, RNR_RETRY))
  209. resp.device_caps |= EFA_QUERY_DEVICE_CAPS_RNR_RETRY;
  210. if (dev->neqs)
  211. resp.device_caps |= EFA_QUERY_DEVICE_CAPS_CQ_NOTIFICATIONS;
  212. err = ib_copy_to_udata(udata, &resp,
  213. min(sizeof(resp), udata->outlen));
  214. if (err) {
  215. ibdev_dbg(ibdev,
  216. "Failed to copy udata for query_device\n");
  217. return err;
  218. }
  219. }
  220. return 0;
  221. }
  222. int efa_query_port(struct ib_device *ibdev, u32 port,
  223. struct ib_port_attr *props)
  224. {
  225. struct efa_dev *dev = to_edev(ibdev);
  226. props->lmc = 1;
  227. props->state = IB_PORT_ACTIVE;
  228. props->phys_state = IB_PORT_PHYS_STATE_LINK_UP;
  229. props->gid_tbl_len = 1;
  230. props->pkey_tbl_len = 1;
  231. props->active_speed = IB_SPEED_EDR;
  232. props->active_width = IB_WIDTH_4X;
  233. props->max_mtu = ib_mtu_int_to_enum(dev->dev_attr.mtu);
  234. props->active_mtu = ib_mtu_int_to_enum(dev->dev_attr.mtu);
  235. props->max_msg_sz = dev->dev_attr.mtu;
  236. props->max_vl_num = 1;
  237. return 0;
  238. }
  239. int efa_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr,
  240. int qp_attr_mask,
  241. struct ib_qp_init_attr *qp_init_attr)
  242. {
  243. struct efa_dev *dev = to_edev(ibqp->device);
  244. struct efa_com_query_qp_params params = {};
  245. struct efa_com_query_qp_result result;
  246. struct efa_qp *qp = to_eqp(ibqp);
  247. int err;
  248. #define EFA_QUERY_QP_SUPP_MASK \
  249. (IB_QP_STATE | IB_QP_PKEY_INDEX | IB_QP_PORT | \
  250. IB_QP_QKEY | IB_QP_SQ_PSN | IB_QP_CAP | IB_QP_RNR_RETRY)
  251. if (qp_attr_mask & ~EFA_QUERY_QP_SUPP_MASK) {
  252. ibdev_dbg(&dev->ibdev,
  253. "Unsupported qp_attr_mask[%#x] supported[%#x]\n",
  254. qp_attr_mask, EFA_QUERY_QP_SUPP_MASK);
  255. return -EOPNOTSUPP;
  256. }
  257. memset(qp_attr, 0, sizeof(*qp_attr));
  258. memset(qp_init_attr, 0, sizeof(*qp_init_attr));
  259. params.qp_handle = qp->qp_handle;
  260. err = efa_com_query_qp(&dev->edev, &params, &result);
  261. if (err)
  262. return err;
  263. qp_attr->qp_state = result.qp_state;
  264. qp_attr->qkey = result.qkey;
  265. qp_attr->sq_psn = result.sq_psn;
  266. qp_attr->sq_draining = result.sq_draining;
  267. qp_attr->port_num = 1;
  268. qp_attr->rnr_retry = result.rnr_retry;
  269. qp_attr->cap.max_send_wr = qp->max_send_wr;
  270. qp_attr->cap.max_recv_wr = qp->max_recv_wr;
  271. qp_attr->cap.max_send_sge = qp->max_send_sge;
  272. qp_attr->cap.max_recv_sge = qp->max_recv_sge;
  273. qp_attr->cap.max_inline_data = qp->max_inline_data;
  274. qp_init_attr->qp_type = ibqp->qp_type;
  275. qp_init_attr->recv_cq = ibqp->recv_cq;
  276. qp_init_attr->send_cq = ibqp->send_cq;
  277. qp_init_attr->qp_context = ibqp->qp_context;
  278. qp_init_attr->cap = qp_attr->cap;
  279. return 0;
  280. }
  281. int efa_query_gid(struct ib_device *ibdev, u32 port, int index,
  282. union ib_gid *gid)
  283. {
  284. struct efa_dev *dev = to_edev(ibdev);
  285. memcpy(gid->raw, dev->dev_attr.addr, sizeof(dev->dev_attr.addr));
  286. return 0;
  287. }
  288. int efa_query_pkey(struct ib_device *ibdev, u32 port, u16 index,
  289. u16 *pkey)
  290. {
  291. if (index > 0)
  292. return -EINVAL;
  293. *pkey = 0xffff;
  294. return 0;
  295. }
  296. static int efa_pd_dealloc(struct efa_dev *dev, u16 pdn)
  297. {
  298. struct efa_com_dealloc_pd_params params = {
  299. .pdn = pdn,
  300. };
  301. return efa_com_dealloc_pd(&dev->edev, &params);
  302. }
  303. int efa_alloc_pd(struct ib_pd *ibpd, struct ib_udata *udata)
  304. {
  305. struct efa_dev *dev = to_edev(ibpd->device);
  306. struct efa_ibv_alloc_pd_resp resp = {};
  307. struct efa_com_alloc_pd_result result;
  308. struct efa_pd *pd = to_epd(ibpd);
  309. int err;
  310. if (udata->inlen &&
  311. !ib_is_udata_cleared(udata, 0, udata->inlen)) {
  312. ibdev_dbg(&dev->ibdev,
  313. "Incompatible ABI params, udata not cleared\n");
  314. err = -EINVAL;
  315. goto err_out;
  316. }
  317. err = efa_com_alloc_pd(&dev->edev, &result);
  318. if (err)
  319. goto err_out;
  320. pd->pdn = result.pdn;
  321. resp.pdn = result.pdn;
  322. if (udata->outlen) {
  323. err = ib_copy_to_udata(udata, &resp,
  324. min(sizeof(resp), udata->outlen));
  325. if (err) {
  326. ibdev_dbg(&dev->ibdev,
  327. "Failed to copy udata for alloc_pd\n");
  328. goto err_dealloc_pd;
  329. }
  330. }
  331. ibdev_dbg(&dev->ibdev, "Allocated pd[%d]\n", pd->pdn);
  332. return 0;
  333. err_dealloc_pd:
  334. efa_pd_dealloc(dev, result.pdn);
  335. err_out:
  336. atomic64_inc(&dev->stats.alloc_pd_err);
  337. return err;
  338. }
  339. int efa_dealloc_pd(struct ib_pd *ibpd, struct ib_udata *udata)
  340. {
  341. struct efa_dev *dev = to_edev(ibpd->device);
  342. struct efa_pd *pd = to_epd(ibpd);
  343. ibdev_dbg(&dev->ibdev, "Dealloc pd[%d]\n", pd->pdn);
  344. efa_pd_dealloc(dev, pd->pdn);
  345. return 0;
  346. }
  347. static int efa_destroy_qp_handle(struct efa_dev *dev, u32 qp_handle)
  348. {
  349. struct efa_com_destroy_qp_params params = { .qp_handle = qp_handle };
  350. return efa_com_destroy_qp(&dev->edev, &params);
  351. }
  352. static void efa_qp_user_mmap_entries_remove(struct efa_qp *qp)
  353. {
  354. rdma_user_mmap_entry_remove(qp->rq_mmap_entry);
  355. rdma_user_mmap_entry_remove(qp->rq_db_mmap_entry);
  356. rdma_user_mmap_entry_remove(qp->llq_desc_mmap_entry);
  357. rdma_user_mmap_entry_remove(qp->sq_db_mmap_entry);
  358. }
  359. int efa_destroy_qp(struct ib_qp *ibqp, struct ib_udata *udata)
  360. {
  361. struct efa_dev *dev = to_edev(ibqp->pd->device);
  362. struct efa_qp *qp = to_eqp(ibqp);
  363. int err;
  364. ibdev_dbg(&dev->ibdev, "Destroy qp[%u]\n", ibqp->qp_num);
  365. err = efa_destroy_qp_handle(dev, qp->qp_handle);
  366. if (err)
  367. return err;
  368. efa_qp_user_mmap_entries_remove(qp);
  369. if (qp->rq_cpu_addr) {
  370. ibdev_dbg(&dev->ibdev,
  371. "qp->cpu_addr[0x%p] freed: size[%lu], dma[%pad]\n",
  372. qp->rq_cpu_addr, qp->rq_size,
  373. &qp->rq_dma_addr);
  374. efa_free_mapped(dev, qp->rq_cpu_addr, qp->rq_dma_addr,
  375. qp->rq_size, DMA_TO_DEVICE);
  376. }
  377. return 0;
  378. }
  379. static struct rdma_user_mmap_entry*
  380. efa_user_mmap_entry_insert(struct ib_ucontext *ucontext,
  381. u64 address, size_t length,
  382. u8 mmap_flag, u64 *offset)
  383. {
  384. struct efa_user_mmap_entry *entry = kzalloc(sizeof(*entry), GFP_KERNEL);
  385. int err;
  386. if (!entry)
  387. return NULL;
  388. entry->address = address;
  389. entry->mmap_flag = mmap_flag;
  390. err = rdma_user_mmap_entry_insert(ucontext, &entry->rdma_entry,
  391. length);
  392. if (err) {
  393. kfree(entry);
  394. return NULL;
  395. }
  396. *offset = rdma_user_mmap_get_offset(&entry->rdma_entry);
  397. return &entry->rdma_entry;
  398. }
  399. static int qp_mmap_entries_setup(struct efa_qp *qp,
  400. struct efa_dev *dev,
  401. struct efa_ucontext *ucontext,
  402. struct efa_com_create_qp_params *params,
  403. struct efa_ibv_create_qp_resp *resp)
  404. {
  405. size_t length;
  406. u64 address;
  407. address = dev->db_bar_addr + resp->sq_db_offset;
  408. qp->sq_db_mmap_entry =
  409. efa_user_mmap_entry_insert(&ucontext->ibucontext,
  410. address,
  411. PAGE_SIZE, EFA_MMAP_IO_NC,
  412. &resp->sq_db_mmap_key);
  413. if (!qp->sq_db_mmap_entry)
  414. return -ENOMEM;
  415. resp->sq_db_offset &= ~PAGE_MASK;
  416. address = dev->mem_bar_addr + resp->llq_desc_offset;
  417. length = PAGE_ALIGN(params->sq_ring_size_in_bytes +
  418. (resp->llq_desc_offset & ~PAGE_MASK));
  419. qp->llq_desc_mmap_entry =
  420. efa_user_mmap_entry_insert(&ucontext->ibucontext,
  421. address, length,
  422. EFA_MMAP_IO_WC,
  423. &resp->llq_desc_mmap_key);
  424. if (!qp->llq_desc_mmap_entry)
  425. goto err_remove_mmap;
  426. resp->llq_desc_offset &= ~PAGE_MASK;
  427. if (qp->rq_size) {
  428. address = dev->db_bar_addr + resp->rq_db_offset;
  429. qp->rq_db_mmap_entry =
  430. efa_user_mmap_entry_insert(&ucontext->ibucontext,
  431. address, PAGE_SIZE,
  432. EFA_MMAP_IO_NC,
  433. &resp->rq_db_mmap_key);
  434. if (!qp->rq_db_mmap_entry)
  435. goto err_remove_mmap;
  436. resp->rq_db_offset &= ~PAGE_MASK;
  437. address = virt_to_phys(qp->rq_cpu_addr);
  438. qp->rq_mmap_entry =
  439. efa_user_mmap_entry_insert(&ucontext->ibucontext,
  440. address, qp->rq_size,
  441. EFA_MMAP_DMA_PAGE,
  442. &resp->rq_mmap_key);
  443. if (!qp->rq_mmap_entry)
  444. goto err_remove_mmap;
  445. resp->rq_mmap_size = qp->rq_size;
  446. }
  447. return 0;
  448. err_remove_mmap:
  449. efa_qp_user_mmap_entries_remove(qp);
  450. return -ENOMEM;
  451. }
  452. static int efa_qp_validate_cap(struct efa_dev *dev,
  453. struct ib_qp_init_attr *init_attr)
  454. {
  455. if (init_attr->cap.max_send_wr > dev->dev_attr.max_sq_depth) {
  456. ibdev_dbg(&dev->ibdev,
  457. "qp: requested send wr[%u] exceeds the max[%u]\n",
  458. init_attr->cap.max_send_wr,
  459. dev->dev_attr.max_sq_depth);
  460. return -EINVAL;
  461. }
  462. if (init_attr->cap.max_recv_wr > dev->dev_attr.max_rq_depth) {
  463. ibdev_dbg(&dev->ibdev,
  464. "qp: requested receive wr[%u] exceeds the max[%u]\n",
  465. init_attr->cap.max_recv_wr,
  466. dev->dev_attr.max_rq_depth);
  467. return -EINVAL;
  468. }
  469. if (init_attr->cap.max_send_sge > dev->dev_attr.max_sq_sge) {
  470. ibdev_dbg(&dev->ibdev,
  471. "qp: requested sge send[%u] exceeds the max[%u]\n",
  472. init_attr->cap.max_send_sge, dev->dev_attr.max_sq_sge);
  473. return -EINVAL;
  474. }
  475. if (init_attr->cap.max_recv_sge > dev->dev_attr.max_rq_sge) {
  476. ibdev_dbg(&dev->ibdev,
  477. "qp: requested sge recv[%u] exceeds the max[%u]\n",
  478. init_attr->cap.max_recv_sge, dev->dev_attr.max_rq_sge);
  479. return -EINVAL;
  480. }
  481. if (init_attr->cap.max_inline_data > dev->dev_attr.inline_buf_size) {
  482. ibdev_dbg(&dev->ibdev,
  483. "qp: requested inline data[%u] exceeds the max[%u]\n",
  484. init_attr->cap.max_inline_data,
  485. dev->dev_attr.inline_buf_size);
  486. return -EINVAL;
  487. }
  488. return 0;
  489. }
  490. static int efa_qp_validate_attr(struct efa_dev *dev,
  491. struct ib_qp_init_attr *init_attr)
  492. {
  493. if (init_attr->qp_type != IB_QPT_DRIVER &&
  494. init_attr->qp_type != IB_QPT_UD) {
  495. ibdev_dbg(&dev->ibdev,
  496. "Unsupported qp type %d\n", init_attr->qp_type);
  497. return -EOPNOTSUPP;
  498. }
  499. if (init_attr->srq) {
  500. ibdev_dbg(&dev->ibdev, "SRQ is not supported\n");
  501. return -EOPNOTSUPP;
  502. }
  503. if (init_attr->create_flags) {
  504. ibdev_dbg(&dev->ibdev, "Unsupported create flags\n");
  505. return -EOPNOTSUPP;
  506. }
  507. return 0;
  508. }
  509. int efa_create_qp(struct ib_qp *ibqp, struct ib_qp_init_attr *init_attr,
  510. struct ib_udata *udata)
  511. {
  512. struct efa_com_create_qp_params create_qp_params = {};
  513. struct efa_com_create_qp_result create_qp_resp;
  514. struct efa_dev *dev = to_edev(ibqp->device);
  515. struct efa_ibv_create_qp_resp resp = {};
  516. struct efa_ibv_create_qp cmd = {};
  517. struct efa_qp *qp = to_eqp(ibqp);
  518. struct efa_ucontext *ucontext;
  519. int err;
  520. ucontext = rdma_udata_to_drv_context(udata, struct efa_ucontext,
  521. ibucontext);
  522. err = efa_qp_validate_cap(dev, init_attr);
  523. if (err)
  524. goto err_out;
  525. err = efa_qp_validate_attr(dev, init_attr);
  526. if (err)
  527. goto err_out;
  528. if (offsetofend(typeof(cmd), driver_qp_type) > udata->inlen) {
  529. ibdev_dbg(&dev->ibdev,
  530. "Incompatible ABI params, no input udata\n");
  531. err = -EINVAL;
  532. goto err_out;
  533. }
  534. if (udata->inlen > sizeof(cmd) &&
  535. !ib_is_udata_cleared(udata, sizeof(cmd),
  536. udata->inlen - sizeof(cmd))) {
  537. ibdev_dbg(&dev->ibdev,
  538. "Incompatible ABI params, unknown fields in udata\n");
  539. err = -EINVAL;
  540. goto err_out;
  541. }
  542. err = ib_copy_from_udata(&cmd, udata,
  543. min(sizeof(cmd), udata->inlen));
  544. if (err) {
  545. ibdev_dbg(&dev->ibdev,
  546. "Cannot copy udata for create_qp\n");
  547. goto err_out;
  548. }
  549. if (cmd.comp_mask) {
  550. ibdev_dbg(&dev->ibdev,
  551. "Incompatible ABI params, unknown fields in udata\n");
  552. err = -EINVAL;
  553. goto err_out;
  554. }
  555. create_qp_params.uarn = ucontext->uarn;
  556. create_qp_params.pd = to_epd(ibqp->pd)->pdn;
  557. if (init_attr->qp_type == IB_QPT_UD) {
  558. create_qp_params.qp_type = EFA_ADMIN_QP_TYPE_UD;
  559. } else if (cmd.driver_qp_type == EFA_QP_DRIVER_TYPE_SRD) {
  560. create_qp_params.qp_type = EFA_ADMIN_QP_TYPE_SRD;
  561. } else {
  562. ibdev_dbg(&dev->ibdev,
  563. "Unsupported qp type %d driver qp type %d\n",
  564. init_attr->qp_type, cmd.driver_qp_type);
  565. err = -EOPNOTSUPP;
  566. goto err_out;
  567. }
  568. ibdev_dbg(&dev->ibdev, "Create QP: qp type %d driver qp type %#x\n",
  569. init_attr->qp_type, cmd.driver_qp_type);
  570. create_qp_params.send_cq_idx = to_ecq(init_attr->send_cq)->cq_idx;
  571. create_qp_params.recv_cq_idx = to_ecq(init_attr->recv_cq)->cq_idx;
  572. create_qp_params.sq_depth = init_attr->cap.max_send_wr;
  573. create_qp_params.sq_ring_size_in_bytes = cmd.sq_ring_size;
  574. create_qp_params.rq_depth = init_attr->cap.max_recv_wr;
  575. create_qp_params.rq_ring_size_in_bytes = cmd.rq_ring_size;
  576. qp->rq_size = PAGE_ALIGN(create_qp_params.rq_ring_size_in_bytes);
  577. if (qp->rq_size) {
  578. qp->rq_cpu_addr = efa_zalloc_mapped(dev, &qp->rq_dma_addr,
  579. qp->rq_size, DMA_TO_DEVICE);
  580. if (!qp->rq_cpu_addr) {
  581. err = -ENOMEM;
  582. goto err_out;
  583. }
  584. ibdev_dbg(&dev->ibdev,
  585. "qp->cpu_addr[0x%p] allocated: size[%lu], dma[%pad]\n",
  586. qp->rq_cpu_addr, qp->rq_size, &qp->rq_dma_addr);
  587. create_qp_params.rq_base_addr = qp->rq_dma_addr;
  588. }
  589. err = efa_com_create_qp(&dev->edev, &create_qp_params,
  590. &create_qp_resp);
  591. if (err)
  592. goto err_free_mapped;
  593. resp.sq_db_offset = create_qp_resp.sq_db_offset;
  594. resp.rq_db_offset = create_qp_resp.rq_db_offset;
  595. resp.llq_desc_offset = create_qp_resp.llq_descriptors_offset;
  596. resp.send_sub_cq_idx = create_qp_resp.send_sub_cq_idx;
  597. resp.recv_sub_cq_idx = create_qp_resp.recv_sub_cq_idx;
  598. err = qp_mmap_entries_setup(qp, dev, ucontext, &create_qp_params,
  599. &resp);
  600. if (err)
  601. goto err_destroy_qp;
  602. qp->qp_handle = create_qp_resp.qp_handle;
  603. qp->ibqp.qp_num = create_qp_resp.qp_num;
  604. qp->max_send_wr = init_attr->cap.max_send_wr;
  605. qp->max_recv_wr = init_attr->cap.max_recv_wr;
  606. qp->max_send_sge = init_attr->cap.max_send_sge;
  607. qp->max_recv_sge = init_attr->cap.max_recv_sge;
  608. qp->max_inline_data = init_attr->cap.max_inline_data;
  609. if (udata->outlen) {
  610. err = ib_copy_to_udata(udata, &resp,
  611. min(sizeof(resp), udata->outlen));
  612. if (err) {
  613. ibdev_dbg(&dev->ibdev,
  614. "Failed to copy udata for qp[%u]\n",
  615. create_qp_resp.qp_num);
  616. goto err_remove_mmap_entries;
  617. }
  618. }
  619. ibdev_dbg(&dev->ibdev, "Created qp[%d]\n", qp->ibqp.qp_num);
  620. return 0;
  621. err_remove_mmap_entries:
  622. efa_qp_user_mmap_entries_remove(qp);
  623. err_destroy_qp:
  624. efa_destroy_qp_handle(dev, create_qp_resp.qp_handle);
  625. err_free_mapped:
  626. if (qp->rq_size)
  627. efa_free_mapped(dev, qp->rq_cpu_addr, qp->rq_dma_addr,
  628. qp->rq_size, DMA_TO_DEVICE);
  629. err_out:
  630. atomic64_inc(&dev->stats.create_qp_err);
  631. return err;
  632. }
  633. static const struct {
  634. int valid;
  635. enum ib_qp_attr_mask req_param;
  636. enum ib_qp_attr_mask opt_param;
  637. } srd_qp_state_table[IB_QPS_ERR + 1][IB_QPS_ERR + 1] = {
  638. [IB_QPS_RESET] = {
  639. [IB_QPS_RESET] = { .valid = 1 },
  640. [IB_QPS_INIT] = {
  641. .valid = 1,
  642. .req_param = IB_QP_PKEY_INDEX |
  643. IB_QP_PORT |
  644. IB_QP_QKEY,
  645. },
  646. },
  647. [IB_QPS_INIT] = {
  648. [IB_QPS_RESET] = { .valid = 1 },
  649. [IB_QPS_ERR] = { .valid = 1 },
  650. [IB_QPS_INIT] = {
  651. .valid = 1,
  652. .opt_param = IB_QP_PKEY_INDEX |
  653. IB_QP_PORT |
  654. IB_QP_QKEY,
  655. },
  656. [IB_QPS_RTR] = {
  657. .valid = 1,
  658. .opt_param = IB_QP_PKEY_INDEX |
  659. IB_QP_QKEY,
  660. },
  661. },
  662. [IB_QPS_RTR] = {
  663. [IB_QPS_RESET] = { .valid = 1 },
  664. [IB_QPS_ERR] = { .valid = 1 },
  665. [IB_QPS_RTS] = {
  666. .valid = 1,
  667. .req_param = IB_QP_SQ_PSN,
  668. .opt_param = IB_QP_CUR_STATE |
  669. IB_QP_QKEY |
  670. IB_QP_RNR_RETRY,
  671. }
  672. },
  673. [IB_QPS_RTS] = {
  674. [IB_QPS_RESET] = { .valid = 1 },
  675. [IB_QPS_ERR] = { .valid = 1 },
  676. [IB_QPS_RTS] = {
  677. .valid = 1,
  678. .opt_param = IB_QP_CUR_STATE |
  679. IB_QP_QKEY,
  680. },
  681. [IB_QPS_SQD] = {
  682. .valid = 1,
  683. .opt_param = IB_QP_EN_SQD_ASYNC_NOTIFY,
  684. },
  685. },
  686. [IB_QPS_SQD] = {
  687. [IB_QPS_RESET] = { .valid = 1 },
  688. [IB_QPS_ERR] = { .valid = 1 },
  689. [IB_QPS_RTS] = {
  690. .valid = 1,
  691. .opt_param = IB_QP_CUR_STATE |
  692. IB_QP_QKEY,
  693. },
  694. [IB_QPS_SQD] = {
  695. .valid = 1,
  696. .opt_param = IB_QP_PKEY_INDEX |
  697. IB_QP_QKEY,
  698. }
  699. },
  700. [IB_QPS_SQE] = {
  701. [IB_QPS_RESET] = { .valid = 1 },
  702. [IB_QPS_ERR] = { .valid = 1 },
  703. [IB_QPS_RTS] = {
  704. .valid = 1,
  705. .opt_param = IB_QP_CUR_STATE |
  706. IB_QP_QKEY,
  707. }
  708. },
  709. [IB_QPS_ERR] = {
  710. [IB_QPS_RESET] = { .valid = 1 },
  711. [IB_QPS_ERR] = { .valid = 1 },
  712. }
  713. };
  714. static bool efa_modify_srd_qp_is_ok(enum ib_qp_state cur_state,
  715. enum ib_qp_state next_state,
  716. enum ib_qp_attr_mask mask)
  717. {
  718. enum ib_qp_attr_mask req_param, opt_param;
  719. if (mask & IB_QP_CUR_STATE &&
  720. cur_state != IB_QPS_RTR && cur_state != IB_QPS_RTS &&
  721. cur_state != IB_QPS_SQD && cur_state != IB_QPS_SQE)
  722. return false;
  723. if (!srd_qp_state_table[cur_state][next_state].valid)
  724. return false;
  725. req_param = srd_qp_state_table[cur_state][next_state].req_param;
  726. opt_param = srd_qp_state_table[cur_state][next_state].opt_param;
  727. if ((mask & req_param) != req_param)
  728. return false;
  729. if (mask & ~(req_param | opt_param | IB_QP_STATE))
  730. return false;
  731. return true;
  732. }
  733. static int efa_modify_qp_validate(struct efa_dev *dev, struct efa_qp *qp,
  734. struct ib_qp_attr *qp_attr, int qp_attr_mask,
  735. enum ib_qp_state cur_state,
  736. enum ib_qp_state new_state)
  737. {
  738. int err;
  739. #define EFA_MODIFY_QP_SUPP_MASK \
  740. (IB_QP_STATE | IB_QP_CUR_STATE | IB_QP_EN_SQD_ASYNC_NOTIFY | \
  741. IB_QP_PKEY_INDEX | IB_QP_PORT | IB_QP_QKEY | IB_QP_SQ_PSN | \
  742. IB_QP_RNR_RETRY)
  743. if (qp_attr_mask & ~EFA_MODIFY_QP_SUPP_MASK) {
  744. ibdev_dbg(&dev->ibdev,
  745. "Unsupported qp_attr_mask[%#x] supported[%#x]\n",
  746. qp_attr_mask, EFA_MODIFY_QP_SUPP_MASK);
  747. return -EOPNOTSUPP;
  748. }
  749. if (qp->ibqp.qp_type == IB_QPT_DRIVER)
  750. err = !efa_modify_srd_qp_is_ok(cur_state, new_state,
  751. qp_attr_mask);
  752. else
  753. err = !ib_modify_qp_is_ok(cur_state, new_state, IB_QPT_UD,
  754. qp_attr_mask);
  755. if (err) {
  756. ibdev_dbg(&dev->ibdev, "Invalid modify QP parameters\n");
  757. return -EINVAL;
  758. }
  759. if ((qp_attr_mask & IB_QP_PORT) && qp_attr->port_num != 1) {
  760. ibdev_dbg(&dev->ibdev, "Can't change port num\n");
  761. return -EOPNOTSUPP;
  762. }
  763. if ((qp_attr_mask & IB_QP_PKEY_INDEX) && qp_attr->pkey_index) {
  764. ibdev_dbg(&dev->ibdev, "Can't change pkey index\n");
  765. return -EOPNOTSUPP;
  766. }
  767. return 0;
  768. }
  769. int efa_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr,
  770. int qp_attr_mask, struct ib_udata *udata)
  771. {
  772. struct efa_dev *dev = to_edev(ibqp->device);
  773. struct efa_com_modify_qp_params params = {};
  774. struct efa_qp *qp = to_eqp(ibqp);
  775. enum ib_qp_state cur_state;
  776. enum ib_qp_state new_state;
  777. int err;
  778. if (qp_attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
  779. return -EOPNOTSUPP;
  780. if (udata->inlen &&
  781. !ib_is_udata_cleared(udata, 0, udata->inlen)) {
  782. ibdev_dbg(&dev->ibdev,
  783. "Incompatible ABI params, udata not cleared\n");
  784. return -EINVAL;
  785. }
  786. cur_state = qp_attr_mask & IB_QP_CUR_STATE ? qp_attr->cur_qp_state :
  787. qp->state;
  788. new_state = qp_attr_mask & IB_QP_STATE ? qp_attr->qp_state : cur_state;
  789. err = efa_modify_qp_validate(dev, qp, qp_attr, qp_attr_mask, cur_state,
  790. new_state);
  791. if (err)
  792. return err;
  793. params.qp_handle = qp->qp_handle;
  794. if (qp_attr_mask & IB_QP_STATE) {
  795. EFA_SET(&params.modify_mask, EFA_ADMIN_MODIFY_QP_CMD_QP_STATE,
  796. 1);
  797. EFA_SET(&params.modify_mask,
  798. EFA_ADMIN_MODIFY_QP_CMD_CUR_QP_STATE, 1);
  799. params.cur_qp_state = cur_state;
  800. params.qp_state = new_state;
  801. }
  802. if (qp_attr_mask & IB_QP_EN_SQD_ASYNC_NOTIFY) {
  803. EFA_SET(&params.modify_mask,
  804. EFA_ADMIN_MODIFY_QP_CMD_SQ_DRAINED_ASYNC_NOTIFY, 1);
  805. params.sq_drained_async_notify = qp_attr->en_sqd_async_notify;
  806. }
  807. if (qp_attr_mask & IB_QP_QKEY) {
  808. EFA_SET(&params.modify_mask, EFA_ADMIN_MODIFY_QP_CMD_QKEY, 1);
  809. params.qkey = qp_attr->qkey;
  810. }
  811. if (qp_attr_mask & IB_QP_SQ_PSN) {
  812. EFA_SET(&params.modify_mask, EFA_ADMIN_MODIFY_QP_CMD_SQ_PSN, 1);
  813. params.sq_psn = qp_attr->sq_psn;
  814. }
  815. if (qp_attr_mask & IB_QP_RNR_RETRY) {
  816. EFA_SET(&params.modify_mask, EFA_ADMIN_MODIFY_QP_CMD_RNR_RETRY,
  817. 1);
  818. params.rnr_retry = qp_attr->rnr_retry;
  819. }
  820. err = efa_com_modify_qp(&dev->edev, &params);
  821. if (err)
  822. return err;
  823. qp->state = new_state;
  824. return 0;
  825. }
  826. static int efa_destroy_cq_idx(struct efa_dev *dev, int cq_idx)
  827. {
  828. struct efa_com_destroy_cq_params params = { .cq_idx = cq_idx };
  829. return efa_com_destroy_cq(&dev->edev, &params);
  830. }
  831. static void efa_cq_user_mmap_entries_remove(struct efa_cq *cq)
  832. {
  833. rdma_user_mmap_entry_remove(cq->db_mmap_entry);
  834. rdma_user_mmap_entry_remove(cq->mmap_entry);
  835. }
  836. int efa_destroy_cq(struct ib_cq *ibcq, struct ib_udata *udata)
  837. {
  838. struct efa_dev *dev = to_edev(ibcq->device);
  839. struct efa_cq *cq = to_ecq(ibcq);
  840. ibdev_dbg(&dev->ibdev,
  841. "Destroy cq[%d] virt[0x%p] freed: size[%lu], dma[%pad]\n",
  842. cq->cq_idx, cq->cpu_addr, cq->size, &cq->dma_addr);
  843. efa_destroy_cq_idx(dev, cq->cq_idx);
  844. efa_cq_user_mmap_entries_remove(cq);
  845. if (cq->eq) {
  846. xa_erase(&dev->cqs_xa, cq->cq_idx);
  847. synchronize_irq(cq->eq->irq.irqn);
  848. }
  849. efa_free_mapped(dev, cq->cpu_addr, cq->dma_addr, cq->size,
  850. DMA_FROM_DEVICE);
  851. return 0;
  852. }
  853. static struct efa_eq *efa_vec2eq(struct efa_dev *dev, int vec)
  854. {
  855. return &dev->eqs[vec];
  856. }
  857. static int cq_mmap_entries_setup(struct efa_dev *dev, struct efa_cq *cq,
  858. struct efa_ibv_create_cq_resp *resp,
  859. bool db_valid)
  860. {
  861. resp->q_mmap_size = cq->size;
  862. cq->mmap_entry = efa_user_mmap_entry_insert(&cq->ucontext->ibucontext,
  863. virt_to_phys(cq->cpu_addr),
  864. cq->size, EFA_MMAP_DMA_PAGE,
  865. &resp->q_mmap_key);
  866. if (!cq->mmap_entry)
  867. return -ENOMEM;
  868. if (db_valid) {
  869. cq->db_mmap_entry =
  870. efa_user_mmap_entry_insert(&cq->ucontext->ibucontext,
  871. dev->db_bar_addr + resp->db_off,
  872. PAGE_SIZE, EFA_MMAP_IO_NC,
  873. &resp->db_mmap_key);
  874. if (!cq->db_mmap_entry) {
  875. rdma_user_mmap_entry_remove(cq->mmap_entry);
  876. return -ENOMEM;
  877. }
  878. resp->db_off &= ~PAGE_MASK;
  879. resp->comp_mask |= EFA_CREATE_CQ_RESP_DB_OFF;
  880. }
  881. return 0;
  882. }
  883. int efa_create_cq(struct ib_cq *ibcq, const struct ib_cq_init_attr *attr,
  884. struct ib_udata *udata)
  885. {
  886. struct efa_ucontext *ucontext = rdma_udata_to_drv_context(
  887. udata, struct efa_ucontext, ibucontext);
  888. struct efa_com_create_cq_params params = {};
  889. struct efa_ibv_create_cq_resp resp = {};
  890. struct efa_com_create_cq_result result;
  891. struct ib_device *ibdev = ibcq->device;
  892. struct efa_dev *dev = to_edev(ibdev);
  893. struct efa_ibv_create_cq cmd = {};
  894. struct efa_cq *cq = to_ecq(ibcq);
  895. int entries = attr->cqe;
  896. bool set_src_addr;
  897. int err;
  898. ibdev_dbg(ibdev, "create_cq entries %d\n", entries);
  899. if (attr->flags)
  900. return -EOPNOTSUPP;
  901. if (entries < 1 || entries > dev->dev_attr.max_cq_depth) {
  902. ibdev_dbg(ibdev,
  903. "cq: requested entries[%u] non-positive or greater than max[%u]\n",
  904. entries, dev->dev_attr.max_cq_depth);
  905. err = -EINVAL;
  906. goto err_out;
  907. }
  908. if (offsetofend(typeof(cmd), num_sub_cqs) > udata->inlen) {
  909. ibdev_dbg(ibdev,
  910. "Incompatible ABI params, no input udata\n");
  911. err = -EINVAL;
  912. goto err_out;
  913. }
  914. if (udata->inlen > sizeof(cmd) &&
  915. !ib_is_udata_cleared(udata, sizeof(cmd),
  916. udata->inlen - sizeof(cmd))) {
  917. ibdev_dbg(ibdev,
  918. "Incompatible ABI params, unknown fields in udata\n");
  919. err = -EINVAL;
  920. goto err_out;
  921. }
  922. err = ib_copy_from_udata(&cmd, udata,
  923. min(sizeof(cmd), udata->inlen));
  924. if (err) {
  925. ibdev_dbg(ibdev, "Cannot copy udata for create_cq\n");
  926. goto err_out;
  927. }
  928. if (cmd.comp_mask || !is_reserved_cleared(cmd.reserved_58)) {
  929. ibdev_dbg(ibdev,
  930. "Incompatible ABI params, unknown fields in udata\n");
  931. err = -EINVAL;
  932. goto err_out;
  933. }
  934. set_src_addr = !!(cmd.flags & EFA_CREATE_CQ_WITH_SGID);
  935. if ((cmd.cq_entry_size != sizeof(struct efa_io_rx_cdesc_ex)) &&
  936. (set_src_addr ||
  937. cmd.cq_entry_size != sizeof(struct efa_io_rx_cdesc))) {
  938. ibdev_dbg(ibdev,
  939. "Invalid entry size [%u]\n", cmd.cq_entry_size);
  940. err = -EINVAL;
  941. goto err_out;
  942. }
  943. if (cmd.num_sub_cqs != dev->dev_attr.sub_cqs_per_cq) {
  944. ibdev_dbg(ibdev,
  945. "Invalid number of sub cqs[%u] expected[%u]\n",
  946. cmd.num_sub_cqs, dev->dev_attr.sub_cqs_per_cq);
  947. err = -EINVAL;
  948. goto err_out;
  949. }
  950. cq->ucontext = ucontext;
  951. cq->size = PAGE_ALIGN(cmd.cq_entry_size * entries * cmd.num_sub_cqs);
  952. cq->cpu_addr = efa_zalloc_mapped(dev, &cq->dma_addr, cq->size,
  953. DMA_FROM_DEVICE);
  954. if (!cq->cpu_addr) {
  955. err = -ENOMEM;
  956. goto err_out;
  957. }
  958. params.uarn = cq->ucontext->uarn;
  959. params.cq_depth = entries;
  960. params.dma_addr = cq->dma_addr;
  961. params.entry_size_in_bytes = cmd.cq_entry_size;
  962. params.num_sub_cqs = cmd.num_sub_cqs;
  963. params.set_src_addr = set_src_addr;
  964. if (cmd.flags & EFA_CREATE_CQ_WITH_COMPLETION_CHANNEL) {
  965. cq->eq = efa_vec2eq(dev, attr->comp_vector);
  966. params.eqn = cq->eq->eeq.eqn;
  967. params.interrupt_mode_enabled = true;
  968. }
  969. err = efa_com_create_cq(&dev->edev, &params, &result);
  970. if (err)
  971. goto err_free_mapped;
  972. resp.db_off = result.db_off;
  973. resp.cq_idx = result.cq_idx;
  974. cq->cq_idx = result.cq_idx;
  975. cq->ibcq.cqe = result.actual_depth;
  976. WARN_ON_ONCE(entries != result.actual_depth);
  977. err = cq_mmap_entries_setup(dev, cq, &resp, result.db_valid);
  978. if (err) {
  979. ibdev_dbg(ibdev, "Could not setup cq[%u] mmap entries\n",
  980. cq->cq_idx);
  981. goto err_destroy_cq;
  982. }
  983. if (cq->eq) {
  984. err = xa_err(xa_store(&dev->cqs_xa, cq->cq_idx, cq, GFP_KERNEL));
  985. if (err) {
  986. ibdev_dbg(ibdev, "Failed to store cq[%u] in xarray\n",
  987. cq->cq_idx);
  988. goto err_remove_mmap;
  989. }
  990. }
  991. if (udata->outlen) {
  992. err = ib_copy_to_udata(udata, &resp,
  993. min(sizeof(resp), udata->outlen));
  994. if (err) {
  995. ibdev_dbg(ibdev,
  996. "Failed to copy udata for create_cq\n");
  997. goto err_xa_erase;
  998. }
  999. }
  1000. ibdev_dbg(ibdev, "Created cq[%d], cq depth[%u]. dma[%pad] virt[0x%p]\n",
  1001. cq->cq_idx, result.actual_depth, &cq->dma_addr, cq->cpu_addr);
  1002. return 0;
  1003. err_xa_erase:
  1004. if (cq->eq)
  1005. xa_erase(&dev->cqs_xa, cq->cq_idx);
  1006. err_remove_mmap:
  1007. efa_cq_user_mmap_entries_remove(cq);
  1008. err_destroy_cq:
  1009. efa_destroy_cq_idx(dev, cq->cq_idx);
  1010. err_free_mapped:
  1011. efa_free_mapped(dev, cq->cpu_addr, cq->dma_addr, cq->size,
  1012. DMA_FROM_DEVICE);
  1013. err_out:
  1014. atomic64_inc(&dev->stats.create_cq_err);
  1015. return err;
  1016. }
  1017. static int umem_to_page_list(struct efa_dev *dev,
  1018. struct ib_umem *umem,
  1019. u64 *page_list,
  1020. u32 hp_cnt,
  1021. u8 hp_shift)
  1022. {
  1023. u32 pages_in_hp = BIT(hp_shift - PAGE_SHIFT);
  1024. struct ib_block_iter biter;
  1025. unsigned int hp_idx = 0;
  1026. ibdev_dbg(&dev->ibdev, "hp_cnt[%u], pages_in_hp[%u]\n",
  1027. hp_cnt, pages_in_hp);
  1028. rdma_umem_for_each_dma_block(umem, &biter, BIT(hp_shift))
  1029. page_list[hp_idx++] = rdma_block_iter_dma_address(&biter);
  1030. return 0;
  1031. }
  1032. static struct scatterlist *efa_vmalloc_buf_to_sg(u64 *buf, int page_cnt)
  1033. {
  1034. struct scatterlist *sglist;
  1035. struct page *pg;
  1036. int i;
  1037. sglist = kmalloc_array(page_cnt, sizeof(*sglist), GFP_KERNEL);
  1038. if (!sglist)
  1039. return NULL;
  1040. sg_init_table(sglist, page_cnt);
  1041. for (i = 0; i < page_cnt; i++) {
  1042. pg = vmalloc_to_page(buf);
  1043. if (!pg)
  1044. goto err;
  1045. sg_set_page(&sglist[i], pg, PAGE_SIZE, 0);
  1046. buf += PAGE_SIZE / sizeof(*buf);
  1047. }
  1048. return sglist;
  1049. err:
  1050. kfree(sglist);
  1051. return NULL;
  1052. }
  1053. /*
  1054. * create a chunk list of physical pages dma addresses from the supplied
  1055. * scatter gather list
  1056. */
  1057. static int pbl_chunk_list_create(struct efa_dev *dev, struct pbl_context *pbl)
  1058. {
  1059. struct pbl_chunk_list *chunk_list = &pbl->phys.indirect.chunk_list;
  1060. int page_cnt = pbl->phys.indirect.pbl_buf_size_in_pages;
  1061. struct scatterlist *pages_sgl = pbl->phys.indirect.sgl;
  1062. unsigned int chunk_list_size, chunk_idx, payload_idx;
  1063. int sg_dma_cnt = pbl->phys.indirect.sg_dma_cnt;
  1064. struct efa_com_ctrl_buff_info *ctrl_buf;
  1065. u64 *cur_chunk_buf, *prev_chunk_buf;
  1066. struct ib_block_iter biter;
  1067. dma_addr_t dma_addr;
  1068. int i;
  1069. /* allocate a chunk list that consists of 4KB chunks */
  1070. chunk_list_size = DIV_ROUND_UP(page_cnt, EFA_PTRS_PER_CHUNK);
  1071. chunk_list->size = chunk_list_size;
  1072. chunk_list->chunks = kcalloc(chunk_list_size,
  1073. sizeof(*chunk_list->chunks),
  1074. GFP_KERNEL);
  1075. if (!chunk_list->chunks)
  1076. return -ENOMEM;
  1077. ibdev_dbg(&dev->ibdev,
  1078. "chunk_list_size[%u] - pages[%u]\n", chunk_list_size,
  1079. page_cnt);
  1080. /* allocate chunk buffers: */
  1081. for (i = 0; i < chunk_list_size; i++) {
  1082. chunk_list->chunks[i].buf = kzalloc(EFA_CHUNK_SIZE, GFP_KERNEL);
  1083. if (!chunk_list->chunks[i].buf)
  1084. goto chunk_list_dealloc;
  1085. chunk_list->chunks[i].length = EFA_CHUNK_USED_SIZE;
  1086. }
  1087. chunk_list->chunks[chunk_list_size - 1].length =
  1088. ((page_cnt % EFA_PTRS_PER_CHUNK) * EFA_CHUNK_PAYLOAD_PTR_SIZE) +
  1089. EFA_CHUNK_PTR_SIZE;
  1090. /* fill the dma addresses of sg list pages to chunks: */
  1091. chunk_idx = 0;
  1092. payload_idx = 0;
  1093. cur_chunk_buf = chunk_list->chunks[0].buf;
  1094. rdma_for_each_block(pages_sgl, &biter, sg_dma_cnt,
  1095. EFA_CHUNK_PAYLOAD_SIZE) {
  1096. cur_chunk_buf[payload_idx++] =
  1097. rdma_block_iter_dma_address(&biter);
  1098. if (payload_idx == EFA_PTRS_PER_CHUNK) {
  1099. chunk_idx++;
  1100. cur_chunk_buf = chunk_list->chunks[chunk_idx].buf;
  1101. payload_idx = 0;
  1102. }
  1103. }
  1104. /* map chunks to dma and fill chunks next ptrs */
  1105. for (i = chunk_list_size - 1; i >= 0; i--) {
  1106. dma_addr = dma_map_single(&dev->pdev->dev,
  1107. chunk_list->chunks[i].buf,
  1108. chunk_list->chunks[i].length,
  1109. DMA_TO_DEVICE);
  1110. if (dma_mapping_error(&dev->pdev->dev, dma_addr)) {
  1111. ibdev_err(&dev->ibdev,
  1112. "chunk[%u] dma_map_failed\n", i);
  1113. goto chunk_list_unmap;
  1114. }
  1115. chunk_list->chunks[i].dma_addr = dma_addr;
  1116. ibdev_dbg(&dev->ibdev,
  1117. "chunk[%u] mapped at [%pad]\n", i, &dma_addr);
  1118. if (!i)
  1119. break;
  1120. prev_chunk_buf = chunk_list->chunks[i - 1].buf;
  1121. ctrl_buf = (struct efa_com_ctrl_buff_info *)
  1122. &prev_chunk_buf[EFA_PTRS_PER_CHUNK];
  1123. ctrl_buf->length = chunk_list->chunks[i].length;
  1124. efa_com_set_dma_addr(dma_addr,
  1125. &ctrl_buf->address.mem_addr_high,
  1126. &ctrl_buf->address.mem_addr_low);
  1127. }
  1128. return 0;
  1129. chunk_list_unmap:
  1130. for (; i < chunk_list_size; i++) {
  1131. dma_unmap_single(&dev->pdev->dev, chunk_list->chunks[i].dma_addr,
  1132. chunk_list->chunks[i].length, DMA_TO_DEVICE);
  1133. }
  1134. chunk_list_dealloc:
  1135. for (i = 0; i < chunk_list_size; i++)
  1136. kfree(chunk_list->chunks[i].buf);
  1137. kfree(chunk_list->chunks);
  1138. return -ENOMEM;
  1139. }
  1140. static void pbl_chunk_list_destroy(struct efa_dev *dev, struct pbl_context *pbl)
  1141. {
  1142. struct pbl_chunk_list *chunk_list = &pbl->phys.indirect.chunk_list;
  1143. int i;
  1144. for (i = 0; i < chunk_list->size; i++) {
  1145. dma_unmap_single(&dev->pdev->dev, chunk_list->chunks[i].dma_addr,
  1146. chunk_list->chunks[i].length, DMA_TO_DEVICE);
  1147. kfree(chunk_list->chunks[i].buf);
  1148. }
  1149. kfree(chunk_list->chunks);
  1150. }
  1151. /* initialize pbl continuous mode: map pbl buffer to a dma address. */
  1152. static int pbl_continuous_initialize(struct efa_dev *dev,
  1153. struct pbl_context *pbl)
  1154. {
  1155. dma_addr_t dma_addr;
  1156. dma_addr = dma_map_single(&dev->pdev->dev, pbl->pbl_buf,
  1157. pbl->pbl_buf_size_in_bytes, DMA_TO_DEVICE);
  1158. if (dma_mapping_error(&dev->pdev->dev, dma_addr)) {
  1159. ibdev_err(&dev->ibdev, "Unable to map pbl to DMA address\n");
  1160. return -ENOMEM;
  1161. }
  1162. pbl->phys.continuous.dma_addr = dma_addr;
  1163. ibdev_dbg(&dev->ibdev,
  1164. "pbl continuous - dma_addr = %pad, size[%u]\n",
  1165. &dma_addr, pbl->pbl_buf_size_in_bytes);
  1166. return 0;
  1167. }
  1168. /*
  1169. * initialize pbl indirect mode:
  1170. * create a chunk list out of the dma addresses of the physical pages of
  1171. * pbl buffer.
  1172. */
  1173. static int pbl_indirect_initialize(struct efa_dev *dev, struct pbl_context *pbl)
  1174. {
  1175. u32 size_in_pages = DIV_ROUND_UP(pbl->pbl_buf_size_in_bytes, EFA_CHUNK_PAYLOAD_SIZE);
  1176. struct scatterlist *sgl;
  1177. int sg_dma_cnt, err;
  1178. BUILD_BUG_ON(EFA_CHUNK_PAYLOAD_SIZE > PAGE_SIZE);
  1179. sgl = efa_vmalloc_buf_to_sg(pbl->pbl_buf, size_in_pages);
  1180. if (!sgl)
  1181. return -ENOMEM;
  1182. sg_dma_cnt = dma_map_sg(&dev->pdev->dev, sgl, size_in_pages, DMA_TO_DEVICE);
  1183. if (!sg_dma_cnt) {
  1184. err = -EINVAL;
  1185. goto err_map;
  1186. }
  1187. pbl->phys.indirect.pbl_buf_size_in_pages = size_in_pages;
  1188. pbl->phys.indirect.sgl = sgl;
  1189. pbl->phys.indirect.sg_dma_cnt = sg_dma_cnt;
  1190. err = pbl_chunk_list_create(dev, pbl);
  1191. if (err) {
  1192. ibdev_dbg(&dev->ibdev,
  1193. "chunk_list creation failed[%d]\n", err);
  1194. goto err_chunk;
  1195. }
  1196. ibdev_dbg(&dev->ibdev,
  1197. "pbl indirect - size[%u], chunks[%u]\n",
  1198. pbl->pbl_buf_size_in_bytes,
  1199. pbl->phys.indirect.chunk_list.size);
  1200. return 0;
  1201. err_chunk:
  1202. dma_unmap_sg(&dev->pdev->dev, sgl, size_in_pages, DMA_TO_DEVICE);
  1203. err_map:
  1204. kfree(sgl);
  1205. return err;
  1206. }
  1207. static void pbl_indirect_terminate(struct efa_dev *dev, struct pbl_context *pbl)
  1208. {
  1209. pbl_chunk_list_destroy(dev, pbl);
  1210. dma_unmap_sg(&dev->pdev->dev, pbl->phys.indirect.sgl,
  1211. pbl->phys.indirect.pbl_buf_size_in_pages, DMA_TO_DEVICE);
  1212. kfree(pbl->phys.indirect.sgl);
  1213. }
  1214. /* create a page buffer list from a mapped user memory region */
  1215. static int pbl_create(struct efa_dev *dev,
  1216. struct pbl_context *pbl,
  1217. struct ib_umem *umem,
  1218. int hp_cnt,
  1219. u8 hp_shift)
  1220. {
  1221. int err;
  1222. pbl->pbl_buf_size_in_bytes = hp_cnt * EFA_CHUNK_PAYLOAD_PTR_SIZE;
  1223. pbl->pbl_buf = kvzalloc(pbl->pbl_buf_size_in_bytes, GFP_KERNEL);
  1224. if (!pbl->pbl_buf)
  1225. return -ENOMEM;
  1226. if (is_vmalloc_addr(pbl->pbl_buf)) {
  1227. pbl->physically_continuous = 0;
  1228. err = umem_to_page_list(dev, umem, pbl->pbl_buf, hp_cnt,
  1229. hp_shift);
  1230. if (err)
  1231. goto err_free;
  1232. err = pbl_indirect_initialize(dev, pbl);
  1233. if (err)
  1234. goto err_free;
  1235. } else {
  1236. pbl->physically_continuous = 1;
  1237. err = umem_to_page_list(dev, umem, pbl->pbl_buf, hp_cnt,
  1238. hp_shift);
  1239. if (err)
  1240. goto err_free;
  1241. err = pbl_continuous_initialize(dev, pbl);
  1242. if (err)
  1243. goto err_free;
  1244. }
  1245. ibdev_dbg(&dev->ibdev,
  1246. "user_pbl_created: user_pages[%u], continuous[%u]\n",
  1247. hp_cnt, pbl->physically_continuous);
  1248. return 0;
  1249. err_free:
  1250. kvfree(pbl->pbl_buf);
  1251. return err;
  1252. }
  1253. static void pbl_destroy(struct efa_dev *dev, struct pbl_context *pbl)
  1254. {
  1255. if (pbl->physically_continuous)
  1256. dma_unmap_single(&dev->pdev->dev, pbl->phys.continuous.dma_addr,
  1257. pbl->pbl_buf_size_in_bytes, DMA_TO_DEVICE);
  1258. else
  1259. pbl_indirect_terminate(dev, pbl);
  1260. kvfree(pbl->pbl_buf);
  1261. }
  1262. static int efa_create_inline_pbl(struct efa_dev *dev, struct efa_mr *mr,
  1263. struct efa_com_reg_mr_params *params)
  1264. {
  1265. int err;
  1266. params->inline_pbl = 1;
  1267. err = umem_to_page_list(dev, mr->umem, params->pbl.inline_pbl_array,
  1268. params->page_num, params->page_shift);
  1269. if (err)
  1270. return err;
  1271. ibdev_dbg(&dev->ibdev,
  1272. "inline_pbl_array - pages[%u]\n", params->page_num);
  1273. return 0;
  1274. }
  1275. static int efa_create_pbl(struct efa_dev *dev,
  1276. struct pbl_context *pbl,
  1277. struct efa_mr *mr,
  1278. struct efa_com_reg_mr_params *params)
  1279. {
  1280. int err;
  1281. err = pbl_create(dev, pbl, mr->umem, params->page_num,
  1282. params->page_shift);
  1283. if (err) {
  1284. ibdev_dbg(&dev->ibdev, "Failed to create pbl[%d]\n", err);
  1285. return err;
  1286. }
  1287. params->inline_pbl = 0;
  1288. params->indirect = !pbl->physically_continuous;
  1289. if (pbl->physically_continuous) {
  1290. params->pbl.pbl.length = pbl->pbl_buf_size_in_bytes;
  1291. efa_com_set_dma_addr(pbl->phys.continuous.dma_addr,
  1292. &params->pbl.pbl.address.mem_addr_high,
  1293. &params->pbl.pbl.address.mem_addr_low);
  1294. } else {
  1295. params->pbl.pbl.length =
  1296. pbl->phys.indirect.chunk_list.chunks[0].length;
  1297. efa_com_set_dma_addr(pbl->phys.indirect.chunk_list.chunks[0].dma_addr,
  1298. &params->pbl.pbl.address.mem_addr_high,
  1299. &params->pbl.pbl.address.mem_addr_low);
  1300. }
  1301. return 0;
  1302. }
  1303. static struct efa_mr *efa_alloc_mr(struct ib_pd *ibpd, int access_flags,
  1304. struct ib_udata *udata)
  1305. {
  1306. struct efa_dev *dev = to_edev(ibpd->device);
  1307. int supp_access_flags;
  1308. struct efa_mr *mr;
  1309. if (udata && udata->inlen &&
  1310. !ib_is_udata_cleared(udata, 0, sizeof(udata->inlen))) {
  1311. ibdev_dbg(&dev->ibdev,
  1312. "Incompatible ABI params, udata not cleared\n");
  1313. return ERR_PTR(-EINVAL);
  1314. }
  1315. supp_access_flags =
  1316. IB_ACCESS_LOCAL_WRITE |
  1317. (EFA_DEV_CAP(dev, RDMA_READ) ? IB_ACCESS_REMOTE_READ : 0);
  1318. access_flags &= ~IB_ACCESS_OPTIONAL;
  1319. if (access_flags & ~supp_access_flags) {
  1320. ibdev_dbg(&dev->ibdev,
  1321. "Unsupported access flags[%#x], supported[%#x]\n",
  1322. access_flags, supp_access_flags);
  1323. return ERR_PTR(-EOPNOTSUPP);
  1324. }
  1325. mr = kzalloc(sizeof(*mr), GFP_KERNEL);
  1326. if (!mr)
  1327. return ERR_PTR(-ENOMEM);
  1328. return mr;
  1329. }
  1330. static int efa_register_mr(struct ib_pd *ibpd, struct efa_mr *mr, u64 start,
  1331. u64 length, u64 virt_addr, int access_flags)
  1332. {
  1333. struct efa_dev *dev = to_edev(ibpd->device);
  1334. struct efa_com_reg_mr_params params = {};
  1335. struct efa_com_reg_mr_result result = {};
  1336. struct pbl_context pbl;
  1337. unsigned int pg_sz;
  1338. int inline_size;
  1339. int err;
  1340. params.pd = to_epd(ibpd)->pdn;
  1341. params.iova = virt_addr;
  1342. params.mr_length_in_bytes = length;
  1343. params.permissions = access_flags;
  1344. pg_sz = ib_umem_find_best_pgsz(mr->umem,
  1345. dev->dev_attr.page_size_cap,
  1346. virt_addr);
  1347. if (!pg_sz) {
  1348. ibdev_dbg(&dev->ibdev, "Failed to find a suitable page size in page_size_cap %#llx\n",
  1349. dev->dev_attr.page_size_cap);
  1350. return -EOPNOTSUPP;
  1351. }
  1352. params.page_shift = order_base_2(pg_sz);
  1353. params.page_num = ib_umem_num_dma_blocks(mr->umem, pg_sz);
  1354. ibdev_dbg(&dev->ibdev,
  1355. "start %#llx length %#llx params.page_shift %u params.page_num %u\n",
  1356. start, length, params.page_shift, params.page_num);
  1357. inline_size = ARRAY_SIZE(params.pbl.inline_pbl_array);
  1358. if (params.page_num <= inline_size) {
  1359. err = efa_create_inline_pbl(dev, mr, &params);
  1360. if (err)
  1361. return err;
  1362. err = efa_com_register_mr(&dev->edev, &params, &result);
  1363. if (err)
  1364. return err;
  1365. } else {
  1366. err = efa_create_pbl(dev, &pbl, mr, &params);
  1367. if (err)
  1368. return err;
  1369. err = efa_com_register_mr(&dev->edev, &params, &result);
  1370. pbl_destroy(dev, &pbl);
  1371. if (err)
  1372. return err;
  1373. }
  1374. mr->ibmr.lkey = result.l_key;
  1375. mr->ibmr.rkey = result.r_key;
  1376. mr->ibmr.length = length;
  1377. ibdev_dbg(&dev->ibdev, "Registered mr[%d]\n", mr->ibmr.lkey);
  1378. return 0;
  1379. }
  1380. struct ib_mr *efa_reg_user_mr_dmabuf(struct ib_pd *ibpd, u64 start,
  1381. u64 length, u64 virt_addr,
  1382. int fd, int access_flags,
  1383. struct ib_udata *udata)
  1384. {
  1385. struct efa_dev *dev = to_edev(ibpd->device);
  1386. struct ib_umem_dmabuf *umem_dmabuf;
  1387. struct efa_mr *mr;
  1388. int err;
  1389. mr = efa_alloc_mr(ibpd, access_flags, udata);
  1390. if (IS_ERR(mr)) {
  1391. err = PTR_ERR(mr);
  1392. goto err_out;
  1393. }
  1394. umem_dmabuf = ib_umem_dmabuf_get_pinned(ibpd->device, start, length, fd,
  1395. access_flags);
  1396. if (IS_ERR(umem_dmabuf)) {
  1397. err = PTR_ERR(umem_dmabuf);
  1398. ibdev_dbg(&dev->ibdev, "Failed to get dmabuf umem[%d]\n", err);
  1399. goto err_free;
  1400. }
  1401. mr->umem = &umem_dmabuf->umem;
  1402. err = efa_register_mr(ibpd, mr, start, length, virt_addr, access_flags);
  1403. if (err)
  1404. goto err_release;
  1405. return &mr->ibmr;
  1406. err_release:
  1407. ib_umem_release(mr->umem);
  1408. err_free:
  1409. kfree(mr);
  1410. err_out:
  1411. atomic64_inc(&dev->stats.reg_mr_err);
  1412. return ERR_PTR(err);
  1413. }
  1414. struct ib_mr *efa_reg_mr(struct ib_pd *ibpd, u64 start, u64 length,
  1415. u64 virt_addr, int access_flags,
  1416. struct ib_udata *udata)
  1417. {
  1418. struct efa_dev *dev = to_edev(ibpd->device);
  1419. struct efa_mr *mr;
  1420. int err;
  1421. mr = efa_alloc_mr(ibpd, access_flags, udata);
  1422. if (IS_ERR(mr)) {
  1423. err = PTR_ERR(mr);
  1424. goto err_out;
  1425. }
  1426. mr->umem = ib_umem_get(ibpd->device, start, length, access_flags);
  1427. if (IS_ERR(mr->umem)) {
  1428. err = PTR_ERR(mr->umem);
  1429. ibdev_dbg(&dev->ibdev,
  1430. "Failed to pin and map user space memory[%d]\n", err);
  1431. goto err_free;
  1432. }
  1433. err = efa_register_mr(ibpd, mr, start, length, virt_addr, access_flags);
  1434. if (err)
  1435. goto err_release;
  1436. return &mr->ibmr;
  1437. err_release:
  1438. ib_umem_release(mr->umem);
  1439. err_free:
  1440. kfree(mr);
  1441. err_out:
  1442. atomic64_inc(&dev->stats.reg_mr_err);
  1443. return ERR_PTR(err);
  1444. }
  1445. int efa_dereg_mr(struct ib_mr *ibmr, struct ib_udata *udata)
  1446. {
  1447. struct efa_dev *dev = to_edev(ibmr->device);
  1448. struct efa_com_dereg_mr_params params;
  1449. struct efa_mr *mr = to_emr(ibmr);
  1450. int err;
  1451. ibdev_dbg(&dev->ibdev, "Deregister mr[%d]\n", ibmr->lkey);
  1452. params.l_key = mr->ibmr.lkey;
  1453. err = efa_com_dereg_mr(&dev->edev, &params);
  1454. if (err)
  1455. return err;
  1456. ib_umem_release(mr->umem);
  1457. kfree(mr);
  1458. return 0;
  1459. }
  1460. int efa_get_port_immutable(struct ib_device *ibdev, u32 port_num,
  1461. struct ib_port_immutable *immutable)
  1462. {
  1463. struct ib_port_attr attr;
  1464. int err;
  1465. err = ib_query_port(ibdev, port_num, &attr);
  1466. if (err) {
  1467. ibdev_dbg(ibdev, "Couldn't query port err[%d]\n", err);
  1468. return err;
  1469. }
  1470. immutable->pkey_tbl_len = attr.pkey_tbl_len;
  1471. immutable->gid_tbl_len = attr.gid_tbl_len;
  1472. return 0;
  1473. }
  1474. static int efa_dealloc_uar(struct efa_dev *dev, u16 uarn)
  1475. {
  1476. struct efa_com_dealloc_uar_params params = {
  1477. .uarn = uarn,
  1478. };
  1479. return efa_com_dealloc_uar(&dev->edev, &params);
  1480. }
  1481. #define EFA_CHECK_USER_COMP(_dev, _comp_mask, _attr, _mask, _attr_str) \
  1482. (_attr_str = (!(_dev)->dev_attr._attr || ((_comp_mask) & (_mask))) ? \
  1483. NULL : #_attr)
  1484. static int efa_user_comp_handshake(const struct ib_ucontext *ibucontext,
  1485. const struct efa_ibv_alloc_ucontext_cmd *cmd)
  1486. {
  1487. struct efa_dev *dev = to_edev(ibucontext->device);
  1488. char *attr_str;
  1489. if (EFA_CHECK_USER_COMP(dev, cmd->comp_mask, max_tx_batch,
  1490. EFA_ALLOC_UCONTEXT_CMD_COMP_TX_BATCH, attr_str))
  1491. goto err;
  1492. if (EFA_CHECK_USER_COMP(dev, cmd->comp_mask, min_sq_depth,
  1493. EFA_ALLOC_UCONTEXT_CMD_COMP_MIN_SQ_WR,
  1494. attr_str))
  1495. goto err;
  1496. return 0;
  1497. err:
  1498. ibdev_dbg(&dev->ibdev, "Userspace handshake failed for %s attribute\n",
  1499. attr_str);
  1500. return -EOPNOTSUPP;
  1501. }
  1502. int efa_alloc_ucontext(struct ib_ucontext *ibucontext, struct ib_udata *udata)
  1503. {
  1504. struct efa_ucontext *ucontext = to_eucontext(ibucontext);
  1505. struct efa_dev *dev = to_edev(ibucontext->device);
  1506. struct efa_ibv_alloc_ucontext_resp resp = {};
  1507. struct efa_ibv_alloc_ucontext_cmd cmd = {};
  1508. struct efa_com_alloc_uar_result result;
  1509. int err;
  1510. /*
  1511. * it's fine if the driver does not know all request fields,
  1512. * we will ack input fields in our response.
  1513. */
  1514. err = ib_copy_from_udata(&cmd, udata,
  1515. min(sizeof(cmd), udata->inlen));
  1516. if (err) {
  1517. ibdev_dbg(&dev->ibdev,
  1518. "Cannot copy udata for alloc_ucontext\n");
  1519. goto err_out;
  1520. }
  1521. err = efa_user_comp_handshake(ibucontext, &cmd);
  1522. if (err)
  1523. goto err_out;
  1524. err = efa_com_alloc_uar(&dev->edev, &result);
  1525. if (err)
  1526. goto err_out;
  1527. ucontext->uarn = result.uarn;
  1528. resp.cmds_supp_udata_mask |= EFA_USER_CMDS_SUPP_UDATA_QUERY_DEVICE;
  1529. resp.cmds_supp_udata_mask |= EFA_USER_CMDS_SUPP_UDATA_CREATE_AH;
  1530. resp.sub_cqs_per_cq = dev->dev_attr.sub_cqs_per_cq;
  1531. resp.inline_buf_size = dev->dev_attr.inline_buf_size;
  1532. resp.max_llq_size = dev->dev_attr.max_llq_size;
  1533. resp.max_tx_batch = dev->dev_attr.max_tx_batch;
  1534. resp.min_sq_wr = dev->dev_attr.min_sq_depth;
  1535. err = ib_copy_to_udata(udata, &resp,
  1536. min(sizeof(resp), udata->outlen));
  1537. if (err)
  1538. goto err_dealloc_uar;
  1539. return 0;
  1540. err_dealloc_uar:
  1541. efa_dealloc_uar(dev, result.uarn);
  1542. err_out:
  1543. atomic64_inc(&dev->stats.alloc_ucontext_err);
  1544. return err;
  1545. }
  1546. void efa_dealloc_ucontext(struct ib_ucontext *ibucontext)
  1547. {
  1548. struct efa_ucontext *ucontext = to_eucontext(ibucontext);
  1549. struct efa_dev *dev = to_edev(ibucontext->device);
  1550. efa_dealloc_uar(dev, ucontext->uarn);
  1551. }
  1552. void efa_mmap_free(struct rdma_user_mmap_entry *rdma_entry)
  1553. {
  1554. struct efa_user_mmap_entry *entry = to_emmap(rdma_entry);
  1555. kfree(entry);
  1556. }
  1557. static int __efa_mmap(struct efa_dev *dev, struct efa_ucontext *ucontext,
  1558. struct vm_area_struct *vma)
  1559. {
  1560. struct rdma_user_mmap_entry *rdma_entry;
  1561. struct efa_user_mmap_entry *entry;
  1562. unsigned long va;
  1563. int err = 0;
  1564. u64 pfn;
  1565. rdma_entry = rdma_user_mmap_entry_get(&ucontext->ibucontext, vma);
  1566. if (!rdma_entry) {
  1567. ibdev_dbg(&dev->ibdev,
  1568. "pgoff[%#lx] does not have valid entry\n",
  1569. vma->vm_pgoff);
  1570. atomic64_inc(&dev->stats.mmap_err);
  1571. return -EINVAL;
  1572. }
  1573. entry = to_emmap(rdma_entry);
  1574. ibdev_dbg(&dev->ibdev,
  1575. "Mapping address[%#llx], length[%#zx], mmap_flag[%d]\n",
  1576. entry->address, rdma_entry->npages * PAGE_SIZE,
  1577. entry->mmap_flag);
  1578. pfn = entry->address >> PAGE_SHIFT;
  1579. switch (entry->mmap_flag) {
  1580. case EFA_MMAP_IO_NC:
  1581. err = rdma_user_mmap_io(&ucontext->ibucontext, vma, pfn,
  1582. entry->rdma_entry.npages * PAGE_SIZE,
  1583. pgprot_noncached(vma->vm_page_prot),
  1584. rdma_entry);
  1585. break;
  1586. case EFA_MMAP_IO_WC:
  1587. err = rdma_user_mmap_io(&ucontext->ibucontext, vma, pfn,
  1588. entry->rdma_entry.npages * PAGE_SIZE,
  1589. pgprot_writecombine(vma->vm_page_prot),
  1590. rdma_entry);
  1591. break;
  1592. case EFA_MMAP_DMA_PAGE:
  1593. for (va = vma->vm_start; va < vma->vm_end;
  1594. va += PAGE_SIZE, pfn++) {
  1595. err = vm_insert_page(vma, va, pfn_to_page(pfn));
  1596. if (err)
  1597. break;
  1598. }
  1599. break;
  1600. default:
  1601. err = -EINVAL;
  1602. }
  1603. if (err) {
  1604. ibdev_dbg(
  1605. &dev->ibdev,
  1606. "Couldn't mmap address[%#llx] length[%#zx] mmap_flag[%d] err[%d]\n",
  1607. entry->address, rdma_entry->npages * PAGE_SIZE,
  1608. entry->mmap_flag, err);
  1609. atomic64_inc(&dev->stats.mmap_err);
  1610. }
  1611. rdma_user_mmap_entry_put(rdma_entry);
  1612. return err;
  1613. }
  1614. int efa_mmap(struct ib_ucontext *ibucontext,
  1615. struct vm_area_struct *vma)
  1616. {
  1617. struct efa_ucontext *ucontext = to_eucontext(ibucontext);
  1618. struct efa_dev *dev = to_edev(ibucontext->device);
  1619. size_t length = vma->vm_end - vma->vm_start;
  1620. ibdev_dbg(&dev->ibdev,
  1621. "start %#lx, end %#lx, length = %#zx, pgoff = %#lx\n",
  1622. vma->vm_start, vma->vm_end, length, vma->vm_pgoff);
  1623. return __efa_mmap(dev, ucontext, vma);
  1624. }
  1625. static int efa_ah_destroy(struct efa_dev *dev, struct efa_ah *ah)
  1626. {
  1627. struct efa_com_destroy_ah_params params = {
  1628. .ah = ah->ah,
  1629. .pdn = to_epd(ah->ibah.pd)->pdn,
  1630. };
  1631. return efa_com_destroy_ah(&dev->edev, &params);
  1632. }
  1633. int efa_create_ah(struct ib_ah *ibah,
  1634. struct rdma_ah_init_attr *init_attr,
  1635. struct ib_udata *udata)
  1636. {
  1637. struct rdma_ah_attr *ah_attr = init_attr->ah_attr;
  1638. struct efa_dev *dev = to_edev(ibah->device);
  1639. struct efa_com_create_ah_params params = {};
  1640. struct efa_ibv_create_ah_resp resp = {};
  1641. struct efa_com_create_ah_result result;
  1642. struct efa_ah *ah = to_eah(ibah);
  1643. int err;
  1644. if (!(init_attr->flags & RDMA_CREATE_AH_SLEEPABLE)) {
  1645. ibdev_dbg(&dev->ibdev,
  1646. "Create address handle is not supported in atomic context\n");
  1647. err = -EOPNOTSUPP;
  1648. goto err_out;
  1649. }
  1650. if (udata->inlen &&
  1651. !ib_is_udata_cleared(udata, 0, udata->inlen)) {
  1652. ibdev_dbg(&dev->ibdev, "Incompatible ABI params\n");
  1653. err = -EINVAL;
  1654. goto err_out;
  1655. }
  1656. memcpy(params.dest_addr, ah_attr->grh.dgid.raw,
  1657. sizeof(params.dest_addr));
  1658. params.pdn = to_epd(ibah->pd)->pdn;
  1659. err = efa_com_create_ah(&dev->edev, &params, &result);
  1660. if (err)
  1661. goto err_out;
  1662. memcpy(ah->id, ah_attr->grh.dgid.raw, sizeof(ah->id));
  1663. ah->ah = result.ah;
  1664. resp.efa_address_handle = result.ah;
  1665. if (udata->outlen) {
  1666. err = ib_copy_to_udata(udata, &resp,
  1667. min(sizeof(resp), udata->outlen));
  1668. if (err) {
  1669. ibdev_dbg(&dev->ibdev,
  1670. "Failed to copy udata for create_ah response\n");
  1671. goto err_destroy_ah;
  1672. }
  1673. }
  1674. ibdev_dbg(&dev->ibdev, "Created ah[%d]\n", ah->ah);
  1675. return 0;
  1676. err_destroy_ah:
  1677. efa_ah_destroy(dev, ah);
  1678. err_out:
  1679. atomic64_inc(&dev->stats.create_ah_err);
  1680. return err;
  1681. }
  1682. int efa_destroy_ah(struct ib_ah *ibah, u32 flags)
  1683. {
  1684. struct efa_dev *dev = to_edev(ibah->pd->device);
  1685. struct efa_ah *ah = to_eah(ibah);
  1686. ibdev_dbg(&dev->ibdev, "Destroy ah[%d]\n", ah->ah);
  1687. if (!(flags & RDMA_DESTROY_AH_SLEEPABLE)) {
  1688. ibdev_dbg(&dev->ibdev,
  1689. "Destroy address handle is not supported in atomic context\n");
  1690. return -EOPNOTSUPP;
  1691. }
  1692. efa_ah_destroy(dev, ah);
  1693. return 0;
  1694. }
  1695. struct rdma_hw_stats *efa_alloc_hw_port_stats(struct ib_device *ibdev,
  1696. u32 port_num)
  1697. {
  1698. return rdma_alloc_hw_stats_struct(efa_port_stats_descs,
  1699. ARRAY_SIZE(efa_port_stats_descs),
  1700. RDMA_HW_STATS_DEFAULT_LIFESPAN);
  1701. }
  1702. struct rdma_hw_stats *efa_alloc_hw_device_stats(struct ib_device *ibdev)
  1703. {
  1704. return rdma_alloc_hw_stats_struct(efa_device_stats_descs,
  1705. ARRAY_SIZE(efa_device_stats_descs),
  1706. RDMA_HW_STATS_DEFAULT_LIFESPAN);
  1707. }
  1708. static int efa_fill_device_stats(struct efa_dev *dev,
  1709. struct rdma_hw_stats *stats)
  1710. {
  1711. struct efa_com_stats_admin *as = &dev->edev.aq.stats;
  1712. struct efa_stats *s = &dev->stats;
  1713. stats->value[EFA_SUBMITTED_CMDS] = atomic64_read(&as->submitted_cmd);
  1714. stats->value[EFA_COMPLETED_CMDS] = atomic64_read(&as->completed_cmd);
  1715. stats->value[EFA_CMDS_ERR] = atomic64_read(&as->cmd_err);
  1716. stats->value[EFA_NO_COMPLETION_CMDS] = atomic64_read(&as->no_completion);
  1717. stats->value[EFA_KEEP_ALIVE_RCVD] = atomic64_read(&s->keep_alive_rcvd);
  1718. stats->value[EFA_ALLOC_PD_ERR] = atomic64_read(&s->alloc_pd_err);
  1719. stats->value[EFA_CREATE_QP_ERR] = atomic64_read(&s->create_qp_err);
  1720. stats->value[EFA_CREATE_CQ_ERR] = atomic64_read(&s->create_cq_err);
  1721. stats->value[EFA_REG_MR_ERR] = atomic64_read(&s->reg_mr_err);
  1722. stats->value[EFA_ALLOC_UCONTEXT_ERR] =
  1723. atomic64_read(&s->alloc_ucontext_err);
  1724. stats->value[EFA_CREATE_AH_ERR] = atomic64_read(&s->create_ah_err);
  1725. stats->value[EFA_MMAP_ERR] = atomic64_read(&s->mmap_err);
  1726. return ARRAY_SIZE(efa_device_stats_descs);
  1727. }
  1728. static int efa_fill_port_stats(struct efa_dev *dev, struct rdma_hw_stats *stats,
  1729. u32 port_num)
  1730. {
  1731. struct efa_com_get_stats_params params = {};
  1732. union efa_com_get_stats_result result;
  1733. struct efa_com_rdma_read_stats *rrs;
  1734. struct efa_com_messages_stats *ms;
  1735. struct efa_com_basic_stats *bs;
  1736. int err;
  1737. params.scope = EFA_ADMIN_GET_STATS_SCOPE_ALL;
  1738. params.type = EFA_ADMIN_GET_STATS_TYPE_BASIC;
  1739. err = efa_com_get_stats(&dev->edev, &params, &result);
  1740. if (err)
  1741. return err;
  1742. bs = &result.basic_stats;
  1743. stats->value[EFA_TX_BYTES] = bs->tx_bytes;
  1744. stats->value[EFA_TX_PKTS] = bs->tx_pkts;
  1745. stats->value[EFA_RX_BYTES] = bs->rx_bytes;
  1746. stats->value[EFA_RX_PKTS] = bs->rx_pkts;
  1747. stats->value[EFA_RX_DROPS] = bs->rx_drops;
  1748. params.type = EFA_ADMIN_GET_STATS_TYPE_MESSAGES;
  1749. err = efa_com_get_stats(&dev->edev, &params, &result);
  1750. if (err)
  1751. return err;
  1752. ms = &result.messages_stats;
  1753. stats->value[EFA_SEND_BYTES] = ms->send_bytes;
  1754. stats->value[EFA_SEND_WRS] = ms->send_wrs;
  1755. stats->value[EFA_RECV_BYTES] = ms->recv_bytes;
  1756. stats->value[EFA_RECV_WRS] = ms->recv_wrs;
  1757. params.type = EFA_ADMIN_GET_STATS_TYPE_RDMA_READ;
  1758. err = efa_com_get_stats(&dev->edev, &params, &result);
  1759. if (err)
  1760. return err;
  1761. rrs = &result.rdma_read_stats;
  1762. stats->value[EFA_RDMA_READ_WRS] = rrs->read_wrs;
  1763. stats->value[EFA_RDMA_READ_BYTES] = rrs->read_bytes;
  1764. stats->value[EFA_RDMA_READ_WR_ERR] = rrs->read_wr_err;
  1765. stats->value[EFA_RDMA_READ_RESP_BYTES] = rrs->read_resp_bytes;
  1766. return ARRAY_SIZE(efa_port_stats_descs);
  1767. }
  1768. int efa_get_hw_stats(struct ib_device *ibdev, struct rdma_hw_stats *stats,
  1769. u32 port_num, int index)
  1770. {
  1771. if (port_num)
  1772. return efa_fill_port_stats(to_edev(ibdev), stats, port_num);
  1773. else
  1774. return efa_fill_device_stats(to_edev(ibdev), stats);
  1775. }
  1776. enum rdma_link_layer efa_port_link_layer(struct ib_device *ibdev,
  1777. u32 port_num)
  1778. {
  1779. return IB_LINK_LAYER_UNSPECIFIED;
  1780. }