master.c 70 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2018 Cadence Design Systems Inc.
  4. *
  5. * Author: Boris Brezillon <[email protected]>
  6. */
  7. #include <linux/atomic.h>
  8. #include <linux/bug.h>
  9. #include <linux/device.h>
  10. #include <linux/err.h>
  11. #include <linux/export.h>
  12. #include <linux/kernel.h>
  13. #include <linux/list.h>
  14. #include <linux/of.h>
  15. #include <linux/slab.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/workqueue.h>
  18. #include "internals.h"
  19. static DEFINE_IDR(i3c_bus_idr);
  20. static DEFINE_MUTEX(i3c_core_lock);
  21. /**
  22. * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
  23. * @bus: I3C bus to take the lock on
  24. *
  25. * This function takes the bus lock so that no other operations can occur on
  26. * the bus. This is needed for all kind of bus maintenance operation, like
  27. * - enabling/disabling slave events
  28. * - re-triggering DAA
  29. * - changing the dynamic address of a device
  30. * - relinquishing mastership
  31. * - ...
  32. *
  33. * The reason for this kind of locking is that we don't want drivers and core
  34. * logic to rely on I3C device information that could be changed behind their
  35. * back.
  36. */
  37. static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
  38. {
  39. down_write(&bus->lock);
  40. }
  41. /**
  42. * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
  43. * operation
  44. * @bus: I3C bus to release the lock on
  45. *
  46. * Should be called when the bus maintenance operation is done. See
  47. * i3c_bus_maintenance_lock() for more details on what these maintenance
  48. * operations are.
  49. */
  50. static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
  51. {
  52. up_write(&bus->lock);
  53. }
  54. /**
  55. * i3c_bus_normaluse_lock - Lock the bus for a normal operation
  56. * @bus: I3C bus to take the lock on
  57. *
  58. * This function takes the bus lock for any operation that is not a maintenance
  59. * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
  60. * maintenance operations). Basically all communications with I3C devices are
  61. * normal operations (HDR, SDR transfers or CCC commands that do not change bus
  62. * state or I3C dynamic address).
  63. *
  64. * Note that this lock is not guaranteeing serialization of normal operations.
  65. * In other words, transfer requests passed to the I3C master can be submitted
  66. * in parallel and I3C master drivers have to use their own locking to make
  67. * sure two different communications are not inter-mixed, or access to the
  68. * output/input queue is not done while the engine is busy.
  69. */
  70. void i3c_bus_normaluse_lock(struct i3c_bus *bus)
  71. {
  72. down_read(&bus->lock);
  73. }
  74. /**
  75. * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
  76. * @bus: I3C bus to release the lock on
  77. *
  78. * Should be called when a normal operation is done. See
  79. * i3c_bus_normaluse_lock() for more details on what these normal operations
  80. * are.
  81. */
  82. void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
  83. {
  84. up_read(&bus->lock);
  85. }
  86. static struct i3c_master_controller *
  87. i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
  88. {
  89. return container_of(i3cbus, struct i3c_master_controller, bus);
  90. }
  91. static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
  92. {
  93. return container_of(dev, struct i3c_master_controller, dev);
  94. }
  95. static const struct device_type i3c_device_type;
  96. static struct i3c_bus *dev_to_i3cbus(struct device *dev)
  97. {
  98. struct i3c_master_controller *master;
  99. if (dev->type == &i3c_device_type)
  100. return dev_to_i3cdev(dev)->bus;
  101. master = dev_to_i3cmaster(dev);
  102. return &master->bus;
  103. }
  104. static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
  105. {
  106. struct i3c_master_controller *master;
  107. if (dev->type == &i3c_device_type)
  108. return dev_to_i3cdev(dev)->desc;
  109. master = dev_to_i3cmaster(dev);
  110. return master->this;
  111. }
  112. static ssize_t bcr_show(struct device *dev,
  113. struct device_attribute *da,
  114. char *buf)
  115. {
  116. struct i3c_bus *bus = dev_to_i3cbus(dev);
  117. struct i3c_dev_desc *desc;
  118. ssize_t ret;
  119. i3c_bus_normaluse_lock(bus);
  120. desc = dev_to_i3cdesc(dev);
  121. ret = sprintf(buf, "%x\n", desc->info.bcr);
  122. i3c_bus_normaluse_unlock(bus);
  123. return ret;
  124. }
  125. static DEVICE_ATTR_RO(bcr);
  126. static ssize_t dcr_show(struct device *dev,
  127. struct device_attribute *da,
  128. char *buf)
  129. {
  130. struct i3c_bus *bus = dev_to_i3cbus(dev);
  131. struct i3c_dev_desc *desc;
  132. ssize_t ret;
  133. i3c_bus_normaluse_lock(bus);
  134. desc = dev_to_i3cdesc(dev);
  135. ret = sprintf(buf, "%x\n", desc->info.dcr);
  136. i3c_bus_normaluse_unlock(bus);
  137. return ret;
  138. }
  139. static DEVICE_ATTR_RO(dcr);
  140. static ssize_t pid_show(struct device *dev,
  141. struct device_attribute *da,
  142. char *buf)
  143. {
  144. struct i3c_bus *bus = dev_to_i3cbus(dev);
  145. struct i3c_dev_desc *desc;
  146. ssize_t ret;
  147. i3c_bus_normaluse_lock(bus);
  148. desc = dev_to_i3cdesc(dev);
  149. ret = sprintf(buf, "%llx\n", desc->info.pid);
  150. i3c_bus_normaluse_unlock(bus);
  151. return ret;
  152. }
  153. static DEVICE_ATTR_RO(pid);
  154. static ssize_t dynamic_address_show(struct device *dev,
  155. struct device_attribute *da,
  156. char *buf)
  157. {
  158. struct i3c_bus *bus = dev_to_i3cbus(dev);
  159. struct i3c_dev_desc *desc;
  160. ssize_t ret;
  161. i3c_bus_normaluse_lock(bus);
  162. desc = dev_to_i3cdesc(dev);
  163. ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
  164. i3c_bus_normaluse_unlock(bus);
  165. return ret;
  166. }
  167. static DEVICE_ATTR_RO(dynamic_address);
  168. static const char * const hdrcap_strings[] = {
  169. "hdr-ddr", "hdr-tsp", "hdr-tsl",
  170. };
  171. static ssize_t hdrcap_show(struct device *dev,
  172. struct device_attribute *da,
  173. char *buf)
  174. {
  175. struct i3c_bus *bus = dev_to_i3cbus(dev);
  176. struct i3c_dev_desc *desc;
  177. ssize_t offset = 0, ret;
  178. unsigned long caps;
  179. int mode;
  180. i3c_bus_normaluse_lock(bus);
  181. desc = dev_to_i3cdesc(dev);
  182. caps = desc->info.hdr_cap;
  183. for_each_set_bit(mode, &caps, 8) {
  184. if (mode >= ARRAY_SIZE(hdrcap_strings))
  185. break;
  186. if (!hdrcap_strings[mode])
  187. continue;
  188. ret = sprintf(buf + offset, offset ? " %s" : "%s",
  189. hdrcap_strings[mode]);
  190. if (ret < 0)
  191. goto out;
  192. offset += ret;
  193. }
  194. ret = sprintf(buf + offset, "\n");
  195. if (ret < 0)
  196. goto out;
  197. ret = offset + ret;
  198. out:
  199. i3c_bus_normaluse_unlock(bus);
  200. return ret;
  201. }
  202. static DEVICE_ATTR_RO(hdrcap);
  203. static ssize_t modalias_show(struct device *dev,
  204. struct device_attribute *da, char *buf)
  205. {
  206. struct i3c_device *i3c = dev_to_i3cdev(dev);
  207. struct i3c_device_info devinfo;
  208. u16 manuf, part, ext;
  209. i3c_device_get_info(i3c, &devinfo);
  210. manuf = I3C_PID_MANUF_ID(devinfo.pid);
  211. part = I3C_PID_PART_ID(devinfo.pid);
  212. ext = I3C_PID_EXTRA_INFO(devinfo.pid);
  213. if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
  214. return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr,
  215. manuf);
  216. return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
  217. devinfo.dcr, manuf, part, ext);
  218. }
  219. static DEVICE_ATTR_RO(modalias);
  220. static struct attribute *i3c_device_attrs[] = {
  221. &dev_attr_bcr.attr,
  222. &dev_attr_dcr.attr,
  223. &dev_attr_pid.attr,
  224. &dev_attr_dynamic_address.attr,
  225. &dev_attr_hdrcap.attr,
  226. &dev_attr_modalias.attr,
  227. NULL,
  228. };
  229. ATTRIBUTE_GROUPS(i3c_device);
  230. static int i3c_device_uevent(struct device *dev, struct kobj_uevent_env *env)
  231. {
  232. struct i3c_device *i3cdev = dev_to_i3cdev(dev);
  233. struct i3c_device_info devinfo;
  234. u16 manuf, part, ext;
  235. i3c_device_get_info(i3cdev, &devinfo);
  236. manuf = I3C_PID_MANUF_ID(devinfo.pid);
  237. part = I3C_PID_PART_ID(devinfo.pid);
  238. ext = I3C_PID_EXTRA_INFO(devinfo.pid);
  239. if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
  240. return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
  241. devinfo.dcr, manuf);
  242. return add_uevent_var(env,
  243. "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
  244. devinfo.dcr, manuf, part, ext);
  245. }
  246. static const struct device_type i3c_device_type = {
  247. .groups = i3c_device_groups,
  248. .uevent = i3c_device_uevent,
  249. };
  250. static int i3c_device_match(struct device *dev, struct device_driver *drv)
  251. {
  252. struct i3c_device *i3cdev;
  253. struct i3c_driver *i3cdrv;
  254. if (dev->type != &i3c_device_type)
  255. return 0;
  256. i3cdev = dev_to_i3cdev(dev);
  257. i3cdrv = drv_to_i3cdrv(drv);
  258. if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
  259. return 1;
  260. return 0;
  261. }
  262. static int i3c_device_probe(struct device *dev)
  263. {
  264. struct i3c_device *i3cdev = dev_to_i3cdev(dev);
  265. struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
  266. return driver->probe(i3cdev);
  267. }
  268. static void i3c_device_remove(struct device *dev)
  269. {
  270. struct i3c_device *i3cdev = dev_to_i3cdev(dev);
  271. struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
  272. if (driver->remove)
  273. driver->remove(i3cdev);
  274. i3c_device_free_ibi(i3cdev);
  275. }
  276. struct bus_type i3c_bus_type = {
  277. .name = "i3c",
  278. .match = i3c_device_match,
  279. .probe = i3c_device_probe,
  280. .remove = i3c_device_remove,
  281. };
  282. static enum i3c_addr_slot_status
  283. i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
  284. {
  285. unsigned long status;
  286. int bitpos = addr * 2;
  287. if (addr > I2C_MAX_ADDR)
  288. return I3C_ADDR_SLOT_RSVD;
  289. status = bus->addrslots[bitpos / BITS_PER_LONG];
  290. status >>= bitpos % BITS_PER_LONG;
  291. return status & I3C_ADDR_SLOT_STATUS_MASK;
  292. }
  293. static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
  294. enum i3c_addr_slot_status status)
  295. {
  296. int bitpos = addr * 2;
  297. unsigned long *ptr;
  298. if (addr > I2C_MAX_ADDR)
  299. return;
  300. ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
  301. *ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK <<
  302. (bitpos % BITS_PER_LONG));
  303. *ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG);
  304. }
  305. static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
  306. {
  307. enum i3c_addr_slot_status status;
  308. status = i3c_bus_get_addr_slot_status(bus, addr);
  309. return status == I3C_ADDR_SLOT_FREE;
  310. }
  311. static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
  312. {
  313. enum i3c_addr_slot_status status;
  314. u8 addr;
  315. for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
  316. status = i3c_bus_get_addr_slot_status(bus, addr);
  317. if (status == I3C_ADDR_SLOT_FREE)
  318. return addr;
  319. }
  320. return -ENOMEM;
  321. }
  322. static void i3c_bus_init_addrslots(struct i3c_bus *bus)
  323. {
  324. int i;
  325. /* Addresses 0 to 7 are reserved. */
  326. for (i = 0; i < 8; i++)
  327. i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
  328. /*
  329. * Reserve broadcast address and all addresses that might collide
  330. * with the broadcast address when facing a single bit error.
  331. */
  332. i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
  333. I3C_ADDR_SLOT_RSVD);
  334. for (i = 0; i < 7; i++)
  335. i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
  336. I3C_ADDR_SLOT_RSVD);
  337. }
  338. static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
  339. {
  340. mutex_lock(&i3c_core_lock);
  341. idr_remove(&i3c_bus_idr, i3cbus->id);
  342. mutex_unlock(&i3c_core_lock);
  343. }
  344. static int i3c_bus_init(struct i3c_bus *i3cbus)
  345. {
  346. int ret;
  347. init_rwsem(&i3cbus->lock);
  348. INIT_LIST_HEAD(&i3cbus->devs.i2c);
  349. INIT_LIST_HEAD(&i3cbus->devs.i3c);
  350. i3c_bus_init_addrslots(i3cbus);
  351. i3cbus->mode = I3C_BUS_MODE_PURE;
  352. mutex_lock(&i3c_core_lock);
  353. ret = idr_alloc(&i3c_bus_idr, i3cbus, 0, 0, GFP_KERNEL);
  354. mutex_unlock(&i3c_core_lock);
  355. if (ret < 0)
  356. return ret;
  357. i3cbus->id = ret;
  358. return 0;
  359. }
  360. static const char * const i3c_bus_mode_strings[] = {
  361. [I3C_BUS_MODE_PURE] = "pure",
  362. [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
  363. [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
  364. [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
  365. };
  366. static ssize_t mode_show(struct device *dev,
  367. struct device_attribute *da,
  368. char *buf)
  369. {
  370. struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
  371. ssize_t ret;
  372. i3c_bus_normaluse_lock(i3cbus);
  373. if (i3cbus->mode < 0 ||
  374. i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
  375. !i3c_bus_mode_strings[i3cbus->mode])
  376. ret = sprintf(buf, "unknown\n");
  377. else
  378. ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
  379. i3c_bus_normaluse_unlock(i3cbus);
  380. return ret;
  381. }
  382. static DEVICE_ATTR_RO(mode);
  383. static ssize_t current_master_show(struct device *dev,
  384. struct device_attribute *da,
  385. char *buf)
  386. {
  387. struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
  388. ssize_t ret;
  389. i3c_bus_normaluse_lock(i3cbus);
  390. ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
  391. i3cbus->cur_master->info.pid);
  392. i3c_bus_normaluse_unlock(i3cbus);
  393. return ret;
  394. }
  395. static DEVICE_ATTR_RO(current_master);
  396. static ssize_t i3c_scl_frequency_show(struct device *dev,
  397. struct device_attribute *da,
  398. char *buf)
  399. {
  400. struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
  401. ssize_t ret;
  402. i3c_bus_normaluse_lock(i3cbus);
  403. ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
  404. i3c_bus_normaluse_unlock(i3cbus);
  405. return ret;
  406. }
  407. static DEVICE_ATTR_RO(i3c_scl_frequency);
  408. static ssize_t i2c_scl_frequency_show(struct device *dev,
  409. struct device_attribute *da,
  410. char *buf)
  411. {
  412. struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
  413. ssize_t ret;
  414. i3c_bus_normaluse_lock(i3cbus);
  415. ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
  416. i3c_bus_normaluse_unlock(i3cbus);
  417. return ret;
  418. }
  419. static DEVICE_ATTR_RO(i2c_scl_frequency);
  420. static struct attribute *i3c_masterdev_attrs[] = {
  421. &dev_attr_mode.attr,
  422. &dev_attr_current_master.attr,
  423. &dev_attr_i3c_scl_frequency.attr,
  424. &dev_attr_i2c_scl_frequency.attr,
  425. &dev_attr_bcr.attr,
  426. &dev_attr_dcr.attr,
  427. &dev_attr_pid.attr,
  428. &dev_attr_dynamic_address.attr,
  429. &dev_attr_hdrcap.attr,
  430. NULL,
  431. };
  432. ATTRIBUTE_GROUPS(i3c_masterdev);
  433. static void i3c_masterdev_release(struct device *dev)
  434. {
  435. struct i3c_master_controller *master = dev_to_i3cmaster(dev);
  436. struct i3c_bus *bus = dev_to_i3cbus(dev);
  437. if (master->wq)
  438. destroy_workqueue(master->wq);
  439. WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
  440. i3c_bus_cleanup(bus);
  441. of_node_put(dev->of_node);
  442. }
  443. static const struct device_type i3c_masterdev_type = {
  444. .groups = i3c_masterdev_groups,
  445. };
  446. static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
  447. unsigned long max_i2c_scl_rate)
  448. {
  449. struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
  450. i3cbus->mode = mode;
  451. switch (i3cbus->mode) {
  452. case I3C_BUS_MODE_PURE:
  453. if (!i3cbus->scl_rate.i3c)
  454. i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
  455. break;
  456. case I3C_BUS_MODE_MIXED_FAST:
  457. case I3C_BUS_MODE_MIXED_LIMITED:
  458. if (!i3cbus->scl_rate.i3c)
  459. i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
  460. if (!i3cbus->scl_rate.i2c)
  461. i3cbus->scl_rate.i2c = max_i2c_scl_rate;
  462. break;
  463. case I3C_BUS_MODE_MIXED_SLOW:
  464. if (!i3cbus->scl_rate.i2c)
  465. i3cbus->scl_rate.i2c = max_i2c_scl_rate;
  466. if (!i3cbus->scl_rate.i3c ||
  467. i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
  468. i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
  469. break;
  470. default:
  471. return -EINVAL;
  472. }
  473. dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
  474. i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
  475. /*
  476. * I3C/I2C frequency may have been overridden, check that user-provided
  477. * values are not exceeding max possible frequency.
  478. */
  479. if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
  480. i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
  481. return -EINVAL;
  482. return 0;
  483. }
  484. static struct i3c_master_controller *
  485. i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
  486. {
  487. return container_of(adap, struct i3c_master_controller, i2c);
  488. }
  489. static struct i2c_adapter *
  490. i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
  491. {
  492. return &master->i2c;
  493. }
  494. static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
  495. {
  496. kfree(dev);
  497. }
  498. static struct i2c_dev_desc *
  499. i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
  500. u16 addr, u8 lvr)
  501. {
  502. struct i2c_dev_desc *dev;
  503. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  504. if (!dev)
  505. return ERR_PTR(-ENOMEM);
  506. dev->common.master = master;
  507. dev->addr = addr;
  508. dev->lvr = lvr;
  509. return dev;
  510. }
  511. static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
  512. u16 payloadlen)
  513. {
  514. dest->addr = addr;
  515. dest->payload.len = payloadlen;
  516. if (payloadlen)
  517. dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
  518. else
  519. dest->payload.data = NULL;
  520. return dest->payload.data;
  521. }
  522. static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
  523. {
  524. kfree(dest->payload.data);
  525. }
  526. static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
  527. struct i3c_ccc_cmd_dest *dests,
  528. unsigned int ndests)
  529. {
  530. cmd->rnw = rnw ? 1 : 0;
  531. cmd->id = id;
  532. cmd->dests = dests;
  533. cmd->ndests = ndests;
  534. cmd->err = I3C_ERROR_UNKNOWN;
  535. }
  536. static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
  537. struct i3c_ccc_cmd *cmd)
  538. {
  539. int ret;
  540. if (!cmd || !master)
  541. return -EINVAL;
  542. if (WARN_ON(master->init_done &&
  543. !rwsem_is_locked(&master->bus.lock)))
  544. return -EINVAL;
  545. if (!master->ops->send_ccc_cmd)
  546. return -ENOTSUPP;
  547. if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
  548. return -EINVAL;
  549. if (master->ops->supports_ccc_cmd &&
  550. !master->ops->supports_ccc_cmd(master, cmd))
  551. return -ENOTSUPP;
  552. ret = master->ops->send_ccc_cmd(master, cmd);
  553. if (ret) {
  554. if (cmd->err != I3C_ERROR_UNKNOWN)
  555. return cmd->err;
  556. return ret;
  557. }
  558. return 0;
  559. }
  560. static struct i2c_dev_desc *
  561. i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
  562. u16 addr)
  563. {
  564. struct i2c_dev_desc *dev;
  565. i3c_bus_for_each_i2cdev(&master->bus, dev) {
  566. if (dev->addr == addr)
  567. return dev;
  568. }
  569. return NULL;
  570. }
  571. /**
  572. * i3c_master_get_free_addr() - get a free address on the bus
  573. * @master: I3C master object
  574. * @start_addr: where to start searching
  575. *
  576. * This function must be called with the bus lock held in write mode.
  577. *
  578. * Return: the first free address starting at @start_addr (included) or -ENOMEM
  579. * if there's no more address available.
  580. */
  581. int i3c_master_get_free_addr(struct i3c_master_controller *master,
  582. u8 start_addr)
  583. {
  584. return i3c_bus_get_free_addr(&master->bus, start_addr);
  585. }
  586. EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
  587. static void i3c_device_release(struct device *dev)
  588. {
  589. struct i3c_device *i3cdev = dev_to_i3cdev(dev);
  590. WARN_ON(i3cdev->desc);
  591. of_node_put(i3cdev->dev.of_node);
  592. kfree(i3cdev);
  593. }
  594. static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
  595. {
  596. kfree(dev);
  597. }
  598. static struct i3c_dev_desc *
  599. i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
  600. const struct i3c_device_info *info)
  601. {
  602. struct i3c_dev_desc *dev;
  603. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  604. if (!dev)
  605. return ERR_PTR(-ENOMEM);
  606. dev->common.master = master;
  607. dev->info = *info;
  608. mutex_init(&dev->ibi_lock);
  609. return dev;
  610. }
  611. static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
  612. u8 addr)
  613. {
  614. enum i3c_addr_slot_status addrstat;
  615. struct i3c_ccc_cmd_dest dest;
  616. struct i3c_ccc_cmd cmd;
  617. int ret;
  618. if (!master)
  619. return -EINVAL;
  620. addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
  621. if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
  622. return -EINVAL;
  623. i3c_ccc_cmd_dest_init(&dest, addr, 0);
  624. i3c_ccc_cmd_init(&cmd, false,
  625. I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
  626. &dest, 1);
  627. ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
  628. i3c_ccc_cmd_dest_cleanup(&dest);
  629. return ret;
  630. }
  631. /**
  632. * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
  633. * procedure
  634. * @master: master used to send frames on the bus
  635. *
  636. * Send a ENTDAA CCC command to start a DAA procedure.
  637. *
  638. * Note that this function only sends the ENTDAA CCC command, all the logic
  639. * behind dynamic address assignment has to be handled in the I3C master
  640. * driver.
  641. *
  642. * This function must be called with the bus lock held in write mode.
  643. *
  644. * Return: 0 in case of success, a positive I3C error code if the error is
  645. * one of the official Mx error codes, and a negative error code otherwise.
  646. */
  647. int i3c_master_entdaa_locked(struct i3c_master_controller *master)
  648. {
  649. struct i3c_ccc_cmd_dest dest;
  650. struct i3c_ccc_cmd cmd;
  651. int ret;
  652. i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
  653. i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
  654. ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
  655. i3c_ccc_cmd_dest_cleanup(&dest);
  656. return ret;
  657. }
  658. EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
  659. static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
  660. u8 addr, bool enable, u8 evts)
  661. {
  662. struct i3c_ccc_events *events;
  663. struct i3c_ccc_cmd_dest dest;
  664. struct i3c_ccc_cmd cmd;
  665. int ret;
  666. events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
  667. if (!events)
  668. return -ENOMEM;
  669. events->events = evts;
  670. i3c_ccc_cmd_init(&cmd, false,
  671. enable ?
  672. I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
  673. I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
  674. &dest, 1);
  675. ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
  676. i3c_ccc_cmd_dest_cleanup(&dest);
  677. return ret;
  678. }
  679. /**
  680. * i3c_master_disec_locked() - send a DISEC CCC command
  681. * @master: master used to send frames on the bus
  682. * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
  683. * @evts: events to disable
  684. *
  685. * Send a DISEC CCC command to disable some or all events coming from a
  686. * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
  687. *
  688. * This function must be called with the bus lock held in write mode.
  689. *
  690. * Return: 0 in case of success, a positive I3C error code if the error is
  691. * one of the official Mx error codes, and a negative error code otherwise.
  692. */
  693. int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
  694. u8 evts)
  695. {
  696. return i3c_master_enec_disec_locked(master, addr, false, evts);
  697. }
  698. EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
  699. /**
  700. * i3c_master_enec_locked() - send an ENEC CCC command
  701. * @master: master used to send frames on the bus
  702. * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
  703. * @evts: events to disable
  704. *
  705. * Sends an ENEC CCC command to enable some or all events coming from a
  706. * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
  707. *
  708. * This function must be called with the bus lock held in write mode.
  709. *
  710. * Return: 0 in case of success, a positive I3C error code if the error is
  711. * one of the official Mx error codes, and a negative error code otherwise.
  712. */
  713. int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
  714. u8 evts)
  715. {
  716. return i3c_master_enec_disec_locked(master, addr, true, evts);
  717. }
  718. EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
  719. /**
  720. * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
  721. * @master: master used to send frames on the bus
  722. *
  723. * Send a DEFSLVS CCC command containing all the devices known to the @master.
  724. * This is useful when you have secondary masters on the bus to propagate
  725. * device information.
  726. *
  727. * This should be called after all I3C devices have been discovered (in other
  728. * words, after the DAA procedure has finished) and instantiated in
  729. * &i3c_master_controller_ops->bus_init().
  730. * It should also be called if a master ACKed an Hot-Join request and assigned
  731. * a dynamic address to the device joining the bus.
  732. *
  733. * This function must be called with the bus lock held in write mode.
  734. *
  735. * Return: 0 in case of success, a positive I3C error code if the error is
  736. * one of the official Mx error codes, and a negative error code otherwise.
  737. */
  738. int i3c_master_defslvs_locked(struct i3c_master_controller *master)
  739. {
  740. struct i3c_ccc_defslvs *defslvs;
  741. struct i3c_ccc_dev_desc *desc;
  742. struct i3c_ccc_cmd_dest dest;
  743. struct i3c_dev_desc *i3cdev;
  744. struct i2c_dev_desc *i2cdev;
  745. struct i3c_ccc_cmd cmd;
  746. struct i3c_bus *bus;
  747. bool send = false;
  748. int ndevs = 0, ret;
  749. if (!master)
  750. return -EINVAL;
  751. bus = i3c_master_get_bus(master);
  752. i3c_bus_for_each_i3cdev(bus, i3cdev) {
  753. ndevs++;
  754. if (i3cdev == master->this)
  755. continue;
  756. if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
  757. I3C_BCR_I3C_MASTER)
  758. send = true;
  759. }
  760. /* No other master on the bus, skip DEFSLVS. */
  761. if (!send)
  762. return 0;
  763. i3c_bus_for_each_i2cdev(bus, i2cdev)
  764. ndevs++;
  765. defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
  766. struct_size(defslvs, slaves,
  767. ndevs - 1));
  768. if (!defslvs)
  769. return -ENOMEM;
  770. defslvs->count = ndevs;
  771. defslvs->master.bcr = master->this->info.bcr;
  772. defslvs->master.dcr = master->this->info.dcr;
  773. defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
  774. defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
  775. desc = defslvs->slaves;
  776. i3c_bus_for_each_i2cdev(bus, i2cdev) {
  777. desc->lvr = i2cdev->lvr;
  778. desc->static_addr = i2cdev->addr << 1;
  779. desc++;
  780. }
  781. i3c_bus_for_each_i3cdev(bus, i3cdev) {
  782. /* Skip the I3C dev representing this master. */
  783. if (i3cdev == master->this)
  784. continue;
  785. desc->bcr = i3cdev->info.bcr;
  786. desc->dcr = i3cdev->info.dcr;
  787. desc->dyn_addr = i3cdev->info.dyn_addr << 1;
  788. desc->static_addr = i3cdev->info.static_addr << 1;
  789. desc++;
  790. }
  791. i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
  792. ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
  793. i3c_ccc_cmd_dest_cleanup(&dest);
  794. return ret;
  795. }
  796. EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
  797. static int i3c_master_setda_locked(struct i3c_master_controller *master,
  798. u8 oldaddr, u8 newaddr, bool setdasa)
  799. {
  800. struct i3c_ccc_cmd_dest dest;
  801. struct i3c_ccc_setda *setda;
  802. struct i3c_ccc_cmd cmd;
  803. int ret;
  804. if (!oldaddr || !newaddr)
  805. return -EINVAL;
  806. setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
  807. if (!setda)
  808. return -ENOMEM;
  809. setda->addr = newaddr << 1;
  810. i3c_ccc_cmd_init(&cmd, false,
  811. setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
  812. &dest, 1);
  813. ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
  814. i3c_ccc_cmd_dest_cleanup(&dest);
  815. return ret;
  816. }
  817. static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
  818. u8 static_addr, u8 dyn_addr)
  819. {
  820. return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
  821. }
  822. static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
  823. u8 oldaddr, u8 newaddr)
  824. {
  825. return i3c_master_setda_locked(master, oldaddr, newaddr, false);
  826. }
  827. static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
  828. struct i3c_device_info *info)
  829. {
  830. struct i3c_ccc_cmd_dest dest;
  831. struct i3c_ccc_mrl *mrl;
  832. struct i3c_ccc_cmd cmd;
  833. int ret;
  834. mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
  835. if (!mrl)
  836. return -ENOMEM;
  837. /*
  838. * When the device does not have IBI payload GETMRL only returns 2
  839. * bytes of data.
  840. */
  841. if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
  842. dest.payload.len -= 1;
  843. i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
  844. ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
  845. if (ret)
  846. goto out;
  847. switch (dest.payload.len) {
  848. case 3:
  849. info->max_ibi_len = mrl->ibi_len;
  850. fallthrough;
  851. case 2:
  852. info->max_read_len = be16_to_cpu(mrl->read_len);
  853. break;
  854. default:
  855. ret = -EIO;
  856. goto out;
  857. }
  858. out:
  859. i3c_ccc_cmd_dest_cleanup(&dest);
  860. return ret;
  861. }
  862. static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
  863. struct i3c_device_info *info)
  864. {
  865. struct i3c_ccc_cmd_dest dest;
  866. struct i3c_ccc_mwl *mwl;
  867. struct i3c_ccc_cmd cmd;
  868. int ret;
  869. mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
  870. if (!mwl)
  871. return -ENOMEM;
  872. i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
  873. ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
  874. if (ret)
  875. goto out;
  876. if (dest.payload.len != sizeof(*mwl)) {
  877. ret = -EIO;
  878. goto out;
  879. }
  880. info->max_write_len = be16_to_cpu(mwl->len);
  881. out:
  882. i3c_ccc_cmd_dest_cleanup(&dest);
  883. return ret;
  884. }
  885. static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
  886. struct i3c_device_info *info)
  887. {
  888. struct i3c_ccc_getmxds *getmaxds;
  889. struct i3c_ccc_cmd_dest dest;
  890. struct i3c_ccc_cmd cmd;
  891. int ret;
  892. getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
  893. sizeof(*getmaxds));
  894. if (!getmaxds)
  895. return -ENOMEM;
  896. i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
  897. ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
  898. if (ret)
  899. goto out;
  900. if (dest.payload.len != 2 && dest.payload.len != 5) {
  901. ret = -EIO;
  902. goto out;
  903. }
  904. info->max_read_ds = getmaxds->maxrd;
  905. info->max_write_ds = getmaxds->maxwr;
  906. if (dest.payload.len == 5)
  907. info->max_read_turnaround = getmaxds->maxrdturn[0] |
  908. ((u32)getmaxds->maxrdturn[1] << 8) |
  909. ((u32)getmaxds->maxrdturn[2] << 16);
  910. out:
  911. i3c_ccc_cmd_dest_cleanup(&dest);
  912. return ret;
  913. }
  914. static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
  915. struct i3c_device_info *info)
  916. {
  917. struct i3c_ccc_gethdrcap *gethdrcap;
  918. struct i3c_ccc_cmd_dest dest;
  919. struct i3c_ccc_cmd cmd;
  920. int ret;
  921. gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
  922. sizeof(*gethdrcap));
  923. if (!gethdrcap)
  924. return -ENOMEM;
  925. i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
  926. ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
  927. if (ret)
  928. goto out;
  929. if (dest.payload.len != 1) {
  930. ret = -EIO;
  931. goto out;
  932. }
  933. info->hdr_cap = gethdrcap->modes;
  934. out:
  935. i3c_ccc_cmd_dest_cleanup(&dest);
  936. return ret;
  937. }
  938. static int i3c_master_getpid_locked(struct i3c_master_controller *master,
  939. struct i3c_device_info *info)
  940. {
  941. struct i3c_ccc_getpid *getpid;
  942. struct i3c_ccc_cmd_dest dest;
  943. struct i3c_ccc_cmd cmd;
  944. int ret, i;
  945. getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
  946. if (!getpid)
  947. return -ENOMEM;
  948. i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
  949. ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
  950. if (ret)
  951. goto out;
  952. info->pid = 0;
  953. for (i = 0; i < sizeof(getpid->pid); i++) {
  954. int sft = (sizeof(getpid->pid) - i - 1) * 8;
  955. info->pid |= (u64)getpid->pid[i] << sft;
  956. }
  957. out:
  958. i3c_ccc_cmd_dest_cleanup(&dest);
  959. return ret;
  960. }
  961. static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
  962. struct i3c_device_info *info)
  963. {
  964. struct i3c_ccc_getbcr *getbcr;
  965. struct i3c_ccc_cmd_dest dest;
  966. struct i3c_ccc_cmd cmd;
  967. int ret;
  968. getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
  969. if (!getbcr)
  970. return -ENOMEM;
  971. i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
  972. ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
  973. if (ret)
  974. goto out;
  975. info->bcr = getbcr->bcr;
  976. out:
  977. i3c_ccc_cmd_dest_cleanup(&dest);
  978. return ret;
  979. }
  980. static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
  981. struct i3c_device_info *info)
  982. {
  983. struct i3c_ccc_getdcr *getdcr;
  984. struct i3c_ccc_cmd_dest dest;
  985. struct i3c_ccc_cmd cmd;
  986. int ret;
  987. getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
  988. if (!getdcr)
  989. return -ENOMEM;
  990. i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
  991. ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
  992. if (ret)
  993. goto out;
  994. info->dcr = getdcr->dcr;
  995. out:
  996. i3c_ccc_cmd_dest_cleanup(&dest);
  997. return ret;
  998. }
  999. static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
  1000. {
  1001. struct i3c_master_controller *master = i3c_dev_get_master(dev);
  1002. enum i3c_addr_slot_status slot_status;
  1003. int ret;
  1004. if (!dev->info.dyn_addr)
  1005. return -EINVAL;
  1006. slot_status = i3c_bus_get_addr_slot_status(&master->bus,
  1007. dev->info.dyn_addr);
  1008. if (slot_status == I3C_ADDR_SLOT_RSVD ||
  1009. slot_status == I3C_ADDR_SLOT_I2C_DEV)
  1010. return -EINVAL;
  1011. ret = i3c_master_getpid_locked(master, &dev->info);
  1012. if (ret)
  1013. return ret;
  1014. ret = i3c_master_getbcr_locked(master, &dev->info);
  1015. if (ret)
  1016. return ret;
  1017. ret = i3c_master_getdcr_locked(master, &dev->info);
  1018. if (ret)
  1019. return ret;
  1020. if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
  1021. ret = i3c_master_getmxds_locked(master, &dev->info);
  1022. if (ret)
  1023. return ret;
  1024. }
  1025. if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
  1026. dev->info.max_ibi_len = 1;
  1027. i3c_master_getmrl_locked(master, &dev->info);
  1028. i3c_master_getmwl_locked(master, &dev->info);
  1029. if (dev->info.bcr & I3C_BCR_HDR_CAP) {
  1030. ret = i3c_master_gethdrcap_locked(master, &dev->info);
  1031. if (ret)
  1032. return ret;
  1033. }
  1034. return 0;
  1035. }
  1036. static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
  1037. {
  1038. struct i3c_master_controller *master = i3c_dev_get_master(dev);
  1039. if (dev->info.static_addr)
  1040. i3c_bus_set_addr_slot_status(&master->bus,
  1041. dev->info.static_addr,
  1042. I3C_ADDR_SLOT_FREE);
  1043. if (dev->info.dyn_addr)
  1044. i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
  1045. I3C_ADDR_SLOT_FREE);
  1046. if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
  1047. i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
  1048. I3C_ADDR_SLOT_FREE);
  1049. }
  1050. static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
  1051. {
  1052. struct i3c_master_controller *master = i3c_dev_get_master(dev);
  1053. enum i3c_addr_slot_status status;
  1054. if (!dev->info.static_addr && !dev->info.dyn_addr)
  1055. return 0;
  1056. if (dev->info.static_addr) {
  1057. status = i3c_bus_get_addr_slot_status(&master->bus,
  1058. dev->info.static_addr);
  1059. if (status != I3C_ADDR_SLOT_FREE)
  1060. return -EBUSY;
  1061. i3c_bus_set_addr_slot_status(&master->bus,
  1062. dev->info.static_addr,
  1063. I3C_ADDR_SLOT_I3C_DEV);
  1064. }
  1065. /*
  1066. * ->init_dyn_addr should have been reserved before that, so, if we're
  1067. * trying to apply a pre-reserved dynamic address, we should not try
  1068. * to reserve the address slot a second time.
  1069. */
  1070. if (dev->info.dyn_addr &&
  1071. (!dev->boardinfo ||
  1072. dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
  1073. status = i3c_bus_get_addr_slot_status(&master->bus,
  1074. dev->info.dyn_addr);
  1075. if (status != I3C_ADDR_SLOT_FREE)
  1076. goto err_release_static_addr;
  1077. i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
  1078. I3C_ADDR_SLOT_I3C_DEV);
  1079. }
  1080. return 0;
  1081. err_release_static_addr:
  1082. if (dev->info.static_addr)
  1083. i3c_bus_set_addr_slot_status(&master->bus,
  1084. dev->info.static_addr,
  1085. I3C_ADDR_SLOT_FREE);
  1086. return -EBUSY;
  1087. }
  1088. static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
  1089. struct i3c_dev_desc *dev)
  1090. {
  1091. int ret;
  1092. /*
  1093. * We don't attach devices to the controller until they are
  1094. * addressable on the bus.
  1095. */
  1096. if (!dev->info.static_addr && !dev->info.dyn_addr)
  1097. return 0;
  1098. ret = i3c_master_get_i3c_addrs(dev);
  1099. if (ret)
  1100. return ret;
  1101. /* Do not attach the master device itself. */
  1102. if (master->this != dev && master->ops->attach_i3c_dev) {
  1103. ret = master->ops->attach_i3c_dev(dev);
  1104. if (ret) {
  1105. i3c_master_put_i3c_addrs(dev);
  1106. return ret;
  1107. }
  1108. }
  1109. list_add_tail(&dev->common.node, &master->bus.devs.i3c);
  1110. return 0;
  1111. }
  1112. static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
  1113. u8 old_dyn_addr)
  1114. {
  1115. struct i3c_master_controller *master = i3c_dev_get_master(dev);
  1116. enum i3c_addr_slot_status status;
  1117. int ret;
  1118. if (dev->info.dyn_addr != old_dyn_addr &&
  1119. (!dev->boardinfo ||
  1120. dev->info.dyn_addr != dev->boardinfo->init_dyn_addr)) {
  1121. status = i3c_bus_get_addr_slot_status(&master->bus,
  1122. dev->info.dyn_addr);
  1123. if (status != I3C_ADDR_SLOT_FREE)
  1124. return -EBUSY;
  1125. i3c_bus_set_addr_slot_status(&master->bus,
  1126. dev->info.dyn_addr,
  1127. I3C_ADDR_SLOT_I3C_DEV);
  1128. if (old_dyn_addr)
  1129. i3c_bus_set_addr_slot_status(&master->bus, old_dyn_addr,
  1130. I3C_ADDR_SLOT_FREE);
  1131. }
  1132. if (master->ops->reattach_i3c_dev) {
  1133. ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
  1134. if (ret) {
  1135. i3c_master_put_i3c_addrs(dev);
  1136. return ret;
  1137. }
  1138. }
  1139. return 0;
  1140. }
  1141. static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
  1142. {
  1143. struct i3c_master_controller *master = i3c_dev_get_master(dev);
  1144. /* Do not detach the master device itself. */
  1145. if (master->this != dev && master->ops->detach_i3c_dev)
  1146. master->ops->detach_i3c_dev(dev);
  1147. i3c_master_put_i3c_addrs(dev);
  1148. list_del(&dev->common.node);
  1149. }
  1150. static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
  1151. struct i2c_dev_desc *dev)
  1152. {
  1153. int ret;
  1154. if (master->ops->attach_i2c_dev) {
  1155. ret = master->ops->attach_i2c_dev(dev);
  1156. if (ret)
  1157. return ret;
  1158. }
  1159. list_add_tail(&dev->common.node, &master->bus.devs.i2c);
  1160. return 0;
  1161. }
  1162. static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
  1163. {
  1164. struct i3c_master_controller *master = i2c_dev_get_master(dev);
  1165. list_del(&dev->common.node);
  1166. if (master->ops->detach_i2c_dev)
  1167. master->ops->detach_i2c_dev(dev);
  1168. }
  1169. static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master,
  1170. struct i3c_dev_boardinfo *boardinfo)
  1171. {
  1172. struct i3c_device_info info = {
  1173. .static_addr = boardinfo->static_addr,
  1174. };
  1175. struct i3c_dev_desc *i3cdev;
  1176. int ret;
  1177. i3cdev = i3c_master_alloc_i3c_dev(master, &info);
  1178. if (IS_ERR(i3cdev))
  1179. return -ENOMEM;
  1180. i3cdev->boardinfo = boardinfo;
  1181. ret = i3c_master_attach_i3c_dev(master, i3cdev);
  1182. if (ret)
  1183. goto err_free_dev;
  1184. ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr,
  1185. i3cdev->boardinfo->init_dyn_addr);
  1186. if (ret)
  1187. goto err_detach_dev;
  1188. i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr;
  1189. ret = i3c_master_reattach_i3c_dev(i3cdev, 0);
  1190. if (ret)
  1191. goto err_rstdaa;
  1192. ret = i3c_master_retrieve_dev_info(i3cdev);
  1193. if (ret)
  1194. goto err_rstdaa;
  1195. return 0;
  1196. err_rstdaa:
  1197. i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr);
  1198. err_detach_dev:
  1199. i3c_master_detach_i3c_dev(i3cdev);
  1200. err_free_dev:
  1201. i3c_master_free_i3c_dev(i3cdev);
  1202. return ret;
  1203. }
  1204. static void
  1205. i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
  1206. {
  1207. struct i3c_dev_desc *desc;
  1208. int ret;
  1209. if (!master->init_done)
  1210. return;
  1211. i3c_bus_for_each_i3cdev(&master->bus, desc) {
  1212. if (desc->dev || !desc->info.dyn_addr || desc == master->this)
  1213. continue;
  1214. desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
  1215. if (!desc->dev)
  1216. continue;
  1217. desc->dev->bus = &master->bus;
  1218. desc->dev->desc = desc;
  1219. desc->dev->dev.parent = &master->dev;
  1220. desc->dev->dev.type = &i3c_device_type;
  1221. desc->dev->dev.bus = &i3c_bus_type;
  1222. desc->dev->dev.release = i3c_device_release;
  1223. dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
  1224. desc->info.pid);
  1225. if (desc->boardinfo)
  1226. desc->dev->dev.of_node = desc->boardinfo->of_node;
  1227. ret = device_register(&desc->dev->dev);
  1228. if (ret) {
  1229. dev_err(&master->dev,
  1230. "Failed to add I3C device (err = %d)\n", ret);
  1231. put_device(&desc->dev->dev);
  1232. }
  1233. }
  1234. }
  1235. /**
  1236. * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
  1237. * @master: master doing the DAA
  1238. *
  1239. * This function is instantiating an I3C device object and adding it to the
  1240. * I3C device list. All device information are automatically retrieved using
  1241. * standard CCC commands.
  1242. *
  1243. * The I3C device object is returned in case the master wants to attach
  1244. * private data to it using i3c_dev_set_master_data().
  1245. *
  1246. * This function must be called with the bus lock held in write mode.
  1247. *
  1248. * Return: a 0 in case of success, an negative error code otherwise.
  1249. */
  1250. int i3c_master_do_daa(struct i3c_master_controller *master)
  1251. {
  1252. int ret;
  1253. i3c_bus_maintenance_lock(&master->bus);
  1254. ret = master->ops->do_daa(master);
  1255. i3c_bus_maintenance_unlock(&master->bus);
  1256. if (ret)
  1257. return ret;
  1258. i3c_bus_normaluse_lock(&master->bus);
  1259. i3c_master_register_new_i3c_devs(master);
  1260. i3c_bus_normaluse_unlock(&master->bus);
  1261. return 0;
  1262. }
  1263. EXPORT_SYMBOL_GPL(i3c_master_do_daa);
  1264. /**
  1265. * i3c_master_set_info() - set master device information
  1266. * @master: master used to send frames on the bus
  1267. * @info: I3C device information
  1268. *
  1269. * Set master device info. This should be called from
  1270. * &i3c_master_controller_ops->bus_init().
  1271. *
  1272. * Not all &i3c_device_info fields are meaningful for a master device.
  1273. * Here is a list of fields that should be properly filled:
  1274. *
  1275. * - &i3c_device_info->dyn_addr
  1276. * - &i3c_device_info->bcr
  1277. * - &i3c_device_info->dcr
  1278. * - &i3c_device_info->pid
  1279. * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
  1280. * &i3c_device_info->bcr
  1281. *
  1282. * This function must be called with the bus lock held in maintenance mode.
  1283. *
  1284. * Return: 0 if @info contains valid information (not every piece of
  1285. * information can be checked, but we can at least make sure @info->dyn_addr
  1286. * and @info->bcr are correct), -EINVAL otherwise.
  1287. */
  1288. int i3c_master_set_info(struct i3c_master_controller *master,
  1289. const struct i3c_device_info *info)
  1290. {
  1291. struct i3c_dev_desc *i3cdev;
  1292. int ret;
  1293. if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
  1294. return -EINVAL;
  1295. if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
  1296. master->secondary)
  1297. return -EINVAL;
  1298. if (master->this)
  1299. return -EINVAL;
  1300. i3cdev = i3c_master_alloc_i3c_dev(master, info);
  1301. if (IS_ERR(i3cdev))
  1302. return PTR_ERR(i3cdev);
  1303. master->this = i3cdev;
  1304. master->bus.cur_master = master->this;
  1305. ret = i3c_master_attach_i3c_dev(master, i3cdev);
  1306. if (ret)
  1307. goto err_free_dev;
  1308. return 0;
  1309. err_free_dev:
  1310. i3c_master_free_i3c_dev(i3cdev);
  1311. return ret;
  1312. }
  1313. EXPORT_SYMBOL_GPL(i3c_master_set_info);
  1314. static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
  1315. {
  1316. struct i3c_dev_desc *i3cdev, *i3ctmp;
  1317. struct i2c_dev_desc *i2cdev, *i2ctmp;
  1318. list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
  1319. common.node) {
  1320. i3c_master_detach_i3c_dev(i3cdev);
  1321. if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
  1322. i3c_bus_set_addr_slot_status(&master->bus,
  1323. i3cdev->boardinfo->init_dyn_addr,
  1324. I3C_ADDR_SLOT_FREE);
  1325. i3c_master_free_i3c_dev(i3cdev);
  1326. }
  1327. list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
  1328. common.node) {
  1329. i3c_master_detach_i2c_dev(i2cdev);
  1330. i3c_bus_set_addr_slot_status(&master->bus,
  1331. i2cdev->addr,
  1332. I3C_ADDR_SLOT_FREE);
  1333. i3c_master_free_i2c_dev(i2cdev);
  1334. }
  1335. }
  1336. /**
  1337. * i3c_master_bus_init() - initialize an I3C bus
  1338. * @master: main master initializing the bus
  1339. *
  1340. * This function is following all initialisation steps described in the I3C
  1341. * specification:
  1342. *
  1343. * 1. Attach I2C devs to the master so that the master can fill its internal
  1344. * device table appropriately
  1345. *
  1346. * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
  1347. * the master controller. That's usually where the bus mode is selected
  1348. * (pure bus or mixed fast/slow bus)
  1349. *
  1350. * 3. Instruct all devices on the bus to drop their dynamic address. This is
  1351. * particularly important when the bus was previously configured by someone
  1352. * else (for example the bootloader)
  1353. *
  1354. * 4. Disable all slave events.
  1355. *
  1356. * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices
  1357. * also have static_addr, try to pre-assign dynamic addresses requested by
  1358. * the FW with SETDASA and attach corresponding statically defined I3C
  1359. * devices to the master.
  1360. *
  1361. * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
  1362. * remaining I3C devices
  1363. *
  1364. * Once this is done, all I3C and I2C devices should be usable.
  1365. *
  1366. * Return: a 0 in case of success, an negative error code otherwise.
  1367. */
  1368. static int i3c_master_bus_init(struct i3c_master_controller *master)
  1369. {
  1370. enum i3c_addr_slot_status status;
  1371. struct i2c_dev_boardinfo *i2cboardinfo;
  1372. struct i3c_dev_boardinfo *i3cboardinfo;
  1373. struct i2c_dev_desc *i2cdev;
  1374. int ret;
  1375. /*
  1376. * First attach all devices with static definitions provided by the
  1377. * FW.
  1378. */
  1379. list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
  1380. status = i3c_bus_get_addr_slot_status(&master->bus,
  1381. i2cboardinfo->base.addr);
  1382. if (status != I3C_ADDR_SLOT_FREE) {
  1383. ret = -EBUSY;
  1384. goto err_detach_devs;
  1385. }
  1386. i3c_bus_set_addr_slot_status(&master->bus,
  1387. i2cboardinfo->base.addr,
  1388. I3C_ADDR_SLOT_I2C_DEV);
  1389. i2cdev = i3c_master_alloc_i2c_dev(master,
  1390. i2cboardinfo->base.addr,
  1391. i2cboardinfo->lvr);
  1392. if (IS_ERR(i2cdev)) {
  1393. ret = PTR_ERR(i2cdev);
  1394. goto err_detach_devs;
  1395. }
  1396. ret = i3c_master_attach_i2c_dev(master, i2cdev);
  1397. if (ret) {
  1398. i3c_master_free_i2c_dev(i2cdev);
  1399. goto err_detach_devs;
  1400. }
  1401. }
  1402. /*
  1403. * Now execute the controller specific ->bus_init() routine, which
  1404. * might configure its internal logic to match the bus limitations.
  1405. */
  1406. ret = master->ops->bus_init(master);
  1407. if (ret)
  1408. goto err_detach_devs;
  1409. /*
  1410. * The master device should have been instantiated in ->bus_init(),
  1411. * complain if this was not the case.
  1412. */
  1413. if (!master->this) {
  1414. dev_err(&master->dev,
  1415. "master_set_info() was not called in ->bus_init()\n");
  1416. ret = -EINVAL;
  1417. goto err_bus_cleanup;
  1418. }
  1419. /*
  1420. * Reset all dynamic address that may have been assigned before
  1421. * (assigned by the bootloader for example).
  1422. */
  1423. ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
  1424. if (ret && ret != I3C_ERROR_M2)
  1425. goto err_bus_cleanup;
  1426. /* Disable all slave events before starting DAA. */
  1427. ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
  1428. I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
  1429. I3C_CCC_EVENT_HJ);
  1430. if (ret && ret != I3C_ERROR_M2)
  1431. goto err_bus_cleanup;
  1432. /*
  1433. * Reserve init_dyn_addr first, and then try to pre-assign dynamic
  1434. * address and retrieve device information if needed.
  1435. * In case pre-assign dynamic address fails, setting dynamic address to
  1436. * the requested init_dyn_addr is retried after DAA is done in
  1437. * i3c_master_add_i3c_dev_locked().
  1438. */
  1439. list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
  1440. /*
  1441. * We don't reserve a dynamic address for devices that
  1442. * don't explicitly request one.
  1443. */
  1444. if (!i3cboardinfo->init_dyn_addr)
  1445. continue;
  1446. ret = i3c_bus_get_addr_slot_status(&master->bus,
  1447. i3cboardinfo->init_dyn_addr);
  1448. if (ret != I3C_ADDR_SLOT_FREE) {
  1449. ret = -EBUSY;
  1450. goto err_rstdaa;
  1451. }
  1452. i3c_bus_set_addr_slot_status(&master->bus,
  1453. i3cboardinfo->init_dyn_addr,
  1454. I3C_ADDR_SLOT_I3C_DEV);
  1455. /*
  1456. * Only try to create/attach devices that have a static
  1457. * address. Other devices will be created/attached when
  1458. * DAA happens, and the requested dynamic address will
  1459. * be set using SETNEWDA once those devices become
  1460. * addressable.
  1461. */
  1462. if (i3cboardinfo->static_addr)
  1463. i3c_master_early_i3c_dev_add(master, i3cboardinfo);
  1464. }
  1465. ret = i3c_master_do_daa(master);
  1466. if (ret)
  1467. goto err_rstdaa;
  1468. return 0;
  1469. err_rstdaa:
  1470. i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
  1471. err_bus_cleanup:
  1472. if (master->ops->bus_cleanup)
  1473. master->ops->bus_cleanup(master);
  1474. err_detach_devs:
  1475. i3c_master_detach_free_devs(master);
  1476. return ret;
  1477. }
  1478. static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
  1479. {
  1480. if (master->ops->bus_cleanup)
  1481. master->ops->bus_cleanup(master);
  1482. i3c_master_detach_free_devs(master);
  1483. }
  1484. static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev)
  1485. {
  1486. struct i3c_master_controller *master = i3cdev->common.master;
  1487. struct i3c_dev_boardinfo *i3cboardinfo;
  1488. list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
  1489. if (i3cdev->info.pid != i3cboardinfo->pid)
  1490. continue;
  1491. i3cdev->boardinfo = i3cboardinfo;
  1492. i3cdev->info.static_addr = i3cboardinfo->static_addr;
  1493. return;
  1494. }
  1495. }
  1496. static struct i3c_dev_desc *
  1497. i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
  1498. {
  1499. struct i3c_master_controller *master = i3c_dev_get_master(refdev);
  1500. struct i3c_dev_desc *i3cdev;
  1501. i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
  1502. if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
  1503. return i3cdev;
  1504. }
  1505. return NULL;
  1506. }
  1507. /**
  1508. * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
  1509. * @master: master used to send frames on the bus
  1510. * @addr: I3C slave dynamic address assigned to the device
  1511. *
  1512. * This function is instantiating an I3C device object and adding it to the
  1513. * I3C device list. All device information are automatically retrieved using
  1514. * standard CCC commands.
  1515. *
  1516. * The I3C device object is returned in case the master wants to attach
  1517. * private data to it using i3c_dev_set_master_data().
  1518. *
  1519. * This function must be called with the bus lock held in write mode.
  1520. *
  1521. * Return: a 0 in case of success, an negative error code otherwise.
  1522. */
  1523. int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
  1524. u8 addr)
  1525. {
  1526. struct i3c_device_info info = { .dyn_addr = addr };
  1527. struct i3c_dev_desc *newdev, *olddev;
  1528. u8 old_dyn_addr = addr, expected_dyn_addr;
  1529. struct i3c_ibi_setup ibireq = { };
  1530. bool enable_ibi = false;
  1531. int ret;
  1532. if (!master)
  1533. return -EINVAL;
  1534. newdev = i3c_master_alloc_i3c_dev(master, &info);
  1535. if (IS_ERR(newdev))
  1536. return PTR_ERR(newdev);
  1537. ret = i3c_master_attach_i3c_dev(master, newdev);
  1538. if (ret)
  1539. goto err_free_dev;
  1540. ret = i3c_master_retrieve_dev_info(newdev);
  1541. if (ret)
  1542. goto err_detach_dev;
  1543. i3c_master_attach_boardinfo(newdev);
  1544. olddev = i3c_master_search_i3c_dev_duplicate(newdev);
  1545. if (olddev) {
  1546. newdev->dev = olddev->dev;
  1547. if (newdev->dev)
  1548. newdev->dev->desc = newdev;
  1549. /*
  1550. * We need to restore the IBI state too, so let's save the
  1551. * IBI information and try to restore them after olddev has
  1552. * been detached+released and its IBI has been stopped and
  1553. * the associated resources have been freed.
  1554. */
  1555. mutex_lock(&olddev->ibi_lock);
  1556. if (olddev->ibi) {
  1557. ibireq.handler = olddev->ibi->handler;
  1558. ibireq.max_payload_len = olddev->ibi->max_payload_len;
  1559. ibireq.num_slots = olddev->ibi->num_slots;
  1560. if (olddev->ibi->enabled) {
  1561. enable_ibi = true;
  1562. i3c_dev_disable_ibi_locked(olddev);
  1563. }
  1564. i3c_dev_free_ibi_locked(olddev);
  1565. }
  1566. mutex_unlock(&olddev->ibi_lock);
  1567. old_dyn_addr = olddev->info.dyn_addr;
  1568. i3c_master_detach_i3c_dev(olddev);
  1569. i3c_master_free_i3c_dev(olddev);
  1570. }
  1571. /*
  1572. * Depending on our previous state, the expected dynamic address might
  1573. * differ:
  1574. * - if the device already had a dynamic address assigned, let's try to
  1575. * re-apply this one
  1576. * - if the device did not have a dynamic address and the firmware
  1577. * requested a specific address, pick this one
  1578. * - in any other case, keep the address automatically assigned by the
  1579. * master
  1580. */
  1581. if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
  1582. expected_dyn_addr = old_dyn_addr;
  1583. else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
  1584. expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
  1585. else
  1586. expected_dyn_addr = newdev->info.dyn_addr;
  1587. if (newdev->info.dyn_addr != expected_dyn_addr) {
  1588. /*
  1589. * Try to apply the expected dynamic address. If it fails, keep
  1590. * the address assigned by the master.
  1591. */
  1592. ret = i3c_master_setnewda_locked(master,
  1593. newdev->info.dyn_addr,
  1594. expected_dyn_addr);
  1595. if (!ret) {
  1596. old_dyn_addr = newdev->info.dyn_addr;
  1597. newdev->info.dyn_addr = expected_dyn_addr;
  1598. i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
  1599. } else {
  1600. dev_err(&master->dev,
  1601. "Failed to assign reserved/old address to device %d%llx",
  1602. master->bus.id, newdev->info.pid);
  1603. }
  1604. }
  1605. /*
  1606. * Now is time to try to restore the IBI setup. If we're lucky,
  1607. * everything works as before, otherwise, all we can do is complain.
  1608. * FIXME: maybe we should add callback to inform the driver that it
  1609. * should request the IBI again instead of trying to hide that from
  1610. * him.
  1611. */
  1612. if (ibireq.handler) {
  1613. mutex_lock(&newdev->ibi_lock);
  1614. ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
  1615. if (ret) {
  1616. dev_err(&master->dev,
  1617. "Failed to request IBI on device %d-%llx",
  1618. master->bus.id, newdev->info.pid);
  1619. } else if (enable_ibi) {
  1620. ret = i3c_dev_enable_ibi_locked(newdev);
  1621. if (ret)
  1622. dev_err(&master->dev,
  1623. "Failed to re-enable IBI on device %d-%llx",
  1624. master->bus.id, newdev->info.pid);
  1625. }
  1626. mutex_unlock(&newdev->ibi_lock);
  1627. }
  1628. return 0;
  1629. err_detach_dev:
  1630. if (newdev->dev && newdev->dev->desc)
  1631. newdev->dev->desc = NULL;
  1632. i3c_master_detach_i3c_dev(newdev);
  1633. err_free_dev:
  1634. i3c_master_free_i3c_dev(newdev);
  1635. return ret;
  1636. }
  1637. EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
  1638. #define OF_I3C_REG1_IS_I2C_DEV BIT(31)
  1639. static int
  1640. of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
  1641. struct device_node *node, u32 *reg)
  1642. {
  1643. struct i2c_dev_boardinfo *boardinfo;
  1644. struct device *dev = &master->dev;
  1645. int ret;
  1646. boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
  1647. if (!boardinfo)
  1648. return -ENOMEM;
  1649. ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
  1650. if (ret)
  1651. return ret;
  1652. /*
  1653. * The I3C Specification does not clearly say I2C devices with 10-bit
  1654. * address are supported. These devices can't be passed properly through
  1655. * DEFSLVS command.
  1656. */
  1657. if (boardinfo->base.flags & I2C_CLIENT_TEN) {
  1658. dev_err(dev, "I2C device with 10 bit address not supported.");
  1659. return -ENOTSUPP;
  1660. }
  1661. /* LVR is encoded in reg[2]. */
  1662. boardinfo->lvr = reg[2];
  1663. list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
  1664. of_node_get(node);
  1665. return 0;
  1666. }
  1667. static int
  1668. of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
  1669. struct device_node *node, u32 *reg)
  1670. {
  1671. struct i3c_dev_boardinfo *boardinfo;
  1672. struct device *dev = &master->dev;
  1673. enum i3c_addr_slot_status addrstatus;
  1674. u32 init_dyn_addr = 0;
  1675. boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
  1676. if (!boardinfo)
  1677. return -ENOMEM;
  1678. if (reg[0]) {
  1679. if (reg[0] > I3C_MAX_ADDR)
  1680. return -EINVAL;
  1681. addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
  1682. reg[0]);
  1683. if (addrstatus != I3C_ADDR_SLOT_FREE)
  1684. return -EINVAL;
  1685. }
  1686. boardinfo->static_addr = reg[0];
  1687. if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
  1688. if (init_dyn_addr > I3C_MAX_ADDR)
  1689. return -EINVAL;
  1690. addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
  1691. init_dyn_addr);
  1692. if (addrstatus != I3C_ADDR_SLOT_FREE)
  1693. return -EINVAL;
  1694. }
  1695. boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
  1696. if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
  1697. I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
  1698. return -EINVAL;
  1699. boardinfo->init_dyn_addr = init_dyn_addr;
  1700. boardinfo->of_node = of_node_get(node);
  1701. list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
  1702. return 0;
  1703. }
  1704. static int of_i3c_master_add_dev(struct i3c_master_controller *master,
  1705. struct device_node *node)
  1706. {
  1707. u32 reg[3];
  1708. int ret;
  1709. if (!master || !node)
  1710. return -EINVAL;
  1711. ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg));
  1712. if (ret)
  1713. return ret;
  1714. /*
  1715. * The manufacturer ID can't be 0. If reg[1] == 0 that means we're
  1716. * dealing with an I2C device.
  1717. */
  1718. if (!reg[1])
  1719. ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
  1720. else
  1721. ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
  1722. return ret;
  1723. }
  1724. static int of_populate_i3c_bus(struct i3c_master_controller *master)
  1725. {
  1726. struct device *dev = &master->dev;
  1727. struct device_node *i3cbus_np = dev->of_node;
  1728. struct device_node *node;
  1729. int ret;
  1730. u32 val;
  1731. if (!i3cbus_np)
  1732. return 0;
  1733. for_each_available_child_of_node(i3cbus_np, node) {
  1734. ret = of_i3c_master_add_dev(master, node);
  1735. if (ret) {
  1736. of_node_put(node);
  1737. return ret;
  1738. }
  1739. }
  1740. /*
  1741. * The user might want to limit I2C and I3C speed in case some devices
  1742. * on the bus are not supporting typical rates, or if the bus topology
  1743. * prevents it from using max possible rate.
  1744. */
  1745. if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
  1746. master->bus.scl_rate.i2c = val;
  1747. if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
  1748. master->bus.scl_rate.i3c = val;
  1749. return 0;
  1750. }
  1751. static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
  1752. struct i2c_msg *xfers, int nxfers)
  1753. {
  1754. struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
  1755. struct i2c_dev_desc *dev;
  1756. int i, ret;
  1757. u16 addr;
  1758. if (!xfers || !master || nxfers <= 0)
  1759. return -EINVAL;
  1760. if (!master->ops->i2c_xfers)
  1761. return -ENOTSUPP;
  1762. /* Doing transfers to different devices is not supported. */
  1763. addr = xfers[0].addr;
  1764. for (i = 1; i < nxfers; i++) {
  1765. if (addr != xfers[i].addr)
  1766. return -ENOTSUPP;
  1767. }
  1768. i3c_bus_normaluse_lock(&master->bus);
  1769. dev = i3c_master_find_i2c_dev_by_addr(master, addr);
  1770. if (!dev)
  1771. ret = -ENOENT;
  1772. else
  1773. ret = master->ops->i2c_xfers(dev, xfers, nxfers);
  1774. i3c_bus_normaluse_unlock(&master->bus);
  1775. return ret ? ret : nxfers;
  1776. }
  1777. static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
  1778. {
  1779. return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
  1780. }
  1781. static u8 i3c_master_i2c_get_lvr(struct i2c_client *client)
  1782. {
  1783. /* Fall back to no spike filters and FM bus mode. */
  1784. u8 lvr = I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE;
  1785. if (client->dev.of_node) {
  1786. u32 reg[3];
  1787. if (!of_property_read_u32_array(client->dev.of_node, "reg",
  1788. reg, ARRAY_SIZE(reg)))
  1789. lvr = reg[2];
  1790. }
  1791. return lvr;
  1792. }
  1793. static int i3c_master_i2c_attach(struct i2c_adapter *adap, struct i2c_client *client)
  1794. {
  1795. struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
  1796. enum i3c_addr_slot_status status;
  1797. struct i2c_dev_desc *i2cdev;
  1798. int ret;
  1799. /* Already added by board info? */
  1800. if (i3c_master_find_i2c_dev_by_addr(master, client->addr))
  1801. return 0;
  1802. status = i3c_bus_get_addr_slot_status(&master->bus, client->addr);
  1803. if (status != I3C_ADDR_SLOT_FREE)
  1804. return -EBUSY;
  1805. i3c_bus_set_addr_slot_status(&master->bus, client->addr,
  1806. I3C_ADDR_SLOT_I2C_DEV);
  1807. i2cdev = i3c_master_alloc_i2c_dev(master, client->addr,
  1808. i3c_master_i2c_get_lvr(client));
  1809. if (IS_ERR(i2cdev)) {
  1810. ret = PTR_ERR(i2cdev);
  1811. goto out_clear_status;
  1812. }
  1813. ret = i3c_master_attach_i2c_dev(master, i2cdev);
  1814. if (ret)
  1815. goto out_free_dev;
  1816. return 0;
  1817. out_free_dev:
  1818. i3c_master_free_i2c_dev(i2cdev);
  1819. out_clear_status:
  1820. i3c_bus_set_addr_slot_status(&master->bus, client->addr,
  1821. I3C_ADDR_SLOT_FREE);
  1822. return ret;
  1823. }
  1824. static int i3c_master_i2c_detach(struct i2c_adapter *adap, struct i2c_client *client)
  1825. {
  1826. struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
  1827. struct i2c_dev_desc *dev;
  1828. dev = i3c_master_find_i2c_dev_by_addr(master, client->addr);
  1829. if (!dev)
  1830. return -ENODEV;
  1831. i3c_master_detach_i2c_dev(dev);
  1832. i3c_bus_set_addr_slot_status(&master->bus, dev->addr,
  1833. I3C_ADDR_SLOT_FREE);
  1834. i3c_master_free_i2c_dev(dev);
  1835. return 0;
  1836. }
  1837. static const struct i2c_algorithm i3c_master_i2c_algo = {
  1838. .master_xfer = i3c_master_i2c_adapter_xfer,
  1839. .functionality = i3c_master_i2c_funcs,
  1840. };
  1841. static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action,
  1842. void *data)
  1843. {
  1844. struct i2c_adapter *adap;
  1845. struct i2c_client *client;
  1846. struct device *dev = data;
  1847. struct i3c_master_controller *master;
  1848. int ret;
  1849. if (dev->type != &i2c_client_type)
  1850. return 0;
  1851. client = to_i2c_client(dev);
  1852. adap = client->adapter;
  1853. if (adap->algo != &i3c_master_i2c_algo)
  1854. return 0;
  1855. master = i2c_adapter_to_i3c_master(adap);
  1856. i3c_bus_maintenance_lock(&master->bus);
  1857. switch (action) {
  1858. case BUS_NOTIFY_ADD_DEVICE:
  1859. ret = i3c_master_i2c_attach(adap, client);
  1860. break;
  1861. case BUS_NOTIFY_DEL_DEVICE:
  1862. ret = i3c_master_i2c_detach(adap, client);
  1863. break;
  1864. }
  1865. i3c_bus_maintenance_unlock(&master->bus);
  1866. return ret;
  1867. }
  1868. static struct notifier_block i2cdev_notifier = {
  1869. .notifier_call = i3c_i2c_notifier_call,
  1870. };
  1871. static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
  1872. {
  1873. struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
  1874. struct i2c_dev_desc *i2cdev;
  1875. struct i2c_dev_boardinfo *i2cboardinfo;
  1876. int ret;
  1877. adap->dev.parent = master->dev.parent;
  1878. adap->owner = master->dev.parent->driver->owner;
  1879. adap->algo = &i3c_master_i2c_algo;
  1880. strncpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
  1881. /* FIXME: Should we allow i3c masters to override these values? */
  1882. adap->timeout = 1000;
  1883. adap->retries = 3;
  1884. ret = i2c_add_adapter(adap);
  1885. if (ret)
  1886. return ret;
  1887. /*
  1888. * We silently ignore failures here. The bus should keep working
  1889. * correctly even if one or more i2c devices are not registered.
  1890. */
  1891. list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
  1892. i2cdev = i3c_master_find_i2c_dev_by_addr(master,
  1893. i2cboardinfo->base.addr);
  1894. if (WARN_ON(!i2cdev))
  1895. continue;
  1896. i2cdev->dev = i2c_new_client_device(adap, &i2cboardinfo->base);
  1897. }
  1898. return 0;
  1899. }
  1900. static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
  1901. {
  1902. struct i2c_dev_desc *i2cdev;
  1903. i2c_del_adapter(&master->i2c);
  1904. i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
  1905. i2cdev->dev = NULL;
  1906. }
  1907. static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
  1908. {
  1909. struct i3c_dev_desc *i3cdev;
  1910. i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
  1911. if (!i3cdev->dev)
  1912. continue;
  1913. i3cdev->dev->desc = NULL;
  1914. if (device_is_registered(&i3cdev->dev->dev))
  1915. device_unregister(&i3cdev->dev->dev);
  1916. else
  1917. put_device(&i3cdev->dev->dev);
  1918. i3cdev->dev = NULL;
  1919. }
  1920. }
  1921. /**
  1922. * i3c_master_queue_ibi() - Queue an IBI
  1923. * @dev: the device this IBI is coming from
  1924. * @slot: the IBI slot used to store the payload
  1925. *
  1926. * Queue an IBI to the controller workqueue. The IBI handler attached to
  1927. * the dev will be called from a workqueue context.
  1928. */
  1929. void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
  1930. {
  1931. atomic_inc(&dev->ibi->pending_ibis);
  1932. queue_work(dev->common.master->wq, &slot->work);
  1933. }
  1934. EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
  1935. static void i3c_master_handle_ibi(struct work_struct *work)
  1936. {
  1937. struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
  1938. work);
  1939. struct i3c_dev_desc *dev = slot->dev;
  1940. struct i3c_master_controller *master = i3c_dev_get_master(dev);
  1941. struct i3c_ibi_payload payload;
  1942. payload.data = slot->data;
  1943. payload.len = slot->len;
  1944. if (dev->dev)
  1945. dev->ibi->handler(dev->dev, &payload);
  1946. master->ops->recycle_ibi_slot(dev, slot);
  1947. if (atomic_dec_and_test(&dev->ibi->pending_ibis))
  1948. complete(&dev->ibi->all_ibis_handled);
  1949. }
  1950. static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
  1951. struct i3c_ibi_slot *slot)
  1952. {
  1953. slot->dev = dev;
  1954. INIT_WORK(&slot->work, i3c_master_handle_ibi);
  1955. }
  1956. struct i3c_generic_ibi_slot {
  1957. struct list_head node;
  1958. struct i3c_ibi_slot base;
  1959. };
  1960. struct i3c_generic_ibi_pool {
  1961. spinlock_t lock;
  1962. unsigned int num_slots;
  1963. struct i3c_generic_ibi_slot *slots;
  1964. void *payload_buf;
  1965. struct list_head free_slots;
  1966. struct list_head pending;
  1967. };
  1968. /**
  1969. * i3c_generic_ibi_free_pool() - Free a generic IBI pool
  1970. * @pool: the IBI pool to free
  1971. *
  1972. * Free all IBI slots allated by a generic IBI pool.
  1973. */
  1974. void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
  1975. {
  1976. struct i3c_generic_ibi_slot *slot;
  1977. unsigned int nslots = 0;
  1978. while (!list_empty(&pool->free_slots)) {
  1979. slot = list_first_entry(&pool->free_slots,
  1980. struct i3c_generic_ibi_slot, node);
  1981. list_del(&slot->node);
  1982. nslots++;
  1983. }
  1984. /*
  1985. * If the number of freed slots is not equal to the number of allocated
  1986. * slots we have a leak somewhere.
  1987. */
  1988. WARN_ON(nslots != pool->num_slots);
  1989. kfree(pool->payload_buf);
  1990. kfree(pool->slots);
  1991. kfree(pool);
  1992. }
  1993. EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
  1994. /**
  1995. * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
  1996. * @dev: the device this pool will be used for
  1997. * @req: IBI setup request describing what the device driver expects
  1998. *
  1999. * Create a generic IBI pool based on the information provided in @req.
  2000. *
  2001. * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
  2002. */
  2003. struct i3c_generic_ibi_pool *
  2004. i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
  2005. const struct i3c_ibi_setup *req)
  2006. {
  2007. struct i3c_generic_ibi_pool *pool;
  2008. struct i3c_generic_ibi_slot *slot;
  2009. unsigned int i;
  2010. int ret;
  2011. pool = kzalloc(sizeof(*pool), GFP_KERNEL);
  2012. if (!pool)
  2013. return ERR_PTR(-ENOMEM);
  2014. spin_lock_init(&pool->lock);
  2015. INIT_LIST_HEAD(&pool->free_slots);
  2016. INIT_LIST_HEAD(&pool->pending);
  2017. pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
  2018. if (!pool->slots) {
  2019. ret = -ENOMEM;
  2020. goto err_free_pool;
  2021. }
  2022. if (req->max_payload_len) {
  2023. pool->payload_buf = kcalloc(req->num_slots,
  2024. req->max_payload_len, GFP_KERNEL);
  2025. if (!pool->payload_buf) {
  2026. ret = -ENOMEM;
  2027. goto err_free_pool;
  2028. }
  2029. }
  2030. for (i = 0; i < req->num_slots; i++) {
  2031. slot = &pool->slots[i];
  2032. i3c_master_init_ibi_slot(dev, &slot->base);
  2033. if (req->max_payload_len)
  2034. slot->base.data = pool->payload_buf +
  2035. (i * req->max_payload_len);
  2036. list_add_tail(&slot->node, &pool->free_slots);
  2037. pool->num_slots++;
  2038. }
  2039. return pool;
  2040. err_free_pool:
  2041. i3c_generic_ibi_free_pool(pool);
  2042. return ERR_PTR(ret);
  2043. }
  2044. EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
  2045. /**
  2046. * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
  2047. * @pool: the pool to query an IBI slot on
  2048. *
  2049. * Search for a free slot in a generic IBI pool.
  2050. * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
  2051. * when it's no longer needed.
  2052. *
  2053. * Return: a pointer to a free slot, or NULL if there's no free slot available.
  2054. */
  2055. struct i3c_ibi_slot *
  2056. i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
  2057. {
  2058. struct i3c_generic_ibi_slot *slot;
  2059. unsigned long flags;
  2060. spin_lock_irqsave(&pool->lock, flags);
  2061. slot = list_first_entry_or_null(&pool->free_slots,
  2062. struct i3c_generic_ibi_slot, node);
  2063. if (slot)
  2064. list_del(&slot->node);
  2065. spin_unlock_irqrestore(&pool->lock, flags);
  2066. return slot ? &slot->base : NULL;
  2067. }
  2068. EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
  2069. /**
  2070. * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
  2071. * @pool: the pool to return the IBI slot to
  2072. * @s: IBI slot to recycle
  2073. *
  2074. * Add an IBI slot back to its generic IBI pool. Should be called from the
  2075. * master driver struct_master_controller_ops->recycle_ibi() method.
  2076. */
  2077. void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
  2078. struct i3c_ibi_slot *s)
  2079. {
  2080. struct i3c_generic_ibi_slot *slot;
  2081. unsigned long flags;
  2082. if (!s)
  2083. return;
  2084. slot = container_of(s, struct i3c_generic_ibi_slot, base);
  2085. spin_lock_irqsave(&pool->lock, flags);
  2086. list_add_tail(&slot->node, &pool->free_slots);
  2087. spin_unlock_irqrestore(&pool->lock, flags);
  2088. }
  2089. EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
  2090. static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
  2091. {
  2092. if (!ops || !ops->bus_init || !ops->priv_xfers ||
  2093. !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
  2094. return -EINVAL;
  2095. if (ops->request_ibi &&
  2096. (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
  2097. !ops->recycle_ibi_slot))
  2098. return -EINVAL;
  2099. return 0;
  2100. }
  2101. /**
  2102. * i3c_master_register() - register an I3C master
  2103. * @master: master used to send frames on the bus
  2104. * @parent: the parent device (the one that provides this I3C master
  2105. * controller)
  2106. * @ops: the master controller operations
  2107. * @secondary: true if you are registering a secondary master. Will return
  2108. * -ENOTSUPP if set to true since secondary masters are not yet
  2109. * supported
  2110. *
  2111. * This function takes care of everything for you:
  2112. *
  2113. * - creates and initializes the I3C bus
  2114. * - populates the bus with static I2C devs if @parent->of_node is not
  2115. * NULL
  2116. * - registers all I3C devices added by the controller during bus
  2117. * initialization
  2118. * - registers the I2C adapter and all I2C devices
  2119. *
  2120. * Return: 0 in case of success, a negative error code otherwise.
  2121. */
  2122. int i3c_master_register(struct i3c_master_controller *master,
  2123. struct device *parent,
  2124. const struct i3c_master_controller_ops *ops,
  2125. bool secondary)
  2126. {
  2127. unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
  2128. struct i3c_bus *i3cbus = i3c_master_get_bus(master);
  2129. enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
  2130. struct i2c_dev_boardinfo *i2cbi;
  2131. int ret;
  2132. /* We do not support secondary masters yet. */
  2133. if (secondary)
  2134. return -ENOTSUPP;
  2135. ret = i3c_master_check_ops(ops);
  2136. if (ret)
  2137. return ret;
  2138. master->dev.parent = parent;
  2139. master->dev.of_node = of_node_get(parent->of_node);
  2140. master->dev.bus = &i3c_bus_type;
  2141. master->dev.type = &i3c_masterdev_type;
  2142. master->dev.release = i3c_masterdev_release;
  2143. master->ops = ops;
  2144. master->secondary = secondary;
  2145. INIT_LIST_HEAD(&master->boardinfo.i2c);
  2146. INIT_LIST_HEAD(&master->boardinfo.i3c);
  2147. ret = i3c_bus_init(i3cbus);
  2148. if (ret)
  2149. return ret;
  2150. device_initialize(&master->dev);
  2151. dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
  2152. ret = of_populate_i3c_bus(master);
  2153. if (ret)
  2154. goto err_put_dev;
  2155. list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
  2156. switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
  2157. case I3C_LVR_I2C_INDEX(0):
  2158. if (mode < I3C_BUS_MODE_MIXED_FAST)
  2159. mode = I3C_BUS_MODE_MIXED_FAST;
  2160. break;
  2161. case I3C_LVR_I2C_INDEX(1):
  2162. if (mode < I3C_BUS_MODE_MIXED_LIMITED)
  2163. mode = I3C_BUS_MODE_MIXED_LIMITED;
  2164. break;
  2165. case I3C_LVR_I2C_INDEX(2):
  2166. if (mode < I3C_BUS_MODE_MIXED_SLOW)
  2167. mode = I3C_BUS_MODE_MIXED_SLOW;
  2168. break;
  2169. default:
  2170. ret = -EINVAL;
  2171. goto err_put_dev;
  2172. }
  2173. if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
  2174. i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE;
  2175. }
  2176. ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
  2177. if (ret)
  2178. goto err_put_dev;
  2179. master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent));
  2180. if (!master->wq) {
  2181. ret = -ENOMEM;
  2182. goto err_put_dev;
  2183. }
  2184. ret = i3c_master_bus_init(master);
  2185. if (ret)
  2186. goto err_put_dev;
  2187. ret = device_add(&master->dev);
  2188. if (ret)
  2189. goto err_cleanup_bus;
  2190. /*
  2191. * Expose our I3C bus as an I2C adapter so that I2C devices are exposed
  2192. * through the I2C subsystem.
  2193. */
  2194. ret = i3c_master_i2c_adapter_init(master);
  2195. if (ret)
  2196. goto err_del_dev;
  2197. /*
  2198. * We're done initializing the bus and the controller, we can now
  2199. * register I3C devices discovered during the initial DAA.
  2200. */
  2201. master->init_done = true;
  2202. i3c_bus_normaluse_lock(&master->bus);
  2203. i3c_master_register_new_i3c_devs(master);
  2204. i3c_bus_normaluse_unlock(&master->bus);
  2205. return 0;
  2206. err_del_dev:
  2207. device_del(&master->dev);
  2208. err_cleanup_bus:
  2209. i3c_master_bus_cleanup(master);
  2210. err_put_dev:
  2211. put_device(&master->dev);
  2212. return ret;
  2213. }
  2214. EXPORT_SYMBOL_GPL(i3c_master_register);
  2215. /**
  2216. * i3c_master_unregister() - unregister an I3C master
  2217. * @master: master used to send frames on the bus
  2218. *
  2219. * Basically undo everything done in i3c_master_register().
  2220. *
  2221. * Return: 0 in case of success, a negative error code otherwise.
  2222. */
  2223. int i3c_master_unregister(struct i3c_master_controller *master)
  2224. {
  2225. i3c_master_i2c_adapter_cleanup(master);
  2226. i3c_master_unregister_i3c_devs(master);
  2227. i3c_master_bus_cleanup(master);
  2228. device_unregister(&master->dev);
  2229. return 0;
  2230. }
  2231. EXPORT_SYMBOL_GPL(i3c_master_unregister);
  2232. int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev,
  2233. struct i3c_priv_xfer *xfers,
  2234. int nxfers)
  2235. {
  2236. struct i3c_master_controller *master;
  2237. if (!dev)
  2238. return -ENOENT;
  2239. master = i3c_dev_get_master(dev);
  2240. if (!master || !xfers)
  2241. return -EINVAL;
  2242. if (!master->ops->priv_xfers)
  2243. return -ENOTSUPP;
  2244. return master->ops->priv_xfers(dev, xfers, nxfers);
  2245. }
  2246. int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
  2247. {
  2248. struct i3c_master_controller *master;
  2249. int ret;
  2250. if (!dev->ibi)
  2251. return -EINVAL;
  2252. master = i3c_dev_get_master(dev);
  2253. ret = master->ops->disable_ibi(dev);
  2254. if (ret)
  2255. return ret;
  2256. reinit_completion(&dev->ibi->all_ibis_handled);
  2257. if (atomic_read(&dev->ibi->pending_ibis))
  2258. wait_for_completion(&dev->ibi->all_ibis_handled);
  2259. dev->ibi->enabled = false;
  2260. return 0;
  2261. }
  2262. int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
  2263. {
  2264. struct i3c_master_controller *master = i3c_dev_get_master(dev);
  2265. int ret;
  2266. if (!dev->ibi)
  2267. return -EINVAL;
  2268. ret = master->ops->enable_ibi(dev);
  2269. if (!ret)
  2270. dev->ibi->enabled = true;
  2271. return ret;
  2272. }
  2273. int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
  2274. const struct i3c_ibi_setup *req)
  2275. {
  2276. struct i3c_master_controller *master = i3c_dev_get_master(dev);
  2277. struct i3c_device_ibi_info *ibi;
  2278. int ret;
  2279. if (!master->ops->request_ibi)
  2280. return -ENOTSUPP;
  2281. if (dev->ibi)
  2282. return -EBUSY;
  2283. ibi = kzalloc(sizeof(*ibi), GFP_KERNEL);
  2284. if (!ibi)
  2285. return -ENOMEM;
  2286. atomic_set(&ibi->pending_ibis, 0);
  2287. init_completion(&ibi->all_ibis_handled);
  2288. ibi->handler = req->handler;
  2289. ibi->max_payload_len = req->max_payload_len;
  2290. ibi->num_slots = req->num_slots;
  2291. dev->ibi = ibi;
  2292. ret = master->ops->request_ibi(dev, req);
  2293. if (ret) {
  2294. kfree(ibi);
  2295. dev->ibi = NULL;
  2296. }
  2297. return ret;
  2298. }
  2299. void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
  2300. {
  2301. struct i3c_master_controller *master = i3c_dev_get_master(dev);
  2302. if (!dev->ibi)
  2303. return;
  2304. if (WARN_ON(dev->ibi->enabled))
  2305. WARN_ON(i3c_dev_disable_ibi_locked(dev));
  2306. master->ops->free_ibi(dev);
  2307. kfree(dev->ibi);
  2308. dev->ibi = NULL;
  2309. }
  2310. static int __init i3c_init(void)
  2311. {
  2312. int res = bus_register_notifier(&i2c_bus_type, &i2cdev_notifier);
  2313. if (res)
  2314. return res;
  2315. res = bus_register(&i3c_bus_type);
  2316. if (res)
  2317. goto out_unreg_notifier;
  2318. return 0;
  2319. out_unreg_notifier:
  2320. bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
  2321. return res;
  2322. }
  2323. subsys_initcall(i3c_init);
  2324. static void __exit i3c_exit(void)
  2325. {
  2326. bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
  2327. idr_destroy(&i3c_bus_idr);
  2328. bus_unregister(&i3c_bus_type);
  2329. }
  2330. module_exit(i3c_exit);
  2331. MODULE_AUTHOR("Boris Brezillon <[email protected]>");
  2332. MODULE_DESCRIPTION("I3C core");
  2333. MODULE_LICENSE("GPL v2");