f71882fg.c 80 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /***************************************************************************
  3. * Copyright (C) 2006 by Hans Edgington <[email protected]> *
  4. * Copyright (C) 2007-2011 Hans de Goede <[email protected]> *
  5. * *
  6. ***************************************************************************/
  7. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  8. #include <linux/module.h>
  9. #include <linux/init.h>
  10. #include <linux/slab.h>
  11. #include <linux/jiffies.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/hwmon.h>
  14. #include <linux/hwmon-sysfs.h>
  15. #include <linux/err.h>
  16. #include <linux/mutex.h>
  17. #include <linux/io.h>
  18. #include <linux/acpi.h>
  19. #define DRVNAME "f71882fg"
  20. #define SIO_F71858FG_LD_HWM 0x02 /* Hardware monitor logical device */
  21. #define SIO_F71882FG_LD_HWM 0x04 /* Hardware monitor logical device */
  22. #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
  23. #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
  24. #define SIO_REG_LDSEL 0x07 /* Logical device select */
  25. #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
  26. #define SIO_REG_DEVREV 0x22 /* Device revision */
  27. #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
  28. #define SIO_REG_ENABLE 0x30 /* Logical device enable */
  29. #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
  30. #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
  31. #define SIO_F71808E_ID 0x0901 /* Chipset ID */
  32. #define SIO_F71808A_ID 0x1001 /* Chipset ID */
  33. #define SIO_F71858_ID 0x0507 /* Chipset ID */
  34. #define SIO_F71862_ID 0x0601 /* Chipset ID */
  35. #define SIO_F71868_ID 0x1106 /* Chipset ID */
  36. #define SIO_F71869_ID 0x0814 /* Chipset ID */
  37. #define SIO_F71869A_ID 0x1007 /* Chipset ID */
  38. #define SIO_F71882_ID 0x0541 /* Chipset ID */
  39. #define SIO_F71889_ID 0x0723 /* Chipset ID */
  40. #define SIO_F71889E_ID 0x0909 /* Chipset ID */
  41. #define SIO_F71889A_ID 0x1005 /* Chipset ID */
  42. #define SIO_F8000_ID 0x0581 /* Chipset ID */
  43. #define SIO_F81768D_ID 0x1210 /* Chipset ID */
  44. #define SIO_F81865_ID 0x0704 /* Chipset ID */
  45. #define SIO_F81866_ID 0x1010 /* Chipset ID */
  46. #define SIO_F71858AD_ID 0x0903 /* Chipset ID */
  47. #define SIO_F81966_ID 0x1502 /* Chipset ID */
  48. #define REGION_LENGTH 8
  49. #define ADDR_REG_OFFSET 5
  50. #define DATA_REG_OFFSET 6
  51. #define F71882FG_REG_IN_STATUS 0x12 /* f7188x only */
  52. #define F71882FG_REG_IN_BEEP 0x13 /* f7188x only */
  53. #define F71882FG_REG_IN(nr) (0x20 + (nr))
  54. #define F71882FG_REG_IN1_HIGH 0x32 /* f7188x only */
  55. #define F81866_REG_IN_STATUS 0x16 /* F81866 only */
  56. #define F81866_REG_IN_BEEP 0x17 /* F81866 only */
  57. #define F81866_REG_IN1_HIGH 0x3a /* F81866 only */
  58. #define F71882FG_REG_FAN(nr) (0xA0 + (16 * (nr)))
  59. #define F71882FG_REG_FAN_TARGET(nr) (0xA2 + (16 * (nr)))
  60. #define F71882FG_REG_FAN_FULL_SPEED(nr) (0xA4 + (16 * (nr)))
  61. #define F71882FG_REG_FAN_STATUS 0x92
  62. #define F71882FG_REG_FAN_BEEP 0x93
  63. #define F71882FG_REG_TEMP(nr) (0x70 + 2 * (nr))
  64. #define F71882FG_REG_TEMP_OVT(nr) (0x80 + 2 * (nr))
  65. #define F71882FG_REG_TEMP_HIGH(nr) (0x81 + 2 * (nr))
  66. #define F71882FG_REG_TEMP_STATUS 0x62
  67. #define F71882FG_REG_TEMP_BEEP 0x63
  68. #define F71882FG_REG_TEMP_CONFIG 0x69
  69. #define F71882FG_REG_TEMP_HYST(nr) (0x6C + (nr))
  70. #define F71882FG_REG_TEMP_TYPE 0x6B
  71. #define F71882FG_REG_TEMP_DIODE_OPEN 0x6F
  72. #define F71882FG_REG_PWM(nr) (0xA3 + (16 * (nr)))
  73. #define F71882FG_REG_PWM_TYPE 0x94
  74. #define F71882FG_REG_PWM_ENABLE 0x96
  75. #define F71882FG_REG_FAN_HYST(nr) (0x98 + (nr))
  76. #define F71882FG_REG_FAN_FAULT_T 0x9F
  77. #define F71882FG_FAN_NEG_TEMP_EN 0x20
  78. #define F71882FG_FAN_PROG_SEL 0x80
  79. #define F71882FG_REG_POINT_PWM(pwm, point) (0xAA + (point) + (16 * (pwm)))
  80. #define F71882FG_REG_POINT_TEMP(pwm, point) (0xA6 + (point) + (16 * (pwm)))
  81. #define F71882FG_REG_POINT_MAPPING(nr) (0xAF + 16 * (nr))
  82. #define F71882FG_REG_START 0x01
  83. #define F71882FG_MAX_INS 11
  84. #define FAN_MIN_DETECT 366 /* Lowest detectable fanspeed */
  85. static unsigned short force_id;
  86. module_param(force_id, ushort, 0);
  87. MODULE_PARM_DESC(force_id, "Override the detected device ID");
  88. enum chips { f71808e, f71808a, f71858fg, f71862fg, f71868a, f71869, f71869a,
  89. f71882fg, f71889fg, f71889ed, f71889a, f8000, f81768d, f81865f,
  90. f81866a};
  91. static const char *const f71882fg_names[] = {
  92. "f71808e",
  93. "f71808a",
  94. "f71858fg",
  95. "f71862fg",
  96. "f71868a",
  97. "f71869", /* Both f71869f and f71869e, reg. compatible and same id */
  98. "f71869a",
  99. "f71882fg",
  100. "f71889fg", /* f81801u too, same id */
  101. "f71889ed",
  102. "f71889a",
  103. "f8000",
  104. "f81768d",
  105. "f81865f",
  106. "f81866a",
  107. };
  108. static const char f71882fg_has_in[][F71882FG_MAX_INS] = {
  109. [f71808e] = { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0 },
  110. [f71808a] = { 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 0 },
  111. [f71858fg] = { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 },
  112. [f71862fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
  113. [f71868a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0 },
  114. [f71869] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
  115. [f71869a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
  116. [f71882fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
  117. [f71889fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
  118. [f71889ed] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
  119. [f71889a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
  120. [f8000] = { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 },
  121. [f81768d] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 },
  122. [f81865f] = { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0 },
  123. [f81866a] = { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0 },
  124. };
  125. static const char f71882fg_has_in1_alarm[] = {
  126. [f71808e] = 0,
  127. [f71808a] = 0,
  128. [f71858fg] = 0,
  129. [f71862fg] = 0,
  130. [f71868a] = 0,
  131. [f71869] = 0,
  132. [f71869a] = 0,
  133. [f71882fg] = 1,
  134. [f71889fg] = 1,
  135. [f71889ed] = 1,
  136. [f71889a] = 1,
  137. [f8000] = 0,
  138. [f81768d] = 1,
  139. [f81865f] = 1,
  140. [f81866a] = 1,
  141. };
  142. static const char f71882fg_fan_has_beep[] = {
  143. [f71808e] = 0,
  144. [f71808a] = 0,
  145. [f71858fg] = 0,
  146. [f71862fg] = 1,
  147. [f71868a] = 1,
  148. [f71869] = 1,
  149. [f71869a] = 1,
  150. [f71882fg] = 1,
  151. [f71889fg] = 1,
  152. [f71889ed] = 1,
  153. [f71889a] = 1,
  154. [f8000] = 0,
  155. [f81768d] = 1,
  156. [f81865f] = 1,
  157. [f81866a] = 1,
  158. };
  159. static const char f71882fg_nr_fans[] = {
  160. [f71808e] = 3,
  161. [f71808a] = 2, /* +1 fan which is monitor + simple pwm only */
  162. [f71858fg] = 3,
  163. [f71862fg] = 3,
  164. [f71868a] = 3,
  165. [f71869] = 3,
  166. [f71869a] = 3,
  167. [f71882fg] = 4,
  168. [f71889fg] = 3,
  169. [f71889ed] = 3,
  170. [f71889a] = 3,
  171. [f8000] = 3, /* +1 fan which is monitor only */
  172. [f81768d] = 3,
  173. [f81865f] = 2,
  174. [f81866a] = 3,
  175. };
  176. static const char f71882fg_temp_has_beep[] = {
  177. [f71808e] = 0,
  178. [f71808a] = 1,
  179. [f71858fg] = 0,
  180. [f71862fg] = 1,
  181. [f71868a] = 1,
  182. [f71869] = 1,
  183. [f71869a] = 1,
  184. [f71882fg] = 1,
  185. [f71889fg] = 1,
  186. [f71889ed] = 1,
  187. [f71889a] = 1,
  188. [f8000] = 0,
  189. [f81768d] = 1,
  190. [f81865f] = 1,
  191. [f81866a] = 1,
  192. };
  193. static const char f71882fg_nr_temps[] = {
  194. [f71808e] = 2,
  195. [f71808a] = 2,
  196. [f71858fg] = 3,
  197. [f71862fg] = 3,
  198. [f71868a] = 3,
  199. [f71869] = 3,
  200. [f71869a] = 3,
  201. [f71882fg] = 3,
  202. [f71889fg] = 3,
  203. [f71889ed] = 3,
  204. [f71889a] = 3,
  205. [f8000] = 3,
  206. [f81768d] = 3,
  207. [f81865f] = 2,
  208. [f81866a] = 3,
  209. };
  210. static struct platform_device *f71882fg_pdev;
  211. struct f71882fg_sio_data {
  212. enum chips type;
  213. };
  214. struct f71882fg_data {
  215. unsigned short addr;
  216. enum chips type;
  217. struct device *hwmon_dev;
  218. struct mutex update_lock;
  219. int temp_start; /* temp numbering start (0 or 1) */
  220. bool valid; /* true if following fields are valid */
  221. char auto_point_temp_signed;
  222. unsigned long last_updated; /* In jiffies */
  223. unsigned long last_limits; /* In jiffies */
  224. /* Register Values */
  225. u8 in[F71882FG_MAX_INS];
  226. u8 in1_max;
  227. u8 in_status;
  228. u8 in_beep;
  229. u16 fan[4];
  230. u16 fan_target[4];
  231. u16 fan_full_speed[4];
  232. u8 fan_status;
  233. u8 fan_beep;
  234. /*
  235. * Note: all models have max 3 temperature channels, but on some
  236. * they are addressed as 0-2 and on others as 1-3, so for coding
  237. * convenience we reserve space for 4 channels
  238. */
  239. u16 temp[4];
  240. u8 temp_ovt[4];
  241. u8 temp_high[4];
  242. u8 temp_hyst[2]; /* 2 hysts stored per reg */
  243. u8 temp_type[4];
  244. u8 temp_status;
  245. u8 temp_beep;
  246. u8 temp_diode_open;
  247. u8 temp_config;
  248. u8 pwm[4];
  249. u8 pwm_enable;
  250. u8 pwm_auto_point_hyst[2];
  251. u8 pwm_auto_point_mapping[4];
  252. u8 pwm_auto_point_pwm[4][5];
  253. s8 pwm_auto_point_temp[4][4];
  254. };
  255. static u8 f71882fg_read8(struct f71882fg_data *data, u8 reg)
  256. {
  257. u8 val;
  258. outb(reg, data->addr + ADDR_REG_OFFSET);
  259. val = inb(data->addr + DATA_REG_OFFSET);
  260. return val;
  261. }
  262. static u16 f71882fg_read16(struct f71882fg_data *data, u8 reg)
  263. {
  264. u16 val;
  265. val = f71882fg_read8(data, reg) << 8;
  266. val |= f71882fg_read8(data, reg + 1);
  267. return val;
  268. }
  269. static inline int fan_from_reg(u16 reg)
  270. {
  271. return reg ? (1500000 / reg) : 0;
  272. }
  273. static inline u16 fan_to_reg(int fan)
  274. {
  275. return fan ? (1500000 / fan) : 0;
  276. }
  277. static void f71882fg_write8(struct f71882fg_data *data, u8 reg, u8 val)
  278. {
  279. outb(reg, data->addr + ADDR_REG_OFFSET);
  280. outb(val, data->addr + DATA_REG_OFFSET);
  281. }
  282. static void f71882fg_write16(struct f71882fg_data *data, u8 reg, u16 val)
  283. {
  284. f71882fg_write8(data, reg, val >> 8);
  285. f71882fg_write8(data, reg + 1, val & 0xff);
  286. }
  287. static u16 f71882fg_read_temp(struct f71882fg_data *data, int nr)
  288. {
  289. if (data->type == f71858fg)
  290. return f71882fg_read16(data, F71882FG_REG_TEMP(nr));
  291. else
  292. return f71882fg_read8(data, F71882FG_REG_TEMP(nr));
  293. }
  294. static struct f71882fg_data *f71882fg_update_device(struct device *dev)
  295. {
  296. struct f71882fg_data *data = dev_get_drvdata(dev);
  297. int nr_fans = f71882fg_nr_fans[data->type];
  298. int nr_temps = f71882fg_nr_temps[data->type];
  299. int nr, reg, point;
  300. mutex_lock(&data->update_lock);
  301. /* Update once every 60 seconds */
  302. if (time_after(jiffies, data->last_limits + 60 * HZ) ||
  303. !data->valid) {
  304. if (f71882fg_has_in1_alarm[data->type]) {
  305. if (data->type == f81866a) {
  306. data->in1_max =
  307. f71882fg_read8(data,
  308. F81866_REG_IN1_HIGH);
  309. data->in_beep =
  310. f71882fg_read8(data,
  311. F81866_REG_IN_BEEP);
  312. } else {
  313. data->in1_max =
  314. f71882fg_read8(data,
  315. F71882FG_REG_IN1_HIGH);
  316. data->in_beep =
  317. f71882fg_read8(data,
  318. F71882FG_REG_IN_BEEP);
  319. }
  320. }
  321. /* Get High & boundary temps*/
  322. for (nr = data->temp_start; nr < nr_temps + data->temp_start;
  323. nr++) {
  324. data->temp_ovt[nr] = f71882fg_read8(data,
  325. F71882FG_REG_TEMP_OVT(nr));
  326. data->temp_high[nr] = f71882fg_read8(data,
  327. F71882FG_REG_TEMP_HIGH(nr));
  328. }
  329. if (data->type != f8000) {
  330. data->temp_hyst[0] = f71882fg_read8(data,
  331. F71882FG_REG_TEMP_HYST(0));
  332. data->temp_hyst[1] = f71882fg_read8(data,
  333. F71882FG_REG_TEMP_HYST(1));
  334. }
  335. /* All but the f71858fg / f8000 have this register */
  336. if ((data->type != f71858fg) && (data->type != f8000)) {
  337. reg = f71882fg_read8(data, F71882FG_REG_TEMP_TYPE);
  338. data->temp_type[1] = (reg & 0x02) ? 2 : 4;
  339. data->temp_type[2] = (reg & 0x04) ? 2 : 4;
  340. data->temp_type[3] = (reg & 0x08) ? 2 : 4;
  341. }
  342. if (f71882fg_fan_has_beep[data->type])
  343. data->fan_beep = f71882fg_read8(data,
  344. F71882FG_REG_FAN_BEEP);
  345. if (f71882fg_temp_has_beep[data->type])
  346. data->temp_beep = f71882fg_read8(data,
  347. F71882FG_REG_TEMP_BEEP);
  348. data->pwm_enable = f71882fg_read8(data,
  349. F71882FG_REG_PWM_ENABLE);
  350. data->pwm_auto_point_hyst[0] =
  351. f71882fg_read8(data, F71882FG_REG_FAN_HYST(0));
  352. data->pwm_auto_point_hyst[1] =
  353. f71882fg_read8(data, F71882FG_REG_FAN_HYST(1));
  354. for (nr = 0; nr < nr_fans; nr++) {
  355. data->pwm_auto_point_mapping[nr] =
  356. f71882fg_read8(data,
  357. F71882FG_REG_POINT_MAPPING(nr));
  358. switch (data->type) {
  359. default:
  360. for (point = 0; point < 5; point++) {
  361. data->pwm_auto_point_pwm[nr][point] =
  362. f71882fg_read8(data,
  363. F71882FG_REG_POINT_PWM
  364. (nr, point));
  365. }
  366. for (point = 0; point < 4; point++) {
  367. data->pwm_auto_point_temp[nr][point] =
  368. f71882fg_read8(data,
  369. F71882FG_REG_POINT_TEMP
  370. (nr, point));
  371. }
  372. break;
  373. case f71808e:
  374. case f71869:
  375. data->pwm_auto_point_pwm[nr][0] =
  376. f71882fg_read8(data,
  377. F71882FG_REG_POINT_PWM(nr, 0));
  378. fallthrough;
  379. case f71862fg:
  380. data->pwm_auto_point_pwm[nr][1] =
  381. f71882fg_read8(data,
  382. F71882FG_REG_POINT_PWM
  383. (nr, 1));
  384. data->pwm_auto_point_pwm[nr][4] =
  385. f71882fg_read8(data,
  386. F71882FG_REG_POINT_PWM
  387. (nr, 4));
  388. data->pwm_auto_point_temp[nr][0] =
  389. f71882fg_read8(data,
  390. F71882FG_REG_POINT_TEMP
  391. (nr, 0));
  392. data->pwm_auto_point_temp[nr][3] =
  393. f71882fg_read8(data,
  394. F71882FG_REG_POINT_TEMP
  395. (nr, 3));
  396. break;
  397. }
  398. }
  399. data->last_limits = jiffies;
  400. }
  401. /* Update every second */
  402. if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
  403. data->temp_status = f71882fg_read8(data,
  404. F71882FG_REG_TEMP_STATUS);
  405. data->temp_diode_open = f71882fg_read8(data,
  406. F71882FG_REG_TEMP_DIODE_OPEN);
  407. for (nr = data->temp_start; nr < nr_temps + data->temp_start;
  408. nr++)
  409. data->temp[nr] = f71882fg_read_temp(data, nr);
  410. data->fan_status = f71882fg_read8(data,
  411. F71882FG_REG_FAN_STATUS);
  412. for (nr = 0; nr < nr_fans; nr++) {
  413. data->fan[nr] = f71882fg_read16(data,
  414. F71882FG_REG_FAN(nr));
  415. data->fan_target[nr] =
  416. f71882fg_read16(data, F71882FG_REG_FAN_TARGET(nr));
  417. data->fan_full_speed[nr] =
  418. f71882fg_read16(data,
  419. F71882FG_REG_FAN_FULL_SPEED(nr));
  420. data->pwm[nr] =
  421. f71882fg_read8(data, F71882FG_REG_PWM(nr));
  422. }
  423. /* Some models have 1 more fan with limited capabilities */
  424. if (data->type == f71808a) {
  425. data->fan[2] = f71882fg_read16(data,
  426. F71882FG_REG_FAN(2));
  427. data->pwm[2] = f71882fg_read8(data,
  428. F71882FG_REG_PWM(2));
  429. }
  430. if (data->type == f8000)
  431. data->fan[3] = f71882fg_read16(data,
  432. F71882FG_REG_FAN(3));
  433. if (f71882fg_has_in1_alarm[data->type]) {
  434. if (data->type == f81866a)
  435. data->in_status = f71882fg_read8(data,
  436. F81866_REG_IN_STATUS);
  437. else
  438. data->in_status = f71882fg_read8(data,
  439. F71882FG_REG_IN_STATUS);
  440. }
  441. for (nr = 0; nr < F71882FG_MAX_INS; nr++)
  442. if (f71882fg_has_in[data->type][nr])
  443. data->in[nr] = f71882fg_read8(data,
  444. F71882FG_REG_IN(nr));
  445. data->last_updated = jiffies;
  446. data->valid = true;
  447. }
  448. mutex_unlock(&data->update_lock);
  449. return data;
  450. }
  451. static ssize_t name_show(struct device *dev, struct device_attribute *devattr,
  452. char *buf)
  453. {
  454. struct f71882fg_data *data = dev_get_drvdata(dev);
  455. return sprintf(buf, "%s\n", f71882fg_names[data->type]);
  456. }
  457. static DEVICE_ATTR_RO(name);
  458. static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
  459. char *buf)
  460. {
  461. struct f71882fg_data *data = f71882fg_update_device(dev);
  462. int nr = to_sensor_dev_attr_2(devattr)->index;
  463. int sign, temp;
  464. if (data->type == f71858fg) {
  465. /* TEMP_TABLE_SEL 1 or 3 ? */
  466. if (data->temp_config & 1) {
  467. sign = data->temp[nr] & 0x0001;
  468. temp = (data->temp[nr] >> 5) & 0x7ff;
  469. } else {
  470. sign = data->temp[nr] & 0x8000;
  471. temp = (data->temp[nr] >> 5) & 0x3ff;
  472. }
  473. temp *= 125;
  474. if (sign)
  475. temp -= 128000;
  476. } else {
  477. temp = ((s8)data->temp[nr]) * 1000;
  478. }
  479. return sprintf(buf, "%d\n", temp);
  480. }
  481. static ssize_t show_temp_max(struct device *dev, struct device_attribute
  482. *devattr, char *buf)
  483. {
  484. struct f71882fg_data *data = f71882fg_update_device(dev);
  485. int nr = to_sensor_dev_attr_2(devattr)->index;
  486. return sprintf(buf, "%d\n", data->temp_high[nr] * 1000);
  487. }
  488. static ssize_t store_temp_max(struct device *dev, struct device_attribute
  489. *devattr, const char *buf, size_t count)
  490. {
  491. struct f71882fg_data *data = dev_get_drvdata(dev);
  492. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  493. long val;
  494. err = kstrtol(buf, 10, &val);
  495. if (err)
  496. return err;
  497. val /= 1000;
  498. val = clamp_val(val, 0, 255);
  499. mutex_lock(&data->update_lock);
  500. f71882fg_write8(data, F71882FG_REG_TEMP_HIGH(nr), val);
  501. data->temp_high[nr] = val;
  502. mutex_unlock(&data->update_lock);
  503. return count;
  504. }
  505. static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
  506. *devattr, char *buf)
  507. {
  508. struct f71882fg_data *data = f71882fg_update_device(dev);
  509. int nr = to_sensor_dev_attr_2(devattr)->index;
  510. int temp_max_hyst;
  511. mutex_lock(&data->update_lock);
  512. if (nr & 1)
  513. temp_max_hyst = data->temp_hyst[nr / 2] >> 4;
  514. else
  515. temp_max_hyst = data->temp_hyst[nr / 2] & 0x0f;
  516. temp_max_hyst = (data->temp_high[nr] - temp_max_hyst) * 1000;
  517. mutex_unlock(&data->update_lock);
  518. return sprintf(buf, "%d\n", temp_max_hyst);
  519. }
  520. static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
  521. *devattr, const char *buf, size_t count)
  522. {
  523. struct f71882fg_data *data = dev_get_drvdata(dev);
  524. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  525. ssize_t ret = count;
  526. u8 reg;
  527. long val;
  528. err = kstrtol(buf, 10, &val);
  529. if (err)
  530. return err;
  531. val /= 1000;
  532. mutex_lock(&data->update_lock);
  533. /* convert abs to relative and check */
  534. data->temp_high[nr] = f71882fg_read8(data, F71882FG_REG_TEMP_HIGH(nr));
  535. val = clamp_val(val, data->temp_high[nr] - 15, data->temp_high[nr]);
  536. val = data->temp_high[nr] - val;
  537. /* convert value to register contents */
  538. reg = f71882fg_read8(data, F71882FG_REG_TEMP_HYST(nr / 2));
  539. if (nr & 1)
  540. reg = (reg & 0x0f) | (val << 4);
  541. else
  542. reg = (reg & 0xf0) | val;
  543. f71882fg_write8(data, F71882FG_REG_TEMP_HYST(nr / 2), reg);
  544. data->temp_hyst[nr / 2] = reg;
  545. mutex_unlock(&data->update_lock);
  546. return ret;
  547. }
  548. static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
  549. *devattr, char *buf)
  550. {
  551. struct f71882fg_data *data = f71882fg_update_device(dev);
  552. int nr = to_sensor_dev_attr_2(devattr)->index;
  553. if (data->temp_status & (1 << nr))
  554. return sprintf(buf, "1\n");
  555. else
  556. return sprintf(buf, "0\n");
  557. }
  558. static ssize_t show_temp_crit(struct device *dev, struct device_attribute
  559. *devattr, char *buf)
  560. {
  561. struct f71882fg_data *data = f71882fg_update_device(dev);
  562. int nr = to_sensor_dev_attr_2(devattr)->index;
  563. return sprintf(buf, "%d\n", data->temp_ovt[nr] * 1000);
  564. }
  565. static ssize_t store_temp_crit(struct device *dev, struct device_attribute
  566. *devattr, const char *buf, size_t count)
  567. {
  568. struct f71882fg_data *data = dev_get_drvdata(dev);
  569. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  570. long val;
  571. err = kstrtol(buf, 10, &val);
  572. if (err)
  573. return err;
  574. val /= 1000;
  575. val = clamp_val(val, 0, 255);
  576. mutex_lock(&data->update_lock);
  577. f71882fg_write8(data, F71882FG_REG_TEMP_OVT(nr), val);
  578. data->temp_ovt[nr] = val;
  579. mutex_unlock(&data->update_lock);
  580. return count;
  581. }
  582. static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
  583. *devattr, char *buf)
  584. {
  585. struct f71882fg_data *data = f71882fg_update_device(dev);
  586. int nr = to_sensor_dev_attr_2(devattr)->index;
  587. int temp_crit_hyst;
  588. mutex_lock(&data->update_lock);
  589. if (nr & 1)
  590. temp_crit_hyst = data->temp_hyst[nr / 2] >> 4;
  591. else
  592. temp_crit_hyst = data->temp_hyst[nr / 2] & 0x0f;
  593. temp_crit_hyst = (data->temp_ovt[nr] - temp_crit_hyst) * 1000;
  594. mutex_unlock(&data->update_lock);
  595. return sprintf(buf, "%d\n", temp_crit_hyst);
  596. }
  597. static ssize_t show_temp_fault(struct device *dev, struct device_attribute
  598. *devattr, char *buf)
  599. {
  600. struct f71882fg_data *data = f71882fg_update_device(dev);
  601. int nr = to_sensor_dev_attr_2(devattr)->index;
  602. if (data->temp_diode_open & (1 << nr))
  603. return sprintf(buf, "1\n");
  604. else
  605. return sprintf(buf, "0\n");
  606. }
  607. /*
  608. * Temp attr for the f71858fg, the f71858fg is special as it has its
  609. * temperature indexes start at 0 (the others start at 1)
  610. */
  611. static struct sensor_device_attribute_2 f71858fg_temp_attr[] = {
  612. SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
  613. SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
  614. store_temp_max, 0, 0),
  615. SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  616. store_temp_max_hyst, 0, 0),
  617. SENSOR_ATTR_2(temp1_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 0),
  618. SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  619. store_temp_crit, 0, 0),
  620. SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  621. 0, 0),
  622. SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
  623. SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
  624. SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
  625. SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
  626. store_temp_max, 0, 1),
  627. SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  628. store_temp_max_hyst, 0, 1),
  629. SENSOR_ATTR_2(temp2_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
  630. SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  631. store_temp_crit, 0, 1),
  632. SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  633. 0, 1),
  634. SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
  635. SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
  636. SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
  637. SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
  638. store_temp_max, 0, 2),
  639. SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  640. store_temp_max_hyst, 0, 2),
  641. SENSOR_ATTR_2(temp3_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
  642. SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  643. store_temp_crit, 0, 2),
  644. SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  645. 0, 2),
  646. SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
  647. SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
  648. };
  649. static ssize_t show_temp_type(struct device *dev, struct device_attribute
  650. *devattr, char *buf)
  651. {
  652. struct f71882fg_data *data = f71882fg_update_device(dev);
  653. int nr = to_sensor_dev_attr_2(devattr)->index;
  654. return sprintf(buf, "%d\n", data->temp_type[nr]);
  655. }
  656. /* Temp attr for the standard models */
  657. static struct sensor_device_attribute_2 fxxxx_temp_attr[3][9] = { {
  658. SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 1),
  659. SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
  660. store_temp_max, 0, 1),
  661. SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  662. store_temp_max_hyst, 0, 1),
  663. /*
  664. * Should really be temp1_max_alarm, but older versions did not handle
  665. * the max and crit alarms separately and lm_sensors v2 depends on the
  666. * presence of temp#_alarm files. The same goes for temp2/3 _alarm.
  667. */
  668. SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
  669. SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  670. store_temp_crit, 0, 1),
  671. SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  672. 0, 1),
  673. SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
  674. SENSOR_ATTR_2(temp1_type, S_IRUGO, show_temp_type, NULL, 0, 1),
  675. SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
  676. }, {
  677. SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 2),
  678. SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
  679. store_temp_max, 0, 2),
  680. SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  681. store_temp_max_hyst, 0, 2),
  682. /* Should be temp2_max_alarm, see temp1_alarm note */
  683. SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
  684. SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  685. store_temp_crit, 0, 2),
  686. SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  687. 0, 2),
  688. SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
  689. SENSOR_ATTR_2(temp2_type, S_IRUGO, show_temp_type, NULL, 0, 2),
  690. SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
  691. }, {
  692. SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 3),
  693. SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
  694. store_temp_max, 0, 3),
  695. SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  696. store_temp_max_hyst, 0, 3),
  697. /* Should be temp3_max_alarm, see temp1_alarm note */
  698. SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 3),
  699. SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  700. store_temp_crit, 0, 3),
  701. SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  702. 0, 3),
  703. SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 7),
  704. SENSOR_ATTR_2(temp3_type, S_IRUGO, show_temp_type, NULL, 0, 3),
  705. SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 3),
  706. } };
  707. static ssize_t show_temp_beep(struct device *dev, struct device_attribute
  708. *devattr, char *buf)
  709. {
  710. struct f71882fg_data *data = f71882fg_update_device(dev);
  711. int nr = to_sensor_dev_attr_2(devattr)->index;
  712. if (data->temp_beep & (1 << nr))
  713. return sprintf(buf, "1\n");
  714. else
  715. return sprintf(buf, "0\n");
  716. }
  717. static ssize_t store_temp_beep(struct device *dev, struct device_attribute
  718. *devattr, const char *buf, size_t count)
  719. {
  720. struct f71882fg_data *data = dev_get_drvdata(dev);
  721. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  722. unsigned long val;
  723. err = kstrtoul(buf, 10, &val);
  724. if (err)
  725. return err;
  726. mutex_lock(&data->update_lock);
  727. data->temp_beep = f71882fg_read8(data, F71882FG_REG_TEMP_BEEP);
  728. if (val)
  729. data->temp_beep |= 1 << nr;
  730. else
  731. data->temp_beep &= ~(1 << nr);
  732. f71882fg_write8(data, F71882FG_REG_TEMP_BEEP, data->temp_beep);
  733. mutex_unlock(&data->update_lock);
  734. return count;
  735. }
  736. /* Temp attr for models which can beep on temp alarm */
  737. static struct sensor_device_attribute_2 fxxxx_temp_beep_attr[3][2] = { {
  738. SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  739. store_temp_beep, 0, 1),
  740. SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  741. store_temp_beep, 0, 5),
  742. }, {
  743. SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  744. store_temp_beep, 0, 2),
  745. SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  746. store_temp_beep, 0, 6),
  747. }, {
  748. SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  749. store_temp_beep, 0, 3),
  750. SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  751. store_temp_beep, 0, 7),
  752. } };
  753. static struct sensor_device_attribute_2 f81866_temp_beep_attr[3][2] = { {
  754. SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  755. store_temp_beep, 0, 0),
  756. SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  757. store_temp_beep, 0, 4),
  758. }, {
  759. SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  760. store_temp_beep, 0, 1),
  761. SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  762. store_temp_beep, 0, 5),
  763. }, {
  764. SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  765. store_temp_beep, 0, 2),
  766. SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  767. store_temp_beep, 0, 6),
  768. } };
  769. /*
  770. * Temp attr for the f8000
  771. * Note on the f8000 temp_ovt (crit) is used as max, and temp_high (max)
  772. * is used as hysteresis value to clear alarms
  773. * Also like the f71858fg its temperature indexes start at 0
  774. */
  775. static struct sensor_device_attribute_2 f8000_temp_attr[] = {
  776. SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
  777. SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_crit,
  778. store_temp_crit, 0, 0),
  779. SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
  780. store_temp_max, 0, 0),
  781. SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
  782. SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
  783. SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
  784. SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_crit,
  785. store_temp_crit, 0, 1),
  786. SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
  787. store_temp_max, 0, 1),
  788. SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
  789. SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
  790. SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
  791. SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_crit,
  792. store_temp_crit, 0, 2),
  793. SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
  794. store_temp_max, 0, 2),
  795. SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
  796. SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
  797. };
  798. static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
  799. char *buf)
  800. {
  801. struct f71882fg_data *data = f71882fg_update_device(dev);
  802. int nr = to_sensor_dev_attr_2(devattr)->index;
  803. return sprintf(buf, "%d\n", data->in[nr] * 8);
  804. }
  805. /* in attr for all models */
  806. static struct sensor_device_attribute_2 fxxxx_in_attr[] = {
  807. SENSOR_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0),
  808. SENSOR_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 0, 1),
  809. SENSOR_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 0, 2),
  810. SENSOR_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 0, 3),
  811. SENSOR_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 0, 4),
  812. SENSOR_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 0, 5),
  813. SENSOR_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 0, 6),
  814. SENSOR_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 0, 7),
  815. SENSOR_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 0, 8),
  816. SENSOR_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 0, 9),
  817. SENSOR_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 0, 10),
  818. };
  819. static ssize_t show_in_max(struct device *dev, struct device_attribute
  820. *devattr, char *buf)
  821. {
  822. struct f71882fg_data *data = f71882fg_update_device(dev);
  823. return sprintf(buf, "%d\n", data->in1_max * 8);
  824. }
  825. static ssize_t store_in_max(struct device *dev, struct device_attribute
  826. *devattr, const char *buf, size_t count)
  827. {
  828. struct f71882fg_data *data = dev_get_drvdata(dev);
  829. int err;
  830. long val;
  831. err = kstrtol(buf, 10, &val);
  832. if (err)
  833. return err;
  834. val /= 8;
  835. val = clamp_val(val, 0, 255);
  836. mutex_lock(&data->update_lock);
  837. if (data->type == f81866a)
  838. f71882fg_write8(data, F81866_REG_IN1_HIGH, val);
  839. else
  840. f71882fg_write8(data, F71882FG_REG_IN1_HIGH, val);
  841. data->in1_max = val;
  842. mutex_unlock(&data->update_lock);
  843. return count;
  844. }
  845. static ssize_t show_in_beep(struct device *dev, struct device_attribute
  846. *devattr, char *buf)
  847. {
  848. struct f71882fg_data *data = f71882fg_update_device(dev);
  849. int nr = to_sensor_dev_attr_2(devattr)->index;
  850. if (data->in_beep & (1 << nr))
  851. return sprintf(buf, "1\n");
  852. else
  853. return sprintf(buf, "0\n");
  854. }
  855. static ssize_t store_in_beep(struct device *dev, struct device_attribute
  856. *devattr, const char *buf, size_t count)
  857. {
  858. struct f71882fg_data *data = dev_get_drvdata(dev);
  859. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  860. unsigned long val;
  861. err = kstrtoul(buf, 10, &val);
  862. if (err)
  863. return err;
  864. mutex_lock(&data->update_lock);
  865. if (data->type == f81866a)
  866. data->in_beep = f71882fg_read8(data, F81866_REG_IN_BEEP);
  867. else
  868. data->in_beep = f71882fg_read8(data, F71882FG_REG_IN_BEEP);
  869. if (val)
  870. data->in_beep |= 1 << nr;
  871. else
  872. data->in_beep &= ~(1 << nr);
  873. if (data->type == f81866a)
  874. f71882fg_write8(data, F81866_REG_IN_BEEP, data->in_beep);
  875. else
  876. f71882fg_write8(data, F71882FG_REG_IN_BEEP, data->in_beep);
  877. mutex_unlock(&data->update_lock);
  878. return count;
  879. }
  880. static ssize_t show_in_alarm(struct device *dev, struct device_attribute
  881. *devattr, char *buf)
  882. {
  883. struct f71882fg_data *data = f71882fg_update_device(dev);
  884. int nr = to_sensor_dev_attr_2(devattr)->index;
  885. if (data->in_status & (1 << nr))
  886. return sprintf(buf, "1\n");
  887. else
  888. return sprintf(buf, "0\n");
  889. }
  890. /* For models with in1 alarm capability */
  891. static struct sensor_device_attribute_2 fxxxx_in1_alarm_attr[] = {
  892. SENSOR_ATTR_2(in1_max, S_IRUGO|S_IWUSR, show_in_max, store_in_max,
  893. 0, 1),
  894. SENSOR_ATTR_2(in1_beep, S_IRUGO|S_IWUSR, show_in_beep, store_in_beep,
  895. 0, 1),
  896. SENSOR_ATTR_2(in1_alarm, S_IRUGO, show_in_alarm, NULL, 0, 1),
  897. };
  898. static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
  899. char *buf)
  900. {
  901. struct f71882fg_data *data = f71882fg_update_device(dev);
  902. int nr = to_sensor_dev_attr_2(devattr)->index;
  903. int speed = fan_from_reg(data->fan[nr]);
  904. if (speed == FAN_MIN_DETECT)
  905. speed = 0;
  906. return sprintf(buf, "%d\n", speed);
  907. }
  908. static ssize_t show_fan_full_speed(struct device *dev,
  909. struct device_attribute *devattr, char *buf)
  910. {
  911. struct f71882fg_data *data = f71882fg_update_device(dev);
  912. int nr = to_sensor_dev_attr_2(devattr)->index;
  913. int speed = fan_from_reg(data->fan_full_speed[nr]);
  914. return sprintf(buf, "%d\n", speed);
  915. }
  916. static ssize_t store_fan_full_speed(struct device *dev,
  917. struct device_attribute *devattr,
  918. const char *buf, size_t count)
  919. {
  920. struct f71882fg_data *data = dev_get_drvdata(dev);
  921. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  922. long val;
  923. err = kstrtol(buf, 10, &val);
  924. if (err)
  925. return err;
  926. val = clamp_val(val, 23, 1500000);
  927. val = fan_to_reg(val);
  928. mutex_lock(&data->update_lock);
  929. f71882fg_write16(data, F71882FG_REG_FAN_FULL_SPEED(nr), val);
  930. data->fan_full_speed[nr] = val;
  931. mutex_unlock(&data->update_lock);
  932. return count;
  933. }
  934. static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
  935. *devattr, char *buf)
  936. {
  937. struct f71882fg_data *data = f71882fg_update_device(dev);
  938. int nr = to_sensor_dev_attr_2(devattr)->index;
  939. if (data->fan_status & (1 << nr))
  940. return sprintf(buf, "1\n");
  941. else
  942. return sprintf(buf, "0\n");
  943. }
  944. static ssize_t show_pwm(struct device *dev,
  945. struct device_attribute *devattr, char *buf)
  946. {
  947. struct f71882fg_data *data = f71882fg_update_device(dev);
  948. int val, nr = to_sensor_dev_attr_2(devattr)->index;
  949. mutex_lock(&data->update_lock);
  950. if (data->pwm_enable & (1 << (2 * nr)))
  951. /* PWM mode */
  952. val = data->pwm[nr];
  953. else {
  954. /* RPM mode */
  955. if (fan_from_reg(data->fan_full_speed[nr]))
  956. val = 255 * fan_from_reg(data->fan_target[nr])
  957. / fan_from_reg(data->fan_full_speed[nr]);
  958. else
  959. val = 0;
  960. }
  961. mutex_unlock(&data->update_lock);
  962. return sprintf(buf, "%d\n", val);
  963. }
  964. static ssize_t store_pwm(struct device *dev,
  965. struct device_attribute *devattr, const char *buf,
  966. size_t count)
  967. {
  968. struct f71882fg_data *data = dev_get_drvdata(dev);
  969. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  970. long val;
  971. err = kstrtol(buf, 10, &val);
  972. if (err)
  973. return err;
  974. val = clamp_val(val, 0, 255);
  975. mutex_lock(&data->update_lock);
  976. data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  977. if ((data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 3) != 2) ||
  978. (data->type != f8000 && !((data->pwm_enable >> 2 * nr) & 2))) {
  979. count = -EROFS;
  980. goto leave;
  981. }
  982. if (data->pwm_enable & (1 << (2 * nr))) {
  983. /* PWM mode */
  984. f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
  985. data->pwm[nr] = val;
  986. } else {
  987. /* RPM mode */
  988. int target, full_speed;
  989. full_speed = f71882fg_read16(data,
  990. F71882FG_REG_FAN_FULL_SPEED(nr));
  991. target = fan_to_reg(val * fan_from_reg(full_speed) / 255);
  992. f71882fg_write16(data, F71882FG_REG_FAN_TARGET(nr), target);
  993. data->fan_target[nr] = target;
  994. data->fan_full_speed[nr] = full_speed;
  995. }
  996. leave:
  997. mutex_unlock(&data->update_lock);
  998. return count;
  999. }
  1000. static ssize_t show_pwm_enable(struct device *dev,
  1001. struct device_attribute *devattr, char *buf)
  1002. {
  1003. int result = 0;
  1004. struct f71882fg_data *data = f71882fg_update_device(dev);
  1005. int nr = to_sensor_dev_attr_2(devattr)->index;
  1006. switch ((data->pwm_enable >> 2 * nr) & 3) {
  1007. case 0:
  1008. case 1:
  1009. result = 2; /* Normal auto mode */
  1010. break;
  1011. case 2:
  1012. result = 1; /* Manual mode */
  1013. break;
  1014. case 3:
  1015. if (data->type == f8000)
  1016. result = 3; /* Thermostat mode */
  1017. else
  1018. result = 1; /* Manual mode */
  1019. break;
  1020. }
  1021. return sprintf(buf, "%d\n", result);
  1022. }
  1023. static ssize_t store_pwm_enable(struct device *dev, struct device_attribute
  1024. *devattr, const char *buf, size_t count)
  1025. {
  1026. struct f71882fg_data *data = dev_get_drvdata(dev);
  1027. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1028. long val;
  1029. err = kstrtol(buf, 10, &val);
  1030. if (err)
  1031. return err;
  1032. /* Special case for F8000 pwm channel 3 which only does auto mode */
  1033. if (data->type == f8000 && nr == 2 && val != 2)
  1034. return -EINVAL;
  1035. mutex_lock(&data->update_lock);
  1036. data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  1037. /* Special case for F8000 auto PWM mode / Thermostat mode */
  1038. if (data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 1)) {
  1039. switch (val) {
  1040. case 2:
  1041. data->pwm_enable &= ~(2 << (2 * nr));
  1042. break; /* Normal auto mode */
  1043. case 3:
  1044. data->pwm_enable |= 2 << (2 * nr);
  1045. break; /* Thermostat mode */
  1046. default:
  1047. count = -EINVAL;
  1048. goto leave;
  1049. }
  1050. } else {
  1051. switch (val) {
  1052. case 1:
  1053. /* The f71858fg does not support manual RPM mode */
  1054. if (data->type == f71858fg &&
  1055. ((data->pwm_enable >> (2 * nr)) & 1)) {
  1056. count = -EINVAL;
  1057. goto leave;
  1058. }
  1059. data->pwm_enable |= 2 << (2 * nr);
  1060. break; /* Manual */
  1061. case 2:
  1062. data->pwm_enable &= ~(2 << (2 * nr));
  1063. break; /* Normal auto mode */
  1064. default:
  1065. count = -EINVAL;
  1066. goto leave;
  1067. }
  1068. }
  1069. f71882fg_write8(data, F71882FG_REG_PWM_ENABLE, data->pwm_enable);
  1070. leave:
  1071. mutex_unlock(&data->update_lock);
  1072. return count;
  1073. }
  1074. static ssize_t show_pwm_interpolate(struct device *dev,
  1075. struct device_attribute *devattr, char *buf)
  1076. {
  1077. int result;
  1078. struct f71882fg_data *data = f71882fg_update_device(dev);
  1079. int nr = to_sensor_dev_attr_2(devattr)->index;
  1080. result = (data->pwm_auto_point_mapping[nr] >> 4) & 1;
  1081. return sprintf(buf, "%d\n", result);
  1082. }
  1083. static ssize_t store_pwm_interpolate(struct device *dev,
  1084. struct device_attribute *devattr,
  1085. const char *buf, size_t count)
  1086. {
  1087. struct f71882fg_data *data = dev_get_drvdata(dev);
  1088. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1089. unsigned long val;
  1090. err = kstrtoul(buf, 10, &val);
  1091. if (err)
  1092. return err;
  1093. mutex_lock(&data->update_lock);
  1094. data->pwm_auto_point_mapping[nr] =
  1095. f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
  1096. if (val)
  1097. val = data->pwm_auto_point_mapping[nr] | (1 << 4);
  1098. else
  1099. val = data->pwm_auto_point_mapping[nr] & (~(1 << 4));
  1100. f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
  1101. data->pwm_auto_point_mapping[nr] = val;
  1102. mutex_unlock(&data->update_lock);
  1103. return count;
  1104. }
  1105. /* Fan / PWM attr common to all models */
  1106. static struct sensor_device_attribute_2 fxxxx_fan_attr[4][6] = { {
  1107. SENSOR_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0),
  1108. SENSOR_ATTR_2(fan1_full_speed, S_IRUGO|S_IWUSR,
  1109. show_fan_full_speed,
  1110. store_fan_full_speed, 0, 0),
  1111. SENSOR_ATTR_2(fan1_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 0),
  1112. SENSOR_ATTR_2(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 0),
  1113. SENSOR_ATTR_2(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  1114. store_pwm_enable, 0, 0),
  1115. SENSOR_ATTR_2(pwm1_interpolate, S_IRUGO|S_IWUSR,
  1116. show_pwm_interpolate, store_pwm_interpolate, 0, 0),
  1117. }, {
  1118. SENSOR_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 0, 1),
  1119. SENSOR_ATTR_2(fan2_full_speed, S_IRUGO|S_IWUSR,
  1120. show_fan_full_speed,
  1121. store_fan_full_speed, 0, 1),
  1122. SENSOR_ATTR_2(fan2_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 1),
  1123. SENSOR_ATTR_2(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 1),
  1124. SENSOR_ATTR_2(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  1125. store_pwm_enable, 0, 1),
  1126. SENSOR_ATTR_2(pwm2_interpolate, S_IRUGO|S_IWUSR,
  1127. show_pwm_interpolate, store_pwm_interpolate, 0, 1),
  1128. }, {
  1129. SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
  1130. SENSOR_ATTR_2(fan3_full_speed, S_IRUGO|S_IWUSR,
  1131. show_fan_full_speed,
  1132. store_fan_full_speed, 0, 2),
  1133. SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
  1134. SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 2),
  1135. SENSOR_ATTR_2(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  1136. store_pwm_enable, 0, 2),
  1137. SENSOR_ATTR_2(pwm3_interpolate, S_IRUGO|S_IWUSR,
  1138. show_pwm_interpolate, store_pwm_interpolate, 0, 2),
  1139. }, {
  1140. SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
  1141. SENSOR_ATTR_2(fan4_full_speed, S_IRUGO|S_IWUSR,
  1142. show_fan_full_speed,
  1143. store_fan_full_speed, 0, 3),
  1144. SENSOR_ATTR_2(fan4_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 3),
  1145. SENSOR_ATTR_2(pwm4, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 3),
  1146. SENSOR_ATTR_2(pwm4_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  1147. store_pwm_enable, 0, 3),
  1148. SENSOR_ATTR_2(pwm4_interpolate, S_IRUGO|S_IWUSR,
  1149. show_pwm_interpolate, store_pwm_interpolate, 0, 3),
  1150. } };
  1151. static ssize_t show_simple_pwm(struct device *dev,
  1152. struct device_attribute *devattr, char *buf)
  1153. {
  1154. struct f71882fg_data *data = f71882fg_update_device(dev);
  1155. int val, nr = to_sensor_dev_attr_2(devattr)->index;
  1156. val = data->pwm[nr];
  1157. return sprintf(buf, "%d\n", val);
  1158. }
  1159. static ssize_t store_simple_pwm(struct device *dev,
  1160. struct device_attribute *devattr,
  1161. const char *buf, size_t count)
  1162. {
  1163. struct f71882fg_data *data = dev_get_drvdata(dev);
  1164. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1165. long val;
  1166. err = kstrtol(buf, 10, &val);
  1167. if (err)
  1168. return err;
  1169. val = clamp_val(val, 0, 255);
  1170. mutex_lock(&data->update_lock);
  1171. f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
  1172. data->pwm[nr] = val;
  1173. mutex_unlock(&data->update_lock);
  1174. return count;
  1175. }
  1176. /* Attr for the third fan of the f71808a, which only has manual pwm */
  1177. static struct sensor_device_attribute_2 f71808a_fan3_attr[] = {
  1178. SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
  1179. SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
  1180. SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR,
  1181. show_simple_pwm, store_simple_pwm, 0, 2),
  1182. };
  1183. static ssize_t show_fan_beep(struct device *dev, struct device_attribute
  1184. *devattr, char *buf)
  1185. {
  1186. struct f71882fg_data *data = f71882fg_update_device(dev);
  1187. int nr = to_sensor_dev_attr_2(devattr)->index;
  1188. if (data->fan_beep & (1 << nr))
  1189. return sprintf(buf, "1\n");
  1190. else
  1191. return sprintf(buf, "0\n");
  1192. }
  1193. static ssize_t store_fan_beep(struct device *dev, struct device_attribute
  1194. *devattr, const char *buf, size_t count)
  1195. {
  1196. struct f71882fg_data *data = dev_get_drvdata(dev);
  1197. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1198. unsigned long val;
  1199. err = kstrtoul(buf, 10, &val);
  1200. if (err)
  1201. return err;
  1202. mutex_lock(&data->update_lock);
  1203. data->fan_beep = f71882fg_read8(data, F71882FG_REG_FAN_BEEP);
  1204. if (val)
  1205. data->fan_beep |= 1 << nr;
  1206. else
  1207. data->fan_beep &= ~(1 << nr);
  1208. f71882fg_write8(data, F71882FG_REG_FAN_BEEP, data->fan_beep);
  1209. mutex_unlock(&data->update_lock);
  1210. return count;
  1211. }
  1212. /* Attr for models which can beep on Fan alarm */
  1213. static struct sensor_device_attribute_2 fxxxx_fan_beep_attr[] = {
  1214. SENSOR_ATTR_2(fan1_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  1215. store_fan_beep, 0, 0),
  1216. SENSOR_ATTR_2(fan2_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  1217. store_fan_beep, 0, 1),
  1218. SENSOR_ATTR_2(fan3_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  1219. store_fan_beep, 0, 2),
  1220. SENSOR_ATTR_2(fan4_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  1221. store_fan_beep, 0, 3),
  1222. };
  1223. static ssize_t show_pwm_auto_point_channel(struct device *dev,
  1224. struct device_attribute *devattr,
  1225. char *buf)
  1226. {
  1227. int result;
  1228. struct f71882fg_data *data = f71882fg_update_device(dev);
  1229. int nr = to_sensor_dev_attr_2(devattr)->index;
  1230. result = 1 << ((data->pwm_auto_point_mapping[nr] & 3) -
  1231. data->temp_start);
  1232. return sprintf(buf, "%d\n", result);
  1233. }
  1234. static ssize_t store_pwm_auto_point_channel(struct device *dev,
  1235. struct device_attribute *devattr,
  1236. const char *buf, size_t count)
  1237. {
  1238. struct f71882fg_data *data = dev_get_drvdata(dev);
  1239. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1240. long val;
  1241. err = kstrtol(buf, 10, &val);
  1242. if (err)
  1243. return err;
  1244. switch (val) {
  1245. case 1:
  1246. val = 0;
  1247. break;
  1248. case 2:
  1249. val = 1;
  1250. break;
  1251. case 4:
  1252. val = 2;
  1253. break;
  1254. default:
  1255. return -EINVAL;
  1256. }
  1257. val += data->temp_start;
  1258. mutex_lock(&data->update_lock);
  1259. data->pwm_auto_point_mapping[nr] =
  1260. f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
  1261. val = (data->pwm_auto_point_mapping[nr] & 0xfc) | val;
  1262. f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
  1263. data->pwm_auto_point_mapping[nr] = val;
  1264. mutex_unlock(&data->update_lock);
  1265. return count;
  1266. }
  1267. static ssize_t show_pwm_auto_point_pwm(struct device *dev,
  1268. struct device_attribute *devattr,
  1269. char *buf)
  1270. {
  1271. int result;
  1272. struct f71882fg_data *data = f71882fg_update_device(dev);
  1273. int pwm = to_sensor_dev_attr_2(devattr)->index;
  1274. int point = to_sensor_dev_attr_2(devattr)->nr;
  1275. mutex_lock(&data->update_lock);
  1276. if (data->pwm_enable & (1 << (2 * pwm))) {
  1277. /* PWM mode */
  1278. result = data->pwm_auto_point_pwm[pwm][point];
  1279. } else {
  1280. /* RPM mode */
  1281. result = 32 * 255 / (32 + data->pwm_auto_point_pwm[pwm][point]);
  1282. }
  1283. mutex_unlock(&data->update_lock);
  1284. return sprintf(buf, "%d\n", result);
  1285. }
  1286. static ssize_t store_pwm_auto_point_pwm(struct device *dev,
  1287. struct device_attribute *devattr,
  1288. const char *buf, size_t count)
  1289. {
  1290. struct f71882fg_data *data = dev_get_drvdata(dev);
  1291. int err, pwm = to_sensor_dev_attr_2(devattr)->index;
  1292. int point = to_sensor_dev_attr_2(devattr)->nr;
  1293. long val;
  1294. err = kstrtol(buf, 10, &val);
  1295. if (err)
  1296. return err;
  1297. val = clamp_val(val, 0, 255);
  1298. mutex_lock(&data->update_lock);
  1299. data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  1300. if (data->pwm_enable & (1 << (2 * pwm))) {
  1301. /* PWM mode */
  1302. } else {
  1303. /* RPM mode */
  1304. if (val < 29) /* Prevent negative numbers */
  1305. val = 255;
  1306. else
  1307. val = (255 - val) * 32 / val;
  1308. }
  1309. f71882fg_write8(data, F71882FG_REG_POINT_PWM(pwm, point), val);
  1310. data->pwm_auto_point_pwm[pwm][point] = val;
  1311. mutex_unlock(&data->update_lock);
  1312. return count;
  1313. }
  1314. static ssize_t show_pwm_auto_point_temp(struct device *dev,
  1315. struct device_attribute *devattr,
  1316. char *buf)
  1317. {
  1318. int result;
  1319. struct f71882fg_data *data = f71882fg_update_device(dev);
  1320. int pwm = to_sensor_dev_attr_2(devattr)->index;
  1321. int point = to_sensor_dev_attr_2(devattr)->nr;
  1322. result = data->pwm_auto_point_temp[pwm][point];
  1323. return sprintf(buf, "%d\n", 1000 * result);
  1324. }
  1325. static ssize_t store_pwm_auto_point_temp(struct device *dev,
  1326. struct device_attribute *devattr,
  1327. const char *buf, size_t count)
  1328. {
  1329. struct f71882fg_data *data = dev_get_drvdata(dev);
  1330. int err, pwm = to_sensor_dev_attr_2(devattr)->index;
  1331. int point = to_sensor_dev_attr_2(devattr)->nr;
  1332. long val;
  1333. err = kstrtol(buf, 10, &val);
  1334. if (err)
  1335. return err;
  1336. val /= 1000;
  1337. if (data->auto_point_temp_signed)
  1338. val = clamp_val(val, -128, 127);
  1339. else
  1340. val = clamp_val(val, 0, 127);
  1341. mutex_lock(&data->update_lock);
  1342. f71882fg_write8(data, F71882FG_REG_POINT_TEMP(pwm, point), val);
  1343. data->pwm_auto_point_temp[pwm][point] = val;
  1344. mutex_unlock(&data->update_lock);
  1345. return count;
  1346. }
  1347. static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
  1348. struct device_attribute *devattr,
  1349. char *buf)
  1350. {
  1351. int result = 0;
  1352. struct f71882fg_data *data = f71882fg_update_device(dev);
  1353. int nr = to_sensor_dev_attr_2(devattr)->index;
  1354. int point = to_sensor_dev_attr_2(devattr)->nr;
  1355. mutex_lock(&data->update_lock);
  1356. if (nr & 1)
  1357. result = data->pwm_auto_point_hyst[nr / 2] >> 4;
  1358. else
  1359. result = data->pwm_auto_point_hyst[nr / 2] & 0x0f;
  1360. result = 1000 * (data->pwm_auto_point_temp[nr][point] - result);
  1361. mutex_unlock(&data->update_lock);
  1362. return sprintf(buf, "%d\n", result);
  1363. }
  1364. static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
  1365. struct device_attribute *devattr,
  1366. const char *buf, size_t count)
  1367. {
  1368. struct f71882fg_data *data = dev_get_drvdata(dev);
  1369. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1370. int point = to_sensor_dev_attr_2(devattr)->nr;
  1371. u8 reg;
  1372. long val;
  1373. err = kstrtol(buf, 10, &val);
  1374. if (err)
  1375. return err;
  1376. val /= 1000;
  1377. mutex_lock(&data->update_lock);
  1378. data->pwm_auto_point_temp[nr][point] =
  1379. f71882fg_read8(data, F71882FG_REG_POINT_TEMP(nr, point));
  1380. val = clamp_val(val, data->pwm_auto_point_temp[nr][point] - 15,
  1381. data->pwm_auto_point_temp[nr][point]);
  1382. val = data->pwm_auto_point_temp[nr][point] - val;
  1383. reg = f71882fg_read8(data, F71882FG_REG_FAN_HYST(nr / 2));
  1384. if (nr & 1)
  1385. reg = (reg & 0x0f) | (val << 4);
  1386. else
  1387. reg = (reg & 0xf0) | val;
  1388. f71882fg_write8(data, F71882FG_REG_FAN_HYST(nr / 2), reg);
  1389. data->pwm_auto_point_hyst[nr / 2] = reg;
  1390. mutex_unlock(&data->update_lock);
  1391. return count;
  1392. }
  1393. /*
  1394. * PWM attr for the f71862fg, fewer pwms and fewer zones per pwm than the
  1395. * standard models
  1396. */
  1397. static struct sensor_device_attribute_2 f71862fg_auto_pwm_attr[3][7] = { {
  1398. SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
  1399. show_pwm_auto_point_channel,
  1400. store_pwm_auto_point_channel, 0, 0),
  1401. SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
  1402. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1403. 1, 0),
  1404. SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
  1405. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1406. 4, 0),
  1407. SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
  1408. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1409. 0, 0),
  1410. SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
  1411. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1412. 3, 0),
  1413. SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  1414. show_pwm_auto_point_temp_hyst,
  1415. store_pwm_auto_point_temp_hyst,
  1416. 0, 0),
  1417. SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
  1418. show_pwm_auto_point_temp_hyst, NULL, 3, 0),
  1419. }, {
  1420. SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
  1421. show_pwm_auto_point_channel,
  1422. store_pwm_auto_point_channel, 0, 1),
  1423. SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
  1424. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1425. 1, 1),
  1426. SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
  1427. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1428. 4, 1),
  1429. SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
  1430. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1431. 0, 1),
  1432. SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
  1433. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1434. 3, 1),
  1435. SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  1436. show_pwm_auto_point_temp_hyst,
  1437. store_pwm_auto_point_temp_hyst,
  1438. 0, 1),
  1439. SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
  1440. show_pwm_auto_point_temp_hyst, NULL, 3, 1),
  1441. }, {
  1442. SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
  1443. show_pwm_auto_point_channel,
  1444. store_pwm_auto_point_channel, 0, 2),
  1445. SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
  1446. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1447. 1, 2),
  1448. SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
  1449. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1450. 4, 2),
  1451. SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
  1452. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1453. 0, 2),
  1454. SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
  1455. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1456. 3, 2),
  1457. SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  1458. show_pwm_auto_point_temp_hyst,
  1459. store_pwm_auto_point_temp_hyst,
  1460. 0, 2),
  1461. SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
  1462. show_pwm_auto_point_temp_hyst, NULL, 3, 2),
  1463. } };
  1464. /*
  1465. * PWM attr for the f71808e/f71869, almost identical to the f71862fg, but the
  1466. * pwm setting when the temperature is above the pwmX_auto_point1_temp can be
  1467. * programmed instead of being hardcoded to 0xff
  1468. */
  1469. static struct sensor_device_attribute_2 f71869_auto_pwm_attr[3][8] = { {
  1470. SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
  1471. show_pwm_auto_point_channel,
  1472. store_pwm_auto_point_channel, 0, 0),
  1473. SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
  1474. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1475. 0, 0),
  1476. SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
  1477. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1478. 1, 0),
  1479. SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
  1480. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1481. 4, 0),
  1482. SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
  1483. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1484. 0, 0),
  1485. SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
  1486. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1487. 3, 0),
  1488. SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  1489. show_pwm_auto_point_temp_hyst,
  1490. store_pwm_auto_point_temp_hyst,
  1491. 0, 0),
  1492. SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
  1493. show_pwm_auto_point_temp_hyst, NULL, 3, 0),
  1494. }, {
  1495. SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
  1496. show_pwm_auto_point_channel,
  1497. store_pwm_auto_point_channel, 0, 1),
  1498. SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
  1499. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1500. 0, 1),
  1501. SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
  1502. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1503. 1, 1),
  1504. SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
  1505. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1506. 4, 1),
  1507. SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
  1508. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1509. 0, 1),
  1510. SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
  1511. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1512. 3, 1),
  1513. SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  1514. show_pwm_auto_point_temp_hyst,
  1515. store_pwm_auto_point_temp_hyst,
  1516. 0, 1),
  1517. SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
  1518. show_pwm_auto_point_temp_hyst, NULL, 3, 1),
  1519. }, {
  1520. SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
  1521. show_pwm_auto_point_channel,
  1522. store_pwm_auto_point_channel, 0, 2),
  1523. SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
  1524. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1525. 0, 2),
  1526. SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
  1527. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1528. 1, 2),
  1529. SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
  1530. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1531. 4, 2),
  1532. SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
  1533. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1534. 0, 2),
  1535. SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
  1536. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1537. 3, 2),
  1538. SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  1539. show_pwm_auto_point_temp_hyst,
  1540. store_pwm_auto_point_temp_hyst,
  1541. 0, 2),
  1542. SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
  1543. show_pwm_auto_point_temp_hyst, NULL, 3, 2),
  1544. } };
  1545. /* PWM attr for the standard models */
  1546. static struct sensor_device_attribute_2 fxxxx_auto_pwm_attr[4][14] = { {
  1547. SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
  1548. show_pwm_auto_point_channel,
  1549. store_pwm_auto_point_channel, 0, 0),
  1550. SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
  1551. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1552. 0, 0),
  1553. SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
  1554. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1555. 1, 0),
  1556. SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
  1557. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1558. 2, 0),
  1559. SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO|S_IWUSR,
  1560. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1561. 3, 0),
  1562. SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IRUGO|S_IWUSR,
  1563. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1564. 4, 0),
  1565. SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
  1566. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1567. 0, 0),
  1568. SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
  1569. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1570. 1, 0),
  1571. SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IRUGO|S_IWUSR,
  1572. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1573. 2, 0),
  1574. SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IRUGO|S_IWUSR,
  1575. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1576. 3, 0),
  1577. SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  1578. show_pwm_auto_point_temp_hyst,
  1579. store_pwm_auto_point_temp_hyst,
  1580. 0, 0),
  1581. SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
  1582. show_pwm_auto_point_temp_hyst, NULL, 1, 0),
  1583. SENSOR_ATTR_2(pwm1_auto_point3_temp_hyst, S_IRUGO,
  1584. show_pwm_auto_point_temp_hyst, NULL, 2, 0),
  1585. SENSOR_ATTR_2(pwm1_auto_point4_temp_hyst, S_IRUGO,
  1586. show_pwm_auto_point_temp_hyst, NULL, 3, 0),
  1587. }, {
  1588. SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
  1589. show_pwm_auto_point_channel,
  1590. store_pwm_auto_point_channel, 0, 1),
  1591. SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
  1592. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1593. 0, 1),
  1594. SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
  1595. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1596. 1, 1),
  1597. SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
  1598. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1599. 2, 1),
  1600. SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO|S_IWUSR,
  1601. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1602. 3, 1),
  1603. SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IRUGO|S_IWUSR,
  1604. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1605. 4, 1),
  1606. SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
  1607. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1608. 0, 1),
  1609. SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
  1610. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1611. 1, 1),
  1612. SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IRUGO|S_IWUSR,
  1613. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1614. 2, 1),
  1615. SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IRUGO|S_IWUSR,
  1616. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1617. 3, 1),
  1618. SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  1619. show_pwm_auto_point_temp_hyst,
  1620. store_pwm_auto_point_temp_hyst,
  1621. 0, 1),
  1622. SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
  1623. show_pwm_auto_point_temp_hyst, NULL, 1, 1),
  1624. SENSOR_ATTR_2(pwm2_auto_point3_temp_hyst, S_IRUGO,
  1625. show_pwm_auto_point_temp_hyst, NULL, 2, 1),
  1626. SENSOR_ATTR_2(pwm2_auto_point4_temp_hyst, S_IRUGO,
  1627. show_pwm_auto_point_temp_hyst, NULL, 3, 1),
  1628. }, {
  1629. SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
  1630. show_pwm_auto_point_channel,
  1631. store_pwm_auto_point_channel, 0, 2),
  1632. SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
  1633. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1634. 0, 2),
  1635. SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
  1636. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1637. 1, 2),
  1638. SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
  1639. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1640. 2, 2),
  1641. SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO|S_IWUSR,
  1642. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1643. 3, 2),
  1644. SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IRUGO|S_IWUSR,
  1645. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1646. 4, 2),
  1647. SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
  1648. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1649. 0, 2),
  1650. SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
  1651. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1652. 1, 2),
  1653. SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IRUGO|S_IWUSR,
  1654. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1655. 2, 2),
  1656. SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IRUGO|S_IWUSR,
  1657. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1658. 3, 2),
  1659. SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  1660. show_pwm_auto_point_temp_hyst,
  1661. store_pwm_auto_point_temp_hyst,
  1662. 0, 2),
  1663. SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
  1664. show_pwm_auto_point_temp_hyst, NULL, 1, 2),
  1665. SENSOR_ATTR_2(pwm3_auto_point3_temp_hyst, S_IRUGO,
  1666. show_pwm_auto_point_temp_hyst, NULL, 2, 2),
  1667. SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IRUGO,
  1668. show_pwm_auto_point_temp_hyst, NULL, 3, 2),
  1669. }, {
  1670. SENSOR_ATTR_2(pwm4_auto_channels_temp, S_IRUGO|S_IWUSR,
  1671. show_pwm_auto_point_channel,
  1672. store_pwm_auto_point_channel, 0, 3),
  1673. SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IRUGO|S_IWUSR,
  1674. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1675. 0, 3),
  1676. SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IRUGO|S_IWUSR,
  1677. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1678. 1, 3),
  1679. SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IRUGO|S_IWUSR,
  1680. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1681. 2, 3),
  1682. SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IRUGO|S_IWUSR,
  1683. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1684. 3, 3),
  1685. SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IRUGO|S_IWUSR,
  1686. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1687. 4, 3),
  1688. SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IRUGO|S_IWUSR,
  1689. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1690. 0, 3),
  1691. SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IRUGO|S_IWUSR,
  1692. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1693. 1, 3),
  1694. SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IRUGO|S_IWUSR,
  1695. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1696. 2, 3),
  1697. SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IRUGO|S_IWUSR,
  1698. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1699. 3, 3),
  1700. SENSOR_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  1701. show_pwm_auto_point_temp_hyst,
  1702. store_pwm_auto_point_temp_hyst,
  1703. 0, 3),
  1704. SENSOR_ATTR_2(pwm4_auto_point2_temp_hyst, S_IRUGO,
  1705. show_pwm_auto_point_temp_hyst, NULL, 1, 3),
  1706. SENSOR_ATTR_2(pwm4_auto_point3_temp_hyst, S_IRUGO,
  1707. show_pwm_auto_point_temp_hyst, NULL, 2, 3),
  1708. SENSOR_ATTR_2(pwm4_auto_point4_temp_hyst, S_IRUGO,
  1709. show_pwm_auto_point_temp_hyst, NULL, 3, 3),
  1710. } };
  1711. /* Fan attr specific to the f8000 (4th fan input can only measure speed) */
  1712. static struct sensor_device_attribute_2 f8000_fan_attr[] = {
  1713. SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
  1714. };
  1715. /*
  1716. * PWM attr for the f8000, zones mapped to temp instead of to pwm!
  1717. * Also the register block at offset A0 maps to TEMP1 (so our temp2, as the
  1718. * F8000 starts counting temps at 0), B0 maps the TEMP2 and C0 maps to TEMP0
  1719. */
  1720. static struct sensor_device_attribute_2 f8000_auto_pwm_attr[3][14] = { {
  1721. SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
  1722. show_pwm_auto_point_channel,
  1723. store_pwm_auto_point_channel, 0, 0),
  1724. SENSOR_ATTR_2(temp1_auto_point1_pwm, S_IRUGO|S_IWUSR,
  1725. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1726. 0, 2),
  1727. SENSOR_ATTR_2(temp1_auto_point2_pwm, S_IRUGO|S_IWUSR,
  1728. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1729. 1, 2),
  1730. SENSOR_ATTR_2(temp1_auto_point3_pwm, S_IRUGO|S_IWUSR,
  1731. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1732. 2, 2),
  1733. SENSOR_ATTR_2(temp1_auto_point4_pwm, S_IRUGO|S_IWUSR,
  1734. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1735. 3, 2),
  1736. SENSOR_ATTR_2(temp1_auto_point5_pwm, S_IRUGO|S_IWUSR,
  1737. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1738. 4, 2),
  1739. SENSOR_ATTR_2(temp1_auto_point1_temp, S_IRUGO|S_IWUSR,
  1740. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1741. 0, 2),
  1742. SENSOR_ATTR_2(temp1_auto_point2_temp, S_IRUGO|S_IWUSR,
  1743. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1744. 1, 2),
  1745. SENSOR_ATTR_2(temp1_auto_point3_temp, S_IRUGO|S_IWUSR,
  1746. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1747. 2, 2),
  1748. SENSOR_ATTR_2(temp1_auto_point4_temp, S_IRUGO|S_IWUSR,
  1749. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1750. 3, 2),
  1751. SENSOR_ATTR_2(temp1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  1752. show_pwm_auto_point_temp_hyst,
  1753. store_pwm_auto_point_temp_hyst,
  1754. 0, 2),
  1755. SENSOR_ATTR_2(temp1_auto_point2_temp_hyst, S_IRUGO,
  1756. show_pwm_auto_point_temp_hyst, NULL, 1, 2),
  1757. SENSOR_ATTR_2(temp1_auto_point3_temp_hyst, S_IRUGO,
  1758. show_pwm_auto_point_temp_hyst, NULL, 2, 2),
  1759. SENSOR_ATTR_2(temp1_auto_point4_temp_hyst, S_IRUGO,
  1760. show_pwm_auto_point_temp_hyst, NULL, 3, 2),
  1761. }, {
  1762. SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
  1763. show_pwm_auto_point_channel,
  1764. store_pwm_auto_point_channel, 0, 1),
  1765. SENSOR_ATTR_2(temp2_auto_point1_pwm, S_IRUGO|S_IWUSR,
  1766. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1767. 0, 0),
  1768. SENSOR_ATTR_2(temp2_auto_point2_pwm, S_IRUGO|S_IWUSR,
  1769. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1770. 1, 0),
  1771. SENSOR_ATTR_2(temp2_auto_point3_pwm, S_IRUGO|S_IWUSR,
  1772. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1773. 2, 0),
  1774. SENSOR_ATTR_2(temp2_auto_point4_pwm, S_IRUGO|S_IWUSR,
  1775. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1776. 3, 0),
  1777. SENSOR_ATTR_2(temp2_auto_point5_pwm, S_IRUGO|S_IWUSR,
  1778. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1779. 4, 0),
  1780. SENSOR_ATTR_2(temp2_auto_point1_temp, S_IRUGO|S_IWUSR,
  1781. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1782. 0, 0),
  1783. SENSOR_ATTR_2(temp2_auto_point2_temp, S_IRUGO|S_IWUSR,
  1784. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1785. 1, 0),
  1786. SENSOR_ATTR_2(temp2_auto_point3_temp, S_IRUGO|S_IWUSR,
  1787. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1788. 2, 0),
  1789. SENSOR_ATTR_2(temp2_auto_point4_temp, S_IRUGO|S_IWUSR,
  1790. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1791. 3, 0),
  1792. SENSOR_ATTR_2(temp2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  1793. show_pwm_auto_point_temp_hyst,
  1794. store_pwm_auto_point_temp_hyst,
  1795. 0, 0),
  1796. SENSOR_ATTR_2(temp2_auto_point2_temp_hyst, S_IRUGO,
  1797. show_pwm_auto_point_temp_hyst, NULL, 1, 0),
  1798. SENSOR_ATTR_2(temp2_auto_point3_temp_hyst, S_IRUGO,
  1799. show_pwm_auto_point_temp_hyst, NULL, 2, 0),
  1800. SENSOR_ATTR_2(temp2_auto_point4_temp_hyst, S_IRUGO,
  1801. show_pwm_auto_point_temp_hyst, NULL, 3, 0),
  1802. }, {
  1803. SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
  1804. show_pwm_auto_point_channel,
  1805. store_pwm_auto_point_channel, 0, 2),
  1806. SENSOR_ATTR_2(temp3_auto_point1_pwm, S_IRUGO|S_IWUSR,
  1807. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1808. 0, 1),
  1809. SENSOR_ATTR_2(temp3_auto_point2_pwm, S_IRUGO|S_IWUSR,
  1810. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1811. 1, 1),
  1812. SENSOR_ATTR_2(temp3_auto_point3_pwm, S_IRUGO|S_IWUSR,
  1813. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1814. 2, 1),
  1815. SENSOR_ATTR_2(temp3_auto_point4_pwm, S_IRUGO|S_IWUSR,
  1816. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1817. 3, 1),
  1818. SENSOR_ATTR_2(temp3_auto_point5_pwm, S_IRUGO|S_IWUSR,
  1819. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1820. 4, 1),
  1821. SENSOR_ATTR_2(temp3_auto_point1_temp, S_IRUGO|S_IWUSR,
  1822. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1823. 0, 1),
  1824. SENSOR_ATTR_2(temp3_auto_point2_temp, S_IRUGO|S_IWUSR,
  1825. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1826. 1, 1),
  1827. SENSOR_ATTR_2(temp3_auto_point3_temp, S_IRUGO|S_IWUSR,
  1828. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1829. 2, 1),
  1830. SENSOR_ATTR_2(temp3_auto_point4_temp, S_IRUGO|S_IWUSR,
  1831. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1832. 3, 1),
  1833. SENSOR_ATTR_2(temp3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  1834. show_pwm_auto_point_temp_hyst,
  1835. store_pwm_auto_point_temp_hyst,
  1836. 0, 1),
  1837. SENSOR_ATTR_2(temp3_auto_point2_temp_hyst, S_IRUGO,
  1838. show_pwm_auto_point_temp_hyst, NULL, 1, 1),
  1839. SENSOR_ATTR_2(temp3_auto_point3_temp_hyst, S_IRUGO,
  1840. show_pwm_auto_point_temp_hyst, NULL, 2, 1),
  1841. SENSOR_ATTR_2(temp3_auto_point4_temp_hyst, S_IRUGO,
  1842. show_pwm_auto_point_temp_hyst, NULL, 3, 1),
  1843. } };
  1844. /* Super I/O functions */
  1845. static inline int superio_inb(int base, int reg)
  1846. {
  1847. outb(reg, base);
  1848. return inb(base + 1);
  1849. }
  1850. static int superio_inw(int base, int reg)
  1851. {
  1852. int val;
  1853. val = superio_inb(base, reg) << 8;
  1854. val |= superio_inb(base, reg + 1);
  1855. return val;
  1856. }
  1857. static inline int superio_enter(int base)
  1858. {
  1859. /* Don't step on other drivers' I/O space by accident */
  1860. if (!request_muxed_region(base, 2, DRVNAME)) {
  1861. pr_err("I/O address 0x%04x already in use\n", base);
  1862. return -EBUSY;
  1863. }
  1864. /* according to the datasheet the key must be send twice! */
  1865. outb(SIO_UNLOCK_KEY, base);
  1866. outb(SIO_UNLOCK_KEY, base);
  1867. return 0;
  1868. }
  1869. static inline void superio_select(int base, int ld)
  1870. {
  1871. outb(SIO_REG_LDSEL, base);
  1872. outb(ld, base + 1);
  1873. }
  1874. static inline void superio_exit(int base)
  1875. {
  1876. outb(SIO_LOCK_KEY, base);
  1877. release_region(base, 2);
  1878. }
  1879. static int f71882fg_create_sysfs_files(struct platform_device *pdev,
  1880. struct sensor_device_attribute_2 *attr, int count)
  1881. {
  1882. int err, i;
  1883. for (i = 0; i < count; i++) {
  1884. err = device_create_file(&pdev->dev, &attr[i].dev_attr);
  1885. if (err)
  1886. return err;
  1887. }
  1888. return 0;
  1889. }
  1890. static void f71882fg_remove_sysfs_files(struct platform_device *pdev,
  1891. struct sensor_device_attribute_2 *attr, int count)
  1892. {
  1893. int i;
  1894. for (i = 0; i < count; i++)
  1895. device_remove_file(&pdev->dev, &attr[i].dev_attr);
  1896. }
  1897. static int f71882fg_create_fan_sysfs_files(
  1898. struct platform_device *pdev, int idx)
  1899. {
  1900. struct f71882fg_data *data = platform_get_drvdata(pdev);
  1901. int err;
  1902. /* Sanity check the pwm setting */
  1903. err = 0;
  1904. switch (data->type) {
  1905. case f71858fg:
  1906. if (((data->pwm_enable >> (idx * 2)) & 3) == 3)
  1907. err = 1;
  1908. break;
  1909. case f71862fg:
  1910. if (((data->pwm_enable >> (idx * 2)) & 1) != 1)
  1911. err = 1;
  1912. break;
  1913. case f8000:
  1914. if (idx == 2)
  1915. err = data->pwm_enable & 0x20;
  1916. break;
  1917. default:
  1918. break;
  1919. }
  1920. if (err) {
  1921. dev_err(&pdev->dev,
  1922. "Invalid (reserved) pwm settings: 0x%02x, "
  1923. "skipping fan %d\n",
  1924. (data->pwm_enable >> (idx * 2)) & 3, idx + 1);
  1925. return 0; /* This is a non fatal condition */
  1926. }
  1927. err = f71882fg_create_sysfs_files(pdev, &fxxxx_fan_attr[idx][0],
  1928. ARRAY_SIZE(fxxxx_fan_attr[0]));
  1929. if (err)
  1930. return err;
  1931. if (f71882fg_fan_has_beep[data->type]) {
  1932. err = f71882fg_create_sysfs_files(pdev,
  1933. &fxxxx_fan_beep_attr[idx],
  1934. 1);
  1935. if (err)
  1936. return err;
  1937. }
  1938. dev_info(&pdev->dev, "Fan: %d is in %s mode\n", idx + 1,
  1939. (data->pwm_enable & (1 << (2 * idx))) ? "duty-cycle" : "RPM");
  1940. /* Check for unsupported auto pwm settings */
  1941. switch (data->type) {
  1942. case f71808e:
  1943. case f71808a:
  1944. case f71869:
  1945. case f71869a:
  1946. case f71889fg:
  1947. case f71889ed:
  1948. case f71889a:
  1949. data->pwm_auto_point_mapping[idx] =
  1950. f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(idx));
  1951. if ((data->pwm_auto_point_mapping[idx] & 0x80) ||
  1952. (data->pwm_auto_point_mapping[idx] & 3) == 0) {
  1953. dev_warn(&pdev->dev,
  1954. "Auto pwm controlled by raw digital "
  1955. "data, disabling pwm auto_point "
  1956. "sysfs attributes for fan %d\n", idx + 1);
  1957. return 0; /* This is a non fatal condition */
  1958. }
  1959. break;
  1960. default:
  1961. break;
  1962. }
  1963. switch (data->type) {
  1964. case f71862fg:
  1965. err = f71882fg_create_sysfs_files(pdev,
  1966. &f71862fg_auto_pwm_attr[idx][0],
  1967. ARRAY_SIZE(f71862fg_auto_pwm_attr[0]));
  1968. break;
  1969. case f71808e:
  1970. case f71869:
  1971. err = f71882fg_create_sysfs_files(pdev,
  1972. &f71869_auto_pwm_attr[idx][0],
  1973. ARRAY_SIZE(f71869_auto_pwm_attr[0]));
  1974. break;
  1975. case f8000:
  1976. err = f71882fg_create_sysfs_files(pdev,
  1977. &f8000_auto_pwm_attr[idx][0],
  1978. ARRAY_SIZE(f8000_auto_pwm_attr[0]));
  1979. break;
  1980. default:
  1981. err = f71882fg_create_sysfs_files(pdev,
  1982. &fxxxx_auto_pwm_attr[idx][0],
  1983. ARRAY_SIZE(fxxxx_auto_pwm_attr[0]));
  1984. }
  1985. return err;
  1986. }
  1987. static int f71882fg_remove(struct platform_device *pdev)
  1988. {
  1989. struct f71882fg_data *data = platform_get_drvdata(pdev);
  1990. int nr_fans = f71882fg_nr_fans[data->type];
  1991. int nr_temps = f71882fg_nr_temps[data->type];
  1992. int i;
  1993. u8 start_reg = f71882fg_read8(data, F71882FG_REG_START);
  1994. if (data->hwmon_dev)
  1995. hwmon_device_unregister(data->hwmon_dev);
  1996. device_remove_file(&pdev->dev, &dev_attr_name);
  1997. if (start_reg & 0x01) {
  1998. switch (data->type) {
  1999. case f71858fg:
  2000. if (data->temp_config & 0x10)
  2001. f71882fg_remove_sysfs_files(pdev,
  2002. f8000_temp_attr,
  2003. ARRAY_SIZE(f8000_temp_attr));
  2004. else
  2005. f71882fg_remove_sysfs_files(pdev,
  2006. f71858fg_temp_attr,
  2007. ARRAY_SIZE(f71858fg_temp_attr));
  2008. break;
  2009. case f8000:
  2010. f71882fg_remove_sysfs_files(pdev,
  2011. f8000_temp_attr,
  2012. ARRAY_SIZE(f8000_temp_attr));
  2013. break;
  2014. case f81866a:
  2015. f71882fg_remove_sysfs_files(pdev,
  2016. f71858fg_temp_attr,
  2017. ARRAY_SIZE(f71858fg_temp_attr));
  2018. break;
  2019. default:
  2020. f71882fg_remove_sysfs_files(pdev,
  2021. &fxxxx_temp_attr[0][0],
  2022. ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps);
  2023. }
  2024. if (f71882fg_temp_has_beep[data->type]) {
  2025. if (data->type == f81866a)
  2026. f71882fg_remove_sysfs_files(pdev,
  2027. &f81866_temp_beep_attr[0][0],
  2028. ARRAY_SIZE(f81866_temp_beep_attr[0])
  2029. * nr_temps);
  2030. else
  2031. f71882fg_remove_sysfs_files(pdev,
  2032. &fxxxx_temp_beep_attr[0][0],
  2033. ARRAY_SIZE(fxxxx_temp_beep_attr[0])
  2034. * nr_temps);
  2035. }
  2036. for (i = 0; i < F71882FG_MAX_INS; i++) {
  2037. if (f71882fg_has_in[data->type][i]) {
  2038. device_remove_file(&pdev->dev,
  2039. &fxxxx_in_attr[i].dev_attr);
  2040. }
  2041. }
  2042. if (f71882fg_has_in1_alarm[data->type]) {
  2043. f71882fg_remove_sysfs_files(pdev,
  2044. fxxxx_in1_alarm_attr,
  2045. ARRAY_SIZE(fxxxx_in1_alarm_attr));
  2046. }
  2047. }
  2048. if (start_reg & 0x02) {
  2049. f71882fg_remove_sysfs_files(pdev, &fxxxx_fan_attr[0][0],
  2050. ARRAY_SIZE(fxxxx_fan_attr[0]) * nr_fans);
  2051. if (f71882fg_fan_has_beep[data->type]) {
  2052. f71882fg_remove_sysfs_files(pdev,
  2053. fxxxx_fan_beep_attr, nr_fans);
  2054. }
  2055. switch (data->type) {
  2056. case f71808a:
  2057. f71882fg_remove_sysfs_files(pdev,
  2058. &fxxxx_auto_pwm_attr[0][0],
  2059. ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
  2060. f71882fg_remove_sysfs_files(pdev,
  2061. f71808a_fan3_attr,
  2062. ARRAY_SIZE(f71808a_fan3_attr));
  2063. break;
  2064. case f71862fg:
  2065. f71882fg_remove_sysfs_files(pdev,
  2066. &f71862fg_auto_pwm_attr[0][0],
  2067. ARRAY_SIZE(f71862fg_auto_pwm_attr[0]) *
  2068. nr_fans);
  2069. break;
  2070. case f71808e:
  2071. case f71869:
  2072. f71882fg_remove_sysfs_files(pdev,
  2073. &f71869_auto_pwm_attr[0][0],
  2074. ARRAY_SIZE(f71869_auto_pwm_attr[0]) * nr_fans);
  2075. break;
  2076. case f8000:
  2077. f71882fg_remove_sysfs_files(pdev,
  2078. f8000_fan_attr,
  2079. ARRAY_SIZE(f8000_fan_attr));
  2080. f71882fg_remove_sysfs_files(pdev,
  2081. &f8000_auto_pwm_attr[0][0],
  2082. ARRAY_SIZE(f8000_auto_pwm_attr[0]) * nr_fans);
  2083. break;
  2084. default:
  2085. f71882fg_remove_sysfs_files(pdev,
  2086. &fxxxx_auto_pwm_attr[0][0],
  2087. ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
  2088. }
  2089. }
  2090. return 0;
  2091. }
  2092. static int f71882fg_probe(struct platform_device *pdev)
  2093. {
  2094. struct f71882fg_data *data;
  2095. struct f71882fg_sio_data *sio_data = dev_get_platdata(&pdev->dev);
  2096. int nr_fans = f71882fg_nr_fans[sio_data->type];
  2097. int nr_temps = f71882fg_nr_temps[sio_data->type];
  2098. int err, i;
  2099. int size;
  2100. u8 start_reg, reg;
  2101. data = devm_kzalloc(&pdev->dev, sizeof(struct f71882fg_data),
  2102. GFP_KERNEL);
  2103. if (!data)
  2104. return -ENOMEM;
  2105. data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start;
  2106. data->type = sio_data->type;
  2107. data->temp_start =
  2108. (data->type == f71858fg || data->type == f8000 ||
  2109. data->type == f81866a) ? 0 : 1;
  2110. mutex_init(&data->update_lock);
  2111. platform_set_drvdata(pdev, data);
  2112. start_reg = f71882fg_read8(data, F71882FG_REG_START);
  2113. if (start_reg & 0x04) {
  2114. dev_warn(&pdev->dev, "Hardware monitor is powered down\n");
  2115. return -ENODEV;
  2116. }
  2117. if (!(start_reg & 0x03)) {
  2118. dev_warn(&pdev->dev, "Hardware monitoring not activated\n");
  2119. return -ENODEV;
  2120. }
  2121. /* Register sysfs interface files */
  2122. err = device_create_file(&pdev->dev, &dev_attr_name);
  2123. if (err)
  2124. goto exit_unregister_sysfs;
  2125. if (start_reg & 0x01) {
  2126. switch (data->type) {
  2127. case f71858fg:
  2128. data->temp_config =
  2129. f71882fg_read8(data, F71882FG_REG_TEMP_CONFIG);
  2130. if (data->temp_config & 0x10)
  2131. /*
  2132. * The f71858fg temperature alarms behave as
  2133. * the f8000 alarms in this mode
  2134. */
  2135. err = f71882fg_create_sysfs_files(pdev,
  2136. f8000_temp_attr,
  2137. ARRAY_SIZE(f8000_temp_attr));
  2138. else
  2139. err = f71882fg_create_sysfs_files(pdev,
  2140. f71858fg_temp_attr,
  2141. ARRAY_SIZE(f71858fg_temp_attr));
  2142. break;
  2143. case f8000:
  2144. err = f71882fg_create_sysfs_files(pdev,
  2145. f8000_temp_attr,
  2146. ARRAY_SIZE(f8000_temp_attr));
  2147. break;
  2148. case f81866a:
  2149. err = f71882fg_create_sysfs_files(pdev,
  2150. f71858fg_temp_attr,
  2151. ARRAY_SIZE(f71858fg_temp_attr));
  2152. break;
  2153. default:
  2154. err = f71882fg_create_sysfs_files(pdev,
  2155. &fxxxx_temp_attr[0][0],
  2156. ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps);
  2157. }
  2158. if (err)
  2159. goto exit_unregister_sysfs;
  2160. if (f71882fg_temp_has_beep[data->type]) {
  2161. if (data->type == f81866a) {
  2162. size = ARRAY_SIZE(f81866_temp_beep_attr[0]);
  2163. err = f71882fg_create_sysfs_files(pdev,
  2164. &f81866_temp_beep_attr[0][0],
  2165. size * nr_temps);
  2166. } else {
  2167. size = ARRAY_SIZE(fxxxx_temp_beep_attr[0]);
  2168. err = f71882fg_create_sysfs_files(pdev,
  2169. &fxxxx_temp_beep_attr[0][0],
  2170. size * nr_temps);
  2171. }
  2172. if (err)
  2173. goto exit_unregister_sysfs;
  2174. }
  2175. for (i = 0; i < F71882FG_MAX_INS; i++) {
  2176. if (f71882fg_has_in[data->type][i]) {
  2177. err = device_create_file(&pdev->dev,
  2178. &fxxxx_in_attr[i].dev_attr);
  2179. if (err)
  2180. goto exit_unregister_sysfs;
  2181. }
  2182. }
  2183. if (f71882fg_has_in1_alarm[data->type]) {
  2184. err = f71882fg_create_sysfs_files(pdev,
  2185. fxxxx_in1_alarm_attr,
  2186. ARRAY_SIZE(fxxxx_in1_alarm_attr));
  2187. if (err)
  2188. goto exit_unregister_sysfs;
  2189. }
  2190. }
  2191. if (start_reg & 0x02) {
  2192. switch (data->type) {
  2193. case f71808e:
  2194. case f71808a:
  2195. case f71869:
  2196. case f71869a:
  2197. /* These always have signed auto point temps */
  2198. data->auto_point_temp_signed = 1;
  2199. fallthrough; /* to select correct fan/pwm reg bank! */
  2200. case f71889fg:
  2201. case f71889ed:
  2202. case f71889a:
  2203. reg = f71882fg_read8(data, F71882FG_REG_FAN_FAULT_T);
  2204. if (reg & F71882FG_FAN_NEG_TEMP_EN)
  2205. data->auto_point_temp_signed = 1;
  2206. /* Ensure banked pwm registers point to right bank */
  2207. reg &= ~F71882FG_FAN_PROG_SEL;
  2208. f71882fg_write8(data, F71882FG_REG_FAN_FAULT_T, reg);
  2209. break;
  2210. default:
  2211. break;
  2212. }
  2213. data->pwm_enable =
  2214. f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  2215. for (i = 0; i < nr_fans; i++) {
  2216. err = f71882fg_create_fan_sysfs_files(pdev, i);
  2217. if (err)
  2218. goto exit_unregister_sysfs;
  2219. }
  2220. /* Some types have 1 extra fan with limited functionality */
  2221. switch (data->type) {
  2222. case f71808a:
  2223. err = f71882fg_create_sysfs_files(pdev,
  2224. f71808a_fan3_attr,
  2225. ARRAY_SIZE(f71808a_fan3_attr));
  2226. break;
  2227. case f8000:
  2228. err = f71882fg_create_sysfs_files(pdev,
  2229. f8000_fan_attr,
  2230. ARRAY_SIZE(f8000_fan_attr));
  2231. break;
  2232. default:
  2233. break;
  2234. }
  2235. if (err)
  2236. goto exit_unregister_sysfs;
  2237. }
  2238. data->hwmon_dev = hwmon_device_register(&pdev->dev);
  2239. if (IS_ERR(data->hwmon_dev)) {
  2240. err = PTR_ERR(data->hwmon_dev);
  2241. data->hwmon_dev = NULL;
  2242. goto exit_unregister_sysfs;
  2243. }
  2244. return 0;
  2245. exit_unregister_sysfs:
  2246. f71882fg_remove(pdev); /* Will unregister the sysfs files for us */
  2247. return err; /* f71882fg_remove() also frees our data */
  2248. }
  2249. static int __init f71882fg_find(int sioaddr, struct f71882fg_sio_data *sio_data)
  2250. {
  2251. u16 devid;
  2252. unsigned short address;
  2253. int err = superio_enter(sioaddr);
  2254. if (err)
  2255. return err;
  2256. devid = superio_inw(sioaddr, SIO_REG_MANID);
  2257. if (devid != SIO_FINTEK_ID) {
  2258. pr_debug("Not a Fintek device\n");
  2259. err = -ENODEV;
  2260. goto exit;
  2261. }
  2262. devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
  2263. switch (devid) {
  2264. case SIO_F71808E_ID:
  2265. sio_data->type = f71808e;
  2266. break;
  2267. case SIO_F71808A_ID:
  2268. sio_data->type = f71808a;
  2269. break;
  2270. case SIO_F71858_ID:
  2271. case SIO_F71858AD_ID:
  2272. sio_data->type = f71858fg;
  2273. break;
  2274. case SIO_F71862_ID:
  2275. sio_data->type = f71862fg;
  2276. break;
  2277. case SIO_F71868_ID:
  2278. sio_data->type = f71868a;
  2279. break;
  2280. case SIO_F71869_ID:
  2281. sio_data->type = f71869;
  2282. break;
  2283. case SIO_F71869A_ID:
  2284. sio_data->type = f71869a;
  2285. break;
  2286. case SIO_F71882_ID:
  2287. sio_data->type = f71882fg;
  2288. break;
  2289. case SIO_F71889_ID:
  2290. sio_data->type = f71889fg;
  2291. break;
  2292. case SIO_F71889E_ID:
  2293. sio_data->type = f71889ed;
  2294. break;
  2295. case SIO_F71889A_ID:
  2296. sio_data->type = f71889a;
  2297. break;
  2298. case SIO_F8000_ID:
  2299. sio_data->type = f8000;
  2300. break;
  2301. case SIO_F81768D_ID:
  2302. sio_data->type = f81768d;
  2303. break;
  2304. case SIO_F81865_ID:
  2305. sio_data->type = f81865f;
  2306. break;
  2307. case SIO_F81866_ID:
  2308. case SIO_F81966_ID:
  2309. sio_data->type = f81866a;
  2310. break;
  2311. default:
  2312. pr_info("Unsupported Fintek device: %04x\n",
  2313. (unsigned int)devid);
  2314. err = -ENODEV;
  2315. goto exit;
  2316. }
  2317. if (sio_data->type == f71858fg)
  2318. superio_select(sioaddr, SIO_F71858FG_LD_HWM);
  2319. else
  2320. superio_select(sioaddr, SIO_F71882FG_LD_HWM);
  2321. if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
  2322. pr_warn("Device not activated\n");
  2323. err = -ENODEV;
  2324. goto exit;
  2325. }
  2326. address = superio_inw(sioaddr, SIO_REG_ADDR);
  2327. if (address == 0) {
  2328. pr_warn("Base address not set\n");
  2329. err = -ENODEV;
  2330. goto exit;
  2331. }
  2332. address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
  2333. err = address;
  2334. pr_info("Found %s chip at %#x, revision %d\n",
  2335. f71882fg_names[sio_data->type], (unsigned int)address,
  2336. (int)superio_inb(sioaddr, SIO_REG_DEVREV));
  2337. exit:
  2338. superio_exit(sioaddr);
  2339. return err;
  2340. }
  2341. static int __init f71882fg_device_add(int address,
  2342. const struct f71882fg_sio_data *sio_data)
  2343. {
  2344. struct resource res = {
  2345. .start = address,
  2346. .end = address + REGION_LENGTH - 1,
  2347. .flags = IORESOURCE_IO,
  2348. };
  2349. int err;
  2350. f71882fg_pdev = platform_device_alloc(DRVNAME, address);
  2351. if (!f71882fg_pdev)
  2352. return -ENOMEM;
  2353. res.name = f71882fg_pdev->name;
  2354. err = acpi_check_resource_conflict(&res);
  2355. if (err)
  2356. goto exit_device_put;
  2357. err = platform_device_add_resources(f71882fg_pdev, &res, 1);
  2358. if (err) {
  2359. pr_err("Device resource addition failed\n");
  2360. goto exit_device_put;
  2361. }
  2362. err = platform_device_add_data(f71882fg_pdev, sio_data,
  2363. sizeof(struct f71882fg_sio_data));
  2364. if (err) {
  2365. pr_err("Platform data allocation failed\n");
  2366. goto exit_device_put;
  2367. }
  2368. err = platform_device_add(f71882fg_pdev);
  2369. if (err) {
  2370. pr_err("Device addition failed\n");
  2371. goto exit_device_put;
  2372. }
  2373. return 0;
  2374. exit_device_put:
  2375. platform_device_put(f71882fg_pdev);
  2376. return err;
  2377. }
  2378. static struct platform_driver f71882fg_driver = {
  2379. .driver = {
  2380. .name = DRVNAME,
  2381. },
  2382. .probe = f71882fg_probe,
  2383. .remove = f71882fg_remove,
  2384. };
  2385. static int __init f71882fg_init(void)
  2386. {
  2387. int err;
  2388. int address;
  2389. struct f71882fg_sio_data sio_data;
  2390. memset(&sio_data, 0, sizeof(sio_data));
  2391. address = f71882fg_find(0x2e, &sio_data);
  2392. if (address < 0)
  2393. address = f71882fg_find(0x4e, &sio_data);
  2394. if (address < 0)
  2395. return address;
  2396. err = platform_driver_register(&f71882fg_driver);
  2397. if (err)
  2398. return err;
  2399. err = f71882fg_device_add(address, &sio_data);
  2400. if (err)
  2401. goto exit_driver;
  2402. return 0;
  2403. exit_driver:
  2404. platform_driver_unregister(&f71882fg_driver);
  2405. return err;
  2406. }
  2407. static void __exit f71882fg_exit(void)
  2408. {
  2409. platform_device_unregister(f71882fg_pdev);
  2410. platform_driver_unregister(&f71882fg_driver);
  2411. }
  2412. MODULE_DESCRIPTION("F71882FG Hardware Monitoring Driver");
  2413. MODULE_AUTHOR("Hans Edgington, Hans de Goede <[email protected]>");
  2414. MODULE_LICENSE("GPL");
  2415. module_init(f71882fg_init);
  2416. module_exit(f71882fg_exit);