pci-ish.c 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * PCI glue for ISHTP provider device (ISH) driver
  4. *
  5. * Copyright (c) 2014-2016, Intel Corporation.
  6. */
  7. #include <linux/acpi.h>
  8. #include <linux/module.h>
  9. #include <linux/moduleparam.h>
  10. #include <linux/kernel.h>
  11. #include <linux/device.h>
  12. #include <linux/fs.h>
  13. #include <linux/errno.h>
  14. #include <linux/types.h>
  15. #include <linux/pci.h>
  16. #include <linux/sched.h>
  17. #include <linux/suspend.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/workqueue.h>
  20. #define CREATE_TRACE_POINTS
  21. #include <trace/events/intel_ish.h>
  22. #include "ishtp-dev.h"
  23. #include "hw-ish.h"
  24. static const struct pci_device_id ish_pci_tbl[] = {
  25. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, CHV_DEVICE_ID)},
  26. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, BXT_Ax_DEVICE_ID)},
  27. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, BXT_Bx_DEVICE_ID)},
  28. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, APL_Ax_DEVICE_ID)},
  29. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, SPT_Ax_DEVICE_ID)},
  30. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, CNL_Ax_DEVICE_ID)},
  31. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, GLK_Ax_DEVICE_ID)},
  32. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, CNL_H_DEVICE_ID)},
  33. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ICL_MOBILE_DEVICE_ID)},
  34. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, SPT_H_DEVICE_ID)},
  35. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, CML_LP_DEVICE_ID)},
  36. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, CMP_H_DEVICE_ID)},
  37. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, EHL_Ax_DEVICE_ID)},
  38. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, TGL_LP_DEVICE_ID)},
  39. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, TGL_H_DEVICE_ID)},
  40. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ADL_S_DEVICE_ID)},
  41. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ADL_P_DEVICE_ID)},
  42. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ADL_N_DEVICE_ID)},
  43. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, RPL_S_DEVICE_ID)},
  44. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MTL_P_DEVICE_ID)},
  45. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ARL_H_DEVICE_ID)},
  46. {0, }
  47. };
  48. MODULE_DEVICE_TABLE(pci, ish_pci_tbl);
  49. /**
  50. * ish_event_tracer() - Callback function to dump trace messages
  51. * @dev: ishtp device
  52. * @format: printf style format
  53. *
  54. * Callback to direct log messages to Linux trace buffers
  55. */
  56. static __printf(2, 3)
  57. void ish_event_tracer(struct ishtp_device *dev, const char *format, ...)
  58. {
  59. if (trace_ishtp_dump_enabled()) {
  60. va_list args;
  61. char tmp_buf[100];
  62. va_start(args, format);
  63. vsnprintf(tmp_buf, sizeof(tmp_buf), format, args);
  64. va_end(args);
  65. trace_ishtp_dump(tmp_buf);
  66. }
  67. }
  68. /**
  69. * ish_init() - Init function
  70. * @dev: ishtp device
  71. *
  72. * This function initialize wait queues for suspend/resume and call
  73. * calls hadware initialization function. This will initiate
  74. * startup sequence
  75. *
  76. * Return: 0 for success or error code for failure
  77. */
  78. static int ish_init(struct ishtp_device *dev)
  79. {
  80. int ret;
  81. /* Set the state of ISH HW to start */
  82. ret = ish_hw_start(dev);
  83. if (ret) {
  84. dev_err(dev->devc, "ISH: hw start failed.\n");
  85. return ret;
  86. }
  87. /* Start the inter process communication to ISH processor */
  88. ret = ishtp_start(dev);
  89. if (ret) {
  90. dev_err(dev->devc, "ISHTP: Protocol init failed.\n");
  91. return ret;
  92. }
  93. return 0;
  94. }
  95. static const struct pci_device_id ish_invalid_pci_ids[] = {
  96. /* Mehlow platform special pci ids */
  97. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xA309)},
  98. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xA30A)},
  99. {}
  100. };
  101. static inline bool ish_should_enter_d0i3(struct pci_dev *pdev)
  102. {
  103. return !pm_suspend_via_firmware() || pdev->device == CHV_DEVICE_ID;
  104. }
  105. static inline bool ish_should_leave_d0i3(struct pci_dev *pdev)
  106. {
  107. return !pm_resume_via_firmware() || pdev->device == CHV_DEVICE_ID;
  108. }
  109. static int enable_gpe(struct device *dev)
  110. {
  111. #ifdef CONFIG_ACPI
  112. acpi_status acpi_sts;
  113. struct acpi_device *adev;
  114. struct acpi_device_wakeup *wakeup;
  115. adev = ACPI_COMPANION(dev);
  116. if (!adev) {
  117. dev_err(dev, "get acpi handle failed\n");
  118. return -ENODEV;
  119. }
  120. wakeup = &adev->wakeup;
  121. /*
  122. * Call acpi_disable_gpe(), so that reference count
  123. * gpe_event_info->runtime_count doesn't overflow.
  124. * When gpe_event_info->runtime_count = 0, the call
  125. * to acpi_disable_gpe() simply return.
  126. */
  127. acpi_disable_gpe(wakeup->gpe_device, wakeup->gpe_number);
  128. acpi_sts = acpi_enable_gpe(wakeup->gpe_device, wakeup->gpe_number);
  129. if (ACPI_FAILURE(acpi_sts)) {
  130. dev_err(dev, "enable ose_gpe failed\n");
  131. return -EIO;
  132. }
  133. return 0;
  134. #else
  135. return -ENODEV;
  136. #endif
  137. }
  138. static void enable_pme_wake(struct pci_dev *pdev)
  139. {
  140. if ((pci_pme_capable(pdev, PCI_D0) ||
  141. pci_pme_capable(pdev, PCI_D3hot) ||
  142. pci_pme_capable(pdev, PCI_D3cold)) && !enable_gpe(&pdev->dev)) {
  143. pci_pme_active(pdev, true);
  144. dev_dbg(&pdev->dev, "ish ipc driver pme wake enabled\n");
  145. }
  146. }
  147. /**
  148. * ish_probe() - PCI driver probe callback
  149. * @pdev: pci device
  150. * @ent: pci device id
  151. *
  152. * Initialize PCI function, setup interrupt and call for ISH initialization
  153. *
  154. * Return: 0 for success or error code for failure
  155. */
  156. static int ish_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  157. {
  158. int ret;
  159. struct ish_hw *hw;
  160. unsigned long irq_flag = 0;
  161. struct ishtp_device *ishtp;
  162. struct device *dev = &pdev->dev;
  163. /* Check for invalid platforms for ISH support */
  164. if (pci_dev_present(ish_invalid_pci_ids))
  165. return -ENODEV;
  166. /* enable pci dev */
  167. ret = pcim_enable_device(pdev);
  168. if (ret) {
  169. dev_err(dev, "ISH: Failed to enable PCI device\n");
  170. return ret;
  171. }
  172. /* set PCI host mastering */
  173. pci_set_master(pdev);
  174. /* pci request regions for ISH driver */
  175. ret = pcim_iomap_regions(pdev, 1 << 0, KBUILD_MODNAME);
  176. if (ret) {
  177. dev_err(dev, "ISH: Failed to get PCI regions\n");
  178. return ret;
  179. }
  180. /* allocates and initializes the ISH dev structure */
  181. ishtp = ish_dev_init(pdev);
  182. if (!ishtp) {
  183. ret = -ENOMEM;
  184. return ret;
  185. }
  186. hw = to_ish_hw(ishtp);
  187. ishtp->print_log = ish_event_tracer;
  188. /* mapping IO device memory */
  189. hw->mem_addr = pcim_iomap_table(pdev)[0];
  190. ishtp->pdev = pdev;
  191. /* request and enable interrupt */
  192. ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
  193. if (!pdev->msi_enabled && !pdev->msix_enabled)
  194. irq_flag = IRQF_SHARED;
  195. ret = devm_request_irq(dev, pdev->irq, ish_irq_handler,
  196. irq_flag, KBUILD_MODNAME, ishtp);
  197. if (ret) {
  198. dev_err(dev, "ISH: request IRQ %d failed\n", pdev->irq);
  199. return ret;
  200. }
  201. dev_set_drvdata(ishtp->devc, ishtp);
  202. init_waitqueue_head(&ishtp->suspend_wait);
  203. init_waitqueue_head(&ishtp->resume_wait);
  204. /* Enable PME for EHL */
  205. if (pdev->device == EHL_Ax_DEVICE_ID)
  206. enable_pme_wake(pdev);
  207. ret = ish_init(ishtp);
  208. if (ret)
  209. return ret;
  210. return 0;
  211. }
  212. /**
  213. * ish_remove() - PCI driver remove callback
  214. * @pdev: pci device
  215. *
  216. * This function does cleanup of ISH on pci remove callback
  217. */
  218. static void ish_remove(struct pci_dev *pdev)
  219. {
  220. struct ishtp_device *ishtp_dev = pci_get_drvdata(pdev);
  221. ishtp_bus_remove_all_clients(ishtp_dev, false);
  222. ish_device_disable(ishtp_dev);
  223. }
  224. static struct device __maybe_unused *ish_resume_device;
  225. /* 50ms to get resume response */
  226. #define WAIT_FOR_RESUME_ACK_MS 50
  227. /**
  228. * ish_resume_handler() - Work function to complete resume
  229. * @work: work struct
  230. *
  231. * The resume work function to complete resume function asynchronously.
  232. * There are two resume paths, one where ISH is not powered off,
  233. * in that case a simple resume message is enough, others we need
  234. * a reset sequence.
  235. */
  236. static void __maybe_unused ish_resume_handler(struct work_struct *work)
  237. {
  238. struct pci_dev *pdev = to_pci_dev(ish_resume_device);
  239. struct ishtp_device *dev = pci_get_drvdata(pdev);
  240. uint32_t fwsts = dev->ops->get_fw_status(dev);
  241. if (ish_should_leave_d0i3(pdev) && !dev->suspend_flag
  242. && IPC_IS_ISH_ILUP(fwsts)) {
  243. if (device_may_wakeup(&pdev->dev))
  244. disable_irq_wake(pdev->irq);
  245. ish_set_host_ready(dev);
  246. ishtp_send_resume(dev);
  247. /* Waiting to get resume response */
  248. if (dev->resume_flag)
  249. wait_event_interruptible_timeout(dev->resume_wait,
  250. !dev->resume_flag,
  251. msecs_to_jiffies(WAIT_FOR_RESUME_ACK_MS));
  252. /*
  253. * If the flag is not cleared, something is wrong with ISH FW.
  254. * So on resume, need to go through init sequence again.
  255. */
  256. if (dev->resume_flag)
  257. ish_init(dev);
  258. } else {
  259. /*
  260. * Resume from the D3, full reboot of ISH processor will happen,
  261. * so need to go through init sequence again.
  262. */
  263. ish_init(dev);
  264. }
  265. }
  266. /**
  267. * ish_suspend() - ISH suspend callback
  268. * @device: device pointer
  269. *
  270. * ISH suspend callback
  271. *
  272. * Return: 0 to the pm core
  273. */
  274. static int __maybe_unused ish_suspend(struct device *device)
  275. {
  276. struct pci_dev *pdev = to_pci_dev(device);
  277. struct ishtp_device *dev = pci_get_drvdata(pdev);
  278. if (ish_should_enter_d0i3(pdev)) {
  279. /*
  280. * If previous suspend hasn't been asnwered then ISH is likely
  281. * dead, don't attempt nested notification
  282. */
  283. if (dev->suspend_flag)
  284. return 0;
  285. dev->resume_flag = 0;
  286. dev->suspend_flag = 1;
  287. ishtp_send_suspend(dev);
  288. /* 25 ms should be enough for live ISH to flush all IPC buf */
  289. if (dev->suspend_flag)
  290. wait_event_interruptible_timeout(dev->suspend_wait,
  291. !dev->suspend_flag,
  292. msecs_to_jiffies(25));
  293. if (dev->suspend_flag) {
  294. /*
  295. * It looks like FW halt, clear the DMA bit, and put
  296. * ISH into D3, and FW would reset on resume.
  297. */
  298. ish_disable_dma(dev);
  299. } else {
  300. /*
  301. * Save state so PCI core will keep the device at D0,
  302. * the ISH would enter D0i3
  303. */
  304. pci_save_state(pdev);
  305. if (device_may_wakeup(&pdev->dev))
  306. enable_irq_wake(pdev->irq);
  307. }
  308. } else {
  309. /*
  310. * Clear the DMA bit before putting ISH into D3,
  311. * or ISH FW would reset automatically.
  312. */
  313. ish_disable_dma(dev);
  314. }
  315. return 0;
  316. }
  317. static __maybe_unused DECLARE_WORK(resume_work, ish_resume_handler);
  318. /**
  319. * ish_resume() - ISH resume callback
  320. * @device: device pointer
  321. *
  322. * ISH resume callback
  323. *
  324. * Return: 0 to the pm core
  325. */
  326. static int __maybe_unused ish_resume(struct device *device)
  327. {
  328. struct pci_dev *pdev = to_pci_dev(device);
  329. struct ishtp_device *dev = pci_get_drvdata(pdev);
  330. /* add this to finish power flow for EHL */
  331. if (dev->pdev->device == EHL_Ax_DEVICE_ID) {
  332. pci_set_power_state(pdev, PCI_D0);
  333. enable_pme_wake(pdev);
  334. dev_dbg(dev->devc, "set power state to D0 for ehl\n");
  335. }
  336. ish_resume_device = device;
  337. dev->resume_flag = 1;
  338. schedule_work(&resume_work);
  339. return 0;
  340. }
  341. static SIMPLE_DEV_PM_OPS(ish_pm_ops, ish_suspend, ish_resume);
  342. static struct pci_driver ish_driver = {
  343. .name = KBUILD_MODNAME,
  344. .id_table = ish_pci_tbl,
  345. .probe = ish_probe,
  346. .remove = ish_remove,
  347. .driver.pm = &ish_pm_ops,
  348. };
  349. module_pci_driver(ish_driver);
  350. /* Original author */
  351. MODULE_AUTHOR("Daniel Drubin <[email protected]>");
  352. /* Adoption to upstream Linux kernel */
  353. MODULE_AUTHOR("Srinivas Pandruvada <[email protected]>");
  354. MODULE_DESCRIPTION("Intel(R) Integrated Sensor Hub PCI Device Driver");
  355. MODULE_LICENSE("GPL");